From: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
To: Brian Cain <brian.cain@oss.qualcomm.com>, qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
Subject: Re: [PATCH 3/8] target/hexagon: kick vCPU when re-asserting interrupts
Date: Thu, 3 Sep 2026 12:36:56 -0700 [thread overview]
Message-ID: <a00f97de-de13-4b6a-a096-704ea7446e10@oss.qualcomm.com> (raw)
In-Reply-To: <20260903185622.3234171-4-brian.cain@oss.qualcomm.com>
On 9/3/2026 11:56 AM, Brian Cain wrote:
> hex_interrupt_update() used cpu_resume() to make a halted vCPU notice a
> newly pending interrupt. cpu_resume() is meant for a vCPU stopped by the
> vm-state machinery: besides kicking the thread it clears cpu->stop and
> cpu->stopped, and resets exception_index to -1. Clearing the stop flags
> can undo a pause requested via the monitor or by migration, and resetting
> exception_index discards an exception the vCPU had already latched.
>
> Only the kick is wanted here, so call qemu_cpu_kick() directly.
>
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---
> target/hexagon/hex_interrupts.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
next prev parent reply other threads:[~2026-09-03 19:37 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-03 18:56 [PATCH 0/8] hexagon: fixes for tlb, badva Brian Cain
2026-09-03 18:56 ` [PATCH 1/8] hw/hexagon: register the V68N_1024 machine Brian Cain
2026-09-03 19:36 ` Pierrick Bouvier
2026-09-03 18:56 ` [PATCH 2/8] target/hexagon: read BADVA as an alias of BADVA0/1 Brian Cain
2026-09-03 19:36 ` Pierrick Bouvier
2026-09-03 18:56 ` [PATCH 3/8] target/hexagon: kick vCPU when re-asserting interrupts Brian Cain
2026-09-03 19:36 ` Pierrick Bouvier [this message]
2026-09-04 13:30 ` Philippe Mathieu-Daudé
2026-09-03 18:56 ` [PATCH 4/8] hw/intc: name the L2VIC edge trigger check Brian Cain
2026-09-03 19:37 ` Pierrick Bouvier
2026-09-04 13:31 ` Philippe Mathieu-Daudé
2026-09-03 18:56 ` [PATCH 5/8] target/hexagon: assert guest register pair alignment Brian Cain
2026-09-03 19:37 ` Pierrick Bouvier
2026-09-04 13:32 ` Philippe Mathieu-Daudé
2026-09-03 18:56 ` [PATCH 6/8] hexagon: raise imprecise exception for multi-TLB matches Brian Cain
2026-09-03 19:37 ` Pierrick Bouvier
2026-09-03 18:56 ` [PATCH 7/8] tests/functional/hexagon: add tests, update to v0.2.14 Brian Cain
2026-09-03 19:38 ` Pierrick Bouvier
2026-09-03 18:56 ` [PATCH 8/8] tests/functional/hexagon: update arch tests " Brian Cain
2026-09-03 19:38 ` Pierrick Bouvier
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