All of lore.kernel.org
 help / color / mirror / Atom feed
From: Srirangan Madhavan <smadhavan@nvidia.com>
To: "Cheatham, Benjamin" <benjamin.cheatham@amd.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Ira Weiny <ira.weiny@intel.com>,
	Jonathan Cameron <jic23@kernel.org>,
	Vishal Verma <vishal.l.verma@intel.com>,
	linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Alex Williamson <alex.williamson@redhat.com>,
	vsethi@nvidia.com, alwilliamson@nvidia.com,
	Sai Yashwanth Reddy Kancherla <skancherla@nvidia.com>,
	Vishal Aslot <vaslot@nvidia.com>,
	Manish Honap <mhonap@nvidia.com>, Jiandi An <jan@nvidia.com>,
	Richard Cheng <icheng@nvidia.com>,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH v13 08/15] cxl: Refresh cached PCI HDM decoder settings
Date: Thu, 1 Oct 2026 15:58:43 -0700	[thread overview]
Message-ID: <a2026252-44f8-4dcc-83f8-e838603a2ebd@nvidia.com> (raw)
In-Reply-To: <2c37c82b-8db6-44d1-868b-0b98bae57459@amd.com>

On 9/23/26 2:40 PM, Cheatham, Benjamin wrote:
> External email: Use caution opening links or attachments
> 
> 
> On 9/22/2026 3:39 AM, Srirangan Madhavan wrote:
>> Early PCI discovery creates the HDM cache, while later CXL enumeration and
>> decoder operations provide updated programming state.
>>
>> Refresh the PCI snapshot when decoders are enumerated, committed, or reset
>> so reset recovery need not walk the CXL topology. Ignore updates when no
>> cache exists and reject decoder-count mismatches.
>>
>> Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
>> ---
>>   drivers/cxl/core/hdm.c | 66 ++++++++++++++++++++++++++++++++++++++++++
>>   include/cxl/cxl.h      | 22 ++++++++++++++
>>   include/linux/pci.h    |  6 ++++
>>   3 files changed, 94 insertions(+)
>>
>> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
>> index 98268e8e15b2..0ae250ea4ce3 100644
>> --- a/drivers/cxl/core/hdm.c
>> +++ b/drivers/cxl/core/hdm.c
>> @@ -753,6 +753,51 @@ static void cxl_decoder_snapshot(struct cxl_decoder *cxld,
>>        }
>>   }
>>
>> +#ifdef CONFIG_CXL_RESET
> 
> The CXL maintainers are normally pretty against #ifdefs in c code. I was going to suggest
> moving it to resource.c, but it looks like cxl_decoder_snapshot() needs to also be in this
> file. So, I think the fix is to put:
> 
> if (!IS_ENABLED(CONFIG_CXL_RESET))
>          return;
> 
> immediately after the variable declarations.
> 

Fixed in v14 patch 9. Now cxl_hdm_refresh_decoder() is compiled without 
it. CXL_BUS selects CXL_RESET in patch 6, so whenever hdm.c is built, 
reset support is enabled; the IS_ENABLED() check is unnecessary.

>> +static void cxl_hdm_refresh_decoder(struct cxl_hdm *cxlhdm,
>> +                                 struct cxl_decoder *cxld)
>> +{
>> +     struct cxl_port *port = cxlhdm->port;
>> +     void __iomem *hdm = cxlhdm->regs.hdm_decoder;
>> +     struct pci_dev *pdev __free(pci_dev_put) =
>> +             cxl_port_get_uport_pci_dev(port);
> 
> This line needs to be at the first usage, i.e. right before "if (!pdev || !hdm)" below, to prevent
> lifetime bugs.
> 

In v14, the pdev declaration is immediately before if (!pdev || !hdm), 
so its cleanup lifetime begins at first use.

>> @@ -1089,9 +1136,27 @@ static int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
>>   {
>>        void __iomem *hdm = cxlhdm->regs.hdm_decoder;
>>        struct cxl_port *port = cxlhdm->port;
>> +#ifdef CONFIG_CXL_RESET
>> +     struct pci_dev *pdev __free(pci_dev_put) =
>> +             cxl_port_get_uport_pci_dev(port);
>> +#endif
> 
> This shouldn't be here, and if you move it to be inside the below if statement
> then you won't need the #ifdef as well.
> 
<snip>
>
>> +#endif
>> +
> 
> Add IS_ENABLED(CONFIG_CXL_RESET) to the above if condition, like above.
> 

pdev declaration is now inside the endpoint/HDM check, immediately 
before it is used. Removed the #ifdef. Since CXL_BUS selects CXL_RESET, 
an IS_ENABLED(CONFIG_CXL_RESET) condition is unnecessary whenever this 
function is built.

-- 
Regards,
Srirangan

  reply	other threads:[~2026-10-01 22:58 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-22  8:39 [PATCH v13 00/15] PCI/CXL: Add CXL reset support for Type 2 devices Srirangan Madhavan
2026-09-22  8:39 ` [PATCH v13 01/15] cxl: Drop stale decoder interleave limit comment Srirangan Madhavan
2026-09-22  8:41   ` sashiko-bot
2026-09-24  1:16   ` Jonathan Cameron
2026-09-24 16:23   ` Dave Jiang
2026-09-22  8:39 ` [PATCH v13 02/15] cxl: Share CXL port upstream PCI device lookup Srirangan Madhavan
2026-09-22  8:47   ` sashiko-bot
2026-09-23 21:39   ` Cheatham, Benjamin
2026-09-24  1:21     ` Jonathan Cameron
2026-09-24 16:55       ` Dave Jiang
2026-10-01 22:33       ` Srirangan Madhavan
2026-09-24  1:22   ` Jonathan Cameron
2026-10-01 22:28     ` Srirangan Madhavan
2026-09-24 17:01   ` Dave Jiang
2026-09-22  8:39 ` [PATCH v13 03/15] cxl: Move HDM decoder programming helpers Srirangan Madhavan
2026-09-22  8:50   ` sashiko-bot
2026-09-24  1:29   ` Jonathan Cameron
2026-10-01 23:40     ` Srirangan Madhavan
2026-09-24 17:02   ` Dave Jiang
2026-09-22  8:39 ` [PATCH v13 04/15] cxl: Move decoder declarations to shared header Srirangan Madhavan
2026-09-22  8:48   ` sashiko-bot
2026-09-24  1:31   ` Jonathan Cameron
2026-09-24 17:03   ` Dave Jiang
2026-09-22  8:39 ` [PATCH v13 05/15] cxl: Introduce reusable HDM decoder settings Srirangan Madhavan
2026-09-22  8:47   ` sashiko-bot
2026-09-23 21:39   ` Cheatham, Benjamin
2026-09-24  1:35     ` Jonathan Cameron
2026-10-01 22:43     ` Srirangan Madhavan
2026-09-24  2:45   ` Jonathan Cameron
2026-10-01 23:42     ` Srirangan Madhavan
2026-09-22  8:39 ` [PATCH v13 06/15] cxl: Make HDM reset helpers available to built-in PCI code Srirangan Madhavan
2026-09-22  8:54   ` sashiko-bot
2026-09-23 21:40   ` Cheatham, Benjamin
2026-09-24  2:49     ` Jonathan Cameron
2026-10-01 22:46     ` Srirangan Madhavan
2026-09-22  8:39 ` [PATCH v13 07/15] cxl: Share HDM decoder register unpacking Srirangan Madhavan
2026-09-22  8:55   ` sashiko-bot
2026-09-24  3:05   ` Jonathan Cameron
2026-10-01 23:52     ` Srirangan Madhavan
2026-09-22  8:39 ` [PATCH v13 08/15] cxl: Refresh cached PCI HDM decoder settings Srirangan Madhavan
2026-09-22  8:47   ` sashiko-bot
2026-09-23 21:40   ` Cheatham, Benjamin
2026-10-01 22:58     ` Srirangan Madhavan [this message]
2026-09-24  3:08   ` Jonathan Cameron
2026-09-22  8:39 ` [PATCH v13 09/15] cxl: Cache endpoint HDM state during PCI enumeration Srirangan Madhavan
2026-09-22  8:54   ` sashiko-bot
2026-09-23 21:40   ` Cheatham, Benjamin
2026-10-01 23:14     ` Srirangan Madhavan
2026-09-24  3:36   ` Jonathan Cameron
2026-10-01 23:55     ` Srirangan Madhavan
2026-09-22  8:39 ` [PATCH v13 10/15] cxl: Add CXL Device Reset sequencing Srirangan Madhavan
2026-09-22  8:49   ` sashiko-bot
2026-09-23 21:40   ` Cheatham, Benjamin
2026-09-24 17:29     ` Dave Jiang
2026-10-01 23:36     ` Srirangan Madhavan
2026-09-22  8:39 ` [PATCH v13 11/15] cxl: Validate and synchronize HDM ranges around reset Srirangan Madhavan
2026-09-22  8:51   ` sashiko-bot
2026-09-23 21:40   ` Cheatham, Benjamin
2026-10-01 23:25     ` Srirangan Madhavan
2026-09-22  8:39 ` [PATCH v13 12/15] PCI/CXL: Reject reset with unsafe function scope Srirangan Madhavan
2026-09-22  8:56   ` sashiko-bot
2026-09-23 21:41   ` Cheatham, Benjamin
2026-09-24 17:33     ` Dave Jiang
2026-09-22  8:39 ` [PATCH v13 13/15] cxl: Restore CXL state after PCI reset Srirangan Madhavan
2026-09-22  8:55   ` sashiko-bot
2026-09-24  3:50   ` Jonathan Cameron
2026-10-01 23:58     ` Srirangan Madhavan
2026-09-22  8:39 ` [PATCH v13 14/15] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-09-22  9:02   ` sashiko-bot
2026-09-22  8:39 ` [PATCH v13 15/15] PCI/CXL: Restore CXL state after CXL bus reset Srirangan Madhavan
2026-09-22  9:01   ` sashiko-bot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a2026252-44f8-4dcc-83f8-e838603a2ebd@nvidia.com \
    --to=smadhavan@nvidia.com \
    --cc=alex.williamson@redhat.com \
    --cc=alison.schofield@intel.com \
    --cc=alwilliamson@nvidia.com \
    --cc=benjamin.cheatham@amd.com \
    --cc=bhelgaas@google.com \
    --cc=dave.jiang@intel.com \
    --cc=dave@stgolabs.net \
    --cc=icheng@nvidia.com \
    --cc=ira.weiny@intel.com \
    --cc=jan@nvidia.com \
    --cc=jic23@kernel.org \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mhonap@nvidia.com \
    --cc=skancherla@nvidia.com \
    --cc=vaslot@nvidia.com \
    --cc=vishal.l.verma@intel.com \
    --cc=vsethi@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.