From: Anshuman Khandual <anshuman.khandual@arm.com>
To: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com,
Sami Mujawar <sami.mujawar@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Mike Leach <mike.leach@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
coresight@lists.linaro.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3 1/4] arm_pmu: acpi: Refactor arm_spe_acpi_register_device()
Date: Wed, 9 Aug 2023 12:31:56 +0530 [thread overview]
Message-ID: <a6b50669-37f2-98dd-e137-c76add8edbc0@arm.com> (raw)
In-Reply-To: <20230808132157.GB2369@willie-the-truck>
On 8/8/23 18:51, Will Deacon wrote:
> On Mon, Aug 07, 2023 at 11:03:40AM +0530, Anshuman Khandual wrote:
>> On 8/4/23 22:09, Will Deacon wrote:
>>> On Thu, Aug 03, 2023 at 11:43:27AM +0530, Anshuman Khandual wrote:
>>>> On 8/3/23 11:26, Anshuman Khandual wrote:
>>>>> + /*
>>>>> + * Sanity check all the GICC tables for the same interrupt
>>>>> + * number. For now, only support homogeneous ACPI machines.
>>>>> + */
>>>>> + for_each_possible_cpu(cpu) {
>>>>> + struct acpi_madt_generic_interrupt *gicc;
>>>>> +
>>>>> + gicc = acpi_cpu_get_madt_gicc(cpu);
>>>>> + if (gicc->header.length < len)
>>>>> + return gsi ? -ENXIO : 0;
>>>>> +
>>>>> + this_gsi = parse_gsi(gicc);
>>>>> + if (!this_gsi)
>>>>> + return gsi ? -ENXIO : 0;
>>>>
>>>> Moved parse_gsi() return code checking to its original place just to
>>>> make it similar in semantics to existing 'gicc->header.length check'.
>>>> If 'gsi' is valid i.e atleast a single cpu has been probed, return
>>>> -ENXIO indicating mismatch, otherwise just return 0.
>>>
>>> Wouldn't that still be the case without the check in this hunk? We'd run
>>> into the homogeneous check and return -ENXIO from there, no?
>> Although the return code will be the same i.e -ENXIO, but not for the same reason.
>>
>> this_gsi = parse_gsi(gicc);
>> if (!this_gsi)
>> return gsi ? -ENXIO : 0;
>>
>> This returns 0 when IRQ could not be parsed for the first cpu, but returns -ENXIO
>> for subsequent cpus. Although return code -ENXIO here still indicates IRQ parsing
>> to have failed.
>>
>> } else if (hetid != this_hetid || gsi != this_gsi) {
>> pr_warn("ACPI: %s: must be homogeneous\n", pdev->name);
>> return -ENXIO;
>> }
>>
>> This returns -ENXIO when there is a IRQ mismatch. But if the above check is not
>> there, -ENXIO return code here could not be classified into IRQ parse problem or
>> mismatch without looking into the IRQ value.
>
> Sorry, but I don't understand your point here. If any of this fails, there's
> going to be some debugging needed to look at the ACPI tables; the only
> difference with my suggestion is that you'll get a message indicating that
> the devices aren't homogeneous, which I think is helpful.
I dont have strong opinion either way. Hence will move 'this_gsi' check inside the
!gsi conditional check like you had suggested earlier.
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WARNING: multiple messages have this Message-ID (diff)
From: Anshuman Khandual <anshuman.khandual@arm.com>
To: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com,
Sami Mujawar <sami.mujawar@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Mike Leach <mike.leach@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
coresight@lists.linaro.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3 1/4] arm_pmu: acpi: Refactor arm_spe_acpi_register_device()
Date: Wed, 9 Aug 2023 12:31:56 +0530 [thread overview]
Message-ID: <a6b50669-37f2-98dd-e137-c76add8edbc0@arm.com> (raw)
In-Reply-To: <20230808132157.GB2369@willie-the-truck>
On 8/8/23 18:51, Will Deacon wrote:
> On Mon, Aug 07, 2023 at 11:03:40AM +0530, Anshuman Khandual wrote:
>> On 8/4/23 22:09, Will Deacon wrote:
>>> On Thu, Aug 03, 2023 at 11:43:27AM +0530, Anshuman Khandual wrote:
>>>> On 8/3/23 11:26, Anshuman Khandual wrote:
>>>>> + /*
>>>>> + * Sanity check all the GICC tables for the same interrupt
>>>>> + * number. For now, only support homogeneous ACPI machines.
>>>>> + */
>>>>> + for_each_possible_cpu(cpu) {
>>>>> + struct acpi_madt_generic_interrupt *gicc;
>>>>> +
>>>>> + gicc = acpi_cpu_get_madt_gicc(cpu);
>>>>> + if (gicc->header.length < len)
>>>>> + return gsi ? -ENXIO : 0;
>>>>> +
>>>>> + this_gsi = parse_gsi(gicc);
>>>>> + if (!this_gsi)
>>>>> + return gsi ? -ENXIO : 0;
>>>>
>>>> Moved parse_gsi() return code checking to its original place just to
>>>> make it similar in semantics to existing 'gicc->header.length check'.
>>>> If 'gsi' is valid i.e atleast a single cpu has been probed, return
>>>> -ENXIO indicating mismatch, otherwise just return 0.
>>>
>>> Wouldn't that still be the case without the check in this hunk? We'd run
>>> into the homogeneous check and return -ENXIO from there, no?
>> Although the return code will be the same i.e -ENXIO, but not for the same reason.
>>
>> this_gsi = parse_gsi(gicc);
>> if (!this_gsi)
>> return gsi ? -ENXIO : 0;
>>
>> This returns 0 when IRQ could not be parsed for the first cpu, but returns -ENXIO
>> for subsequent cpus. Although return code -ENXIO here still indicates IRQ parsing
>> to have failed.
>>
>> } else if (hetid != this_hetid || gsi != this_gsi) {
>> pr_warn("ACPI: %s: must be homogeneous\n", pdev->name);
>> return -ENXIO;
>> }
>>
>> This returns -ENXIO when there is a IRQ mismatch. But if the above check is not
>> there, -ENXIO return code here could not be classified into IRQ parse problem or
>> mismatch without looking into the IRQ value.
>
> Sorry, but I don't understand your point here. If any of this fails, there's
> going to be some debugging needed to look at the ACPI tables; the only
> difference with my suggestion is that you'll get a message indicating that
> the devices aren't homogeneous, which I think is helpful.
I dont have strong opinion either way. Hence will move 'this_gsi' check inside the
!gsi conditional check like you had suggested earlier.
next prev parent reply other threads:[~2023-08-09 7:02 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-03 5:56 [PATCH V3 0/4] coresight: trbe: Enable ACPI based devices Anshuman Khandual
2023-08-03 5:56 ` Anshuman Khandual
2023-08-03 5:56 ` [PATCH V3 1/4] arm_pmu: acpi: Refactor arm_spe_acpi_register_device() Anshuman Khandual
2023-08-03 5:56 ` Anshuman Khandual
2023-08-03 6:13 ` Anshuman Khandual
2023-08-03 6:13 ` Anshuman Khandual
2023-08-04 16:39 ` Will Deacon
2023-08-04 16:39 ` Will Deacon
2023-08-07 5:33 ` Anshuman Khandual
2023-08-07 5:33 ` Anshuman Khandual
2023-08-08 13:21 ` Will Deacon
2023-08-08 13:21 ` Will Deacon
2023-08-09 7:01 ` Anshuman Khandual [this message]
2023-08-09 7:01 ` Anshuman Khandual
2023-08-03 5:56 ` [PATCH V3 2/4] arm_pmu: acpi: Add a representative platform device for TRBE Anshuman Khandual
2023-08-03 5:56 ` Anshuman Khandual
2023-08-03 9:14 ` Yicong Yang
2023-08-03 9:14 ` Yicong Yang
2023-08-04 9:34 ` Anshuman Khandual
2023-08-04 9:34 ` Anshuman Khandual
2023-08-04 10:01 ` Anshuman Khandual
2023-08-04 10:01 ` Anshuman Khandual
2023-08-03 5:56 ` [PATCH V3 3/4] coresight: trbe: Add a representative coresight_platform_data " Anshuman Khandual
2023-08-03 5:56 ` Anshuman Khandual
2023-08-03 13:55 ` Suzuki K Poulose
2023-08-03 13:55 ` Suzuki K Poulose
2023-08-04 9:18 ` Anshuman Khandual
2023-08-04 9:18 ` Anshuman Khandual
2023-08-04 10:04 ` Suzuki K Poulose
2023-08-04 10:04 ` Suzuki K Poulose
2023-08-03 5:56 ` [PATCH V3 4/4] coresight: trbe: Enable ACPI based TRBE devices Anshuman Khandual
2023-08-03 5:56 ` Anshuman Khandual
2023-08-07 4:43 ` Anshuman Khandual
2023-08-07 4:43 ` Anshuman Khandual
2023-08-07 11:37 ` Suzuki K Poulose
2023-08-07 11:37 ` Suzuki K Poulose
2023-08-07 11:58 ` Anshuman Khandual
2023-08-07 11:58 ` Anshuman Khandual
2023-08-13 21:43 ` kernel test robot
2023-08-13 21:43 ` kernel test robot
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