From: Charlie Jenkins <charlie@rivosinc.com>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org,
Samuel Holland <samuel.holland@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>,
Deepak Gupta <debug@rivosinc.com>
Subject: Re: [PATCH v8 07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
Date: Fri, 23 May 2025 11:37:14 -0700 [thread overview]
Message-ID: <aDDAWmNlr_mzrdLm@ghost> (raw)
In-Reply-To: <20250523101932.1594077-8-cleger@rivosinc.com>
On Fri, May 23, 2025 at 12:19:24PM +0200, Clément Léger wrote:
> schedule_on_each_cpu() was used without any good reason while documented
> as very slow. This call was in the boot path, so better use
> on_each_cpu() for scalar misaligned checking. Vector misaligned check
> still needs to use schedule_on_each_cpu() since it requires irqs to be
> enabled but that's less of a problem since this code is ran in a kthread.
> Add a comment to explicit that.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Tested-by: Charlie Jenkins <charlie@rivosinc.com>
> ---
> arch/riscv/kernel/traps_misaligned.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index 592b1a28e897..34b4a4e9dfca 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -627,6 +627,10 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void)
> {
> int cpu;
>
> + /*
> + * While being documented as very slow, schedule_on_each_cpu() is used since
> + * kernel_vector_begin() expects irqs to be enabled or it will panic()
> + */
> schedule_on_each_cpu(check_vector_unaligned_access_emulated);
>
> for_each_online_cpu(cpu)
> @@ -647,7 +651,7 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void)
>
> static bool unaligned_ctl __read_mostly;
>
> -static void check_unaligned_access_emulated(struct work_struct *work __always_unused)
> +static void check_unaligned_access_emulated(void *arg __always_unused)
> {
> int cpu = smp_processor_id();
> long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);
> @@ -688,7 +692,7 @@ bool __init check_unaligned_access_emulated_all_cpus(void)
> * accesses emulated since tasks requesting such control can run on any
> * CPU.
> */
> - schedule_on_each_cpu(check_unaligned_access_emulated);
> + on_each_cpu(check_unaligned_access_emulated, NULL, 1);
>
> for_each_online_cpu(cpu)
> if (per_cpu(misaligned_access_speed, cpu)
> --
> 2.49.0
>
--
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Charlie Jenkins <charlie@rivosinc.com>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org,
Samuel Holland <samuel.holland@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>,
Deepak Gupta <debug@rivosinc.com>
Subject: Re: [PATCH v8 07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
Date: Fri, 23 May 2025 11:37:14 -0700 [thread overview]
Message-ID: <aDDAWmNlr_mzrdLm@ghost> (raw)
In-Reply-To: <20250523101932.1594077-8-cleger@rivosinc.com>
On Fri, May 23, 2025 at 12:19:24PM +0200, Clément Léger wrote:
> schedule_on_each_cpu() was used without any good reason while documented
> as very slow. This call was in the boot path, so better use
> on_each_cpu() for scalar misaligned checking. Vector misaligned check
> still needs to use schedule_on_each_cpu() since it requires irqs to be
> enabled but that's less of a problem since this code is ran in a kthread.
> Add a comment to explicit that.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Tested-by: Charlie Jenkins <charlie@rivosinc.com>
> ---
> arch/riscv/kernel/traps_misaligned.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index 592b1a28e897..34b4a4e9dfca 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -627,6 +627,10 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void)
> {
> int cpu;
>
> + /*
> + * While being documented as very slow, schedule_on_each_cpu() is used since
> + * kernel_vector_begin() expects irqs to be enabled or it will panic()
> + */
> schedule_on_each_cpu(check_vector_unaligned_access_emulated);
>
> for_each_online_cpu(cpu)
> @@ -647,7 +651,7 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void)
>
> static bool unaligned_ctl __read_mostly;
>
> -static void check_unaligned_access_emulated(struct work_struct *work __always_unused)
> +static void check_unaligned_access_emulated(void *arg __always_unused)
> {
> int cpu = smp_processor_id();
> long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);
> @@ -688,7 +692,7 @@ bool __init check_unaligned_access_emulated_all_cpus(void)
> * accesses emulated since tasks requesting such control can run on any
> * CPU.
> */
> - schedule_on_each_cpu(check_unaligned_access_emulated);
> + on_each_cpu(check_unaligned_access_emulated, NULL, 1);
>
> for_each_online_cpu(cpu)
> if (per_cpu(misaligned_access_speed, cpu)
> --
> 2.49.0
>
WARNING: multiple messages have this Message-ID (diff)
From: Charlie Jenkins <charlie@rivosinc.com>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org,
Samuel Holland <samuel.holland@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>,
Deepak Gupta <debug@rivosinc.com>
Subject: Re: [PATCH v8 07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing
Date: Fri, 23 May 2025 11:37:14 -0700 [thread overview]
Message-ID: <aDDAWmNlr_mzrdLm@ghost> (raw)
In-Reply-To: <20250523101932.1594077-8-cleger@rivosinc.com>
On Fri, May 23, 2025 at 12:19:24PM +0200, Clément Léger wrote:
> schedule_on_each_cpu() was used without any good reason while documented
> as very slow. This call was in the boot path, so better use
> on_each_cpu() for scalar misaligned checking. Vector misaligned check
> still needs to use schedule_on_each_cpu() since it requires irqs to be
> enabled but that's less of a problem since this code is ran in a kthread.
> Add a comment to explicit that.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Tested-by: Charlie Jenkins <charlie@rivosinc.com>
> ---
> arch/riscv/kernel/traps_misaligned.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index 592b1a28e897..34b4a4e9dfca 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -627,6 +627,10 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void)
> {
> int cpu;
>
> + /*
> + * While being documented as very slow, schedule_on_each_cpu() is used since
> + * kernel_vector_begin() expects irqs to be enabled or it will panic()
> + */
> schedule_on_each_cpu(check_vector_unaligned_access_emulated);
>
> for_each_online_cpu(cpu)
> @@ -647,7 +651,7 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void)
>
> static bool unaligned_ctl __read_mostly;
>
> -static void check_unaligned_access_emulated(struct work_struct *work __always_unused)
> +static void check_unaligned_access_emulated(void *arg __always_unused)
> {
> int cpu = smp_processor_id();
> long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);
> @@ -688,7 +692,7 @@ bool __init check_unaligned_access_emulated_all_cpus(void)
> * accesses emulated since tasks requesting such control can run on any
> * CPU.
> */
> - schedule_on_each_cpu(check_unaligned_access_emulated);
> + on_each_cpu(check_unaligned_access_emulated, NULL, 1);
>
> for_each_online_cpu(cpu)
> if (per_cpu(misaligned_access_speed, cpu)
> --
> 2.49.0
>
_______________________________________________
linux-riscv mailing list
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http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2025-05-23 18:37 UTC|newest]
Thread overview: 123+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-23 10:19 [PATCH v8 00/14] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` [PATCH v8 01/14] riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` [PATCH v8 02/14] riscv: sbi: remove useless parenthesis Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` [PATCH v8 03/14] riscv: sbi: add new SBI error mappings Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` [PATCH v8 04/14] riscv: sbi: add FWFT extension interface Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` [PATCH v8 05/14] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` [PATCH v8 06/14] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-12-25 10:14 ` Vivian Wang
2025-12-25 10:14 ` Vivian Wang
2025-12-25 10:14 ` Vivian Wang
2025-12-28 13:46 ` Clément Léger
2025-12-28 13:46 ` Clément Léger
2025-12-28 13:46 ` Clément Léger
2025-05-23 10:19 ` [PATCH v8 07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 18:37 ` Charlie Jenkins [this message]
2025-05-23 18:37 ` Charlie Jenkins
2025-05-23 18:37 ` Charlie Jenkins
2025-05-23 10:19 ` [PATCH v8 08/14] riscv: misaligned: declare misaligned_access_speed under CONFIG_RISCV_MISALIGNED Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 18:36 ` Charlie Jenkins
2025-05-23 18:36 ` Charlie Jenkins
2025-05-23 18:36 ` Charlie Jenkins
2025-05-29 12:43 ` Andrew Jones
2025-05-29 12:43 ` Andrew Jones
2025-05-29 12:43 ` Andrew Jones
2025-05-23 10:19 ` [PATCH v8 09/14] riscv: misaligned: move emulated access uniformity check in a function Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 18:30 ` Charlie Jenkins
2025-05-23 18:30 ` Charlie Jenkins
2025-05-23 18:30 ` Charlie Jenkins
2025-05-23 19:21 ` Clément Léger
2025-05-23 19:21 ` Clément Léger
2025-05-23 19:21 ` Clément Léger
2025-05-26 8:41 ` Andrew Jones
2025-05-26 8:41 ` Andrew Jones
2025-05-26 8:41 ` Andrew Jones
2025-05-26 9:38 ` Clément Léger
2025-05-26 9:38 ` Clément Léger
2025-05-26 9:38 ` Clément Léger
2025-05-23 10:19 ` [PATCH v8 10/14] riscv: misaligned: add a function to check misalign trap delegability Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 18:39 ` Charlie Jenkins
2025-05-23 18:39 ` Charlie Jenkins
2025-05-23 18:39 ` Charlie Jenkins
2025-05-23 10:19 ` [PATCH v8 11/14] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-06-12 13:24 ` Anup Patel
2025-06-12 13:24 ` Anup Patel
2025-06-12 13:24 ` Anup Patel
2025-05-23 10:19 ` [PATCH v8 12/14] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-06-12 13:24 ` Anup Patel
2025-06-12 13:24 ` Anup Patel
2025-06-12 13:24 ` Anup Patel
2025-05-23 10:19 ` [PATCH v8 13/14] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 13:05 ` Radim Krčmář
2025-05-23 13:05 ` Radim Krčmář
2025-05-23 13:05 ` Radim Krčmář
2025-05-23 15:29 ` Clément Léger
2025-05-23 15:29 ` Clément Léger
2025-05-23 15:29 ` Clément Léger
2025-05-23 16:27 ` Radim Krčmář
2025-05-23 16:27 ` Radim Krčmář
2025-05-23 16:27 ` Radim Krčmář
2025-05-23 18:02 ` Atish Patra
2025-05-23 18:02 ` Atish Patra
2025-05-23 18:02 ` Atish Patra
2025-05-23 19:23 ` Clément Léger
2025-05-23 19:23 ` Clément Léger
2025-05-23 19:23 ` Clément Léger
2025-05-26 8:58 ` Radim Krčmář
2025-05-26 8:58 ` Radim Krčmář
2025-05-26 8:58 ` Radim Krčmář
2025-06-12 13:25 ` Anup Patel
2025-06-12 13:25 ` Anup Patel
2025-06-12 13:25 ` Anup Patel
2025-05-23 10:19 ` [PATCH v8 14/14] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 10:19 ` Clément Léger
2025-05-23 13:08 ` Radim Krčmář
2025-05-23 13:08 ` Radim Krčmář
2025-05-23 13:08 ` Radim Krčmář
2025-06-12 13:26 ` Anup Patel
2025-06-12 13:26 ` Anup Patel
2025-06-12 13:26 ` Anup Patel
2025-06-04 18:02 ` [PATCH v8 00/14] riscv: add SBI FWFT misaligned exception delegation support Palmer Dabbelt
2025-06-04 18:02 ` Palmer Dabbelt
2025-06-04 18:02 ` Palmer Dabbelt
2025-06-04 19:32 ` Charlie Jenkins
2025-06-04 19:32 ` Charlie Jenkins
2025-06-04 19:32 ` Charlie Jenkins
2025-06-05 7:12 ` Alexandre Ghiti
2025-06-05 7:12 ` Alexandre Ghiti
2025-06-05 7:12 ` Alexandre Ghiti
2025-06-05 1:30 ` patchwork-bot+linux-riscv
2025-06-05 1:30 ` patchwork-bot+linux-riscv
2025-06-05 1:30 ` patchwork-bot+linux-riscv
2025-08-10 21:12 ` patchwork-bot+linux-riscv
2025-08-10 21:12 ` patchwork-bot+linux-riscv
2025-08-10 21:12 ` patchwork-bot+linux-riscv
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