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From: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Daniel P. Smith" <dpsmith@apertussolutions.com>,
	"Ross Philipson" <ross.philipson@oracle.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	"Lukasz Hawrylko" <lukasz@hawrylko.pl>,
	"Mateusz Mówka" <mateusz.mowka@intel.com>,
	trenchboot-devel@googlegroups.com,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 01/22] x86/include/asm/intel-txt.h: constants and accessors for TXT registers and heap
Date: Fri, 23 May 2025 22:51:08 +0300	[thread overview]
Message-ID: <aDDRrOviNNSvFig8@MjU3Nj> (raw)
In-Reply-To: <bf892a80-fe3c-4163-b857-9d073a093451@suse.com>

On Wed, May 21, 2025 at 05:19:57PM +0200, Jan Beulich wrote:
> > +/*
> > + * The same set of registers is exposed twice (with different permissions) and
> > + * they are allocated continuously with page alignment.
> > + */
> > +#define NR_TXT_CONFIG_SIZE \
> > +    (TXT_PUB_CONFIG_REGS_BASE - TXT_PRIV_CONFIG_REGS_BASE)
>
> What does the NR_ in the identifier try to express?

That's a leftover from the original name inside tboot.c, I'll rename it
to TXT_CONFIG_SPACE_SIZE.

> > +/*
> > + * Secure Launch defined OS/MLE TXT Heap table
> > + */
> > +struct txt_os_mle_data {
> > +    uint32_t version;
> > +    uint32_t reserved;
> > +    uint64_t slrt;
> > +    uint64_t txt_info;
> > +    uint32_t ap_wake_block;
> > +    uint32_t ap_wake_block_size;
> > +    uint8_t mle_scratch[64];
> > +} __packed;
>
> This being x86-specific, what's the __packed intended to achieve here?

This structure is passed to Xen by a bootloader, __packed makes sure the
structure has a compatible layout.

> > +/*
> > + * TXT specification defined BIOS data TXT Heap table
> > + */
> > +struct txt_bios_data {
> > +    uint32_t version; /* Currently 5 for TPM 1.2 and 6 for TPM 2.0 */
> > +    uint32_t bios_sinit_size;
> > +    uint64_t reserved1;
> > +    uint64_t reserved2;
> > +    uint32_t num_logical_procs;
> > +    /* Versions >= 3 && < 5 */
> > +    uint32_t sinit_flags;
> > +    /* Versions >= 5 with updates in version 6 */
> > +    uint32_t mle_flags;
> > +    /* Versions >= 4 */
> > +    /* Ext Data Elements */
> > +} __packed;
>
> It does affect sizeof() here, which I'm unsure is going to matter.

It doesn't hurt anything and makes sure offsets match those in the
specification.

> > +static inline uint64_t txt_bios_data_size(void *heap)
>
> Here, below, and in general: Please try to have code be const-correct, i.e.
> use pointers-to-const wherever applicable.

I assume this doesn't apply to functions returning `void *`.  The
approach used in libc is to accept pointers-to-const but then cast the
constness away for the return value, but this header isn't a widely-used
code.

> > +{
> > +    return *((uint64_t *)heap) - sizeof(uint64_t);
>
> For readability it generally helps if excess parentheses like the ones here
> are omitted.

OK.

> > +static inline uint64_t txt_os_mle_data_size(void *heap)
> > +{
> > +    return *((uint64_t *)(txt_bios_data_start(heap) +
> > +                          txt_bios_data_size(heap))) -
> > +        sizeof(uint64_t);
>
> This line wants indenting a little further, such that the"sizeof" aligns
> with the start of the expression. (Same elsewhere below.)
>
> Jan

Will update.

Regards


  reply	other threads:[~2025-05-23 19:51 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-13 17:05 [PATCH v2 00/22] x86: Trenchboot Secure Launch DRTM (Xen) Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 01/22] x86/include/asm/intel-txt.h: constants and accessors for TXT registers and heap Sergii Dmytruk
2025-05-14 14:55   ` Andrew Cooper
2025-05-14 20:09     ` Krystian Hebel
2025-05-18 18:35     ` Sergii Dmytruk
2025-05-18 23:31       ` Rich Persaud
2025-05-19 13:43         ` Sergii Dmytruk
2025-05-19 20:55           ` Rich Persaud
2025-05-21 15:05     ` Jan Beulich
2025-05-21 15:19   ` Jan Beulich
2025-05-23 19:51     ` Sergii Dmytruk [this message]
2025-06-02  7:17       ` Jan Beulich
2025-06-02 22:00         ` Sergii Dmytruk
2025-06-03  7:06           ` Jan Beulich
2025-06-03  8:50             ` Sergii Dmytruk
2025-06-03  8:52               ` Jan Beulich
2025-06-03 15:20                 ` Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 02/22] include/xen/slr-table.h: Secure Launch Resource Table definitions Sergii Dmytruk
2025-05-21 15:45   ` Jan Beulich
2025-05-21 15:50     ` Andrew Cooper
2025-05-23 22:19     ` Sergii Dmytruk
2025-06-02  7:31       ` Jan Beulich
2025-06-02 22:19         ` Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 03/22] x86/boot: add MLE header and Secure Launch entry point Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 04/22] x86/boot/slaunch-early: implement early initialization Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 05/22] x86/boot/slaunch-early: early TXT checks and boot data retrieval Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 06/22] xen/arch/x86: reserve TXT memory during Slaunch Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 07/22] x86/mtrr: expose functions for pausing caching Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 08/22] x86/slaunch: restore boot MTRRs after Intel TXT DRTM Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 09/22] xen/lib: add implementation of SHA-1 Sergii Dmytruk
2025-05-14 16:58   ` Andrew Cooper
2025-05-17 18:17     ` Sergii Dmytruk
2025-05-18  8:34       ` Jan Beulich
2025-05-18 11:32         ` Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 10/22] x86/tpm.c: code for early hashing and extending PCRs (for TPM1.2) Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 11/22] x86/tpm.c: support extending PCRs of TPM2.0 Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 12/22] x86/hvm: check for VMX in SMX if Slaunch is active Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 13/22] x86/tpm.c: implement event log for TPM2.0 Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 14/22] x86/boot: choose AP stack based on APIC ID Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 15/22] x86/smpboot.c: TXT AP bringup Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 16/22] x86/slaunch: process DRTM policy Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 17/22] x86/acpi: disallow S3 on Secure Launch boot Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 18/22] x86/boot/slaunch-early: find MBI and SLRT on AMD Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 19/22] x86/slaunch: support AMD SKINIT Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 20/22] x86/slaunch: support EFI boot Sergii Dmytruk
2025-05-14  1:25   ` Demi Marie Obenour
2025-05-14 14:24     ` Sergii Dmytruk
2025-05-14 15:58       ` Demi Marie Obenour
2025-05-14 16:12         ` Marek Marczykowski-Górecki
2025-05-15 14:39         ` Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 21/22] x86/cpu: report SMX, TXT and SKINIT capabilities Sergii Dmytruk
2025-05-13 17:05 ` [PATCH v2 22/22] MAINTAINERS: add a section for TrenchBoot Slaunch Sergii Dmytruk
2025-05-14  6:36   ` Jan Beulich

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