From: dmukhin@xen.org
To: Stefano Stabellini <stefano.stabellini@amd.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>,
xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com,
anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org,
michal.orzel@amd.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: Re: [PATCH v5 15/15] emul/ns16x50: implement IRQ emulation via vIOAPIC
Date: Fri, 5 Sep 2025 16:44:53 -0700 [thread overview]
Message-ID: <aLt19UfW2wIonyDK@kraken> (raw)
In-Reply-To: <alpine.DEB.2.22.394.2509051557060.1405870@ubuntu-linux-20-04-desktop>
On Fri, Sep 05, 2025 at 04:01:15PM -0700, Stefano Stabellini wrote:
> On Fri, 5 Sep 2025, dmukhin@xen.org wrote:
> > On Fri, Aug 29, 2025 at 03:21:13PM -0700, Stefano Stabellini wrote:
> > > On Thu, 28 Aug 2025, dmukhin@xen.org wrote:
> > > > From: Denis Mukhin <dmukhin@ford.com>
> > > >
> > > > PVH domains use vIOAPIC, not vPIC and NS16550 emulates ISA IRQs which cannot
> > > > be asserted on vIOAPIC.
> > >
> > > One option is to enable the vPIT for PVH domains when the NS16550
> > > emulator is enabled. Would that resolve the problem? That would be a
> > > simpler solution compared to adding IRQ_EMU because the IRQ_* logic is
> > > already quite complex.
> >
> > vPIC? (PIT is timer).
> >
> > I tried to enable vPIC for hwdom, but there's some more work to make it work
> > :-/
> >
> > >
> > > Alternatively...
> > [..]
> > >
> > > > --- a/xen/arch/x86/hvm/vioapic.c
> > > > +++ b/xen/arch/x86/hvm/vioapic.c
> > > > @@ -177,6 +177,16 @@ static int vioapic_hwdom_map_gsi(unsigned int gsi, unsigned int trig,
> > > >
> > > > ASSERT(is_hardware_domain(currd));
> > > >
> > > > + /*
> > > > + * Interrupt is claimed by one of the platform virtual devices (e.g.
> > > > + * NS16550); do nothing.
> > > > + */
> > > > + write_lock(&currd->event_lock);
> > > > + ret = domain_irq_to_emuirq(currd, gsi);
> > > > + write_unlock(&currd->event_lock);
> > > > + if ( ret != IRQ_UNBOUND )
> > > > + return 0;
> > >
> > > ..alternatively, we could have an add-hoc check here? Not very nice but
> > > at least it would be very simple.
> > >
> > > In other words, adding vPIT is preferable in my opinion but as a second
> > > option I would consider an ad-hoc check. I would try to avoid adding
> > > IRQ_EMU -- that should be the last resort in my view.
> >
> > In my opinion, IRQ_EMU falls into category of an ad-hoc.
> >
> > I think vioapic_hwdom_map_gsi() should not depend on the presence of certain
> > virtual devices but rely on some global flag, e.g. via quering
> > domain_irq_to_emuirq() infra.
>
> Hi Denis, the reason why IRQ_EMU is dangerous is that there are a bunch
> of checks emuirq != IRQ_PT and also emuirq != IRQ_MSI_EMU which I don't
> know if they would still behave correctly after the introduction of
> IRQ_EMU.
!= IRQ_PT checks (arch/x86/irq.c) are done from map_domain_emuirq_pirq()
and unmap_domain_pirq_emuirq() which I use for IRQ_EMU case.
Those checks are needed to correctly allocate an "ad-hoc flag" in a radix
"IRQ_EMU" tree, i.e. IRQ_EMU case is handled correctly.
!= IRQ_MSI_EMU check (there's only one in arch/x86/hvm/irq.c) is done from
hvm_inject_msi(), it guarantees that IRQ_EMU case is handled correctly.
>
> I would prefer to avoid the problem if possible...
prev parent reply other threads:[~2025-09-05 23:45 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-28 23:53 [PATCH v5 00/15] x86: introduce NS16550-compatible UART emulator dmukhin
2025-08-28 23:53 ` [PATCH v5 01/15] emul/vuart: introduce framework for UART emulators dmukhin
2025-08-29 19:27 ` Stefano Stabellini
2025-09-01 8:14 ` Jan Beulich
2025-09-01 22:27 ` dmukhin
2025-09-02 6:14 ` Jan Beulich
2025-09-01 22:11 ` dmukhin
2025-08-28 23:53 ` [PATCH v5 02/15] xen/8250-uart: update definitions dmukhin
2025-08-29 19:32 ` Stefano Stabellini
2025-09-01 22:28 ` dmukhin
2025-08-28 23:53 ` [PATCH v5 03/15] emul/ns16x50: implement emulator stub dmukhin
2025-08-29 19:57 ` Stefano Stabellini
2025-09-01 23:11 ` dmukhin
2025-09-02 9:32 ` Jan Beulich
2025-09-05 23:34 ` dmukhin
2025-09-06 0:07 ` dmukhin
2025-09-02 9:36 ` Jan Beulich
2025-09-05 23:34 ` dmukhin
2025-08-28 23:53 ` [PATCH v5 04/15] emul/ns16x50: implement DLL/DLM registers dmukhin
2025-08-28 23:53 ` [PATCH v5 05/15] emul/ns16x50: implement EIR/IIR registers dmukhin
2025-08-29 20:14 ` Stefano Stabellini
2025-09-05 22:05 ` dmukhin
2025-08-28 23:54 ` [PATCH v5 06/15] emul/ns16x50: implement THR/RBR registers dmukhin
2025-08-29 20:28 ` Stefano Stabellini
2025-08-29 20:34 ` Stefano Stabellini
2025-09-05 22:29 ` dmukhin
2025-09-05 22:20 ` dmukhin
2025-08-28 23:54 ` [PATCH v5 07/15] emul/ns16x50: implement FCR register (write-only) dmukhin
2025-08-29 20:38 ` Stefano Stabellini
2025-09-05 22:33 ` dmukhin
2025-08-28 23:54 ` [PATCH v5 08/15] emul/ns16x50: implement LCR/LSR registers dmukhin
2025-08-28 23:54 ` [PATCH v5 09/15] emul/ns16x50: implement MCR/MSR registers dmukhin
2025-08-28 23:54 ` [PATCH v5 10/15] emul/ns16x50: implement SCR register dmukhin
2025-08-28 23:54 ` [PATCH v5 11/15] emul/ns16x50: implement put_rx() hook dmukhin
2025-08-28 23:54 ` [PATCH v5 12/15] emul/ns16550: implement dump_state() hook dmukhin
2025-08-28 23:54 ` [PATCH v5 13/15] x86/domain: enable per-domain I/O port bitmaps dmukhin
2025-08-29 21:43 ` Stefano Stabellini
2025-09-05 22:38 ` dmukhin
2025-08-28 23:54 ` [PATCH v5 14/15] xen/domain: allocate d->irq_caps before arch-specific initialization dmukhin
2025-08-29 21:46 ` Stefano Stabellini
2025-09-05 22:43 ` dmukhin
2025-08-28 23:54 ` [PATCH v5 15/15] emul/ns16x50: implement IRQ emulation via vIOAPIC dmukhin
2025-08-29 22:21 ` Stefano Stabellini
2025-09-05 22:54 ` dmukhin
2025-09-05 23:01 ` Stefano Stabellini
2025-09-05 23:44 ` dmukhin [this message]
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