From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Lucas Tanure <tanure@linux.com>,
xianwei.zhao@amlogic.com, Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [RFC PATCH 3/6] net: stmmac: dwmac-meson8b: add support for the Amlogic T7
Date: Sun, 4 Oct 2026 23:13:29 +0200 [thread overview]
Message-ID: <aafea01f-546e-47de-9e1d-e404450e78c5@bootlin.com> (raw)
In-Reply-To: <20261004144046.391444-4-tanure@linux.com>
Hi Lucas,
On 10/4/26 16:40, Lucas Tanure wrote:
> The glue registers on the T7 are laid out exactly as the G12A ones, RX
> delay field included, so the T7 can reuse the G12A settings.
>
> What the T7 does not share is how the controller reaches DRAM: the bus
> path goes through a pipeline stage with a gate of its own, and no device
> other than the controller has any use for that gate. Claim it and hold
> it enabled for as long as the controller is bound, otherwise it is
> switched off as unused and a transfer that has been started can never
> complete.
>
> Give the T7 match data of its own so that only it looks the clock up,
> and require the clock instead of treating it as optional: the controller
> cannot do DMA without it, and failing the probe with a clear message
> beats booting and hitting an undiagnosable hang later.
>
> Assisted-by: LLM
> Signed-off-by: Lucas Tanure <tanure@linux.com>
> ---
[...]
>
> +static const struct meson8b_dwmac_data meson_t7_dwmac_data = {
> + .set_phy_mode = meson_axg_set_phy_mode,
> + .has_prg_eth1_rgmii_rx_delay = true,
Hmpf sorry this falls onto your series, but looking at the code it seems
that this glue has the RGMII handling backwards...
In meson8b_init_rgmii_delays :
switch (dwmac->phy_mode) {
case PHY_INTERFACE_MODE_RGMII:
delay_config = tx_dly_config | rx_adj_config;
break;
case PHY_INTERFACE_MODE_RGMII_RXID:
delay_config = tx_dly_config;
cfg_rxclk_dly = 0;
break;
case PHY_INTERFACE_MODE_RGMII_TXID:
delay_config = rx_adj_config;
break;
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RMII:
delay_config = 0;
cfg_rxclk_dly = 0;
This is the behaviour one would expect from a PHY perspective.
And indeed, 66 amlogic dts have "phy-mode = rgmii".
grep "phy-mode = \"rgmii\"" $(find arch/ | grep amlogic) | wc -l
66
I really think all these 66 "rgmii" instance should have been "rgmii-id"...
It's probably too late to change that though :(
Maxime
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Lucas Tanure <tanure@linux.com>,
xianwei.zhao@amlogic.com, Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [RFC PATCH 3/6] net: stmmac: dwmac-meson8b: add support for the Amlogic T7
Date: Sun, 4 Oct 2026 23:13:29 +0200 [thread overview]
Message-ID: <aafea01f-546e-47de-9e1d-e404450e78c5@bootlin.com> (raw)
In-Reply-To: <20261004144046.391444-4-tanure@linux.com>
Hi Lucas,
On 10/4/26 16:40, Lucas Tanure wrote:
> The glue registers on the T7 are laid out exactly as the G12A ones, RX
> delay field included, so the T7 can reuse the G12A settings.
>
> What the T7 does not share is how the controller reaches DRAM: the bus
> path goes through a pipeline stage with a gate of its own, and no device
> other than the controller has any use for that gate. Claim it and hold
> it enabled for as long as the controller is bound, otherwise it is
> switched off as unused and a transfer that has been started can never
> complete.
>
> Give the T7 match data of its own so that only it looks the clock up,
> and require the clock instead of treating it as optional: the controller
> cannot do DMA without it, and failing the probe with a clear message
> beats booting and hitting an undiagnosable hang later.
>
> Assisted-by: LLM
> Signed-off-by: Lucas Tanure <tanure@linux.com>
> ---
[...]
>
> +static const struct meson8b_dwmac_data meson_t7_dwmac_data = {
> + .set_phy_mode = meson_axg_set_phy_mode,
> + .has_prg_eth1_rgmii_rx_delay = true,
Hmpf sorry this falls onto your series, but looking at the code it seems
that this glue has the RGMII handling backwards...
In meson8b_init_rgmii_delays :
switch (dwmac->phy_mode) {
case PHY_INTERFACE_MODE_RGMII:
delay_config = tx_dly_config | rx_adj_config;
break;
case PHY_INTERFACE_MODE_RGMII_RXID:
delay_config = tx_dly_config;
cfg_rxclk_dly = 0;
break;
case PHY_INTERFACE_MODE_RGMII_TXID:
delay_config = rx_adj_config;
break;
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RMII:
delay_config = 0;
cfg_rxclk_dly = 0;
This is the behaviour one would expect from a PHY perspective.
And indeed, 66 amlogic dts have "phy-mode = rgmii".
grep "phy-mode = \"rgmii\"" $(find arch/ | grep amlogic) | wc -l
66
I really think all these 66 "rgmii" instance should have been "rgmii-id"...
It's probably too late to change that though :(
Maxime
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
next prev parent reply other threads:[~2026-10-04 21:13 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-04 14:40 [RFC PATCH 0/6] Add ethernet support for the Amlogic T7 Lucas Tanure
2026-10-04 14:40 ` Lucas Tanure
2026-10-04 14:40 ` [RFC PATCH 1/6] dt-bindings: net: amlogic,meson-dwmac: spell out the compatible combinations Lucas Tanure
2026-10-04 14:40 ` Lucas Tanure
2026-10-05 10:39 ` Conor Dooley
2026-10-05 10:39 ` Conor Dooley
2026-10-04 14:40 ` [RFC PATCH 2/6] dt-bindings: net: amlogic,meson-dwmac: add amlogic,t7-dwmac Lucas Tanure
2026-10-04 14:40 ` Lucas Tanure
2026-10-05 10:46 ` Conor Dooley
2026-10-05 10:46 ` Conor Dooley
2026-10-06 9:24 ` Lucas Tanure
2026-10-06 9:24 ` Lucas Tanure
2026-10-04 14:40 ` [RFC PATCH 3/6] net: stmmac: dwmac-meson8b: add support for the Amlogic T7 Lucas Tanure
2026-10-04 14:40 ` Lucas Tanure
2026-10-04 15:28 ` Neil Armstrong
2026-10-04 15:28 ` Neil Armstrong
2026-10-04 21:13 ` Maxime Chevallier [this message]
2026-10-04 21:13 ` Maxime Chevallier
2026-10-04 14:40 ` [RFC PATCH 4/6] arm64: dts: amlogic: t7: add the ethernet pinctrl nodes Lucas Tanure
2026-10-04 14:40 ` Lucas Tanure
2026-10-04 15:28 ` Neil Armstrong
2026-10-04 15:28 ` Neil Armstrong
2026-10-04 14:40 ` [RFC PATCH 5/6] arm64: dts: amlogic: t7: add the ethernet controller Lucas Tanure
2026-10-04 14:40 ` Lucas Tanure
2026-10-04 15:29 ` Neil Armstrong
2026-10-04 15:29 ` Neil Armstrong
2026-10-04 14:40 ` [RFC PATCH 6/6] arm64: dts: amlogic: t7: khadas-vim4: enable the ethernet port Lucas Tanure
2026-10-04 14:40 ` Lucas Tanure
2026-10-04 15:29 ` Neil Armstrong
2026-10-04 15:29 ` Neil Armstrong
2026-10-04 20:58 ` Maxime Chevallier
2026-10-04 20:58 ` Maxime Chevallier
2026-10-05 10:04 ` Lucas Tanure
2026-10-05 10:04 ` Lucas Tanure
2026-10-05 15:56 ` Andrew Lunn
2026-10-05 15:56 ` Andrew Lunn
2026-10-06 9:05 ` Lucas Tanure
2026-10-06 9:05 ` Lucas Tanure
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