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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Guillaume Ranquet <granquet@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, CK Hu <ck.hu@mediatek.com>,
	Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-kernel@lists.infradead.org, stuart.lee@mediatek.com,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	mac.shen@mediatek.com, linux-phy@lists.infradead.org
Subject: Re: [PATCH v3 02/12] dt-bindings: display: mediatek: add MT8195 hdmi bindings
Date: Mon, 7 Nov 2022 11:02:59 +0100	[thread overview]
Message-ID: <ab8528cc-fa5d-35da-0c6e-cdebc694f646@linaro.org> (raw)
In-Reply-To: <20220919-v3-2-a803f2660127@baylibre.com>

On 04/11/2022 15:09, Guillaume Ranquet wrote:
> Add mt8195 SoC bindings for hdmi and hdmi-ddc
> 
> On mt8195 the ddc i2c controller is part of the hdmi IP block and thus has no
> specific register range, power domain or interrupt, making it simpler
> than its the legacy "mediatek,hdmi-ddc" binding.
> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/display/mediatek/mediatek,hdmi.yaml   | 61 ++++++++++++++++++----
>  .../display/mediatek/mediatek,mt8195-hdmi-ddc.yaml | 51 ++++++++++++++++++
>  2 files changed, 101 insertions(+), 11 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> index bdaf0b51e68c..9710b7b6e9bf 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> @@ -21,6 +21,7 @@ properties:
>        - mediatek,mt7623-hdmi
>        - mediatek,mt8167-hdmi
>        - mediatek,mt8173-hdmi
> +      - mediatek,mt8195-hdmi
>  
>    reg:
>      maxItems: 1
> @@ -29,18 +30,12 @@ properties:
>      maxItems: 1
>  
>    clocks:
> -    items:
> -      - description: Pixel Clock
> -      - description: HDMI PLL
> -      - description: Bit Clock
> -      - description: S/PDIF Clock
> +    minItems: 4

Drop minItems, it's not needed when equal to maxItems.

> +    maxItems: 4
>  
>    clock-names:
> -    items:
> -      - const: pixel
> -      - const: pll
> -      - const: bclk
> -      - const: spdif
> +    minItems: 4

Drop minItems, it's not needed when equal to maxItems.


> +    maxItems: 4
>  
>    phys:
>      maxItems: 1
> @@ -58,6 +53,9 @@ properties:
>      description: |
>        phandle link and register offset to the system configuration registers.
>  
> +  power-domains:
> +    maxItems: 1
> +
>    ports:
>      $ref: /schemas/graph.yaml#/properties/ports
>  
> @@ -86,9 +84,50 @@ required:
>    - clock-names
>    - phys
>    - phy-names
> -  - mediatek,syscon-hdmi
>    - ports
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: mediatek,mt8195-hdmi
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: APB
> +            - description: HDCP
> +            - description: HDCP 24M
> +            - description: Split HDMI
> +        clock-names:
> +          items:
> +            - const: hdmi_apb_sel
> +            - const: hdcp_sel
> +            - const: hdcp24_sel
> +            - const: split_hdmi
> +
> +      required:
> +        - power-domains
> +    else:
> +      properties:
> +        clocks:
> +          items:
> +            - description: Pixel Clock
> +            - description: HDMI PLL
> +            - description: Bit Clock
> +            - description: S/PDIF Clock
> +
> +        clock-names:
> +          items:
> +            - const: pixel
> +            - const: pll
> +            - const: bclk
> +            - const: spdif
> +
> +      required:
> +        - mediatek,syscon-hdmi
> +
>  additionalProperties: false
>  
>  examples:
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
> new file mode 100644
> index 000000000000..2dc273689584
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek HDMI DDC for mt8195
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-hdmi-ddc
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: ddc

Unless you expect it to grow, I propose to drop clock-names. It's not
useful when the name is the same as name of hardware.

Best regards,
Krzysztof



WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Guillaume Ranquet <granquet@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, CK Hu <ck.hu@mediatek.com>,
	Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-kernel@lists.infradead.org, stuart.lee@mediatek.com,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	mac.shen@mediatek.com, linux-phy@lists.infradead.org
Subject: Re: [PATCH v3 02/12] dt-bindings: display: mediatek: add MT8195 hdmi bindings
Date: Mon, 7 Nov 2022 11:02:59 +0100	[thread overview]
Message-ID: <ab8528cc-fa5d-35da-0c6e-cdebc694f646@linaro.org> (raw)
In-Reply-To: <20220919-v3-2-a803f2660127@baylibre.com>

On 04/11/2022 15:09, Guillaume Ranquet wrote:
> Add mt8195 SoC bindings for hdmi and hdmi-ddc
> 
> On mt8195 the ddc i2c controller is part of the hdmi IP block and thus has no
> specific register range, power domain or interrupt, making it simpler
> than its the legacy "mediatek,hdmi-ddc" binding.
> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/display/mediatek/mediatek,hdmi.yaml   | 61 ++++++++++++++++++----
>  .../display/mediatek/mediatek,mt8195-hdmi-ddc.yaml | 51 ++++++++++++++++++
>  2 files changed, 101 insertions(+), 11 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> index bdaf0b51e68c..9710b7b6e9bf 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> @@ -21,6 +21,7 @@ properties:
>        - mediatek,mt7623-hdmi
>        - mediatek,mt8167-hdmi
>        - mediatek,mt8173-hdmi
> +      - mediatek,mt8195-hdmi
>  
>    reg:
>      maxItems: 1
> @@ -29,18 +30,12 @@ properties:
>      maxItems: 1
>  
>    clocks:
> -    items:
> -      - description: Pixel Clock
> -      - description: HDMI PLL
> -      - description: Bit Clock
> -      - description: S/PDIF Clock
> +    minItems: 4

Drop minItems, it's not needed when equal to maxItems.

> +    maxItems: 4
>  
>    clock-names:
> -    items:
> -      - const: pixel
> -      - const: pll
> -      - const: bclk
> -      - const: spdif
> +    minItems: 4

Drop minItems, it's not needed when equal to maxItems.


> +    maxItems: 4
>  
>    phys:
>      maxItems: 1
> @@ -58,6 +53,9 @@ properties:
>      description: |
>        phandle link and register offset to the system configuration registers.
>  
> +  power-domains:
> +    maxItems: 1
> +
>    ports:
>      $ref: /schemas/graph.yaml#/properties/ports
>  
> @@ -86,9 +84,50 @@ required:
>    - clock-names
>    - phys
>    - phy-names
> -  - mediatek,syscon-hdmi
>    - ports
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: mediatek,mt8195-hdmi
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: APB
> +            - description: HDCP
> +            - description: HDCP 24M
> +            - description: Split HDMI
> +        clock-names:
> +          items:
> +            - const: hdmi_apb_sel
> +            - const: hdcp_sel
> +            - const: hdcp24_sel
> +            - const: split_hdmi
> +
> +      required:
> +        - power-domains
> +    else:
> +      properties:
> +        clocks:
> +          items:
> +            - description: Pixel Clock
> +            - description: HDMI PLL
> +            - description: Bit Clock
> +            - description: S/PDIF Clock
> +
> +        clock-names:
> +          items:
> +            - const: pixel
> +            - const: pll
> +            - const: bclk
> +            - const: spdif
> +
> +      required:
> +        - mediatek,syscon-hdmi
> +
>  additionalProperties: false
>  
>  examples:
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
> new file mode 100644
> index 000000000000..2dc273689584
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek HDMI DDC for mt8195
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-hdmi-ddc
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: ddc

Unless you expect it to grow, I propose to drop clock-names. It's not
useful when the name is the same as name of hardware.

Best regards,
Krzysztof


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Guillaume Ranquet <granquet@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, CK Hu <ck.hu@mediatek.com>,
	Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-kernel@lists.infradead.org, stuart.lee@mediatek.com,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	mac.shen@mediatek.com, linux-phy@lists.infradead.org
Subject: Re: [PATCH v3 02/12] dt-bindings: display: mediatek: add MT8195 hdmi bindings
Date: Mon, 7 Nov 2022 11:02:59 +0100	[thread overview]
Message-ID: <ab8528cc-fa5d-35da-0c6e-cdebc694f646@linaro.org> (raw)
In-Reply-To: <20220919-v3-2-a803f2660127@baylibre.com>

On 04/11/2022 15:09, Guillaume Ranquet wrote:
> Add mt8195 SoC bindings for hdmi and hdmi-ddc
> 
> On mt8195 the ddc i2c controller is part of the hdmi IP block and thus has no
> specific register range, power domain or interrupt, making it simpler
> than its the legacy "mediatek,hdmi-ddc" binding.
> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/display/mediatek/mediatek,hdmi.yaml   | 61 ++++++++++++++++++----
>  .../display/mediatek/mediatek,mt8195-hdmi-ddc.yaml | 51 ++++++++++++++++++
>  2 files changed, 101 insertions(+), 11 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> index bdaf0b51e68c..9710b7b6e9bf 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> @@ -21,6 +21,7 @@ properties:
>        - mediatek,mt7623-hdmi
>        - mediatek,mt8167-hdmi
>        - mediatek,mt8173-hdmi
> +      - mediatek,mt8195-hdmi
>  
>    reg:
>      maxItems: 1
> @@ -29,18 +30,12 @@ properties:
>      maxItems: 1
>  
>    clocks:
> -    items:
> -      - description: Pixel Clock
> -      - description: HDMI PLL
> -      - description: Bit Clock
> -      - description: S/PDIF Clock
> +    minItems: 4

Drop minItems, it's not needed when equal to maxItems.

> +    maxItems: 4
>  
>    clock-names:
> -    items:
> -      - const: pixel
> -      - const: pll
> -      - const: bclk
> -      - const: spdif
> +    minItems: 4

Drop minItems, it's not needed when equal to maxItems.


> +    maxItems: 4
>  
>    phys:
>      maxItems: 1
> @@ -58,6 +53,9 @@ properties:
>      description: |
>        phandle link and register offset to the system configuration registers.
>  
> +  power-domains:
> +    maxItems: 1
> +
>    ports:
>      $ref: /schemas/graph.yaml#/properties/ports
>  
> @@ -86,9 +84,50 @@ required:
>    - clock-names
>    - phys
>    - phy-names
> -  - mediatek,syscon-hdmi
>    - ports
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: mediatek,mt8195-hdmi
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: APB
> +            - description: HDCP
> +            - description: HDCP 24M
> +            - description: Split HDMI
> +        clock-names:
> +          items:
> +            - const: hdmi_apb_sel
> +            - const: hdcp_sel
> +            - const: hdcp24_sel
> +            - const: split_hdmi
> +
> +      required:
> +        - power-domains
> +    else:
> +      properties:
> +        clocks:
> +          items:
> +            - description: Pixel Clock
> +            - description: HDMI PLL
> +            - description: Bit Clock
> +            - description: S/PDIF Clock
> +
> +        clock-names:
> +          items:
> +            - const: pixel
> +            - const: pll
> +            - const: bclk
> +            - const: spdif
> +
> +      required:
> +        - mediatek,syscon-hdmi
> +
>  additionalProperties: false
>  
>  examples:
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
> new file mode 100644
> index 000000000000..2dc273689584
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek HDMI DDC for mt8195
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-hdmi-ddc
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: ddc

Unless you expect it to grow, I propose to drop clock-names. It's not
useful when the name is the same as name of hardware.

Best regards,
Krzysztof


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Guillaume Ranquet <granquet@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Vinod Koul <vkoul@kernel.org>, CK Hu <ck.hu@mediatek.com>,
	Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org, mac.shen@mediatek.com,
	stuart.lee@mediatek.com, linux-mediatek@lists.infradead.org,
	linux-phy@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Subject: Re: [PATCH v3 02/12] dt-bindings: display: mediatek: add MT8195 hdmi bindings
Date: Mon, 7 Nov 2022 11:02:59 +0100	[thread overview]
Message-ID: <ab8528cc-fa5d-35da-0c6e-cdebc694f646@linaro.org> (raw)
In-Reply-To: <20220919-v3-2-a803f2660127@baylibre.com>

On 04/11/2022 15:09, Guillaume Ranquet wrote:
> Add mt8195 SoC bindings for hdmi and hdmi-ddc
> 
> On mt8195 the ddc i2c controller is part of the hdmi IP block and thus has no
> specific register range, power domain or interrupt, making it simpler
> than its the legacy "mediatek,hdmi-ddc" binding.
> 
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> ---
>  .../bindings/display/mediatek/mediatek,hdmi.yaml   | 61 ++++++++++++++++++----
>  .../display/mediatek/mediatek,mt8195-hdmi-ddc.yaml | 51 ++++++++++++++++++
>  2 files changed, 101 insertions(+), 11 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> index bdaf0b51e68c..9710b7b6e9bf 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml
> @@ -21,6 +21,7 @@ properties:
>        - mediatek,mt7623-hdmi
>        - mediatek,mt8167-hdmi
>        - mediatek,mt8173-hdmi
> +      - mediatek,mt8195-hdmi
>  
>    reg:
>      maxItems: 1
> @@ -29,18 +30,12 @@ properties:
>      maxItems: 1
>  
>    clocks:
> -    items:
> -      - description: Pixel Clock
> -      - description: HDMI PLL
> -      - description: Bit Clock
> -      - description: S/PDIF Clock
> +    minItems: 4

Drop minItems, it's not needed when equal to maxItems.

> +    maxItems: 4
>  
>    clock-names:
> -    items:
> -      - const: pixel
> -      - const: pll
> -      - const: bclk
> -      - const: spdif
> +    minItems: 4

Drop minItems, it's not needed when equal to maxItems.


> +    maxItems: 4
>  
>    phys:
>      maxItems: 1
> @@ -58,6 +53,9 @@ properties:
>      description: |
>        phandle link and register offset to the system configuration registers.
>  
> +  power-domains:
> +    maxItems: 1
> +
>    ports:
>      $ref: /schemas/graph.yaml#/properties/ports
>  
> @@ -86,9 +84,50 @@ required:
>    - clock-names
>    - phys
>    - phy-names
> -  - mediatek,syscon-hdmi
>    - ports
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: mediatek,mt8195-hdmi
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: APB
> +            - description: HDCP
> +            - description: HDCP 24M
> +            - description: Split HDMI
> +        clock-names:
> +          items:
> +            - const: hdmi_apb_sel
> +            - const: hdcp_sel
> +            - const: hdcp24_sel
> +            - const: split_hdmi
> +
> +      required:
> +        - power-domains
> +    else:
> +      properties:
> +        clocks:
> +          items:
> +            - description: Pixel Clock
> +            - description: HDMI PLL
> +            - description: Bit Clock
> +            - description: S/PDIF Clock
> +
> +        clock-names:
> +          items:
> +            - const: pixel
> +            - const: pll
> +            - const: bclk
> +            - const: spdif
> +
> +      required:
> +        - mediatek,syscon-hdmi
> +
>  additionalProperties: false
>  
>  examples:
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
> new file mode 100644
> index 000000000000..2dc273689584
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek HDMI DDC for mt8195
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jitao shi <jitao.shi@mediatek.com>
> +
> +description: |
> +  The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8195-hdmi-ddc
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: ddc

Unless you expect it to grow, I propose to drop clock-names. It's not
useful when the name is the same as name of hardware.

Best regards,
Krzysztof


  reply	other threads:[~2022-11-07 10:03 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-04 14:09 [PATCH v3 00/12] Add MT8195 HDMI support Guillaume Ranquet
2022-11-04 14:09 ` Guillaume Ranquet
2022-11-04 14:09 ` Guillaume Ranquet
2022-11-04 14:09 ` Guillaume Ranquet
2022-11-04 14:09 ` [PATCH v3 01/12] dt-bindings: phy: mediatek: hdmi-phy: Add mt8195 compatible Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-07 11:20   ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 14:41     ` Guillaume Ranquet
2022-11-07 14:41       ` Guillaume Ranquet
2022-11-07 14:41       ` Guillaume Ranquet
2022-11-07 14:41       ` Guillaume Ranquet
2022-11-04 14:09 ` [PATCH v3 02/12] dt-bindings: display: mediatek: add MT8195 hdmi bindings Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-07 10:02   ` Krzysztof Kozlowski [this message]
2022-11-07 10:02     ` Krzysztof Kozlowski
2022-11-07 10:02     ` Krzysztof Kozlowski
2022-11-07 10:02     ` Krzysztof Kozlowski
2022-11-07 14:42     ` Guillaume Ranquet
2022-11-07 14:42       ` Guillaume Ranquet
2022-11-07 14:42       ` Guillaume Ranquet
2022-11-07 14:42       ` Guillaume Ranquet
2022-12-26  5:18   ` CK Hu (胡俊光)
2022-12-26  5:18     ` CK Hu (胡俊光)
2022-12-26  5:18     ` CK Hu (胡俊光)
2022-12-26  5:18     ` CK Hu (胡俊光)
2023-01-02 13:38     ` Guillaume Ranquet
2023-01-02 13:38       ` Guillaume Ranquet
2023-01-02 13:38       ` Guillaume Ranquet
2023-01-02 13:38       ` Guillaume Ranquet
2023-01-02 14:14       ` AngeloGioacchino Del Regno
2023-01-02 14:14         ` AngeloGioacchino Del Regno
2023-01-02 14:14         ` AngeloGioacchino Del Regno
2023-01-02 14:14         ` AngeloGioacchino Del Regno
2023-01-02 15:19         ` Guillaume Ranquet
2023-01-02 15:19           ` Guillaume Ranquet
2023-01-02 15:19           ` Guillaume Ranquet
2023-01-02 15:19           ` Guillaume Ranquet
2023-01-03 10:11           ` AngeloGioacchino Del Regno
2023-01-03 10:11             ` AngeloGioacchino Del Regno
2023-01-03 10:11             ` AngeloGioacchino Del Regno
2023-01-03 10:11             ` AngeloGioacchino Del Regno
2022-11-04 14:09 ` [PATCH v3 03/12] drm/mediatek: hdmi: use a regmap instead of iomem Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-07 11:20   ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 14:43     ` Guillaume Ranquet
2022-11-07 14:43       ` Guillaume Ranquet
2022-11-07 14:43       ` Guillaume Ranquet
2022-11-07 14:43       ` Guillaume Ranquet
2022-11-04 14:09 ` [PATCH v3 04/12] drm/mediatek: extract common functions from the mtk hdmi driver Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-07 11:09   ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-04 14:09 ` [PATCH v3 05/12] drm/mediatek: hdmi: make the cec dev optional Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09 ` [PATCH v3 06/12] drm/mediatek: hdmi: add frame_colorimetry flag Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-07 11:09   ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-07 14:57     ` Guillaume Ranquet
2022-11-07 14:57       ` Guillaume Ranquet
2022-11-07 14:57       ` Guillaume Ranquet
2022-11-07 14:57       ` Guillaume Ranquet
2022-11-04 14:09 ` [PATCH v3 07/12] drm/mediatek: hdmi: add v2 support Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-12-26  3:12   ` CK Hu (胡俊光)
2022-12-26  3:12     ` CK Hu (胡俊光)
2022-12-26  3:12     ` CK Hu (胡俊光)
2022-12-26  3:12     ` CK Hu (胡俊光)
2022-11-04 14:09 ` [PATCH v3 08/12] drm/mediatek: hdmi: v2: add audio support Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-07 11:09   ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-07 11:09     ` AngeloGioacchino Del Regno
2022-11-04 14:09 ` [PATCH v3 09/12] phy: phy-mtk-hdmi: Add generic phy configure callback Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09 ` [PATCH v3 10/12] phy: mediatek: add support for phy-mtk-hdmi-mt8195 Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-10  7:22   ` Vinod Koul
2022-11-10  7:22     ` Vinod Koul
2022-11-10  7:22     ` Vinod Koul
2022-11-10  7:22     ` Vinod Koul
2022-11-04 14:09 ` [PATCH v3 11/12] dt-bindings: display: mediatek: dpi: Add compatible for MediaTek MT8195 Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09 ` [PATCH v3 12/12] drm/mediatek: dpi: Add mt8195 hdmi to DPI driver Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-04 14:09   ` Guillaume Ranquet
2022-11-07 11:20   ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 11:20     ` AngeloGioacchino Del Regno
2022-11-07 15:06     ` Guillaume Ranquet
2022-11-07 15:06       ` Guillaume Ranquet
2022-11-07 15:06       ` Guillaume Ranquet
2022-11-07 15:06       ` Guillaume Ranquet

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