From: Sean Anderson <sean.anderson@linux.dev>
To: "Markus Elfring" <Markus.Elfring@web.de>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
kernel-janitors@vger.kernel.org,
"Krzysztof Wilczyński" <kw@linux.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Rob Herring" <robh@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>,
Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Michal Simek <michal.simek@amd.com>,
Michal Simek <michal.simek@xilinx.com>,
Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Subject: Re: [PATCH v3 6/7] PCI: xilinx-nwl: Add phy support
Date: Fri, 24 May 2024 10:38:23 -0400 [thread overview]
Message-ID: <ad8da38a-5e3d-4f79-8744-66acf73703af@linux.dev> (raw)
In-Reply-To: <89d6acd5-5008-4db3-927c-d267be7b9302@web.de>
On 5/24/24 04:16, Markus Elfring wrote:
>> Add support for enabling/disabling PCIe phys. We can't really do
>> anything about failures in the disable/remove path, so just warn.
> …
>> +++ b/drivers/pci/controller/pcie-xilinx-nwl.c
> …
>> @@ -818,12 +876,15 @@ static int nwl_pcie_probe(struct platform_device *pdev)
>> err = nwl_pcie_enable_msi(pcie);
>> if (err < 0) {
>> dev_err(dev, "failed to enable MSI support: %d\n", err);
>> - goto err_clk;
>> + goto err_phy;
>> }
>> }
>>
>> err = pci_host_probe(bridge);
>>
>> +err_phy:
>> + if (err)
>> + nwl_pcie_phy_disable(pcie);
>> err_clk:
>> if (err)
>> clk_disable_unprepare(pcie->clk);
>
> I got the impression that some source code adjustments should be performed
> in another separate update step for this function implementation.
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?h=v6.9#n81
>
> You propose to extend the exception handling here.
> Does such information indicate a need for another tag “Fixes”?
Huh? I am only disabling what I enabled...
--Sean
WARNING: multiple messages have this Message-ID (diff)
From: Sean Anderson <sean.anderson@linux.dev>
To: "Markus Elfring" <Markus.Elfring@web.de>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
kernel-janitors@vger.kernel.org,
"Krzysztof Wilczyński" <kw@linux.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Rob Herring" <robh@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>,
Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Michal Simek <michal.simek@amd.com>,
Michal Simek <michal.simek@xilinx.com>,
Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Subject: Re: [PATCH v3 6/7] PCI: xilinx-nwl: Add phy support
Date: Fri, 24 May 2024 10:38:23 -0400 [thread overview]
Message-ID: <ad8da38a-5e3d-4f79-8744-66acf73703af@linux.dev> (raw)
In-Reply-To: <89d6acd5-5008-4db3-927c-d267be7b9302@web.de>
On 5/24/24 04:16, Markus Elfring wrote:
>> Add support for enabling/disabling PCIe phys. We can't really do
>> anything about failures in the disable/remove path, so just warn.
> …
>> +++ b/drivers/pci/controller/pcie-xilinx-nwl.c
> …
>> @@ -818,12 +876,15 @@ static int nwl_pcie_probe(struct platform_device *pdev)
>> err = nwl_pcie_enable_msi(pcie);
>> if (err < 0) {
>> dev_err(dev, "failed to enable MSI support: %d\n", err);
>> - goto err_clk;
>> + goto err_phy;
>> }
>> }
>>
>> err = pci_host_probe(bridge);
>>
>> +err_phy:
>> + if (err)
>> + nwl_pcie_phy_disable(pcie);
>> err_clk:
>> if (err)
>> clk_disable_unprepare(pcie->clk);
>
> I got the impression that some source code adjustments should be performed
> in another separate update step for this function implementation.
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?h=v6.9#n81
>
> You propose to extend the exception handling here.
> Does such information indicate a need for another tag “Fixes”?
Huh? I am only disabling what I enabled...
--Sean
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next prev parent reply other threads:[~2024-05-24 14:38 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-20 14:53 [PATCH v3 0/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-05-20 14:53 ` Sean Anderson
2024-05-20 14:53 ` [PATCH v3 1/7] dt-bindings: pci: xilinx-nwl: Add phys Sean Anderson
2024-05-20 14:53 ` Sean Anderson
2024-05-22 14:46 ` Rob Herring (Arm)
2024-05-22 14:46 ` Rob Herring (Arm)
2024-05-22 22:28 ` Bjorn Helgaas
2024-05-22 22:28 ` Bjorn Helgaas
2024-05-23 15:19 ` Sean Anderson
2024-05-23 15:19 ` Sean Anderson
2024-05-20 14:53 ` [PATCH v3 2/7] PCI: xilinx-nwl: Fix off-by-one in IRQ handler Sean Anderson
2024-05-20 14:53 ` Sean Anderson
2024-05-22 22:28 ` Bjorn Helgaas
2024-05-22 22:28 ` Bjorn Helgaas
2024-05-23 15:21 ` Sean Anderson
2024-05-23 15:21 ` Sean Anderson
2024-05-24 14:56 ` Dan Carpenter
2024-05-24 14:56 ` Dan Carpenter
2024-05-24 15:03 ` Sean Anderson
2024-05-24 15:03 ` Sean Anderson
2024-05-20 14:53 ` [PATCH v3 3/7] PCI: xilinx-nwl: Fix register misspelling Sean Anderson
2024-05-20 14:53 ` Sean Anderson
2024-05-20 14:53 ` [PATCH v3 4/7] PCI: xilinx-nwl: Rate-limit misc interrupt messages Sean Anderson
2024-05-20 14:53 ` Sean Anderson
2024-05-20 14:54 ` [PATCH v3 5/7] PCI: xilinx-nwl: Clean up clock on probe failure/removal Sean Anderson
2024-05-20 14:54 ` Sean Anderson
2024-05-23 19:18 ` Markus Elfring
2024-05-23 19:18 ` Markus Elfring
2024-05-23 19:21 ` Sean Anderson
2024-05-23 19:21 ` Sean Anderson
2024-05-23 20:11 ` Markus Elfring
2024-05-23 20:11 ` Markus Elfring
2024-05-23 20:18 ` Sean Anderson
2024-05-23 20:18 ` Sean Anderson
2024-05-20 14:54 ` [PATCH v3 6/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-05-20 14:54 ` Sean Anderson
2024-05-24 8:16 ` Markus Elfring
2024-05-24 8:16 ` Markus Elfring
2024-05-24 14:38 ` Sean Anderson [this message]
2024-05-24 14:38 ` Sean Anderson
2024-05-24 15:35 ` Markus Elfring
2024-05-24 15:35 ` Markus Elfring
2024-05-24 14:59 ` Dan Carpenter
2024-05-24 14:59 ` Dan Carpenter
2024-05-24 15:24 ` Sean Anderson
2024-05-24 15:24 ` Sean Anderson
2024-05-20 14:54 ` [PATCH v3 7/7] arm64: zynqmp: Add PCIe phys Sean Anderson
2024-05-20 14:54 ` Sean Anderson
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