From: Drew Fustini <fustini@kernel.org>
To: guo.wenjia23@zte.com.cn
Cc: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
alex@ghiti.fr, rkrcmar@ventanamicro.com,
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linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev,
devicetree@vger.kernel.org, paul.walmsley@sifive.com
Subject: Re: [PATCH RFC v3 06/11] RISC-V: QoS: add resctrl setup and domain management
Date: Sat, 18 Apr 2026 15:01:12 -0700 [thread overview]
Message-ID: <aeP_KJz07WnkqVTP@gen8> (raw)
In-Reply-To: <202604180028.63I0Svo8029922@mse-fl1.zte.com.cn>
On Fri, Apr 17, 2026 at 06:52:27PM +0800, guo.wenjia23@zte.com.cn wrote:
> Hi Drew,
>
> On Wed, Apr 15, 2026 at 9:57 AM Drew Fustini <fustini@kernel.org> wrote:
>
> > Add the setup and domain management layer: domain allocation
> > (qos_new_domain), controller value initialization
> > (qos_init_domain_ctrlval), resource struct initialization for cache and
> > bandwidth resources, domain registration with the resctrl filesystem
> > (qos_resctrl_add_controller_domain), and the top-level setup function
> > (qos_resctrl_setup) that probes all controllers and calls resctrl_init().
> >
> > Also add qos_resctrl_online_cpu() and qos_resctrl_offline_cpu() for CPU
> > hotplug integration.
> >
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > arch/riscv/kernel/qos/qos_resctrl.c | 295 +++++++++++++++++++++++++++++++++++-
> > 1 file changed, 294 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/kernel/qos/qos_resctrl.c b/arch/riscv/kernel/qos/qos_resctrl.c
> > index a4a120f89840..8d7e3b0abb75 100644
> > --- a/arch/riscv/kernel/qos/qos_resctrl.c
> > +++ b/arch/riscv/kernel/qos/qos_resctrl.c
> > @@ -675,7 +675,23 @@ void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domai
> >
> > void resctrl_arch_reset_all_ctrls(struct rdt_resource *r)
> > {
> > - /* not implemented for the RISC-V resctrl implementation */
> > + struct cbqri_resctrl_res *hw_res;
> > + struct rdt_ctrl_domain *d;
> > + enum resctrl_conf_type t;
> > + u32 default_ctrl;
> > + int i;
> > +
> > + lockdep_assert_cpus_held();
> > +
> > + hw_res = container_of(r, struct cbqri_resctrl_res, resctrl_res);
> > + default_ctrl = resctrl_get_default_ctrl(r);
> > +
> > + list_for_each_entry(d, &r->ctrl_domains, hdr.list) {
> > + for (i = 0; i < hw_res->max_rcid; i++) {
> > + for (t = 0; t < CDP_NUM_TYPES; t++)
> > + resctrl_arch_update_one(r, d, i, t, default_ctrl);
>
> For the bw controller, default_ctrl = max_bw, and
> resctrl_arch_update_one will set the rbwb of all RCIDs to max_bw.
> According to the spec: The sum of Rbwb allocated across all rcids must
> not exceed MRBWB value.
>
> Does this conflict with the spec?
Good point. Yeah, this is not being done correctly. I had been doing
similar to what is done on x86 but the big difference is that CBQRI is
reservation based.
Each RCID must have at least 1 Rbwb, and the remainder should be
assigned to default group, RCID 0. It'll update the implementation.
Thanks,
Drew
WARNING: multiple messages have this Message-ID (diff)
From: Drew Fustini <fustini@kernel.org>
To: guo.wenjia23@zte.com.cn
Cc: x86@kernel.org, atish.patra@linux.dev, aricciardi@baylibre.com,
atishp@rivosinc.com, conor+dt@kernel.org, npitre@baylibre.com,
linux-kernel@vger.kernel.org, gong.shuai@sanechips.com.cn,
zhiwei_liu@linux.alibaba.com, krzk+dt@kernel.org,
linux-riscv@lists.infradead.org, robh@kernel.org, alex@ghiti.fr,
rafael@kernel.org, acpica-devel@lists.linux.dev,
robert.moore@intel.com, liu.qingtao2@zte.com.cn,
linux-acpi@vger.kernel.org, ben.horgan@arm.com,
james.morse@arm.com, rkrcmar@ventanamicro.com,
Dave.Martin@arm.com, lenb@kernel.org, gsh517@gmail.com,
fenghua.yu@intel.com, cp0613@linux.alibaba.com,
aou@eecs.berkeley.edu, mindal@semihalf.com, babu.moger@amd.com,
liwei1518@gmail.com, cuiyunhui@bytedance.com,
paul.walmsley@sifive.com, ved@rivosinc.com,
reinette.chatre@intel.com, vasu@rivosinc.com,
tony.luck@intel.com, peternewman@google.com,
conor.dooley@microchip.com, samuel.holland@sifive.com,
palmer@dabbelt.com, pjw@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH RFC v3 06/11] RISC-V: QoS: add resctrl setup and domain management
Date: Sat, 18 Apr 2026 15:01:12 -0700 [thread overview]
Message-ID: <aeP_KJz07WnkqVTP@gen8> (raw)
In-Reply-To: <202604180028.63I0Svo8029922@mse-fl1.zte.com.cn>
On Fri, Apr 17, 2026 at 06:52:27PM +0800, guo.wenjia23@zte.com.cn wrote:
> Hi Drew,
>
> On Wed, Apr 15, 2026 at 9:57 AM Drew Fustini <fustini@kernel.org> wrote:
>
> > Add the setup and domain management layer: domain allocation
> > (qos_new_domain), controller value initialization
> > (qos_init_domain_ctrlval), resource struct initialization for cache and
> > bandwidth resources, domain registration with the resctrl filesystem
> > (qos_resctrl_add_controller_domain), and the top-level setup function
> > (qos_resctrl_setup) that probes all controllers and calls resctrl_init().
> >
> > Also add qos_resctrl_online_cpu() and qos_resctrl_offline_cpu() for CPU
> > hotplug integration.
> >
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > arch/riscv/kernel/qos/qos_resctrl.c | 295 +++++++++++++++++++++++++++++++++++-
> > 1 file changed, 294 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/kernel/qos/qos_resctrl.c b/arch/riscv/kernel/qos/qos_resctrl.c
> > index a4a120f89840..8d7e3b0abb75 100644
> > --- a/arch/riscv/kernel/qos/qos_resctrl.c
> > +++ b/arch/riscv/kernel/qos/qos_resctrl.c
> > @@ -675,7 +675,23 @@ void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domai
> >
> > void resctrl_arch_reset_all_ctrls(struct rdt_resource *r)
> > {
> > - /* not implemented for the RISC-V resctrl implementation */
> > + struct cbqri_resctrl_res *hw_res;
> > + struct rdt_ctrl_domain *d;
> > + enum resctrl_conf_type t;
> > + u32 default_ctrl;
> > + int i;
> > +
> > + lockdep_assert_cpus_held();
> > +
> > + hw_res = container_of(r, struct cbqri_resctrl_res, resctrl_res);
> > + default_ctrl = resctrl_get_default_ctrl(r);
> > +
> > + list_for_each_entry(d, &r->ctrl_domains, hdr.list) {
> > + for (i = 0; i < hw_res->max_rcid; i++) {
> > + for (t = 0; t < CDP_NUM_TYPES; t++)
> > + resctrl_arch_update_one(r, d, i, t, default_ctrl);
>
> For the bw controller, default_ctrl = max_bw, and
> resctrl_arch_update_one will set the rbwb of all RCIDs to max_bw.
> According to the spec: The sum of Rbwb allocated across all rcids must
> not exceed MRBWB value.
>
> Does this conflict with the spec?
Good point. Yeah, this is not being done correctly. I had been doing
similar to what is done on x86 but the big difference is that CBQRI is
reservation based.
Each RCID must have at least 1 Rbwb, and the remainder should be
assigned to default group, RCID 0. It'll update the implementation.
Thanks,
Drew
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-04-18 22:01 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-15 1:53 [PATCH RFC v3 00/11] RISC-V: QoS: add CBQRI resctrl interface Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 01/11] dt-bindings: riscv: Add Ssqosid extension description Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 02/11] RISC-V: Detect the Ssqosid extension Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 03/11] RISC-V: Add support for srmcfg CSR from " Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 04/11] RISC-V: QoS: add CBQRI hardware interface Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-30 23:15 ` Reinette Chatre
2026-04-30 23:15 ` Reinette Chatre
2026-05-01 4:45 ` Drew Fustini
2026-05-01 4:45 ` Drew Fustini
2026-05-05 4:43 ` [External] " yunhui cui
2026-05-05 4:43 ` yunhui cui
2026-05-06 14:28 ` Drew Fustini
2026-05-06 14:28 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 05/11] RISC-V: QoS: add resctrl arch callbacks for CBQRI controllers Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-30 23:17 ` Reinette Chatre
2026-04-30 23:17 ` Reinette Chatre
2026-04-30 23:37 ` Drew Fustini
2026-04-30 23:37 ` Drew Fustini
2026-04-30 23:52 ` Reinette Chatre
2026-04-30 23:52 ` Reinette Chatre
2026-04-15 1:54 ` [PATCH RFC v3 06/11] RISC-V: QoS: add resctrl setup and domain management Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-17 10:52 ` guo.wenjia23
2026-04-17 10:52 ` guo.wenjia23
2026-04-18 22:01 ` Drew Fustini [this message]
2026-04-18 22:01 ` Drew Fustini
2026-04-30 23:20 ` Reinette Chatre
2026-04-30 23:20 ` Reinette Chatre
2026-05-01 22:56 ` Drew Fustini
2026-05-01 22:56 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 07/11] RISC-V: QoS: enable resctrl support for Ssqosid Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 08/11] ACPI: PPTT: Add acpi_pptt_get_cache_size_from_id helper Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-30 23:20 ` Reinette Chatre
2026-04-30 23:20 ` Reinette Chatre
2026-05-01 16:53 ` Drew Fustini
2026-05-01 16:53 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 09/11] DO NOT MERGE: include: acpi: actbl2: Add structs for RQSC table Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 10/11] ACPI: RISC-V: Parse RISC-V Quality of Service Controller (RQSC) table Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 11/11] ACPI: RISC-V: Add support for RISC-V Quality of Service Controller (RQSC) Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-05-05 4:46 ` [External] [PATCH RFC v3 00/11] RISC-V: QoS: add CBQRI resctrl interface yunhui cui
2026-05-05 4:46 ` yunhui cui
2026-05-06 14:32 ` Drew Fustini
2026-05-06 14:32 ` Drew Fustini
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