From: Drew Fustini <fustini@kernel.org>
To: Reinette Chatre <reinette.chatre@intel.com>
Cc: "Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Radim Krčmář" <rkrcmar@ventanamicro.com>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Adrien Ricciardi" <aricciardi@baylibre.com>,
"Nicolas Pitre" <npitre@baylibre.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Atish Patra" <atish.patra@linux.dev>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Ved Shanbhogue" <ved@rivosinc.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Weiwei Li" <liwei1518@gmail.com>,
guo.wenjia23@zte.com.cn,
"Gong Shuai" <gong.shuai@sanechips.com.cn>,
"Gong Shuai" <gsh517@gmail.com>,
liu.qingtao2@zte.com.cn, "Tony Luck" <tony.luck@intel.com>,
"Babu Moger" <babu.moger@amd.com>,
"Peter Newman" <peternewman@google.com>,
"Fenghua Yu" <fenghua.yu@intel.com>,
"James Morse" <james.morse@arm.com>,
"Ben Horgan" <ben.horgan@arm.com>,
"Dave Martin" <Dave.Martin@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Robert Moore" <robert.moore@intel.com>,
"Sunil V L" <sunilvl@ventanamicro.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
x86@kernel.org, linux-acpi@vger.kernel.org,
acpica-devel@lists.linux.dev, devicetree@vger.kernel.org,
"Paul Walmsley" <paul.walmsley@sifive.com>
Subject: Re: [PATCH RFC v3 05/11] RISC-V: QoS: add resctrl arch callbacks for CBQRI controllers
Date: Thu, 30 Apr 2026 16:37:18 -0700 [thread overview]
Message-ID: <afPnrjAseS00a8k9@x1> (raw)
In-Reply-To: <03085c36-315a-47c8-85aa-f3de88fa43bd@intel.com>
On Thu, Apr 30, 2026 at 04:17:22PM -0700, Reinette Chatre wrote:
> Hi Drew,
>
> On 4/14/26 6:53 PM, Drew Fustini wrote:
>
> > +int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d,
> > + u32 closid, enum resctrl_conf_type t, u32 cfg_val)
> > +{
> > + struct cbqri_controller *ctrl;
> > + struct cbqri_resctrl_dom *dom;
> > + struct cbqri_config cfg;
> > + int err = 0;
> > +
> > + dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom);
> > + ctrl = dom->hw_ctrl;
> > +
> > + if (!r->alloc_capable)
> > + return -EINVAL;
> > +
> > + switch (r->rid) {
> > + case RDT_RESOURCE_L2:
> > + case RDT_RESOURCE_L3:
> > + cfg.cbm = cfg_val;
> > + err = cbqri_apply_cache_config(dom, closid, t, &cfg);
> > + break;
> > + case RDT_RESOURCE_MBA:
> > + /* convert from percentage to bandwidth blocks */
> > + cfg.rbwb = cfg_val * ctrl->bc.nbwblks / 100;
> > + cfg.rbwb = min_t(u64, cfg.rbwb, ctrl->bc.mrbwb);
> > + err = cbqri_apply_bw_config(dom, closid, t, &cfg);
>
> (Earlier comment wondered about whether rbwb cannot just be provided
> directly to cbqri_apply_bw_config().)
>
> Apart from that it looks like this can benefit from "emulated controls"
> that we mused about at https://lore.kernel.org/lkml/e788ca62-ec63-4552-978b-9569f369afd5@intel.com/
>
> At this time this MBA resource is constrained by the 1% steps that the
> default MB control supports and clearly it is emulated with a control that
> can support finer granularities. I am currently working on a PoC of the
> base schema descriptions on which the support for emulated controls can
> be built that should be able to expose full hardware capability.
>
> Reinette
Thank you for your review. I have been working on a large overhaul to
the series in v4 and was about to send it. I finally realized the
sematic mismatch between resctl MB resource and what the RISC-V CBQRI
spec offers. I decided to create MB_MIN for reserved bandwidth and
MB_WGHT (weight) for shared bandwidth porpotional weight.
I didn't expect adding two new resources to be the best solution but I
wanted to offer something tangible to move the discussion forward. I
look forward to your proof of concept as I expect I can then build
proper support CBQRI bandwidth allocation (reservation and proportional
share) on top of that.
Thanks,
Drew
WARNING: multiple messages have this Message-ID (diff)
From: Drew Fustini <fustini@kernel.org>
To: Reinette Chatre <reinette.chatre@intel.com>
Cc: x86@kernel.org, "Atish Patra" <atish.patra@linux.dev>,
"Adrien Ricciardi" <aricciardi@baylibre.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Nicolas Pitre" <npitre@baylibre.com>,
linux-kernel@vger.kernel.org,
"Gong Shuai" <gong.shuai@sanechips.com.cn>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
guo.wenjia23@zte.com.cn,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
linux-riscv@lists.infradead.org, "Rob Herring" <robh@kernel.org>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Rafael J. Wysocki" <rafael@kernel.org>,
acpica-devel@lists.linux.dev,
"Robert Moore" <robert.moore@intel.com>,
liu.qingtao2@zte.com.cn, linux-acpi@vger.kernel.org,
"Ben Horgan" <ben.horgan@arm.com>,
"James Morse" <james.morse@arm.com>,
"Radim Krčmář" <rkrcmar@ventanamicro.com>,
"Dave Martin" <Dave.Martin@arm.com>,
"Len Brown" <lenb@kernel.org>, "Gong Shuai" <gsh517@gmail.com>,
"Fenghua Yu" <fenghua.yu@intel.com>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Babu Moger" <babu.moger@amd.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Ved Shanbhogue" <ved@rivosinc.com>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Tony Luck" <tony.luck@intel.com>,
"Peter Newman" <peternewman@google.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <pjw@kernel.org>,
devicetree@vger.kernel.org
Subject: Re: [PATCH RFC v3 05/11] RISC-V: QoS: add resctrl arch callbacks for CBQRI controllers
Date: Thu, 30 Apr 2026 16:37:18 -0700 [thread overview]
Message-ID: <afPnrjAseS00a8k9@x1> (raw)
In-Reply-To: <03085c36-315a-47c8-85aa-f3de88fa43bd@intel.com>
On Thu, Apr 30, 2026 at 04:17:22PM -0700, Reinette Chatre wrote:
> Hi Drew,
>
> On 4/14/26 6:53 PM, Drew Fustini wrote:
>
> > +int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d,
> > + u32 closid, enum resctrl_conf_type t, u32 cfg_val)
> > +{
> > + struct cbqri_controller *ctrl;
> > + struct cbqri_resctrl_dom *dom;
> > + struct cbqri_config cfg;
> > + int err = 0;
> > +
> > + dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom);
> > + ctrl = dom->hw_ctrl;
> > +
> > + if (!r->alloc_capable)
> > + return -EINVAL;
> > +
> > + switch (r->rid) {
> > + case RDT_RESOURCE_L2:
> > + case RDT_RESOURCE_L3:
> > + cfg.cbm = cfg_val;
> > + err = cbqri_apply_cache_config(dom, closid, t, &cfg);
> > + break;
> > + case RDT_RESOURCE_MBA:
> > + /* convert from percentage to bandwidth blocks */
> > + cfg.rbwb = cfg_val * ctrl->bc.nbwblks / 100;
> > + cfg.rbwb = min_t(u64, cfg.rbwb, ctrl->bc.mrbwb);
> > + err = cbqri_apply_bw_config(dom, closid, t, &cfg);
>
> (Earlier comment wondered about whether rbwb cannot just be provided
> directly to cbqri_apply_bw_config().)
>
> Apart from that it looks like this can benefit from "emulated controls"
> that we mused about at https://lore.kernel.org/lkml/e788ca62-ec63-4552-978b-9569f369afd5@intel.com/
>
> At this time this MBA resource is constrained by the 1% steps that the
> default MB control supports and clearly it is emulated with a control that
> can support finer granularities. I am currently working on a PoC of the
> base schema descriptions on which the support for emulated controls can
> be built that should be able to expose full hardware capability.
>
> Reinette
Thank you for your review. I have been working on a large overhaul to
the series in v4 and was about to send it. I finally realized the
sematic mismatch between resctl MB resource and what the RISC-V CBQRI
spec offers. I decided to create MB_MIN for reserved bandwidth and
MB_WGHT (weight) for shared bandwidth porpotional weight.
I didn't expect adding two new resources to be the best solution but I
wanted to offer something tangible to move the discussion forward. I
look forward to your proof of concept as I expect I can then build
proper support CBQRI bandwidth allocation (reservation and proportional
share) on top of that.
Thanks,
Drew
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-04-30 23:37 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-15 1:53 [PATCH RFC v3 00/11] RISC-V: QoS: add CBQRI resctrl interface Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 01/11] dt-bindings: riscv: Add Ssqosid extension description Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 02/11] RISC-V: Detect the Ssqosid extension Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 03/11] RISC-V: Add support for srmcfg CSR from " Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 04/11] RISC-V: QoS: add CBQRI hardware interface Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-30 23:15 ` Reinette Chatre
2026-04-30 23:15 ` Reinette Chatre
2026-05-01 4:45 ` Drew Fustini
2026-05-01 4:45 ` Drew Fustini
2026-05-05 4:43 ` [External] " yunhui cui
2026-05-05 4:43 ` yunhui cui
2026-05-06 14:28 ` Drew Fustini
2026-05-06 14:28 ` Drew Fustini
2026-04-15 1:53 ` [PATCH RFC v3 05/11] RISC-V: QoS: add resctrl arch callbacks for CBQRI controllers Drew Fustini
2026-04-15 1:53 ` Drew Fustini
2026-04-30 23:17 ` Reinette Chatre
2026-04-30 23:17 ` Reinette Chatre
2026-04-30 23:37 ` Drew Fustini [this message]
2026-04-30 23:37 ` Drew Fustini
2026-04-30 23:52 ` Reinette Chatre
2026-04-30 23:52 ` Reinette Chatre
2026-04-15 1:54 ` [PATCH RFC v3 06/11] RISC-V: QoS: add resctrl setup and domain management Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-17 10:52 ` guo.wenjia23
2026-04-17 10:52 ` guo.wenjia23
2026-04-18 22:01 ` Drew Fustini
2026-04-18 22:01 ` Drew Fustini
2026-04-30 23:20 ` Reinette Chatre
2026-04-30 23:20 ` Reinette Chatre
2026-05-01 22:56 ` Drew Fustini
2026-05-01 22:56 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 07/11] RISC-V: QoS: enable resctrl support for Ssqosid Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 08/11] ACPI: PPTT: Add acpi_pptt_get_cache_size_from_id helper Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-30 23:20 ` Reinette Chatre
2026-04-30 23:20 ` Reinette Chatre
2026-05-01 16:53 ` Drew Fustini
2026-05-01 16:53 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 09/11] DO NOT MERGE: include: acpi: actbl2: Add structs for RQSC table Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 10/11] ACPI: RISC-V: Parse RISC-V Quality of Service Controller (RQSC) table Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-04-15 1:54 ` [PATCH RFC v3 11/11] ACPI: RISC-V: Add support for RISC-V Quality of Service Controller (RQSC) Drew Fustini
2026-04-15 1:54 ` Drew Fustini
2026-05-05 4:46 ` [External] [PATCH RFC v3 00/11] RISC-V: QoS: add CBQRI resctrl interface yunhui cui
2026-05-05 4:46 ` yunhui cui
2026-05-06 14:32 ` Drew Fustini
2026-05-06 14:32 ` Drew Fustini
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