From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: xen-devel@lists.xenproject.org,
Andrew Cooper <andrew.cooper3@citrix.com>,
Anthony PERARD <anthony.perard@vates.tech>,
Alexey Gerasimenko <x1917x@gmail.com>,
Thierry Escande <thierry.escande@vates.tech>
Subject: Re: [PATCH 11/17] hvmloader: allocate MMCONFIG area in the MMIO hole
Date: Mon, 4 May 2026 14:23:14 +0200 [thread overview]
Message-ID: <afiPsnPYJCtm7VmH@macbook.local> (raw)
In-Reply-To: <f6521590-e51c-4f00-bcf8-faee79a5d3a5@suse.com>
On Mon, May 04, 2026 at 01:11:44PM +0200, Jan Beulich wrote:
> On 29.04.2026 11:29, Roger Pau Monné wrote:
> > On Fri, Mar 13, 2026 at 04:35:04PM +0000, Thierry Escande wrote:
> >> --- a/tools/firmware/hvmloader/pci.c
> >> +++ b/tools/firmware/hvmloader/pci.c
> >> @@ -413,6 +413,58 @@ void pci_setup(void)
> >> pci_devfn_decode_type[devfn] |= PCI_COMMAND_MASTER;
> >> }
> >>
> >> + /*
> >> + * Calculate MMCONFIG area size and squeeze it into the bars array
> >> + * for assigning a slot in the MMIO hole
> >> + */
> >> + if ( is_running_on_q35 )
> >> + {
> >> + /* disable PCIEXBAR decoding for now */
> >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR, 0);
> >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR + 4, 0);
> >> +
> >> + switch ( PCI_MAX_MCFG_BUSES )
> >> + {
> >> + case 64:
> >> + bar_data = PCIEXBAR_64_BUSES | PCIEXBAR_ENABLE;
> >> + bar_sz = MB(64);
> >> + break;
> >> +
> >> + case 128:
> >> + bar_data = PCIEXBAR_128_BUSES | PCIEXBAR_ENABLE;
> >> + bar_sz = MB(128);
> >> + break;
> >> +
> >> + case 256:
> >> + bar_data = PCIEXBAR_256_BUSES | PCIEXBAR_ENABLE;
> >> + bar_sz = MB(256);
> >> + break;
> >> +
> >> + default:
> >> + /* unsupported number of buses specified */
> >> + BUG();
> >> + }
> >> +
> >> + addr_mask = ~(bar_sz - 1);
> >> +
> >> + for ( i = 0; i < nr_bars; i++ )
> >> + if ( bars[i].bar_sz < bar_sz )
> >> + break;
> >> +
> >> + if ( i != nr_bars )
> >> + memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars));
> >> +
> >> + bars[i].is_mem = 1;
> >> + bars[i].devfn = PCI_MCH_DEVFN;
> >> + bars[i].bar_reg = PCI_MCH_PCIEXBAR;
> >> + bars[i].bar_sz = bar_sz;
> >> + bars[i].addr_mask = addr_mask;
> >> + bars[i].bar_data = bar_data;
> >> +
> >> + mmio_total += bar_sz;
> >> + nr_bars++;
> >> + }
> >
> > I think it might be best if the ECAM fake BAR is the first element in
> > the bars array, so we ensure it's the first item to consume memory
> > from the low MMIO hole. Not sure how that will work with the current
> > sorting of the resources based on their size, but it's imperative for
> > hvmloader to attempt to position ECAM ahead of the other device
> > resources IMO.
>
> Why would this be?
I would assume it's best to have ECAM access in the low 4G (for 32bit
OSes) at the expense of some 32bit BARs possibly not fitting in the
32bit space. But the ECAM space could be placed above 4G, and 32bit
OSes might not care much about extended address space capabilities.
Should is_64bar be set for the MCFG "fake" BAR?
Thanks, Roger.
next prev parent reply other threads:[~2026-05-04 12:23 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 16:35 [PATCH 00/17] Q35 initial support for HVM guests Thierry Escande
2026-03-13 16:35 ` [PATCH 01/17] libacpi: Split dsdt.asl file and extract i440 specific parts Thierry Escande
2026-04-28 9:05 ` Roger Pau Monné
2026-05-04 14:34 ` Jan Beulich
2026-05-04 14:35 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 03/17] hvmloader: add function to set the emulated machine type (i440/Q35) Thierry Escande
2026-04-28 10:39 ` Roger Pau Monné
2026-05-04 10:58 ` Jan Beulich
2026-05-04 14:43 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 02/17] libacpi: new DSDT ACPI table for Q35 Thierry Escande
2026-04-28 10:17 ` Roger Pau Monné
2026-05-04 14:39 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 05/17] hvmloader: add Q35 DSDT table loading Thierry Escande
2026-04-28 11:08 ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 06/17] hvmloader: Move pci devices setup to a separate function Thierry Escande
2026-04-28 12:48 ` Roger Pau Monné
2026-05-04 14:52 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 07/17] hvmloader: add basic Q35 support Thierry Escande
2026-04-28 13:15 ` Roger Pau Monné
2026-05-10 23:32 ` Alexey G
2026-05-04 14:55 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 10/17] hvmloader: Add support for HVMOP_set|get_ecam_space hypercalls Thierry Escande
2026-04-28 14:14 ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 08/17] hvmloader: Extend PCI BAR struct Thierry Escande
2026-04-28 13:31 ` Roger Pau Monné
2026-05-04 15:01 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 11/17] hvmloader: allocate MMCONFIG area in the MMIO hole Thierry Escande
2026-04-29 9:29 ` Roger Pau Monné
2026-05-04 11:11 ` Jan Beulich
2026-05-04 12:23 ` Roger Pau Monné [this message]
2026-05-04 12:36 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 13/17] libxl: Add xen-platform device for Q35 machine Thierry Escande
2026-03-13 16:35 ` [PATCH 12/17] libxl: Q35 support (new option device_model_machine) Thierry Escande
2026-04-29 10:01 ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 14/17] libacpi: build ACPI MCFG table if requested Thierry Escande
2026-04-29 10:13 ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 09/17] xev/hvm: Add HVMOP_get|set_ecam_space hypercalls Thierry Escande
2026-04-28 13:59 ` Roger Pau Monné
2026-05-04 11:09 ` Jan Beulich
2026-05-04 15:12 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 16/17] Handle PCIe ECAM space access from guests Thierry Escande
2026-04-29 12:42 ` Roger Pau Monné
2026-05-04 15:22 ` Jan Beulich
2026-03-13 16:35 ` [PATCH 17/17] docs: provide description for device_model_machine option Thierry Escande
2026-04-29 12:43 ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 04/17] hvmloader: add ACPI enabling for Q35 Thierry Escande
2026-04-28 10:48 ` Roger Pau Monné
2026-05-05 13:58 ` Alexey G
2026-05-05 14:25 ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 15/17] hvmloader: Set MCFG in ACPI table Thierry Escande
2026-04-29 12:33 ` Roger Pau Monné
2026-03-15 22:43 ` [PATCH 00/17] Q35 initial support for HVM guests Alexey G
2026-04-28 7:48 ` Roger Pau Monné
2026-05-04 10:45 ` Jan Beulich
2026-05-05 5:48 ` Jan Beulich
2026-05-05 5:49 ` Jan Beulich
2026-05-05 13:29 ` Alexey G
2026-05-05 13:07 ` Alexey G
2026-05-05 14:15 ` Roger Pau Monné
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=afiPsnPYJCtm7VmH@macbook.local \
--to=roger.pau@citrix.com \
--cc=andrew.cooper3@citrix.com \
--cc=anthony.perard@vates.tech \
--cc=jbeulich@suse.com \
--cc=thierry.escande@vates.tech \
--cc=x1917x@gmail.com \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.