All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Thierry Escande <thierry.escande@vates.tech>
Cc: xen-devel@lists.xenproject.org, Jan Beulich <jbeulich@suse.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Anthony PERARD <anthony.perard@vates.tech>,
	Alexey Gerasimenko <x1917x@gmail.com>
Subject: Re: [PATCH 08/17] hvmloader: Extend PCI BAR struct
Date: Tue, 28 Apr 2026 15:31:36 +0200	[thread overview]
Message-ID: <afC2uLj_fD2qPPsT@macbook.local> (raw)
In-Reply-To: <20260313163455.790692-9-thierry.escande@vates.tech>

On Fri, Mar 13, 2026 at 04:35:03PM +0000, Thierry Escande wrote:
> For the upcoming allocation of the MMCONFIG range in MMIO hole, this
> patch extends the 'bars' structure to make it universal for any
> arbitrary BAR type. Either IO, MMIO, ROM or a chipset-specific resource.
> 
> One important new field is addr_mask, which tells which bits of the base
> address can (should) be written. Different address types (ROM, MMIO BAR,
> PCIEXBAR) will have different addr_mask values.
> 
> For every assignable BAR range we store its size, PCI device BDF (devfn
> actually) to which it belongs, BAR type (mem/io/mem64) and corresponding
> register offset in device PCI conf space.
> 
> Also, to reduce code complexity, all long mem/mem64 BAR flags checks are
> replaced by simple bars[i] field probing, eg.:
> -        if ( (bar_reg == PCI_ROM_ADDRESS) ||
> -             ((bar_data & PCI_BASE_ADDRESS_SPACE) ==
> -              PCI_BASE_ADDRESS_SPACE_MEMORY) )
> +        if ( bars[i].is_mem )

I think this is also supposed to be a non-functional change, just
adding new fields and adjusting the code to make use of them?

> 
> Signed-off-by: Alexey Gerasimenko <x1917x@gmail.com>
> Signed-off-by: Thierry Escande <thierry.escande@vates.tech>
> ---
>  tools/firmware/hvmloader/pci.c | 58 ++++++++++++++++++++--------------
>  1 file changed, 35 insertions(+), 23 deletions(-)
> 
> diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c
> index 91c7fd2171..6e6720adae 100644
> --- a/tools/firmware/hvmloader/pci.c
> +++ b/tools/firmware/hvmloader/pci.c
> @@ -160,9 +160,10 @@ static void class_specific_pci_device_setup(uint16_t vendor_id,
>  
>  void pci_setup(void)
>  {
> -    uint8_t is_64bar, using_64bar, bar64_relocate = 0;
> +    uint8_t is_64bar, using_64bar, bar64_relocate = 0, is_mem;

The newly introduce fields want to be booleans types.

>      uint32_t devfn, bar_reg, cmd, bar_data, bar_data_upper;
>      uint64_t base, bar_sz, bar_sz_upper, mmio_total = 0;
> +    uint64_t addr_mask;
>      uint8_t vga_devfn = 0xff;
>      uint16_t class, vendor_id, device_id;
>      unsigned int bar, pin, link, isa_irq;
> @@ -176,10 +177,13 @@ void pci_setup(void)
>  
>      /* Create a list of device BARs in descending order of size. */
>      struct bars {
> -        uint32_t is_64bar;
>          uint32_t devfn;
>          uint32_t bar_reg;
>          uint64_t bar_sz;
> +        uint64_t addr_mask; /* which bits of the base address can be written */
> +        uint32_t bar_data;  /* initial value - BAR flags here */

Hm, that's just storing the flags of the BAR, given that you already
store the 64bit and memory flags, you just need the prefetch and ROM
enabled booleans to have the full set, and then you can remove the
bar_data field from the struct.

> +        uint8_t  is_64bar;
> +        uint8_t  is_mem;

Use bool types please for the is_ fields.

>      } *bars = (struct bars *)scratch_start;
>      unsigned int i, nr_bars = 0;
>      uint64_t mmio_hole_size = 0;
> @@ -278,13 +282,21 @@ void pci_setup(void)
>                  bar_reg = PCI_ROM_ADDRESS;
>  
>              bar_data = pci_readl(devfn, bar_reg);
> +
> +            is_mem = !!(((bar_data & PCI_BASE_ADDRESS_SPACE) ==
> +                       PCI_BASE_ADDRESS_SPACE_MEMORY) ||
> +                       (bar_reg == PCI_ROM_ADDRESS));
> +
>              if ( bar_reg != PCI_ROM_ADDRESS )
>              {
> -                is_64bar = !!((bar_data & (PCI_BASE_ADDRESS_SPACE |
> -                             PCI_BASE_ADDRESS_MEM_TYPE_MASK)) ==
> -                             (PCI_BASE_ADDRESS_SPACE_MEMORY |
> +                is_64bar = !!(is_mem &&
> +                             ((bar_data & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
>                               PCI_BASE_ADDRESS_MEM_TYPE_64));
> +
>                  pci_writel(devfn, bar_reg, ~0);
> +
> +                addr_mask = is_mem ? PCI_BASE_ADDRESS_MEM_MASK
> +                                   : PCI_BASE_ADDRESS_IO_MASK;
>              }
>              else
>              {
> @@ -292,15 +304,16 @@ void pci_setup(void)
>                  pci_writel(devfn, bar_reg,
>                             (bar_data | PCI_ROM_ADDRESS_MASK) &
>                             ~PCI_ROM_ADDRESS_ENABLE);
> +
> +                addr_mask = PCI_ROM_ADDRESS_MASK;
>              }
> +
>              bar_sz = pci_readl(devfn, bar_reg);
>              pci_writel(devfn, bar_reg, bar_data);
>  
>              if ( bar_reg != PCI_ROM_ADDRESS )
> -                bar_sz &= (((bar_data & PCI_BASE_ADDRESS_SPACE) ==
> -                            PCI_BASE_ADDRESS_SPACE_MEMORY) ?
> -                           PCI_BASE_ADDRESS_MEM_MASK :
> -                           (PCI_BASE_ADDRESS_IO_MASK & 0xffff));
> +                bar_sz &= is_mem ? PCI_BASE_ADDRESS_MEM_MASK :
> +                                   (PCI_BASE_ADDRESS_IO_MASK & 0xffff);
>              else
>                  bar_sz &= PCI_ROM_ADDRESS_MASK;
>              if (is_64bar) {
> @@ -314,6 +327,9 @@ void pci_setup(void)
>              if ( bar_sz == 0 )
>                  continue;
>  
> +            /* leave only memtype/enable bits etc */
> +            bar_data &= ~addr_mask;
> +
>              if ( !xenpci_bar_uc &&
>                   ((bar_data & PCI_BASE_ADDRESS_SPACE) ==
>                     PCI_BASE_ADDRESS_SPACE_MEMORY) &&
> @@ -359,16 +375,17 @@ void pci_setup(void)
>              if ( i != nr_bars )
>                  memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars));
>  
> -            bars[i].is_64bar = is_64bar;
>              bars[i].devfn   = devfn;
>              bars[i].bar_reg = bar_reg;
>              bars[i].bar_sz  = bar_sz;
> +            bars[i].is_64bar  = is_64bar;
> +            bars[i].is_mem    = is_mem;
> +            bars[i].addr_mask = addr_mask;
> +            bars[i].bar_data  = bar_data;
>  
>              if ( is_64bar && bar_sz > BAR_RELOC_THRESH )
>                  bar64_relocate = 1;
> -            else if ( ((bar_data & PCI_BASE_ADDRESS_SPACE) ==
> -                       PCI_BASE_ADDRESS_SPACE_MEMORY) ||
> -                      (bar_reg == PCI_ROM_ADDRESS) )
> +            else if ( is_mem )
>                  mmio_total += bar_sz;
>  
>              nr_bars++;
> @@ -531,10 +548,10 @@ void pci_setup(void)
>          using_64bar = bars[i].is_64bar && bar64_relocate &&
>              (mmio_total > (mem_resource.max - mem_resource.base) ||
>               bar_sz > BAR_RELOC_THRESH);
> -        bar_data = pci_readl(devfn, bar_reg);
>  
> -        if ( (bar_data & PCI_BASE_ADDRESS_SPACE) ==
> -             PCI_BASE_ADDRESS_SPACE_MEMORY )
> +        bar_data = bars[i].bar_data;
> +
> +        if ( bars[i].is_mem )
>          {
>              /* Mapping high memory if PCI device is 64 bits bar */
>              if ( using_64bar ) {
> @@ -544,11 +561,9 @@ void pci_setup(void)
>                  if ( !pci_hi_mem_start )
>                      pci_hi_mem_start = high_mem_resource.base;
>                  resource = &high_mem_resource;
> -                bar_data &= ~PCI_BASE_ADDRESS_MEM_MASK;
>              } 
>              else {
>                  resource = &mem_resource;
> -                bar_data &= ~PCI_BASE_ADDRESS_MEM_MASK;
>              }
>              if ( bar_sz <= BAR_RELOC_THRESH )
>                  mmio_total -= bar_sz;
> @@ -556,7 +571,6 @@ void pci_setup(void)
>          else
>          {
>              resource = &io_resource;
> -            bar_data &= ~PCI_BASE_ADDRESS_IO_MASK;
>          }
>  
>          base = (resource->base  + bar_sz - 1) & ~(uint64_t)(bar_sz - 1);
> @@ -578,7 +592,7 @@ void pci_setup(void)
>              }
>          }
>  
> -        bar_data |= (uint32_t)base;
> +        bar_data |= (uint32_t) (base & bars[i].addr_mask);
                                 ^ unintended space?

Thanks, Roger.


  reply	other threads:[~2026-04-28 13:32 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-13 16:35 [PATCH 00/17] Q35 initial support for HVM guests Thierry Escande
2026-03-13 16:35 ` [PATCH 01/17] libacpi: Split dsdt.asl file and extract i440 specific parts Thierry Escande
2026-04-28  9:05   ` Roger Pau Monné
2026-05-04 14:34   ` Jan Beulich
2026-05-04 14:35     ` Jan Beulich
2026-03-13 16:35 ` [PATCH 03/17] hvmloader: add function to set the emulated machine type (i440/Q35) Thierry Escande
2026-04-28 10:39   ` Roger Pau Monné
2026-05-04 10:58     ` Jan Beulich
2026-05-04 14:43   ` Jan Beulich
2026-03-13 16:35 ` [PATCH 05/17] hvmloader: add Q35 DSDT table loading Thierry Escande
2026-04-28 11:08   ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 02/17] libacpi: new DSDT ACPI table for Q35 Thierry Escande
2026-04-28 10:17   ` Roger Pau Monné
2026-05-04 14:39   ` Jan Beulich
2026-03-13 16:35 ` [PATCH 06/17] hvmloader: Move pci devices setup to a separate function Thierry Escande
2026-04-28 12:48   ` Roger Pau Monné
2026-05-04 14:52   ` Jan Beulich
2026-03-13 16:35 ` [PATCH 07/17] hvmloader: add basic Q35 support Thierry Escande
2026-04-28 13:15   ` Roger Pau Monné
2026-05-10 23:32     ` Alexey G
2026-05-04 14:55   ` Jan Beulich
2026-03-13 16:35 ` [PATCH 10/17] hvmloader: Add support for HVMOP_set|get_ecam_space hypercalls Thierry Escande
2026-04-28 14:14   ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 08/17] hvmloader: Extend PCI BAR struct Thierry Escande
2026-04-28 13:31   ` Roger Pau Monné [this message]
2026-05-04 15:01   ` Jan Beulich
2026-03-13 16:35 ` [PATCH 11/17] hvmloader: allocate MMCONFIG area in the MMIO hole Thierry Escande
2026-04-29  9:29   ` Roger Pau Monné
2026-05-04 11:11     ` Jan Beulich
2026-05-04 12:23       ` Roger Pau Monné
2026-05-04 12:36         ` Jan Beulich
2026-03-13 16:35 ` [PATCH 12/17] libxl: Q35 support (new option device_model_machine) Thierry Escande
2026-04-29 10:01   ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 13/17] libxl: Add xen-platform device for Q35 machine Thierry Escande
2026-03-13 16:35 ` [PATCH 14/17] libacpi: build ACPI MCFG table if requested Thierry Escande
2026-04-29 10:13   ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 09/17] xev/hvm: Add HVMOP_get|set_ecam_space hypercalls Thierry Escande
2026-04-28 13:59   ` Roger Pau Monné
2026-05-04 11:09     ` Jan Beulich
2026-05-04 15:12   ` Jan Beulich
2026-03-13 16:35 ` [PATCH 16/17] Handle PCIe ECAM space access from guests Thierry Escande
2026-04-29 12:42   ` Roger Pau Monné
2026-05-04 15:22   ` Jan Beulich
2026-03-13 16:35 ` [PATCH 17/17] docs: provide description for device_model_machine option Thierry Escande
2026-04-29 12:43   ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 04/17] hvmloader: add ACPI enabling for Q35 Thierry Escande
2026-04-28 10:48   ` Roger Pau Monné
2026-05-05 13:58     ` Alexey G
2026-05-05 14:25       ` Roger Pau Monné
2026-03-13 16:35 ` [PATCH 15/17] hvmloader: Set MCFG in ACPI table Thierry Escande
2026-04-29 12:33   ` Roger Pau Monné
2026-03-15 22:43 ` [PATCH 00/17] Q35 initial support for HVM guests Alexey G
2026-04-28  7:48 ` Roger Pau Monné
2026-05-04 10:45   ` Jan Beulich
2026-05-05  5:48     ` Jan Beulich
2026-05-05  5:49       ` Jan Beulich
2026-05-05 13:29     ` Alexey G
2026-05-05 13:07   ` Alexey G
2026-05-05 14:15     ` Roger Pau Monné

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=afC2uLj_fD2qPPsT@macbook.local \
    --to=roger.pau@citrix.com \
    --cc=andrew.cooper3@citrix.com \
    --cc=anthony.perard@vates.tech \
    --cc=jbeulich@suse.com \
    --cc=thierry.escande@vates.tech \
    --cc=x1917x@gmail.com \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.