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From: Chao Liu <chao.liu.zevorn@gmail.com>
To: Anton Johansson <anjo@rev.ng>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, philmd@linaro.org,
	 pierrick.bouvier@oss.qualcomm.com, palmer@dabbelt.com,
	alistair.francis@wdc.com
Subject: Re: [PATCH v3 06/14] target-info: Add target_riscv64()
Date: Thu, 21 May 2026 16:19:18 +0800	[thread overview]
Message-ID: <ag6_aQE7WW-BWFnB@ChaodeMacBook-Pro.local> (raw)
In-Reply-To: <20260520-hw-riscv-cpu-int-v3-6-d1123ea63d9c@rev.ng>

On Wed, May 20, 2026 at 03:12:58PM +0800, Anton Johansson via wrote:
> Adds a helper function to tell if the binary is targeting riscv64 or
> not.
> 
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Signed-off-by: Anton Johansson <anjo@rev.ng>
> ---
>  include/qemu/target-info.h | 7 +++++++
>  target-info.c              | 5 +++++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
> index 23c997de54..6c5b714288 100644
> --- a/include/qemu/target-info.h
> +++ b/include/qemu/target-info.h
> @@ -99,4 +99,11 @@ bool target_ppc64(void);
>   */
>  bool target_s390x(void);
>  
> +/**
There’s one extra * character here; otherwise LGTM.

Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>

Thanks,
Chao
> + * target_riscv64:
> + *
> + * Returns whether the target architecture is riscv64
> + */
> +bool target_riscv64(void);
> +
>  #endif
> diff --git a/target-info.c b/target-info.c
> index 28c458fc7a..04c69c41f8 100644
> --- a/target-info.c
> +++ b/target-info.c
> @@ -93,3 +93,8 @@ bool target_s390x(void)
>  {
>      return target_arch() == SYS_EMU_TARGET_S390X;
>  }
> +
> +bool target_riscv64(void)
> +{
> +    return target_arch() == SYS_EMU_TARGET_RISCV64;
> +}
> 
> -- 
> 2.52.0
> 
> 


  reply	other threads:[~2026-05-21  8:19 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-20 13:12 [PATCH v3 00/14] single-binary: Compile hw/riscv once Anton Johansson via qemu development
2026-05-20 13:12 ` [PATCH v3 01/14] hw/riscv: Register generic riscv[32|64] QOM interfaces Anton Johansson via qemu development
2026-05-22 22:40   ` Richard Henderson
2026-05-20 13:12 ` [PATCH v3 02/14] hw/riscv: Add macros and globals for simplifying machine definitions Anton Johansson via qemu development
2026-05-22 22:39   ` Richard Henderson
2026-05-20 13:12 ` [PATCH v3 03/14] hw/riscv: Filter machine types for qemu-system-riscv32/64 binaries Anton Johansson via qemu development
2026-05-20 13:12 ` [PATCH v3 04/14] hw/core: Add riscv[32|64] to "none" machine Anton Johansson via qemu development
2026-05-22 22:40   ` Richard Henderson
2026-05-20 13:12 ` [PATCH v3 05/14] configs/target: Implement per-binary TargetInfo structure for riscv Anton Johansson via qemu development
2026-05-22 22:41   ` Richard Henderson
2026-05-20 13:12 ` [PATCH v3 06/14] target-info: Add target_riscv64() Anton Johansson via qemu development
2026-05-21  8:19   ` Chao Liu [this message]
2026-05-26  9:46     ` Philippe Mathieu-Daudé
2026-05-26  9:36   ` Philippe Mathieu-Daudé
2026-05-20 13:12 ` [PATCH v3 07/14] target/riscv: Replace TYPE_RISCV_CPU_BASE Anton Johansson via qemu development
2026-05-21  8:32   ` Chao Liu
2026-05-20 13:13 ` [PATCH v3 08/14] target/riscv: Remove ifdefs in cpu.h Anton Johansson via qemu development
2026-05-20 13:13 ` [PATCH v3 09/14] target/riscv: Replace TARGET_LONG_BITS in header exposed to common code Anton Johansson via qemu development
2026-05-20 13:13 ` [PATCH v3 10/14] target/riscv: Move riscv_pmu_read_ctr() to internal csr.h header Anton Johansson via qemu development
2026-05-20 13:13 ` [PATCH v3 11/14] target/riscv: Stub out kvm functions Anton Johansson via qemu development
2026-05-20 19:28   ` Philippe Mathieu-Daudé
2026-05-20 13:13 ` [PATCH v3 12/14] target/riscv: Move target_long.h inclusion away from cpu.h Anton Johansson via qemu development
2026-05-20 15:06   ` Pierrick Bouvier
2026-05-20 13:13 ` [PATCH v3 13/14] hw/riscv: Define SiFive E/U CPUs using runtime conditions Anton Johansson via qemu development
2026-05-21  8:40   ` Chao Liu
2026-05-20 13:13 ` [PATCH v3 14/14] hw/riscv: Compile once Anton Johansson via qemu development
2026-05-26 23:44 ` [PATCH v3 00/14] single-binary: Compile hw/riscv once Alistair Francis
2026-05-26 23:45 ` Alistair Francis
2026-05-27  6:07 ` Philippe Mathieu-Daudé
2026-05-28 15:06   ` Anton Johansson via
2026-05-28 15:06     ` Anton Johansson via qemu development
2026-05-28 19:53     ` Philippe Mathieu-Daudé

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