* [PATCH v8 01/15] drm/xe/xe_survivability: Decouple survivability info from boot survivability
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 02/15] drm/xe/xe_sysctrl: Make sysctrl flood limit reusable Riana Tauro
` (19 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
On CSC runtime firmware errors that requires firmware flash through SPI,
PCODE sets the FDO mode bit in the Capability register.
Currently the survivability_info group is created only for boot
survivability.
Create survivability_info group even for runtime survivability to allow
userspace to check FDO mode sysfs.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: Fix typo (Mallesh)
v3: use tab (Mallesh)
---
drivers/gpu/drm/xe/xe_survivability_mode.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index 427afd144f3a..4c506027fa94 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -54,7 +54,6 @@
* # cat /sys/bus/pci/devices/<device>/survivability_mode
* Boot
*
- *
* Any additional debug information if present will be visible under the directory
* ``survivability_info``::
*
@@ -98,6 +97,15 @@
* # cat /sys/bus/pci/devices/<device>/survivability_mode
* Runtime
*
+ * On some CSC firmware errors, PCODE sets FDO mode and the only recovery possible is through
+ * firmware flash using SPI driver. Userspace can check if FDO mode is set by checking the below
+ * sysfs entry.
+ *
+ * .. code-block:: shell
+ *
+ * # cat /sys/bus/pci/devices/<device>/survivability_info/fdo_mode
+ * enabled
+ *
* When such errors occur, userspace is notified with the drm device wedged uevent and runtime
* survivability mode. User can then initiate a firmware flash using userspace tools like fwupd
* to restore device to normal operation.
@@ -296,7 +304,8 @@ static int create_survivability_sysfs(struct pci_dev *pdev)
if (ret)
return ret;
- if (check_boot_failure(xe)) {
+ /* Survivability info is not required if enabled via configfs */
+ if (!xe_configfs_get_survivability_mode(pdev)) {
ret = devm_device_add_group(dev, &survivability_info_group);
if (ret)
return ret;
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 02/15] drm/xe/xe_sysctrl: Make sysctrl flood limit reusable
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
2026-06-08 8:47 ` [PATCH v8 01/15] drm/xe/xe_survivability: Decouple survivability info from boot survivability Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 03/15] drm/xe: Improve wedged state management Riana Tauro
` (18 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
The sysctrl command flood limit was defined in an event specific header,
restricting its usage to event handling. Move it to the shared header
with a generic name so it can be re-used across all files using system
controller commands.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: remove duplicate (Raag, Mallesh)
v3: fix wrapping in commit message (Raag)
add limit postfix (Mallesh)
---
drivers/gpu/drm/xe/xe_sysctrl_event.c | 2 +-
drivers/gpu/drm/xe/xe_sysctrl_event_types.h | 3 ---
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 3 +++
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event.c b/drivers/gpu/drm/xe/xe_sysctrl_event.c
index b4d17329af6c..da395148ee9d 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_event.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event.c
@@ -16,7 +16,7 @@ static void get_pending_event(struct xe_sysctrl *sc, struct xe_sysctrl_mailbox_c
{
struct xe_sysctrl_event_response *response = command->data_out;
struct xe_device *xe = sc_to_xe(sc);
- u32 count = XE_SYSCTRL_EVENT_FLOOD;
+ u32 count = XE_SYSCTRL_FLOOD_LIMIT;
size_t len;
int ret;
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
index c16c66b9fa7f..348768ca454a 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
@@ -10,9 +10,6 @@
#define XE_SYSCTRL_EVENT_DATA_LEN 59
-/* Modify as needed */
-#define XE_SYSCTRL_EVENT_FLOOD 16
-
/**
* enum xe_sysctrl_event - Events reported by System Controller
*
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 84d7c647e743..faa973986c0d 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -48,6 +48,9 @@ struct xe_sysctrl_mailbox_command {
size_t data_out_len;
};
+/* Modify as needed */
+#define XE_SYSCTRL_FLOOD_LIMIT 16
+
#define XE_SYSCTRL_MB_FRAME_SIZE 16
#define XE_SYSCTRL_MB_MAX_FRAMES 64
#define XE_SYSCTRL_MB_MAX_MESSAGE_SIZE \
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 03/15] drm/xe: Improve wedged state management
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
2026-06-08 8:47 ` [PATCH v8 01/15] drm/xe/xe_survivability: Decouple survivability info from boot survivability Riana Tauro
2026-06-08 8:47 ` [PATCH v8 02/15] drm/xe/xe_sysctrl: Make sysctrl flood limit reusable Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 04/15] drm/xe/xe_pci_error: Implement PCI error recovery callbacks Riana Tauro
` (17 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
From: Raag Jadav <raag.jadav@intel.com>
Currently, wedged state is serving a single usecase where the device is
declared wedged, but this doesn't allow any wedged state management for
runtime usecases. In preparation of usecases which requires to facilitate
temporary device wedging, convert wedged.flag to wedged.ref which serves
as a driver internal refcount and blocks critical path execution during
device lifetime and while at it, introduce wedged.fini and use it as a
cleanup indicator during driver unwind which operates independent of the
refcount.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 5 +++--
drivers/gpu/drm/xe/xe_device.h | 12 +++++++++++-
drivers/gpu/drm/xe/xe_device_types.h | 6 ++++--
3 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 51e3a2dd7b22..7154f356d631 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -915,7 +915,7 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
{
struct xe_device *xe = arg;
- if (atomic_read(&xe->wedged.flag))
+ if (atomic_read(&xe->wedged.fini))
xe_pm_runtime_put(xe);
}
@@ -1411,7 +1411,8 @@ void xe_device_declare_wedged(struct xe_device *xe)
return;
}
- if (!atomic_xchg(&xe->wedged.flag, 1)) {
+ if (!atomic_xchg(&xe->wedged.fini, 1)) {
+ xe_device_wedged_get(xe);
xe->needs_flr_on_fini = true;
xe_pm_runtime_get_noresume(xe);
drm_err(&xe->drm,
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 975768a6a9c8..3e536a49388a 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -192,9 +192,19 @@ bool xe_device_is_l2_flush_optimized(struct xe_device *xe);
void xe_device_td_flush(struct xe_device *xe);
void xe_device_l2_flush(struct xe_device *xe);
+static inline void xe_device_wedged_get(struct xe_device *xe)
+{
+ atomic_inc(&xe->wedged.ref);
+}
+
+static inline void xe_device_wedged_put(struct xe_device *xe)
+{
+ atomic_dec(&xe->wedged.ref);
+}
+
static inline bool xe_device_wedged(struct xe_device *xe)
{
- return atomic_read(&xe->wedged.flag);
+ return atomic_read(&xe->wedged.ref);
}
void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 32dd2ffbc796..66e673e4e3e7 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -485,8 +485,10 @@ struct xe_device {
/** @wedged: Struct to control Wedged States and mode */
struct {
- /** @wedged.flag: Xe device faced a critical error and is now blocked. */
- atomic_t flag;
+ /** @wedged.fini: Needs cleanup on fini */
+ atomic_t fini;
+ /** @wedged.ref: Refcount for wedged device, blocks critical path execution */
+ atomic_t ref;
/** @wedged.mode: Mode controlled by kernel parameter and debugfs */
enum xe_wedged_mode mode;
/** @wedged.method: Recovery method to be sent in the drm device wedged uevent */
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 04/15] drm/xe/xe_pci_error: Implement PCI error recovery callbacks
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (2 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 03/15] drm/xe: Improve wedged state management Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-19 10:47 ` Raag Jadav
2026-06-08 8:47 ` [PATCH v8 05/15] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset Riana Tauro
` (16 subsequent siblings)
20 siblings, 1 reply; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait, Michal Wajdeczko, Matthew Brost,
Matt Roper
Add error_detected, mmio_enabled, slot_reset and resume recovery callbacks
to handle PCIe Advanced Error Reporting (AER) errors.
For fatal errors, the device is wedged and becomes inaccessible. Return
PCI_ERS_RESULT_NEED_RESET from error_detected to request a Secondary
Bus Reset (SBR).
For non-fatal errors, return PCI_ERS_RESULT_CAN_RECOVER from
error_detected to trigger the mmio_enabled callback. In this callback, the
device is queried to determine the error cause and attempt recovery based
on the error type.
Once the secondary bus reset(SBR) is completed the slot_reset callback
cleanly removes and reprobe the device to restore functionality.
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
Note: The re-probe in this patch will be replaced by
minimal re-initalization once below patch is merged
https://lore.kernel.org/intel-xe/f642453c-f657-41c7-a01b-5a0baf886cd3@intel.com/
v2: re-order linux headers
reword error messages
do not clear in_recovery after remove
return PCI_ERS_RESULT_DISCONNECT if probe fails (Michal)
only wedge device do not send uevent (Raag)
set recovery flag in error_detected and clear on resume
add default switch case (Mallesh)
v3: do not set in_recovery for disconnect (Mallesh)
return if already wedged or in survivability mode
v4: Add comment (Matthew)
Fix tab (Mallesh)
v5: remove in_reset
disconnect if already in survivability mode or wedged
block I/O operations in slot reset (Raag)
v6: acquire runtime pm wakeref while setting the
wedged flag(Matthew Brost)
rename function from xe_pci_error_handling() to
pci_prepare_reset()
call pci_prepare_reset() before requesting SBR
add blank line after copyright
v7: use wedged helpers
add header file
rename pci_prepare_reset function (Michal)
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_pci.c | 2 +
drivers/gpu/drm/xe/xe_pci_error.c | 113 ++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_pci_error.h | 13 ++++
4 files changed, 129 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c
create mode 100644 drivers/gpu/drm/xe/xe_pci_error.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 09661f079d03..091872771e98 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -101,6 +101,7 @@ xe-y += xe_bb.o \
xe_page_reclaim.o \
xe_pat.o \
xe_pci.o \
+ xe_pci_error.o \
xe_pci_rebar.o \
xe_pcode.o \
xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 78fc2e4dcfc6..1d3d2ea82aed 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -26,6 +26,7 @@
#include "xe_guc.h"
#include "xe_mmio.h"
#include "xe_module.h"
+#include "xe_pci_error.h"
#include "xe_pci_rebar.h"
#include "xe_pci_sriov.h"
#include "xe_pci_types.h"
@@ -1349,6 +1350,7 @@ static struct pci_driver xe_pci_driver = {
.remove = xe_pci_remove,
.shutdown = xe_pci_shutdown,
.sriov_configure = xe_pci_sriov_configure,
+ .err_handler = &xe_pci_error_handlers,
#ifdef CONFIG_PM_SLEEP
.driver.pm = &xe_pm_ops,
#endif
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
new file mode 100644
index 000000000000..7a846151e5a3
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/pci.h>
+
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_pci.h"
+#include "xe_printk.h"
+#include "xe_survivability_mode.h"
+
+static void prepare_device_for_reset(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+ struct xe_gt *gt;
+ u8 id;
+
+ /* Wedge the device to prevent userspace access during reset */
+ xe_device_wedged_get(xe);
+
+ for_each_gt(gt, xe, id)
+ xe_gt_declare_wedged(gt);
+
+ pci_disable_device(pdev);
+}
+
+static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+
+ xe_err(xe, "PCI error: detected state = %u\n", state);
+
+ if (state == pci_channel_io_perm_failure)
+ return PCI_ERS_RESULT_DISCONNECT;
+
+ /* If the device is already wedged or in survivability mode, do not attempt recovery */
+ if (xe_survivability_mode_is_boot_enabled(xe) || xe_device_wedged(xe))
+ return PCI_ERS_RESULT_DISCONNECT;
+
+ switch (state) {
+ case pci_channel_io_normal:
+ return PCI_ERS_RESULT_CAN_RECOVER;
+ case pci_channel_io_frozen:
+ prepare_device_for_reset(pdev);
+ return PCI_ERS_RESULT_NEED_RESET;
+ default:
+ xe_err(xe, "PCI error: unknown state %d\n", state);
+ return PCI_ERS_RESULT_NEED_RESET;
+ }
+}
+
+static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+
+ xe_err(xe, "PCI error: MMIO enabled\n");
+
+ /* TODO: Query system controller for the type of error and take appropriate action */
+ return PCI_ERS_RESULT_RECOVERED;
+}
+
+static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
+{
+ const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+
+ xe_err(xe, "PCI error: slot reset\n");
+
+ pci_restore_state(pdev);
+
+ if (pci_enable_device(pdev)) {
+ xe_err(xe, "Cannot re-enable PCI device after reset\n");
+ return PCI_ERS_RESULT_DISCONNECT;
+ }
+
+ /*
+ * Secondary Bus Reset causes all VRAM state to be lost along with
+ * hardware state. As an initial step, re-probe the device to
+ * re-initialize the driver and hardware.
+ * TODO: optimize by re-initializing only the hardware state and re-creating
+ * kernel BOs.
+ */
+ pdev->driver->remove(pdev);
+
+ if (pdev->driver->probe(pdev, ent))
+ return PCI_ERS_RESULT_DISCONNECT;
+
+ xe = pdev_to_xe_device(pdev);
+
+ /* Wedge the device to prevent I/O operations till the resume callback */
+ xe_device_wedged_get(xe);
+
+ return PCI_ERS_RESULT_RECOVERED;
+}
+
+static void xe_pci_error_resume(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+
+ xe_err(xe, "PCI error: resume\n");
+
+ /* Resume I/O operations */
+ xe_device_wedged_put(xe);
+}
+
+const struct pci_error_handlers xe_pci_error_handlers = {
+ .error_detected = xe_pci_error_detected,
+ .mmio_enabled = xe_pci_error_mmio_enabled,
+ .slot_reset = xe_pci_error_slot_reset,
+ .resume = xe_pci_error_resume,
+};
diff --git a/drivers/gpu/drm/xe/xe_pci_error.h b/drivers/gpu/drm/xe/xe_pci_error.h
new file mode 100644
index 000000000000..725ad0214e62
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_error.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_PCI_ERROR_H_
+#define _XE_PCI_ERROR_H_
+
+struct pci_error_handlers;
+
+extern const struct pci_error_handlers xe_pci_error_handlers;
+
+#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v8 04/15] drm/xe/xe_pci_error: Implement PCI error recovery callbacks
2026-06-08 8:47 ` [PATCH v8 04/15] drm/xe/xe_pci_error: Implement PCI error recovery callbacks Riana Tauro
@ 2026-06-19 10:47 ` Raag Jadav
2026-06-19 11:22 ` Tauro, Riana
0 siblings, 1 reply; 26+ messages in thread
From: Raag Jadav @ 2026-06-19 10:47 UTC (permalink / raw)
To: Riana Tauro
Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, ravi.kishore.koppuravuri, mallesh.koujalagi,
soham.purkait, Michal Wajdeczko, Matthew Brost, Matt Roper
On Mon, Jun 08, 2026 at 02:17:05PM +0530, Riana Tauro wrote:
> Add error_detected, mmio_enabled, slot_reset and resume recovery callbacks
> to handle PCIe Advanced Error Reporting (AER) errors.
>
> For fatal errors, the device is wedged and becomes inaccessible. Return
> PCI_ERS_RESULT_NEED_RESET from error_detected to request a Secondary
> Bus Reset (SBR).
>
> For non-fatal errors, return PCI_ERS_RESULT_CAN_RECOVER from
> error_detected to trigger the mmio_enabled callback. In this callback, the
> device is queried to determine the error cause and attempt recovery based
> on the error type.
>
> Once the secondary bus reset(SBR) is completed the slot_reset callback
> cleanly removes and reprobe the device to restore functionality.
...
> + /*
> + * Secondary Bus Reset causes all VRAM state to be lost along with
> + * hardware state. As an initial step, re-probe the device to
> + * re-initialize the driver and hardware.
> + * TODO: optimize by re-initializing only the hardware state and re-creating
> + * kernel BOs.
> + */
> + pdev->driver->remove(pdev);
Curious, how does this effect drm_ras nodes? Do they persist?
If no, is it reasonable to have them recreated on every single error?
Raag
> + if (pdev->driver->probe(pdev, ent))
> + return PCI_ERS_RESULT_DISCONNECT;
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v8 04/15] drm/xe/xe_pci_error: Implement PCI error recovery callbacks
2026-06-19 10:47 ` Raag Jadav
@ 2026-06-19 11:22 ` Tauro, Riana
0 siblings, 0 replies; 26+ messages in thread
From: Tauro, Riana @ 2026-06-19 11:22 UTC (permalink / raw)
To: Raag Jadav
Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, ravi.kishore.koppuravuri, mallesh.koujalagi,
soham.purkait, Michal Wajdeczko, Matthew Brost, Matt Roper
On 19-06-2026 16:17, Raag Jadav wrote:
> On Mon, Jun 08, 2026 at 02:17:05PM +0530, Riana Tauro wrote:
>> Add error_detected, mmio_enabled, slot_reset and resume recovery callbacks
>> to handle PCIe Advanced Error Reporting (AER) errors.
>>
>> For fatal errors, the device is wedged and becomes inaccessible. Return
>> PCI_ERS_RESULT_NEED_RESET from error_detected to request a Secondary
>> Bus Reset (SBR).
>>
>> For non-fatal errors, return PCI_ERS_RESULT_CAN_RECOVER from
>> error_detected to trigger the mmio_enabled callback. In this callback, the
>> device is queried to determine the error cause and attempt recovery based
>> on the error type.
>>
>> Once the secondary bus reset(SBR) is completed the slot_reset callback
>> cleanly removes and reprobe the device to restore functionality.
> ...
>
>> + /*
>> + * Secondary Bus Reset causes all VRAM state to be lost along with
>> + * hardware state. As an initial step, re-probe the device to
>> + * re-initialize the driver and hardware.
>> + * TODO: optimize by re-initializing only the hardware state and re-creating
>> + * kernel BOs.
>> + */
>> + pdev->driver->remove(pdev);
> Curious, how does this effect drm_ras nodes? Do they persist?
They won't persist since we are unregistering on remove.
> If no, is it reasonable to have them recreated on every single error?
drm_ras event is generated as soon as the error is received so the
applications monitoring the error
will receive a notification of the error.
It is not on every error, it is only on uncorrectable errors that
require SBR for recovery.
Because VRAM is cleared, applications abort and are re-created.
The same applies to L0 too
With the FLR series , the unregistering might not be needed.(yet to test).
But i saw your offline discussion, that userspace applications might
still abort even in that case.
Thanks
Riana
>
> Raag
>
>> + if (pdev->driver->probe(pdev, ent))
>> + return PCI_ERS_RESULT_DISCONNECT;
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v8 05/15] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (3 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 04/15] drm/xe/xe_pci_error: Implement PCI error recovery callbacks Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 06/15] drm/xe: Skip device access during PCI error recovery Riana Tauro
` (15 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait, Matthew Brost,
Himal Prasad Ghimiray
Add devres grouping to handle device resource cleanup during
PCI error recovery.
Secondary Bus Reset (SBR) is triggered by PCI core when the
error_detected/mmio_enabled callbacks return PCI_ERS_RESULT_NEED_RESET.
Once SBR is complete, the slot_reset callback is triggered. SBR wipes
out all device memory requiring XE KMD to perform a device removal and
reprobe.
Calling xe_pci_remove() alone does not free the devres allocated.
Since there are no exported functions to release all devres, group the
devres allocations and release the entire group during slot reset to
ensure proper cleanup.
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: move to xe pci layer
---
drivers/gpu/drm/xe/xe_device_types.h | 3 +++
drivers/gpu/drm/xe/xe_pci.c | 7 +++++++
drivers/gpu/drm/xe/xe_pci_error.c | 1 +
3 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 66e673e4e3e7..943e4796bdf1 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -497,6 +497,9 @@ struct xe_device {
bool inconsistent_reset;
} wedged;
+ /** @devres_group_id: id for devres group */
+ void *devres_group_id;
+
/** @bo_device: Struct to control async free of BOs */
struct xe_bo_dev {
/** @bo_device.async_free: Free worker */
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 1d3d2ea82aed..ab74a5852dbd 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1077,6 +1077,7 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
const struct xe_device_desc *desc = (const void *)ent->driver_data;
const struct xe_subplatform_desc *subplatform_desc;
struct xe_device *xe;
+ void *devres_id;
int err;
subplatform_desc = find_subplatform(desc, pdev->device);
@@ -1104,6 +1105,10 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (xe_display_driver_probe_defer(pdev))
return -EPROBE_DEFER;
+ devres_id = devres_open_group(&pdev->dev, NULL, GFP_KERNEL);
+ if (!devres_id)
+ return -ENOMEM;
+
err = pcim_enable_device(pdev);
if (err)
return err;
@@ -1112,6 +1117,8 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (IS_ERR(xe))
return PTR_ERR(xe);
+ xe->devres_group_id = devres_id;
+
pci_set_drvdata(pdev, &xe->drm);
xe_pm_assert_unbounded_bridge(xe);
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 7a846151e5a3..4bf9ebbb1e96 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -83,6 +83,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
* kernel BOs.
*/
pdev->driver->remove(pdev);
+ devres_release_group(&pdev->dev, xe->devres_group_id);
if (pdev->driver->probe(pdev, ent))
return PCI_ERS_RESULT_DISCONNECT;
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 06/15] drm/xe: Skip device access during PCI error recovery
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (4 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 05/15] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 07/15] drm/xe/xe_ras: Initialize Uncorrectable AER Registers Riana Tauro
` (14 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait, Matthew Brost,
Himal Prasad Ghimiray
When a fatal error occurs and the error_detected callback is
invoked the device is inaccessible. The error_detected callback
wedges the device causing the jobs to timeout.
The timedout handler acquires forcewake to dump devcoredump and
triggers a GT reset. Since the device is inaccessible this causes
errors. Skip all mmio accesses and gt reset when the device
is in reset.
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: add check in worker (Mallesh)
v3: add in_reset calls (Raag)
rename in_recovery to in_reset
v4: fix typo
combine gt reset log (Mallesh)
---
drivers/gpu/drm/xe/xe_device.h | 15 +++++++++++++++
drivers/gpu/drm/xe/xe_device_types.h | 3 +++
drivers/gpu/drm/xe/xe_gt.c | 14 ++++++++++----
drivers/gpu/drm/xe/xe_guc_submit.c | 9 +++++----
drivers/gpu/drm/xe/xe_pci_error.c | 3 +++
5 files changed, 36 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 3e536a49388a..e177c05a7a95 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -181,6 +181,21 @@ static inline bool xe_device_has_mert(const struct xe_device *xe)
return xe->info.has_mert;
}
+static inline bool xe_device_is_in_reset(struct xe_device *xe)
+{
+ return atomic_read(&xe->in_reset);
+}
+
+static inline void xe_device_set_in_reset(struct xe_device *xe)
+{
+ atomic_set(&xe->in_reset, 1);
+}
+
+static inline void xe_device_clear_in_reset(struct xe_device *xe)
+{
+ atomic_set(&xe->in_reset, 0);
+}
+
u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 943e4796bdf1..bf43a3277d1e 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -483,6 +483,9 @@ struct xe_device {
/** @needs_flr_on_fini: requests function-reset on fini */
bool needs_flr_on_fini;
+ /** @in_reset: Indicates if device is in reset */
+ atomic_t in_reset;
+
/** @wedged: Struct to control Wedged States and mode */
struct {
/** @wedged.fini: Needs cleanup on fini */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 783eb6d631b5..d904527a8898 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -917,6 +917,9 @@ static void gt_reset_worker(struct work_struct *w)
if (xe_device_wedged(gt_to_xe(gt)))
goto err_pm_put;
+ if (xe_device_is_in_reset(gt_to_xe(gt)))
+ goto err_pm_put;
+
/* We only support GT resets with GuC submission */
if (!xe_device_uc_enabled(gt_to_xe(gt)))
goto err_pm_put;
@@ -977,18 +980,21 @@ static void gt_reset_worker(struct work_struct *w)
void xe_gt_reset_async(struct xe_gt *gt)
{
- xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+ struct xe_device *xe = gt_to_xe(gt);
+
+ if (xe_device_is_in_reset(xe))
+ return;
/* Don't do a reset while one is already in flight */
if (!xe_fault_inject_gt_reset() && xe_uc_reset_prepare(>->uc))
return;
- xe_gt_info(gt, "reset queued\n");
+ xe_gt_info(gt, "reset queued from %ps\n", __builtin_return_address(0));
/* Pair with put in gt_reset_worker() if work is enqueued */
- xe_pm_runtime_get_noresume(gt_to_xe(gt));
+ xe_pm_runtime_get_noresume(xe);
if (!queue_work(gt->ordered_wq, >->reset.worker))
- xe_pm_runtime_put(gt_to_xe(gt));
+ xe_pm_runtime_put(xe);
}
void xe_gt_suspend_prepare(struct xe_gt *gt)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 4b247a3019d2..b2870d7ab8ce 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1511,7 +1511,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
* If devcoredump not captured and GuC capture for the job is not ready
* do manual capture first and decide later if we need to use it
*/
- if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
+ if (!xe_device_is_in_reset(xe) && !exec_queue_killed(q) && !xe->devcoredump.captured &&
!xe_guc_capture_get_matching_and_lock(q)) {
/* take force wake before engine register manual capture */
CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
@@ -1533,8 +1533,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
set_exec_queue_banned(q);
/* Kick job / queue off hardware */
- if (!wedged && (exec_queue_enabled(primary) ||
- exec_queue_pending_disable(primary))) {
+ if (!xe_device_is_in_reset(xe) && !wedged &&
+ (exec_queue_enabled(primary) || exec_queue_pending_disable(primary))) {
int ret;
if (exec_queue_reset(primary))
@@ -1602,7 +1602,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
trace_xe_sched_job_timedout(job);
- if (!exec_queue_killed(q))
+ /* Do not access device if in reset */
+ if (!xe_device_is_in_reset(xe) && !exec_queue_killed(q))
xe_devcoredump(q, job,
"Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 4bf9ebbb1e96..ab17418aa164 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -17,6 +17,8 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
struct xe_gt *gt;
u8 id;
+ xe_device_set_in_reset(xe);
+
/* Wedge the device to prevent userspace access during reset */
xe_device_wedged_get(xe);
@@ -82,6 +84,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
* TODO: optimize by re-initializing only the hardware state and re-creating
* kernel BOs.
*/
+ xe_device_clear_in_reset(xe);
pdev->driver->remove(pdev);
devres_release_group(&pdev->dev, xe->devres_group_id);
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 07/15] drm/xe/xe_ras: Initialize Uncorrectable AER Registers
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (5 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 06/15] drm/xe: Skip device access during PCI error recovery Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 08/15] drm/xe/xe_ras: Add support for uncorrectable core-compute errors Riana Tauro
` (13 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Uncorrectable errors from different endpoints in the device are steered to
the USP(Upstream Switch Port) which is a PCI Advanced Error Reporting (AER)
Compliant device. Downgrade all the errors to non-fatal to prevent PCIe
bus driver from triggering a Secondary Bus Reset (SBR). This allows error
detection, containment and recovery in the driver.
The Uncorrectable Error Severity Register has the 'Uncorrectable
Internal Error Severity' set to fatal by default. Set this to
non-fatal and unmask the error.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: clear stale uncorrectable internal status in status register
(Aravind)
v3: abbrevate TLA's (Raag)
add a info message if USP does not support AER
v4: add a success log (Raag)
v5: add extra newline
use IS_ENABLED check
remove VF check (Michal)
add function to get usp
v6: fix kunit error
---
drivers/gpu/drm/xe/xe_device.c | 3 ++
drivers/gpu/drm/xe/xe_ras.c | 81 ++++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 1 +
3 files changed, 85 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 7154f356d631..ac3d6ae56fb9 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -61,6 +61,7 @@
#include "xe_psmi.h"
#include "xe_pxp.h"
#include "xe_query.h"
+#include "xe_ras.h"
#include "xe_shrinker.h"
#include "xe_soc_remapper.h"
#include "xe_survivability_mode.h"
@@ -1074,6 +1075,8 @@ int xe_device_probe(struct xe_device *xe)
if (err)
goto err_unregister_display;
+ xe_ras_init(xe);
+
err = xe_device_sysfs_init(xe);
if (err)
goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 4cb16b419b0c..c846e98ec6ab 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -91,3 +91,84 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
comp_to_str(component), sev_to_str(severity));
}
}
+
+static struct pci_dev *find_usp_dev(struct pci_dev *pdev)
+{
+ struct pci_dev *vsp;
+
+ /*
+ * Device Hierarchy:
+ *
+ * Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit (GPU endpoint)
+ */
+ vsp = pci_upstream_bridge(pdev);
+ if (!vsp)
+ return NULL;
+
+ return pci_upstream_bridge(vsp);
+}
+
+static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
+{
+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+ u32 aer_uncorr_mask, aer_uncorr_sev, aer_uncorr_status;
+ struct pci_dev *usp;
+ u16 aer_cap;
+
+ usp = find_usp_dev(pdev);
+ if (!usp)
+ return;
+
+ aer_cap = pci_find_ext_capability(usp, PCI_EXT_CAP_ID_ERR);
+ if (!aer_cap) {
+ dev_info(&usp->dev, "AER capability unavailable\n");
+ return;
+ }
+
+ /*
+ * Clear any stale Uncorrectable Internal Error Status event in Uncorrectable Error
+ * Status Register.
+ */
+ pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &aer_uncorr_status);
+ if (aer_uncorr_status & PCI_ERR_UNC_INTN)
+ pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, PCI_ERR_UNC_INTN);
+
+ /*
+ * All errors are steered to USP which is a PCIe AER Compliant device.
+ * Downgrade all the errors to non-fatal to prevent PCIe bus driver
+ * from triggering a Secondary Bus Reset (SBR). This allows error
+ * detection, containment and recovery in the driver.
+ *
+ * The Uncorrectable Error Severity Register has the 'Uncorrectable
+ * Internal Error Severity' set to fatal by default. Set this to
+ * non-fatal and unmask the error.
+ */
+
+ /* Initialize Uncorrectable Error Severity Register */
+ pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, &aer_uncorr_sev);
+ aer_uncorr_sev &= ~PCI_ERR_UNC_INTN;
+ pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, aer_uncorr_sev);
+
+ /* Initialize Uncorrectable Error Mask Register */
+ pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
+ aer_uncorr_mask &= ~PCI_ERR_UNC_INTN;
+ pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);
+
+ pci_save_state(usp);
+ dev_dbg(&usp->dev, "Uncorrectable Internal Errors downgraded and unmasked\n");
+}
+
+/**
+ * xe_ras_init - Initialize Xe RAS
+ * @xe: xe device instance
+ *
+ * Initialize Xe RAS
+ */
+void xe_ras_init(struct xe_device *xe)
+{
+ if (!xe->info.has_sysctrl)
+ return;
+
+ if (IS_ENABLED(CONFIG_PCIEAER))
+ aer_unmask_and_downgrade_internal_error(xe);
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index ea90593b62dc..8acfd0ffe48e 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -11,5 +11,6 @@ struct xe_sysctrl_event_response;
void xe_ras_counter_threshold_crossed(struct xe_device *xe,
struct xe_sysctrl_event_response *response);
+void xe_ras_init(struct xe_device *xe);
#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 08/15] drm/xe/xe_ras: Add support for uncorrectable core-compute errors
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (6 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 07/15] drm/xe/xe_ras: Initialize Uncorrectable AER Registers Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-12 1:43 ` Mallesh, Koujalagi
2026-06-08 8:47 ` [PATCH v8 09/15] drm/xe/xe_ras: Handle uncorrectable SoC Internal errors Riana Tauro
` (12 subsequent siblings)
20 siblings, 1 reply; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Add structures and command for get soc error and process uncorrectable
core-compute errors.
Uncorrectable core-compute errors are classified into global and local
errors.
Global error is an error that affects the entire device requiring a
reset. This type of error is not isolated. When an AER is reported and
error_detected is invoked return PCI_ERS_RESULT_NEED_RESET.
Local error is confined to a specific component or context like a
engine. These errors can be contained and recovered by resetting
only the affected part without disrupting the rest of the device.
Upon detection of an uncorrectable local core-compute error, an AER is
generated and GuC is notified of the error to trigger engine reset.
Return recovered from PCI error callbacks for these errors as no
action is needed.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add newline and fix log
add bounds check (Mallesh)
add ras specific enum (Raag)
helper for sysctrl prepare command
process all errors before deciding recovery action
v3: remove TODO from commit message
remove redundant rlen check
fix loop
add check for sysctrl flooding (Raag)
do not use xe_ras prefix for static functions (Soham)
v4: remove rlen initialization to 0
remove local variable
add error message for length mismatch (Raag)
reset on sysctrl flooding
fix sysctrl flood condition
v5: rebase
modify log and move it to process_errors
modify sysctrl flood check
remove whitespace
simplify structure (Raag)
fix typo in commit message
v6: remove xe parameter
remove error_class local variable (Mallesh)
move prepare_sysctrl_command to sysctrl layer (Raag)
shorten structure member names
rename count to remaining
fix sparse warnings
v7: rename sysctrl_build_command (Raag)
---
drivers/gpu/drm/xe/xe_ras.c | 110 ++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 3 +
drivers/gpu/drm/xe/xe_ras_types.h | 55 +++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 28 +++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 4 +-
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 2 +
6 files changed, 201 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index c846e98ec6ab..005db8ab9622 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -9,6 +9,11 @@
#include "xe_ras_types.h"
#include "xe_sysctrl.h"
#include "xe_sysctrl_event_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+#define CORE_COMPUTE_UNCORR_TYPE GENMASK(26, 25)
+#define GLOBAL_UNCORR_ERROR 2
/* Severity of detected errors */
enum xe_ras_severity {
@@ -66,6 +71,24 @@ static inline const char *comp_to_str(u8 component)
return xe_ras_components[component];
}
+static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_ras_error_array *arr)
+{
+ struct xe_ras_compute_error *error_info = (void *)arr->details;
+ u8 uncorr_type;
+
+ uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, error_info->log_header);
+
+ /* Request a reset if error is global */
+ if (uncorr_type == GLOBAL_UNCORR_ERROR)
+ return XE_RAS_RECOVERY_ACTION_RESET;
+
+ /*
+ * No action needed for other errors.
+ * Local errors are recovered using an engine reset by GuC.
+ */
+ return XE_RAS_RECOVERY_ACTION_RECOVERED;
+}
+
void xe_ras_counter_threshold_crossed(struct xe_device *xe,
struct xe_sysctrl_event_response *response)
{
@@ -92,6 +115,93 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
}
}
+/**
+ * xe_ras_process_errors() - Process and contain hardware errors
+ * @xe: xe device instance
+ *
+ * Get error details from system controller and return recovery
+ * method. Called only from PCI error handling.
+ *
+ * Returns: recovery action to be taken
+ */
+enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
+{
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_get_soc_error response;
+ enum xe_ras_recovery_action final_action;
+ u32 remaining = XE_SYSCTRL_FLOOD_LIMIT;
+ size_t rlen;
+ int ret;
+
+ if (!xe->info.has_sysctrl)
+ return XE_RAS_RECOVERY_ACTION_RESET;
+
+ /* Default action */
+ final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
+
+ xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
+ NULL, 0, &response, sizeof(response));
+
+ do {
+ memset(&response, 0, sizeof(response));
+
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "sysctrl: failed to get soc error %d\n", ret);
+ goto err;
+ }
+
+ if (rlen != sizeof(response)) {
+ xe_err(xe, "sysctrl: unexpected get soc error response length %zu (expected %zu)\n",
+ rlen, sizeof(response));
+ goto err;
+ }
+
+ /* Report if number of errors exceeds the maximum errors supported */
+ if (response.num_errors > XE_RAS_NUM_ERROR_ARR)
+ xe_err(xe, "sysctrl: number of errors received %d out of bound (%d)\n",
+ response.num_errors, XE_RAS_NUM_ERROR_ARR);
+
+ for (int i = 0; i < response.num_errors && i < XE_RAS_NUM_ERROR_ARR; i++) {
+ struct xe_ras_error_array *arr = &response.arr[i];
+ enum xe_ras_recovery_action action;
+ u8 component, severity;
+
+ component = arr->counter.common.component;
+ severity = arr->counter.common.severity;
+
+ xe_err(xe, "[RAS]: %s %s detected\n", comp_to_str(component),
+ sev_to_str(severity));
+
+ switch (component) {
+ case XE_RAS_COMP_CORE_COMPUTE:
+ action = handle_core_compute_errors(arr);
+ break;
+ default:
+ /* For any other component, reset */
+ action = XE_RAS_RECOVERY_ACTION_RESET;
+ break;
+ }
+
+ /* Process and log all errors and then trigger highest recovery action */
+ if (action > final_action)
+ final_action = action;
+ }
+
+ /* Treat flooding as an system controller error */
+ if (!--remaining) {
+ xe_err(xe, "[RAS]: sysctrl: get soc error response flooding\n");
+ return XE_RAS_RECOVERY_ACTION_RESET;
+ }
+
+ } while (response.additional_errors);
+
+ return final_action;
+
+err:
+ return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
static struct pci_dev *find_usp_dev(struct pci_dev *pdev)
{
struct pci_dev *vsp;
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index 8acfd0ffe48e..8d106c708ff1 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -6,11 +6,14 @@
#ifndef _XE_RAS_H_
#define _XE_RAS_H_
+#include "xe_ras_types.h"
+
struct xe_device;
struct xe_sysctrl_event_response;
void xe_ras_counter_threshold_crossed(struct xe_device *xe,
struct xe_sysctrl_event_response *response);
void xe_ras_init(struct xe_device *xe);
+enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
#endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 4e63c67f806a..3ffd7baa7a8c 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -8,8 +8,27 @@
#include <linux/types.h>
+#define XE_RAS_NUM_ERROR_ARR 3
#define XE_RAS_NUM_COUNTERS 16
+/**
+ * enum xe_ras_recovery_action - RAS recovery actions
+ *
+ * @XE_RAS_RECOVERY_ACTION_RECOVERED: Error recovered
+ * @XE_RAS_RECOVERY_ACTION_RESET: Requires reset
+ * @XE_RAS_RECOVERY_ACTION_DISCONNECT: Requires disconnect
+ * @XE_RAS_RECOVERY_ACTION_MAX: Max action value
+ *
+ * This enum defines the possible recovery actions that can be taken in response
+ * to RAS errors.
+ */
+enum xe_ras_recovery_action {
+ XE_RAS_RECOVERY_ACTION_RECOVERED = 0,
+ XE_RAS_RECOVERY_ACTION_RESET,
+ XE_RAS_RECOVERY_ACTION_DISCONNECT,
+ XE_RAS_RECOVERY_ACTION_MAX
+};
+
/**
* struct xe_ras_error_common - Error fields that are common across all products
*/
@@ -70,4 +89,40 @@ struct xe_ras_threshold_crossed {
struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
} __packed;
+/**
+ * struct xe_ras_error_array - Details of the error types
+ */
+struct xe_ras_error_array {
+ /** @counter_value: Counter value of the returned error */
+ u32 counter_value;
+ /** @counter: Error counter */
+ struct xe_ras_error_class counter;
+ /** @timestamp: Timestamp */
+ u64 timestamp;
+ /** @details: Error details specific to the counter */
+ u32 details[XE_RAS_NUM_COUNTERS];
+} __packed;
+
+/**
+ * struct xe_ras_get_soc_error - Response from get soc error command
+ */
+struct xe_ras_get_soc_error {
+ /** @num_errors: Number of errors reported in this response */
+ u8 num_errors;
+ /** @additional_errors: Indicates if the errors are pending */
+ u8 additional_errors;
+ /** @arr: Array of up to 3 errors */
+ struct xe_ras_error_array arr[XE_RAS_NUM_ERROR_ARR];
+} __packed;
+
+/**
+ * struct xe_ras_compute_error - Error details of Core Compute error
+ */
+struct xe_ras_compute_error {
+ /** @log_header: Error Source and type */
+ u32 log_header;
+ /** @reserved: Reserved */
+ u32 reserved[15];
+} __packed;
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
index 3caa9f15875f..f49d8dabcf73 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
@@ -307,6 +307,34 @@ void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc)
sc->phase_bit = (ctrl_reg & SYSCTRL_FRAME_PHASE) ? 1 : 0;
}
+/**
+ * xe_sysctrl_create_command() - Create System controller command structure
+ * @command: Sysctrl command structure
+ * @group_id: Command group ID
+ * @cmd_id: Command ID
+ * @request: Pointer to request buffer (can be NULL)
+ * @request_len: Size of request buffer
+ * @response: Pointer to response buffer
+ * @response_len: Size of response buffer
+ *
+ * Helper function to create sysctrl command to be sent via xe_sysctrl_send_command()
+ */
+void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
+ void *request, size_t request_len, void *response,
+ size_t response_len)
+{
+ struct xe_sysctrl_app_msg_hdr header = {0};
+
+ header.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, group_id) |
+ FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_id);
+
+ command->header = header;
+ command->data_in = request;
+ command->data_in_len = request_len;
+ command->data_out = response;
+ command->data_out_len = response_len;
+}
+
/**
* xe_sysctrl_send_command() - Send mailbox command to System Controller
* @sc: System Controller instance
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
index f67e9234de48..0ba841b0be1b 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
@@ -27,5 +27,7 @@ void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc);
int xe_sysctrl_send_command(struct xe_sysctrl *sc,
struct xe_sysctrl_mailbox_command *cmd,
size_t *rdata_len);
-
+void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
+ void *request, size_t request_len, void *response,
+ size_t response_len);
#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index faa973986c0d..93ff0d481d74 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -22,9 +22,11 @@ enum xe_sysctrl_group {
/**
* enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
*
+ * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Retrieve basic error information
* @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
*/
enum xe_sysctrl_gfsp_cmd {
+ XE_SYSCTRL_CMD_GET_SOC_ERROR = 0x01,
XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07,
};
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v8 08/15] drm/xe/xe_ras: Add support for uncorrectable core-compute errors
2026-06-08 8:47 ` [PATCH v8 08/15] drm/xe/xe_ras: Add support for uncorrectable core-compute errors Riana Tauro
@ 2026-06-12 1:43 ` Mallesh, Koujalagi
0 siblings, 0 replies; 26+ messages in thread
From: Mallesh, Koujalagi @ 2026-06-12 1:43 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, badal.nilawar,
raag.jadav, ravi.kishore.koppuravuri, soham.purkait
On 08-06-2026 02:17 pm, Riana Tauro wrote:
> Add structures and command for get soc error and process uncorrectable
> core-compute errors.
>
> Uncorrectable core-compute errors are classified into global and local
> errors.
>
> Global error is an error that affects the entire device requiring a
> reset. This type of error is not isolated. When an AER is reported and
> error_detected is invoked return PCI_ERS_RESULT_NEED_RESET.
>
> Local error is confined to a specific component or context like a
> engine. These errors can be contained and recovered by resetting
> only the affected part without disrupting the rest of the device.
>
> Upon detection of an uncorrectable local core-compute error, an AER is
> generated and GuC is notified of the error to trigger engine reset.
> Return recovered from PCI error callbacks for these errors as no
> action is needed.
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: add newline and fix log
> add bounds check (Mallesh)
> add ras specific enum (Raag)
> helper for sysctrl prepare command
> process all errors before deciding recovery action
>
> v3: remove TODO from commit message
> remove redundant rlen check
> fix loop
> add check for sysctrl flooding (Raag)
> do not use xe_ras prefix for static functions (Soham)
>
> v4: remove rlen initialization to 0
> remove local variable
> add error message for length mismatch (Raag)
> reset on sysctrl flooding
> fix sysctrl flood condition
>
> v5: rebase
> modify log and move it to process_errors
> modify sysctrl flood check
> remove whitespace
> simplify structure (Raag)
> fix typo in commit message
>
> v6: remove xe parameter
> remove error_class local variable (Mallesh)
> move prepare_sysctrl_command to sysctrl layer (Raag)
> shorten structure member names
> rename count to remaining
> fix sparse warnings
>
> v7: rename sysctrl_build_command (Raag)
> ---
> drivers/gpu/drm/xe/xe_ras.c | 110 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_ras.h | 3 +
> drivers/gpu/drm/xe/xe_ras_types.h | 55 +++++++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 28 +++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 4 +-
> drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 2 +
> 6 files changed, 201 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index c846e98ec6ab..005db8ab9622 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -9,6 +9,11 @@
> #include "xe_ras_types.h"
> #include "xe_sysctrl.h"
> #include "xe_sysctrl_event_types.h"
> +#include "xe_sysctrl_mailbox.h"
> +#include "xe_sysctrl_mailbox_types.h"
> +
> +#define CORE_COMPUTE_UNCORR_TYPE GENMASK(26, 25)
> +#define GLOBAL_UNCORR_ERROR 2
>
> /* Severity of detected errors */
> enum xe_ras_severity {
> @@ -66,6 +71,24 @@ static inline const char *comp_to_str(u8 component)
> return xe_ras_components[component];
> }
>
> +static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_ras_error_array *arr)
> +{
> + struct xe_ras_compute_error *error_info = (void *)arr->details;
> + u8 uncorr_type;
> +
nit: Static check needed.
> + uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, error_info->log_header);
> +
> + /* Request a reset if error is global */
> + if (uncorr_type == GLOBAL_UNCORR_ERROR)
> + return XE_RAS_RECOVERY_ACTION_RESET;
> +
> + /*
> + * No action needed for other errors.
> + * Local errors are recovered using an engine reset by GuC.
> + */
> + return XE_RAS_RECOVERY_ACTION_RECOVERED;
> +}
> +
> void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> struct xe_sysctrl_event_response *response)
> {
> @@ -92,6 +115,93 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> }
> }
>
> +/**
> + * xe_ras_process_errors() - Process and contain hardware errors
> + * @xe: xe device instance
> + *
> + * Get error details from system controller and return recovery
> + * method. Called only from PCI error handling.
> + *
> + * Returns: recovery action to be taken
> + */
> +enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
> +{
> + struct xe_sysctrl_mailbox_command command = {0};
> + struct xe_ras_get_soc_error response;
Zero initialization required.
> + enum xe_ras_recovery_action final_action;
> + u32 remaining = XE_SYSCTRL_FLOOD_LIMIT;
> + size_t rlen;
> + int ret;
> +
> + if (!xe->info.has_sysctrl)
> + return XE_RAS_RECOVERY_ACTION_RESET;
> +
> + /* Default action */
> + final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
> +
> + xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
> + NULL, 0, &response, sizeof(response));
> +
> + do {
> + memset(&response, 0, sizeof(response));
> +
> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> + if (ret) {
> + xe_err(xe, "sysctrl: failed to get soc error %d\n", ret);
> + goto err;
> + }
> +
> + if (rlen != sizeof(response)) {
> + xe_err(xe, "sysctrl: unexpected get soc error response length %zu (expected %zu)\n",
> + rlen, sizeof(response));
> + goto err;
> + }
> +
> + /* Report if number of errors exceeds the maximum errors supported */
> + if (response.num_errors > XE_RAS_NUM_ERROR_ARR)
> + xe_err(xe, "sysctrl: number of errors received %d out of bound (%d)\n",
> + response.num_errors, XE_RAS_NUM_ERROR_ARR);
> +
> + for (int i = 0; i < response.num_errors && i < XE_RAS_NUM_ERROR_ARR; i++) {
> + struct xe_ras_error_array *arr = &response.arr[i];
> + enum xe_ras_recovery_action action;
> + u8 component, severity;
> +
> + component = arr->counter.common.component;
> + severity = arr->counter.common.severity;
> +
> + xe_err(xe, "[RAS]: %s %s detected\n", comp_to_str(component),
> + sev_to_str(severity));
> +
> + switch (component) {
> + case XE_RAS_COMP_CORE_COMPUTE:
> + action = handle_core_compute_errors(arr);
> + break;
> + default:
> + /* For any other component, reset */
> + action = XE_RAS_RECOVERY_ACTION_RESET;
> + break;
> + }
> +
> + /* Process and log all errors and then trigger highest recovery action */
> + if (action > final_action)
> + final_action = action;
> + }
> +
> + /* Treat flooding as an system controller error */
> + if (!--remaining) {
> + xe_err(xe, "[RAS]: sysctrl: get soc error response flooding\n");
> + return XE_RAS_RECOVERY_ACTION_RESET;
We can use goto err.
With minor changes
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> + }
> +
> + } while (response.additional_errors);
> +
> + return final_action;
> +
> +err:
> + return XE_RAS_RECOVERY_ACTION_RESET;
> +}
> +
> static struct pci_dev *find_usp_dev(struct pci_dev *pdev)
> {
> struct pci_dev *vsp;
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index 8acfd0ffe48e..8d106c708ff1 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -6,11 +6,14 @@
> #ifndef _XE_RAS_H_
> #define _XE_RAS_H_
>
> +#include "xe_ras_types.h"
> +
> struct xe_device;
> struct xe_sysctrl_event_response;
>
> void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> struct xe_sysctrl_event_response *response);
> void xe_ras_init(struct xe_device *xe);
> +enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
> index 4e63c67f806a..3ffd7baa7a8c 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -8,8 +8,27 @@
>
> #include <linux/types.h>
>
> +#define XE_RAS_NUM_ERROR_ARR 3
> #define XE_RAS_NUM_COUNTERS 16
>
> +/**
> + * enum xe_ras_recovery_action - RAS recovery actions
> + *
> + * @XE_RAS_RECOVERY_ACTION_RECOVERED: Error recovered
> + * @XE_RAS_RECOVERY_ACTION_RESET: Requires reset
> + * @XE_RAS_RECOVERY_ACTION_DISCONNECT: Requires disconnect
> + * @XE_RAS_RECOVERY_ACTION_MAX: Max action value
> + *
> + * This enum defines the possible recovery actions that can be taken in response
> + * to RAS errors.
> + */
> +enum xe_ras_recovery_action {
> + XE_RAS_RECOVERY_ACTION_RECOVERED = 0,
> + XE_RAS_RECOVERY_ACTION_RESET,
> + XE_RAS_RECOVERY_ACTION_DISCONNECT,
> + XE_RAS_RECOVERY_ACTION_MAX
> +};
> +
> /**
> * struct xe_ras_error_common - Error fields that are common across all products
> */
> @@ -70,4 +89,40 @@ struct xe_ras_threshold_crossed {
> struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
> } __packed;
>
> +/**
> + * struct xe_ras_error_array - Details of the error types
> + */
> +struct xe_ras_error_array {
> + /** @counter_value: Counter value of the returned error */
> + u32 counter_value;
> + /** @counter: Error counter */
> + struct xe_ras_error_class counter;
> + /** @timestamp: Timestamp */
> + u64 timestamp;
> + /** @details: Error details specific to the counter */
> + u32 details[XE_RAS_NUM_COUNTERS];
> +} __packed;
> +
> +/**
> + * struct xe_ras_get_soc_error - Response from get soc error command
> + */
> +struct xe_ras_get_soc_error {
> + /** @num_errors: Number of errors reported in this response */
> + u8 num_errors;
> + /** @additional_errors: Indicates if the errors are pending */
> + u8 additional_errors;
> + /** @arr: Array of up to 3 errors */
> + struct xe_ras_error_array arr[XE_RAS_NUM_ERROR_ARR];
> +} __packed;
> +
> +/**
> + * struct xe_ras_compute_error - Error details of Core Compute error
> + */
> +struct xe_ras_compute_error {
> + /** @log_header: Error Source and type */
> + u32 log_header;
> + /** @reserved: Reserved */
> + u32 reserved[15];
> +} __packed;
> +
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> index 3caa9f15875f..f49d8dabcf73 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> @@ -307,6 +307,34 @@ void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc)
> sc->phase_bit = (ctrl_reg & SYSCTRL_FRAME_PHASE) ? 1 : 0;
> }
>
> +/**
> + * xe_sysctrl_create_command() - Create System controller command structure
> + * @command: Sysctrl command structure
> + * @group_id: Command group ID
> + * @cmd_id: Command ID
> + * @request: Pointer to request buffer (can be NULL)
> + * @request_len: Size of request buffer
> + * @response: Pointer to response buffer
> + * @response_len: Size of response buffer
> + *
> + * Helper function to create sysctrl command to be sent via xe_sysctrl_send_command()
> + */
> +void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
> + void *request, size_t request_len, void *response,
> + size_t response_len)
> +{
> + struct xe_sysctrl_app_msg_hdr header = {0};
> +
> + header.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, group_id) |
> + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_id);
> +
> + command->header = header;
> + command->data_in = request;
> + command->data_in_len = request_len;
> + command->data_out = response;
> + command->data_out_len = response_len;
> +}
> +
> /**
> * xe_sysctrl_send_command() - Send mailbox command to System Controller
> * @sc: System Controller instance
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> index f67e9234de48..0ba841b0be1b 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> @@ -27,5 +27,7 @@ void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc);
> int xe_sysctrl_send_command(struct xe_sysctrl *sc,
> struct xe_sysctrl_mailbox_command *cmd,
> size_t *rdata_len);
> -
> +void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
> + void *request, size_t request_len, void *response,
> + size_t response_len);
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index faa973986c0d..93ff0d481d74 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -22,9 +22,11 @@ enum xe_sysctrl_group {
> /**
> * enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
> *
> + * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Retrieve basic error information
> * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
> */
> enum xe_sysctrl_gfsp_cmd {
> + XE_SYSCTRL_CMD_GET_SOC_ERROR = 0x01,
> XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07,
> };
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v8 09/15] drm/xe/xe_ras: Handle uncorrectable SoC Internal errors
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (7 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 08/15] drm/xe/xe_ras: Add support for uncorrectable core-compute errors Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 10/15] drm/xe/xe_ras: Query errors from system controller on probe Riana Tauro
` (11 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Some critical errors such as CSC firmware and Punit are reported under SoC
internal errors and require special handling.
CSC errors are classified into hardware errors and firmware errors.
Hardware errors can be recovered using a SBR (Secondary Bus Reset) whereas
firmware errors are critical and require a firmware flash. On such errors,
device is wedged and runtime survivability mode will be enabled to notify
userspace that a firmware flash is required.
PUNIT uncorrectable errors can only be recovered through a cold reset.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: simplify soc structures
return error code for each SoC error (Mallesh)
v3: squash patches (Raag)
v4: re-use csc work
v5: do not use csc work (Mallesh)
simplify structure member names
fix sparse warnings
---
drivers/gpu/drm/xe/xe_ras.c | 45 ++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_ras_types.h | 50 +++++++++++++++++++++++++++++++
2 files changed, 95 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 005db8ab9622..cd4b19b57c04 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -7,6 +7,7 @@
#include "xe_printk.h"
#include "xe_ras.h"
#include "xe_ras_types.h"
+#include "xe_survivability_mode.h"
#include "xe_sysctrl.h"
#include "xe_sysctrl_event_types.h"
#include "xe_sysctrl_mailbox.h"
@@ -89,6 +90,47 @@ static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_ras_erro
return XE_RAS_RECOVERY_ACTION_RECOVERED;
}
+static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *xe,
+ struct xe_ras_error_array *arr)
+{
+ struct xe_ras_soc_error *info = (void *)arr->details;
+ struct xe_ras_soc_error_source *source = &info->source;
+ struct xe_ras_error_class *counter = &arr->counter;
+
+ if (source->csc) {
+ struct xe_ras_csc_error *csc_error = (void *)info->details;
+
+ /*
+ * CSC uncorrectable errors are classified as hardware errors and firmware errors.
+ * CSC firmware errors are critical errors that can be recovered only by firmware
+ * update via SPI driver. On a CSC firmware error, PCODE enables FDO mode and sets
+ * the bit in the capability register. On receiving this error, the driver enables
+ * runtime survivability mode which notifies userspace that a firmware update
+ * is required.
+ */
+ if (csc_error->hec_fw_error) {
+ xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
+ sev_to_str(counter->common.severity),
+ csc_error->hec_fw_error);
+ xe_survivability_mode_runtime_enable(xe);
+ return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+ }
+ } else if (source->ieh) {
+ struct xe_ras_ieh_error *ieh_error = (void *)info->details;
+
+ if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
+ xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
+ sev_to_str(counter->common.severity),
+ ieh_error->global_error_status);
+ /* TODO: Add PUNIT error handling */
+ return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+ }
+ }
+
+ /* For other SOC internal errors, request a reset as recovery mechanism */
+ return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
void xe_ras_counter_threshold_crossed(struct xe_device *xe,
struct xe_sysctrl_event_response *response)
{
@@ -177,6 +219,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
case XE_RAS_COMP_CORE_COMPUTE:
action = handle_core_compute_errors(arr);
break;
+ case XE_RAS_COMP_SOC_INTERNAL:
+ action = handle_soc_internal_errors(xe, arr);
+ break;
default:
/* For any other component, reset */
action = XE_RAS_RECOVERY_ACTION_RESET;
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 3ffd7baa7a8c..2749ba0b0239 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -10,6 +10,7 @@
#define XE_RAS_NUM_ERROR_ARR 3
#define XE_RAS_NUM_COUNTERS 16
+#define XE_RAS_SOC_IEH_PUNIT BIT(1)
/**
* enum xe_ras_recovery_action - RAS recovery actions
@@ -125,4 +126,53 @@ struct xe_ras_compute_error {
u32 reserved[15];
} __packed;
+/**
+ * struct xe_ras_soc_error_source - Source of SoC error
+ */
+struct xe_ras_soc_error_source {
+ /** @csc: CSC */
+ u32 csc:1;
+ /** @ieh: IEH (Integrated Error Handler) */
+ u32 ieh:1;
+ /** @reserved: Reserved for future use */
+ u32 reserved:30;
+} __packed;
+
+/**
+ * struct xe_ras_soc_error - Error details of SoC internal error
+ */
+struct xe_ras_soc_error {
+ /** @source: Error source */
+ struct xe_ras_soc_error_source source;
+ /** @details: Error details specific to the error source */
+ u32 details[15];
+} __packed;
+
+/**
+ * struct xe_ras_csc_error - CSC error details
+ */
+struct xe_ras_csc_error {
+ /** @reserved: Reserved */
+ u32 reserved;
+ /** @hec_fw_error: CSC firmware error */
+ u32 hec_fw_error;
+} __packed;
+
+/**
+ * struct xe_ras_ieh_error - SoC IEH (Integrated Error Handler) error details
+ */
+struct xe_ras_ieh_error {
+ /** @ieh_instance: IEH instance */
+ u32 ieh_instance:2;
+ /** @reserved: Reserved for future use */
+ u32 reserved:30;
+ /** @global_error_status: Global error status */
+ u32 global_error_status;
+ /** @local_error_status: Local error status */
+ u32 local_error_status;
+ /** @gerr_mask: Global error mask */
+ u32 gerr_mask;
+ /** @info: Additional information */
+ u32 info[10];
+} __packed;
#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 10/15] drm/xe/xe_ras: Query errors from system controller on probe
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (8 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 09/15] drm/xe/xe_ras: Handle uncorrectable SoC Internal errors Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 11/15] drm/xe/xe_pci_error: Process errors in mmio_enabled Riana Tauro
` (10 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait, Anoop Vijay,
Umesh Nerlige Ramappa
During probe, process and log any errors detected by firmware while
the driver was not loaded. Critical errors such as Punit, CSC are
reported through Pcode init failure, causing the driver to
enter survivability mode on probe.
Move soc remapper and system controller initialization
up in xe_device_probe to allow querying errors on module load
Cc: Anoop Vijay <anoop.c.vijay@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
v2: fix comment (Raag)
v3: reword commit message (Umesh)
---
drivers/gpu/drm/xe/xe_device.c | 20 ++++++++++----------
drivers/gpu/drm/xe/xe_ras.c | 7 +++++++
2 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index ac3d6ae56fb9..7ee2148f1321 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -989,6 +989,16 @@ int xe_device_probe(struct xe_device *xe)
if (err)
return err;
+ err = xe_soc_remapper_init(xe);
+ if (err)
+ return err;
+
+ err = xe_sysctrl_init(xe);
+ if (err)
+ return err;
+
+ xe_ras_init(xe);
+
/*
* Now that GT is initialized (TTM in particular),
* we can try to init display, and inherit the initial fb.
@@ -1029,10 +1039,6 @@ int xe_device_probe(struct xe_device *xe)
xe_nvm_init(xe);
- err = xe_soc_remapper_init(xe);
- if (err)
- return err;
-
err = xe_heci_gsc_init(xe);
if (err)
return err;
@@ -1071,12 +1077,6 @@ int xe_device_probe(struct xe_device *xe)
if (err)
goto err_unregister_display;
- err = xe_sysctrl_init(xe);
- if (err)
- goto err_unregister_display;
-
- xe_ras_init(xe);
-
err = xe_device_sysfs_init(xe);
if (err)
goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index cd4b19b57c04..837cb51fc854 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -326,4 +326,11 @@ void xe_ras_init(struct xe_device *xe)
if (IS_ENABLED(CONFIG_PCIEAER))
aer_unmask_and_downgrade_internal_error(xe);
+
+ /*
+ * During probe, process and log any errors detected by firmware while the driver was not
+ * loaded. Critical errors such as Punit and CSC are reported through Pcode init failure,
+ * causing the driver to enter survivability mode.
+ */
+ xe_ras_process_errors(xe);
}
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 11/15] drm/xe/xe_pci_error: Process errors in mmio_enabled
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (9 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 10/15] drm/xe/xe_ras: Query errors from system controller on probe Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 10:18 ` Mallesh, Koujalagi
2026-06-08 8:47 ` [PATCH v8 12/15] drm/xe/xe_ras: Add support to query device memory errors Riana Tauro
` (9 subsequent siblings)
20 siblings, 1 reply; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Query system controller when any non fatal error occurs to check
the type of the error, contain and recover.
The system controller is queried in the mmio_enabled callback.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
---
v2: use ras recovery enum (Raag)
v3: add comment for mapping
use const (Mallesh)
v4: use switch (Raag, Anshuman)
v5: call pci_prepare_reset() before requesting SBR
v6: rebase
---
drivers/gpu/drm/xe/xe_pci_error.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index ab17418aa164..b08601f470d6 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -9,6 +9,7 @@
#include "xe_gt.h"
#include "xe_pci.h"
#include "xe_printk.h"
+#include "xe_ras.h"
#include "xe_survivability_mode.h"
static void prepare_device_for_reset(struct pci_dev *pdev)
@@ -28,6 +29,21 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
pci_disable_device(pdev);
}
+static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u32 action)
+{
+ switch (action) {
+ case XE_RAS_RECOVERY_ACTION_RECOVERED:
+ return PCI_ERS_RESULT_RECOVERED;
+ case XE_RAS_RECOVERY_ACTION_RESET:
+ prepare_device_for_reset(pdev);
+ return PCI_ERS_RESULT_NEED_RESET;
+ case XE_RAS_RECOVERY_ACTION_DISCONNECT:
+ return PCI_ERS_RESULT_DISCONNECT;
+ default:
+ return PCI_ERS_RESULT_DISCONNECT;
+ }
+}
+
static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
{
struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -56,11 +72,13 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
{
struct xe_device *xe = pdev_to_xe_device(pdev);
+ enum xe_ras_recovery_action action;
xe_err(xe, "PCI error: MMIO enabled\n");
- /* TODO: Query system controller for the type of error and take appropriate action */
- return PCI_ERS_RESULT_RECOVERED;
+ action = xe_ras_process_errors(xe);
+
+ return ras_action_to_pci_result(pdev, action);
}
static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v8 11/15] drm/xe/xe_pci_error: Process errors in mmio_enabled
2026-06-08 8:47 ` [PATCH v8 11/15] drm/xe/xe_pci_error: Process errors in mmio_enabled Riana Tauro
@ 2026-06-08 10:18 ` Mallesh, Koujalagi
0 siblings, 0 replies; 26+ messages in thread
From: Mallesh, Koujalagi @ 2026-06-08 10:18 UTC (permalink / raw)
To: Riana Tauro, intel-xe
Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, badal.nilawar,
raag.jadav, ravi.kishore.koppuravuri, soham.purkait
On 08-06-2026 02:17 pm, Riana Tauro wrote:
> Query system controller when any non fatal error occurs to check
> the type of the error, contain and recover.
>
> The system controller is queried in the mmio_enabled callback.
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> Reviewed-by: Raag Jadav <raag.jadav@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v2: use ras recovery enum (Raag)
>
> v3: add comment for mapping
> use const (Mallesh)
>
> v4: use switch (Raag, Anshuman)
>
> v5: call pci_prepare_reset() before requesting SBR
>
> v6: rebase
> ---
> drivers/gpu/drm/xe/xe_pci_error.c | 22 ++++++++++++++++++++--
> 1 file changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index ab17418aa164..b08601f470d6 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -9,6 +9,7 @@
> #include "xe_gt.h"
> #include "xe_pci.h"
> #include "xe_printk.h"
> +#include "xe_ras.h"
> #include "xe_survivability_mode.h"
>
> static void prepare_device_for_reset(struct pci_dev *pdev)
> @@ -28,6 +29,21 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
> pci_disable_device(pdev);
> }
>
> +static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u32 action)
> +{
> + switch (action) {
> + case XE_RAS_RECOVERY_ACTION_RECOVERED:
> + return PCI_ERS_RESULT_RECOVERED;
> + case XE_RAS_RECOVERY_ACTION_RESET:
> + prepare_device_for_reset(pdev);
> + return PCI_ERS_RESULT_NEED_RESET;
> + case XE_RAS_RECOVERY_ACTION_DISCONNECT:
> + return PCI_ERS_RESULT_DISCONNECT;
> + default:
> + return PCI_ERS_RESULT_DISCONNECT;
> + }
> +}
> +
> static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
> {
> struct xe_device *xe = pdev_to_xe_device(pdev);
> @@ -56,11 +72,13 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
> {
> struct xe_device *xe = pdev_to_xe_device(pdev);
> + enum xe_ras_recovery_action action;
>
> xe_err(xe, "PCI error: MMIO enabled\n");
>
> - /* TODO: Query system controller for the type of error and take appropriate action */
> - return PCI_ERS_RESULT_RECOVERED;
> + action = xe_ras_process_errors(xe);
> +
> + return ras_action_to_pci_result(pdev, action);
> }
>
> static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v8 12/15] drm/xe/xe_ras: Add support to query device memory errors
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (10 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 11/15] drm/xe/xe_pci_error: Process errors in mmio_enabled Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [PATCH v8 13/15] drm/xe/xe_ras: Add support to query page offline queue and list Riana Tauro
` (8 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait, Tejas Upadhyay,
Himal Prasad Ghimiray
Add initial support to query uncorrectable device memory errors from
system controller. The recovery action for memory errors depends on the
error category. Firmware will set only one error category per response.
Double bit ECC (Error Correcting Code) errors will be handled using Page
offlining in a later patch. Poison and data parity errors are only logged.
Rest of the errors require SBR (Secondary Bus Reset) to recover.
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: simplify structures
v3: fix reserved member (Mallesh)
v4: add handling for poison and data parity
---
drivers/gpu/drm/xe/xe_ras.c | 33 +++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_ras_types.h | 20 +++++++++++++++++++
2 files changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 837cb51fc854..495478f10cb8 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -131,6 +131,36 @@ static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *
return XE_RAS_RECOVERY_ACTION_RESET;
}
+static enum xe_ras_recovery_action handle_device_memory_errors(struct xe_device *xe,
+ struct xe_ras_error_array *arr)
+{
+ struct xe_ras_memory_error *info = (void *)arr->details;
+
+ /*
+ * For memory errors, the recovery action depends on the error category
+ *
+ * TODO: Double bit ECC: Page offline handling
+ * Poison and data parity errors: Log only
+ * For any other memory errors, request a reset as recovery mechanism
+ */
+ switch (info->category) {
+ case XE_RAS_MEMORY_ECC:
+ xe_err(xe, "[RAS]: Double-bit ECC error detected at sw address 0x%llx\n",
+ info->sw_address);
+ break;
+ case XE_RAS_MEMORY_POISON:
+ xe_info(xe, "[RAS]: Poison error detected\n");
+ break;
+ case XE_RAS_MEMORY_DATA_PARITY:
+ xe_info(xe, "[RAS]: Data parity error detected\n");
+ break;
+ default:
+ return XE_RAS_RECOVERY_ACTION_RESET;
+ }
+
+ return XE_RAS_RECOVERY_ACTION_RECOVERED;
+}
+
void xe_ras_counter_threshold_crossed(struct xe_device *xe,
struct xe_sysctrl_event_response *response)
{
@@ -222,6 +252,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
case XE_RAS_COMP_SOC_INTERNAL:
action = handle_soc_internal_errors(xe, arr);
break;
+ case XE_RAS_COMP_DEVICE_MEMORY:
+ action = handle_device_memory_errors(xe, arr);
+ break;
default:
/* For any other component, reset */
action = XE_RAS_RECOVERY_ACTION_RESET;
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 2749ba0b0239..cbd871c09b6a 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -11,6 +11,10 @@
#define XE_RAS_NUM_ERROR_ARR 3
#define XE_RAS_NUM_COUNTERS 16
#define XE_RAS_SOC_IEH_PUNIT BIT(1)
+/* Device memory error categories */
+#define XE_RAS_MEMORY_ECC BIT(1)
+#define XE_RAS_MEMORY_POISON BIT(2)
+#define XE_RAS_MEMORY_DATA_PARITY BIT(5)
/**
* enum xe_ras_recovery_action - RAS recovery actions
@@ -175,4 +179,20 @@ struct xe_ras_ieh_error {
/** @info: Additional information */
u32 info[10];
} __packed;
+
+/**
+ * struct xe_ras_memory_error - Device memory error details
+ */
+struct xe_ras_memory_error {
+ /** @category: Device memory error category */
+ u8 category;
+ /** @reserved: Reserved for future use */
+ u8 reserved[7];
+ /** @hardware_address: Hardware physical address details */
+ u64 hardware_address;
+ /** @sw_address: Software address where error occurred */
+ u64 sw_address;
+ /** @reserved1: Reserved */
+ u32 reserved1[10];
+} __packed;
#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v8 13/15] drm/xe/xe_ras: Add support to query page offline queue and list
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (11 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 12/15] drm/xe/xe_ras: Add support to query device memory errors Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [RFC PATCH v8 14/15] drm/xe/xe_ras: Add support to offline and decline a page address Riana Tauro
` (7 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait, Tejas Upadhyay,
Himal Prasad Ghimiray
Add support to query page offline list and queue from firmware
during module load. The page offline list command retrieves pages that
are already offlined by the firmware. The page offline queue command
retrieves the pages pending to be offlined by the firmware.
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: fix commit message
fix log (Tejas)
v3: move sysctrl prepare command to sysctrl layer (Raag)
v4: break if pages are 0 (Tejas)
v5: add request structure for page offline list
---
drivers/gpu/drm/xe/xe_ras.c | 95 +++++++++++++++++++
drivers/gpu/drm/xe/xe_ras_types.h | 44 +++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 4 +
3 files changed, 143 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 495478f10cb8..58609733a933 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -161,6 +161,98 @@ static enum xe_ras_recovery_action handle_device_memory_errors(struct xe_device
return XE_RAS_RECOVERY_ACTION_RECOVERED;
}
+static void get_queued_pages(struct xe_device *xe)
+{
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_page_offline_queue response = {0};
+ u32 count = 0;
+ size_t rlen;
+ int ret;
+
+ /* Supported only on platforms with system controller */
+ if (!xe->info.has_sysctrl)
+ return;
+
+ xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP,
+ XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE, NULL, 0, &response,
+ sizeof(response));
+
+ do {
+ memset(&response, 0, sizeof(response));
+
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "sysctrl: failed to get page offline queue %d\n", ret);
+ return;
+ }
+
+ if (rlen != sizeof(response)) {
+ xe_err(xe, "sysctrl: unexpected page offline queue response length %zu (expected %zu)\n",
+ rlen, sizeof(response));
+ return;
+ }
+
+ /* TODO: Process pages and offline them */
+
+ count += response.pages_returned;
+ if (!response.pages_returned)
+ break;
+
+ if (count > response.total_pages) {
+ xe_err(xe, "sysctrl: Pages returned from queue exceed total pages %u, returned %u\n",
+ response.total_pages, count);
+ return;
+ }
+ } while (response.additional_data);
+}
+
+static void get_offlined_list(struct xe_device *xe)
+{
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_offline_list_response response = {0};
+ struct xe_ras_offline_list_request request = {0};
+ u32 count = 0;
+ size_t rlen;
+ int ret;
+
+ /* Supported only on platforms with system controller */
+ if (!xe->info.has_sysctrl)
+ return;
+
+ xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_OFFLINE_LIST,
+ &request, sizeof(request), &response, sizeof(response));
+
+ do {
+ memset(&response, 0, sizeof(response));
+
+ request.index = count;
+
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "sysctrl: failed to get page offline list %d\n", ret);
+ return;
+ }
+
+ if (rlen != sizeof(response)) {
+ xe_err(xe, "sysctrl: unexpected page offline list response length %zu (expected %zu)\n",
+ rlen, sizeof(response));
+ return;
+ }
+
+ /* TODO: Process pages and offline them */
+
+ count += response.pages_returned;
+ if (!response.pages_returned)
+ break;
+
+ if (count > response.total_pages) {
+ xe_err(xe, "sysctrl: Pages returned from list exceed total pages %u, returned %u\n",
+ response.total_pages, count);
+ return;
+ }
+ } while (response.additional_data);
+}
+
void xe_ras_counter_threshold_crossed(struct xe_device *xe,
struct xe_sysctrl_event_response *response)
{
@@ -360,6 +452,9 @@ void xe_ras_init(struct xe_device *xe)
if (IS_ENABLED(CONFIG_PCIEAER))
aer_unmask_and_downgrade_internal_error(xe);
+ get_queued_pages(xe);
+ get_offlined_list(xe);
+
/*
* During probe, process and log any errors detected by firmware while the driver was not
* loaded. Critical errors such as Punit and CSC are reported through Pcode init failure,
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index cbd871c09b6a..227493c6ed35 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -16,6 +16,8 @@
#define XE_RAS_MEMORY_POISON BIT(2)
#define XE_RAS_MEMORY_DATA_PARITY BIT(5)
+#define XE_RAS_NUM_PAGES 25
+
/**
* enum xe_ras_recovery_action - RAS recovery actions
*
@@ -195,4 +197,46 @@ struct xe_ras_memory_error {
/** @reserved1: Reserved */
u32 reserved1[10];
} __packed;
+
+/**
+ * struct xe_ras_offline_list_request - Request for get offline list command
+ */
+struct xe_ras_offline_list_request {
+ /** @index: Zero-based index into the offline page list */
+ u32 index;
+} __packed;
+
+/**
+ * struct xe_ras_offline_list_response - Response from get offline list command
+ */
+struct xe_ras_offline_list_response {
+ /** @max_entries: Total no of pages that can be stored in flash */
+ u32 max_entries;
+ /** @total_pages: Total number of permanently offlined pages */
+ u32 total_pages;
+ /** @pages_returned: Number of pages returned in this response */
+ u32 pages_returned;
+ /** @page_addresses: Array of permanently offlined page addresses (4KB aligned) */
+ u64 page_addresses[XE_RAS_NUM_PAGES];
+ /** @additional_data: Indicates if more data is available */
+ u8 additional_data;
+ /** @reserved: Reserved for future use */
+ u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_queue - Response from get offline queue command
+ */
+struct xe_ras_page_offline_queue {
+ /** @total_pages: Total number of queued pages */
+ u32 total_pages;
+ /** @pages_returned: Number of pages returned in this response */
+ u32 pages_returned;
+ /** @page_addresses: Array of page addresses (4KB aligned) */
+ u64 page_addresses[XE_RAS_NUM_PAGES];
+ /** @additional_data: Indicates if more data is available */
+ u8 additional_data;
+ /** @reserved: Reserved for future use */
+ u8 reserved[3];
+} __packed;
#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 93ff0d481d74..c9fbdfea1ffb 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -24,10 +24,14 @@ enum xe_sysctrl_group {
*
* @XE_SYSCTRL_CMD_GET_SOC_ERROR: Retrieve basic error information
* @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
+ * @XE_SYSCTRL_CMD_GET_OFFLINE_LIST: Retrieve list of all offlined pages from flash
+ * @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Retrieve list of offlined queued pages from firmware
*/
enum xe_sysctrl_gfsp_cmd {
XE_SYSCTRL_CMD_GET_SOC_ERROR = 0x01,
XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07,
+ XE_SYSCTRL_CMD_GET_OFFLINE_LIST = 0x09,
+ XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE = 0x0A,
};
/**
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v8 14/15] drm/xe/xe_ras: Add support to offline and decline a page address
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (12 preceding siblings ...)
2026-06-08 8:47 ` [PATCH v8 13/15] drm/xe/xe_ras: Add support to query page offline queue and list Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 8:47 ` [RFC PATCH v8 15/15] drm/xe/xe_ras: Process pages from offlined list and queue Riana Tauro
` (6 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait, Tejas Upadhyay,
Himal Prasad Ghimiray
This will be integrated with the related address-fault handling flow
once this patch is merged.
https://lore.kernel.org/intel-xe/20260506141143.4033299-12-tejas.upadhyay@intel.com/
Sending for initial comments.
Add basic support for sending page offline/decline requests
to system controller and use it for device memory ECC error
handling.
Handle return values from xe_ttm_vram_handle_addr_fault() and take
corresponding action. Pages that belong to critical BOs cannot
be handled by offlining and require a SBR (Secondary Bus Reset).
Pages that are configured for log-only handling are declined.
Other eligible page addresses are offlined through firmware.
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: set ret to 0 (Tejas)
use switch for status
v3: rebase
---
drivers/gpu/drm/xe/xe_ras.c | 123 +++++++++++++++++-
drivers/gpu/drm/xe/xe_ras_types.h | 58 +++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 2 +
3 files changed, 182 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index b0df2bb3aeca..c4ff696ec2f2 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,6 +3,7 @@
* Copyright © 2026 Intel Corporation
*/
+#include "xe_bo.h"
#include "xe_device.h"
#include "xe_printk.h"
#include "xe_ras.h"
@@ -72,6 +73,122 @@ static inline const char *comp_to_str(u8 component)
return xe_ras_components[component];
}
+static int ras_status_to_errno(u32 status)
+{
+ switch (status) {
+ case XE_RAS_STATUS_SUCCESS:
+ return 0;
+ case XE_RAS_STATUS_INVALID_PARAM:
+ return -EINVAL;
+ case XE_RAS_STATUS_OP_NOT_SUPPORTED:
+ return -EOPNOTSUPP;
+ case XE_RAS_STATUS_TIMEOUT:
+ return -ETIMEDOUT;
+ case XE_RAS_STATUS_HARDWARE_FAILURE:
+ return -EIO;
+ case XE_RAS_STATUS_INSUFFICIENT_RESOURCES:
+ return -ENOSPC;
+ default:
+ return -EPROTO;
+ }
+}
+
+static int send_page_offline(struct xe_device *xe, enum xe_ras_page_action action, u64 page_address)
+{
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_page_offline_request request = {0};
+ struct xe_ras_page_offline_response response = {0};
+ size_t rlen;
+ int ret;
+
+ if (!xe->info.has_sysctrl)
+ return 0;
+
+ if (action >= XE_RAS_PAGE_ACTION_MAX) {
+ xe_err(xe, "[RAS]: Invalid page offline action %d\n", action);
+ return -EINVAL;
+ }
+
+ request.page_address = page_address;
+ request.action = action;
+
+ xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_PAGE_OFFLINE,
+ &request, sizeof(request), &response, sizeof(response));
+
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "sysctrl: failed to send page offline command %d\n", ret);
+ return ret;
+ }
+
+ if (rlen != sizeof(response)) {
+ xe_err(xe, "sysctrl: unexpected page offline response length %zu (expected %zu)\n",
+ rlen, sizeof(response));
+ return -EINVAL;
+ }
+
+ ret = ras_status_to_errno(response.status);
+ if (ret) {
+ xe_err(xe, "sysctrl: page offline command failed with status %d\n",
+ response.status);
+ }
+
+ return ret;
+}
+
+static int handle_page_offline(struct xe_device *xe, u64 page_address, bool send_offline_cmd)
+{
+ enum xe_ras_page_action action;
+ int ret = 0;
+
+ if (!IS_ALIGNED(page_address, XE_PAGE_SIZE)) {
+ xe_err(xe, "sysctrl: Unaligned page address: 0x%llx\n", page_address);
+ return -EINVAL;
+ }
+
+ /*
+ * TODO: Call function to handle address fault
+ * ret = xe_ttm_vram_handle_addr_fault(xe, page_address);
+ */
+
+ /*
+ * Handle return code from address fault handling function:
+ * 0: Address is valid and can be offlined
+ * -EIO: Address belongs to a critical BO that cannot be offlined
+ * -EOPNOTSUPP: Address is valid and can be offlined but user policy is not to offline
+ *
+ * For any other non-zero error code, skip offlining.
+ */
+
+ switch (ret) {
+ case 0:
+ action = XE_RAS_PAGE_ACTION_OFFLINE;
+ break;
+ /* User policy set to decline page offlining */
+ case -EOPNOTSUPP:
+ action = XE_RAS_PAGE_ACTION_DECLINE;
+ break;
+ case -EIO:
+ xe_err(xe, "[RAS]: Page address belongs to critical BO: 0x%llx\n",
+ page_address);
+ return ret;
+ default:
+ xe_err(xe, "[RAS]: Failed to handle address fault 0x%llx: %d\n",
+ page_address, ret);
+ return 0;
+ }
+
+ if (send_offline_cmd) {
+ ret = send_page_offline(xe, action, page_address);
+ if (ret)
+ xe_err(xe, "sysctrl: Failed to offline page for address 0x%llx: %d\n",
+ page_address, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_ras_error_array *arr)
{
struct xe_ras_compute_error *error_info = (void *)arr->details;
@@ -135,11 +252,12 @@ static enum xe_ras_recovery_action handle_device_memory_errors(struct xe_device
struct xe_ras_error_array *arr)
{
struct xe_ras_memory_error *info = (void *)arr->details;
+ int ret;
/*
* For memory errors, the recovery action depends on the error category
*
- * TODO: Double bit ECC: Page offline handling
+ * Double bit ECC: Page offline handling
* Poison and data parity errors: Log only
* For any other memory errors, request a reset as recovery mechanism
*/
@@ -147,6 +265,9 @@ static enum xe_ras_recovery_action handle_device_memory_errors(struct xe_device
case XE_RAS_MEMORY_ECC:
xe_err(xe, "[RAS]: Double-bit ECC error detected at sw address 0x%llx\n",
info->sw_address);
+ ret = handle_page_offline(xe, info->sw_address, true);
+ if (ret)
+ return XE_RAS_RECOVERY_ACTION_RESET;
break;
case XE_RAS_MEMORY_POISON:
xe_info(xe, "[RAS]: Poison error detected\n");
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 227493c6ed35..3312c9b42fe7 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -36,6 +36,40 @@ enum xe_ras_recovery_action {
XE_RAS_RECOVERY_ACTION_MAX
};
+/**
+ * enum xe_ras_page_action - Page offline actions for page offline request
+ *
+ * @XE_RAS_PAGE_ACTION_OFFLINE: Instruct firmware to remove page from queue
+ * @XE_RAS_PAGE_ACTION_DECLINE: Instruct firmware to mark page as not offline
+ * @XE_RAS_PAGE_ACTION_MAX: Max value for validation
+ */
+enum xe_ras_page_action {
+ XE_RAS_PAGE_ACTION_OFFLINE,
+ XE_RAS_PAGE_ACTION_DECLINE,
+ XE_RAS_PAGE_ACTION_MAX
+};
+
+/**
+ * enum xe_ras_response_status - RAS response status codes
+ *
+ * @XE_RAS_STATUS_SUCCESS: Operation successful
+ * @XE_RAS_STATUS_INVALID_PARAM: Invalid parameter
+ * @XE_RAS_STATUS_OP_NOT_SUPPORTED: Operation not supported
+ * @XE_RAS_STATUS_TIMEOUT: Operation timed out
+ * @XE_RAS_STATUS_HARDWARE_FAILURE: Hardware failure
+ * @XE_RAS_STATUS_INSUFFICIENT_RESOURCES: Insufficient resources
+ * @XE_RAS_STATUS_UNKNOWN_ERROR: Unknown error
+ */
+enum xe_ras_response_status {
+ XE_RAS_STATUS_SUCCESS = 0,
+ XE_RAS_STATUS_INVALID_PARAM,
+ XE_RAS_STATUS_OP_NOT_SUPPORTED,
+ XE_RAS_STATUS_TIMEOUT,
+ XE_RAS_STATUS_HARDWARE_FAILURE,
+ XE_RAS_STATUS_INSUFFICIENT_RESOURCES,
+ XE_RAS_STATUS_UNKNOWN_ERROR
+};
+
/**
* struct xe_ras_error_common - Error fields that are common across all products
*/
@@ -239,4 +273,28 @@ struct xe_ras_page_offline_queue {
/** @reserved: Reserved for future use */
u8 reserved[3];
} __packed;
+
+/**
+ * struct xe_ras_page_offline_request - Request for page offline command
+ *
+ * This structure provides the request format to offline/decline a page
+ */
+struct xe_ras_page_offline_request {
+ /** @page_address: Page address (4KB aligned) */
+ u64 page_address;
+ /** @action: Action to be performed, see &enum xe_ras_page_action */
+ u32 action;
+ /** @reserved: Reserved for future use */
+ u32 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_response - Response from page offline command
+ */
+struct xe_ras_page_offline_response {
+ /** @status: Status of the page offline request, see &enum xe_ras_response_status */
+ u32 status;
+ /** @reserved: Reserved for future use */
+ u32 reserved;
+} __packed;
#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index c9fbdfea1ffb..f6cbb349c416 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -24,12 +24,14 @@ enum xe_sysctrl_group {
*
* @XE_SYSCTRL_CMD_GET_SOC_ERROR: Retrieve basic error information
* @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
+ * @XE_SYSCTRL_CMD_PAGE_OFFLINE: Instruct firmware to offline/decline a page
* @XE_SYSCTRL_CMD_GET_OFFLINE_LIST: Retrieve list of all offlined pages from flash
* @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Retrieve list of offlined queued pages from firmware
*/
enum xe_sysctrl_gfsp_cmd {
XE_SYSCTRL_CMD_GET_SOC_ERROR = 0x01,
XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07,
+ XE_SYSCTRL_CMD_PAGE_OFFLINE = 0x08,
XE_SYSCTRL_CMD_GET_OFFLINE_LIST = 0x09,
XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE = 0x0A,
};
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v8 15/15] drm/xe/xe_ras: Process pages from offlined list and queue
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (13 preceding siblings ...)
2026-06-08 8:47 ` [RFC PATCH v8 14/15] drm/xe/xe_ras: Add support to offline and decline a page address Riana Tauro
@ 2026-06-08 8:47 ` Riana Tauro
2026-06-08 12:50 ` ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev8) Patchwork
` (5 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Riana Tauro @ 2026-06-08 8:47 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait, Tejas Upadhyay,
Himal Prasad Ghimiray
This will be integrated with the related address-fault handling flow
once this patch is merged.
https://lore.kernel.org/intel-xe/20260506141143.4033299-12-tejas.upadhyay@intel.com/
Sending for initial comments.
On module load, process pages queued by firmware for offlining by
reserving and sending the offline/decline command to firmware.
For already offlined pages in the firmware list, reserve the pages.
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: remove newline (Tejas)
---
drivers/gpu/drm/xe/xe_ras.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 604d122b61c0..9627be7a2042 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -288,7 +288,7 @@ static void get_queued_pages(struct xe_device *xe)
struct xe_ras_page_offline_queue response = {0};
u32 count = 0;
size_t rlen;
- int ret;
+ int ret, i;
/* Supported only on platforms with system controller */
if (!xe->info.has_sysctrl)
@@ -313,7 +313,8 @@ static void get_queued_pages(struct xe_device *xe)
return;
}
- /* TODO: Process pages and offline them */
+ for (i = 0; i < response.pages_returned && i < XE_RAS_NUM_PAGES; i++)
+ handle_page_offline(xe, response.page_addresses[i], true);
count += response.pages_returned;
if (!response.pages_returned)
@@ -334,7 +335,7 @@ static void get_offlined_list(struct xe_device *xe)
struct xe_ras_offline_list_request request = {0};
u32 count = 0;
size_t rlen;
- int ret;
+ int ret, i;
/* Supported only on platforms with system controller */
if (!xe->info.has_sysctrl)
@@ -360,7 +361,8 @@ static void get_offlined_list(struct xe_device *xe)
return;
}
- /* TODO: Process pages and offline them */
+ for (i = 0; i < response.pages_returned && i < XE_RAS_NUM_PAGES; i++)
+ handle_page_offline(xe, response.page_addresses[i], false);
count += response.pages_returned;
if (!response.pages_returned)
--
2.47.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev8)
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (14 preceding siblings ...)
2026-06-08 8:47 ` [RFC PATCH v8 15/15] drm/xe/xe_ras: Process pages from offlined list and queue Riana Tauro
@ 2026-06-08 12:50 ` Patchwork
2026-06-08 12:52 ` ✓ CI.KUnit: success " Patchwork
` (4 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2026-06-08 12:50 UTC (permalink / raw)
To: Tauro, Riana; +Cc: intel-xe
== Series Details ==
Series: Introduce Xe Uncorrectable Error Handling (rev8)
URL : https://patchwork.freedesktop.org/series/160482/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 04869a3c97b9bd5b4f9d27933e7401d947c38680
Author: Riana Tauro <riana.tauro@intel.com>
Date: Mon Jun 8 14:17:16 2026 +0530
drm/xe/xe_ras: Process pages from offlined list and queue
This will be integrated with the related address-fault handling flow
once this patch is merged.
https://lore.kernel.org/intel-xe/20260506141143.4033299-12-tejas.upadhyay@intel.com/
Sending for initial comments.
On module load, process pages queued by firmware for offlining by
reserving and sending the offline/decline command to firmware.
For already offlined pages in the firmware list, reserve the pages.
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
+ /mt/dim checkpatch 044152a1643f7150f482c8d326caa5023ae4c397 drm-intel
1aa3ba5eac96 drm/xe/xe_survivability: Decouple survivability info from boot survivability
46421da00044 drm/xe/xe_sysctrl: Make sysctrl flood limit reusable
90885357ae38 drm/xe: Improve wedged state management
ff1a7effd277 drm/xe/xe_pci_error: Implement PCI error recovery callbacks
-:60: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#60:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 147 lines checked
0842d9aff03c drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset
09c917f97981 drm/xe: Skip device access during PCI error recovery
16759130d544 drm/xe/xe_ras: Initialize Uncorrectable AER Registers
8b70091aa00a drm/xe/xe_ras: Add support for uncorrectable core-compute errors
c46dea9ddd0a drm/xe/xe_ras: Handle uncorrectable SoC Internal errors
cf348f23a90b drm/xe/xe_ras: Query errors from system controller on probe
55f2849a5180 drm/xe/xe_pci_error: Process errors in mmio_enabled
2a3021aee92e drm/xe/xe_ras: Add support to query device memory errors
217e799a985a drm/xe/xe_ras: Add support to query page offline queue and list
2d0c564d0da1 drm/xe/xe_ras: Add support to offline and decline a page address
04869a3c97b9 drm/xe/xe_ras: Process pages from offlined list and queue
^ permalink raw reply [flat|nested] 26+ messages in thread* ✓ CI.KUnit: success for Introduce Xe Uncorrectable Error Handling (rev8)
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (15 preceding siblings ...)
2026-06-08 12:50 ` ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev8) Patchwork
@ 2026-06-08 12:52 ` Patchwork
2026-06-09 5:28 ` ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev9) Patchwork
` (3 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2026-06-08 12:52 UTC (permalink / raw)
To: Tauro, Riana; +Cc: intel-xe
== Series Details ==
Series: Introduce Xe Uncorrectable Error Handling (rev8)
URL : https://patchwork.freedesktop.org/series/160482/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:50:43] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:50:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:51:27] Starting KUnit Kernel (1/1)...
[12:51:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:51:28] ================== guc_buf (11 subtests) ===================
[12:51:28] [PASSED] test_smallest
[12:51:28] [PASSED] test_largest
[12:51:28] [PASSED] test_granular
[12:51:28] [PASSED] test_unique
[12:51:28] [PASSED] test_overlap
[12:51:28] [PASSED] test_reusable
[12:51:28] [PASSED] test_too_big
[12:51:28] [PASSED] test_flush
[12:51:28] [PASSED] test_lookup
[12:51:28] [PASSED] test_data
[12:51:28] [PASSED] test_class
[12:51:28] ===================== [PASSED] guc_buf =====================
[12:51:28] =================== guc_dbm (7 subtests) ===================
[12:51:28] [PASSED] test_empty
[12:51:28] [PASSED] test_default
[12:51:28] ======================== test_size ========================
[12:51:28] [PASSED] 4
[12:51:28] [PASSED] 8
[12:51:28] [PASSED] 32
[12:51:28] [PASSED] 256
[12:51:28] ==================== [PASSED] test_size ====================
[12:51:28] ======================= test_reuse ========================
[12:51:28] [PASSED] 4
[12:51:28] [PASSED] 8
[12:51:28] [PASSED] 32
[12:51:28] [PASSED] 256
[12:51:28] =================== [PASSED] test_reuse ====================
[12:51:28] =================== test_range_overlap ====================
[12:51:28] [PASSED] 4
[12:51:28] [PASSED] 8
[12:51:28] [PASSED] 32
[12:51:28] [PASSED] 256
[12:51:28] =============== [PASSED] test_range_overlap ================
[12:51:28] =================== test_range_compact ====================
[12:51:28] [PASSED] 4
[12:51:28] [PASSED] 8
[12:51:28] [PASSED] 32
[12:51:28] [PASSED] 256
[12:51:28] =============== [PASSED] test_range_compact ================
[12:51:28] ==================== test_range_spare =====================
[12:51:28] [PASSED] 4
[12:51:28] [PASSED] 8
[12:51:28] [PASSED] 32
[12:51:28] [PASSED] 256
[12:51:28] ================ [PASSED] test_range_spare =================
[12:51:28] ===================== [PASSED] guc_dbm =====================
[12:51:28] =================== guc_idm (6 subtests) ===================
[12:51:28] [PASSED] bad_init
[12:51:28] [PASSED] no_init
[12:51:28] [PASSED] init_fini
[12:51:28] [PASSED] check_used
[12:51:28] [PASSED] check_quota
[12:51:28] [PASSED] check_all
[12:51:28] ===================== [PASSED] guc_idm =====================
[12:51:28] ================== no_relay (3 subtests) ===================
[12:51:28] [PASSED] xe_drops_guc2pf_if_not_ready
[12:51:28] [PASSED] xe_drops_guc2vf_if_not_ready
[12:51:28] [PASSED] xe_rejects_send_if_not_ready
[12:51:28] ==================== [PASSED] no_relay =====================
[12:51:28] ================== pf_relay (14 subtests) ==================
[12:51:28] [PASSED] pf_rejects_guc2pf_too_short
[12:51:28] [PASSED] pf_rejects_guc2pf_too_long
[12:51:28] [PASSED] pf_rejects_guc2pf_no_payload
[12:51:28] [PASSED] pf_fails_no_payload
[12:51:28] [PASSED] pf_fails_bad_origin
[12:51:28] [PASSED] pf_fails_bad_type
[12:51:28] [PASSED] pf_txn_reports_error
[12:51:28] [PASSED] pf_txn_sends_pf2guc
[12:51:28] [PASSED] pf_sends_pf2guc
[12:51:28] [SKIPPED] pf_loopback_nop
[12:51:28] [SKIPPED] pf_loopback_echo
[12:51:28] [SKIPPED] pf_loopback_fail
[12:51:28] [SKIPPED] pf_loopback_busy
[12:51:28] [SKIPPED] pf_loopback_retry
[12:51:28] ==================== [PASSED] pf_relay =====================
[12:51:28] ================== vf_relay (3 subtests) ===================
[12:51:28] [PASSED] vf_rejects_guc2vf_too_short
[12:51:28] [PASSED] vf_rejects_guc2vf_too_long
[12:51:28] [PASSED] vf_rejects_guc2vf_no_payload
[12:51:28] ==================== [PASSED] vf_relay =====================
[12:51:28] ================ pf_gt_config (9 subtests) =================
[12:51:28] [PASSED] fair_contexts_1vf
[12:51:28] [PASSED] fair_doorbells_1vf
[12:51:28] [PASSED] fair_ggtt_1vf
[12:51:28] ====================== fair_vram_1vf ======================
[12:51:28] [PASSED] 3.50 GiB
[12:51:28] [PASSED] 11.5 GiB
[12:51:28] [PASSED] 15.5 GiB
[12:51:28] [PASSED] 31.5 GiB
[12:51:28] [PASSED] 63.5 GiB
[12:51:28] [PASSED] 1.91 GiB
[12:51:28] ================== [PASSED] fair_vram_1vf ==================
[12:51:28] ================ fair_vram_1vf_admin_only =================
[12:51:28] [PASSED] 3.50 GiB
[12:51:28] [PASSED] 11.5 GiB
[12:51:28] [PASSED] 15.5 GiB
[12:51:28] [PASSED] 31.5 GiB
[12:51:28] [PASSED] 63.5 GiB
[12:51:28] [PASSED] 1.91 GiB
[12:51:28] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:51:28] ====================== fair_contexts ======================
[12:51:28] [PASSED] 1 VF
[12:51:28] [PASSED] 2 VFs
[12:51:28] [PASSED] 3 VFs
[12:51:28] [PASSED] 4 VFs
[12:51:28] [PASSED] 5 VFs
[12:51:28] [PASSED] 6 VFs
[12:51:28] [PASSED] 7 VFs
[12:51:28] [PASSED] 8 VFs
[12:51:28] [PASSED] 9 VFs
[12:51:28] [PASSED] 10 VFs
[12:51:28] [PASSED] 11 VFs
[12:51:28] [PASSED] 12 VFs
[12:51:28] [PASSED] 13 VFs
[12:51:28] [PASSED] 14 VFs
[12:51:28] [PASSED] 15 VFs
[12:51:28] [PASSED] 16 VFs
[12:51:28] [PASSED] 17 VFs
[12:51:28] [PASSED] 18 VFs
[12:51:28] [PASSED] 19 VFs
[12:51:28] [PASSED] 20 VFs
[12:51:28] [PASSED] 21 VFs
[12:51:28] [PASSED] 22 VFs
[12:51:28] [PASSED] 23 VFs
[12:51:28] [PASSED] 24 VFs
[12:51:28] [PASSED] 25 VFs
[12:51:28] [PASSED] 26 VFs
[12:51:28] [PASSED] 27 VFs
[12:51:28] [PASSED] 28 VFs
[12:51:28] [PASSED] 29 VFs
[12:51:28] [PASSED] 30 VFs
[12:51:28] [PASSED] 31 VFs
[12:51:28] [PASSED] 32 VFs
[12:51:28] [PASSED] 33 VFs
[12:51:28] [PASSED] 34 VFs
[12:51:28] [PASSED] 35 VFs
[12:51:28] [PASSED] 36 VFs
[12:51:28] [PASSED] 37 VFs
[12:51:28] [PASSED] 38 VFs
[12:51:28] [PASSED] 39 VFs
[12:51:28] [PASSED] 40 VFs
[12:51:28] [PASSED] 41 VFs
[12:51:28] [PASSED] 42 VFs
[12:51:28] [PASSED] 43 VFs
[12:51:28] [PASSED] 44 VFs
[12:51:28] [PASSED] 45 VFs
[12:51:28] [PASSED] 46 VFs
[12:51:28] [PASSED] 47 VFs
[12:51:28] [PASSED] 48 VFs
[12:51:28] [PASSED] 49 VFs
[12:51:28] [PASSED] 50 VFs
[12:51:28] [PASSED] 51 VFs
[12:51:28] [PASSED] 52 VFs
[12:51:28] [PASSED] 53 VFs
[12:51:28] [PASSED] 54 VFs
[12:51:28] [PASSED] 55 VFs
[12:51:28] [PASSED] 56 VFs
[12:51:28] [PASSED] 57 VFs
[12:51:28] [PASSED] 58 VFs
[12:51:28] [PASSED] 59 VFs
[12:51:28] [PASSED] 60 VFs
[12:51:28] [PASSED] 61 VFs
[12:51:28] [PASSED] 62 VFs
[12:51:28] [PASSED] 63 VFs
[12:51:28] ================== [PASSED] fair_contexts ==================
[12:51:28] ===================== fair_doorbells ======================
[12:51:28] [PASSED] 1 VF
[12:51:28] [PASSED] 2 VFs
[12:51:28] [PASSED] 3 VFs
[12:51:28] [PASSED] 4 VFs
[12:51:28] [PASSED] 5 VFs
[12:51:28] [PASSED] 6 VFs
[12:51:28] [PASSED] 7 VFs
[12:51:28] [PASSED] 8 VFs
[12:51:28] [PASSED] 9 VFs
[12:51:28] [PASSED] 10 VFs
[12:51:28] [PASSED] 11 VFs
[12:51:28] [PASSED] 12 VFs
[12:51:28] [PASSED] 13 VFs
[12:51:28] [PASSED] 14 VFs
[12:51:28] [PASSED] 15 VFs
[12:51:28] [PASSED] 16 VFs
[12:51:28] [PASSED] 17 VFs
[12:51:28] [PASSED] 18 VFs
[12:51:28] [PASSED] 19 VFs
[12:51:28] [PASSED] 20 VFs
[12:51:28] [PASSED] 21 VFs
[12:51:28] [PASSED] 22 VFs
[12:51:28] [PASSED] 23 VFs
[12:51:28] [PASSED] 24 VFs
[12:51:28] [PASSED] 25 VFs
[12:51:28] [PASSED] 26 VFs
[12:51:28] [PASSED] 27 VFs
[12:51:28] [PASSED] 28 VFs
[12:51:28] [PASSED] 29 VFs
[12:51:28] [PASSED] 30 VFs
[12:51:28] [PASSED] 31 VFs
[12:51:28] [PASSED] 32 VFs
[12:51:28] [PASSED] 33 VFs
[12:51:28] [PASSED] 34 VFs
[12:51:28] [PASSED] 35 VFs
[12:51:28] [PASSED] 36 VFs
[12:51:28] [PASSED] 37 VFs
[12:51:28] [PASSED] 38 VFs
[12:51:28] [PASSED] 39 VFs
[12:51:28] [PASSED] 40 VFs
[12:51:28] [PASSED] 41 VFs
[12:51:28] [PASSED] 42 VFs
[12:51:28] [PASSED] 43 VFs
[12:51:28] [PASSED] 44 VFs
[12:51:28] [PASSED] 45 VFs
[12:51:28] [PASSED] 46 VFs
[12:51:28] [PASSED] 47 VFs
[12:51:28] [PASSED] 48 VFs
[12:51:28] [PASSED] 49 VFs
[12:51:28] [PASSED] 50 VFs
[12:51:28] [PASSED] 51 VFs
[12:51:28] [PASSED] 52 VFs
[12:51:28] [PASSED] 53 VFs
[12:51:28] [PASSED] 54 VFs
[12:51:28] [PASSED] 55 VFs
[12:51:28] [PASSED] 56 VFs
[12:51:28] [PASSED] 57 VFs
[12:51:28] [PASSED] 58 VFs
[12:51:28] [PASSED] 59 VFs
[12:51:28] [PASSED] 60 VFs
[12:51:28] [PASSED] 61 VFs
[12:51:28] [PASSED] 62 VFs
[12:51:28] [PASSED] 63 VFs
[12:51:28] ================= [PASSED] fair_doorbells ==================
[12:51:28] ======================== fair_ggtt ========================
[12:51:28] [PASSED] 1 VF
[12:51:28] [PASSED] 2 VFs
[12:51:28] [PASSED] 3 VFs
[12:51:28] [PASSED] 4 VFs
[12:51:28] [PASSED] 5 VFs
[12:51:28] [PASSED] 6 VFs
[12:51:28] [PASSED] 7 VFs
[12:51:28] [PASSED] 8 VFs
[12:51:28] [PASSED] 9 VFs
[12:51:28] [PASSED] 10 VFs
[12:51:28] [PASSED] 11 VFs
[12:51:28] [PASSED] 12 VFs
[12:51:28] [PASSED] 13 VFs
[12:51:28] [PASSED] 14 VFs
[12:51:28] [PASSED] 15 VFs
[12:51:28] [PASSED] 16 VFs
[12:51:28] [PASSED] 17 VFs
[12:51:28] [PASSED] 18 VFs
[12:51:28] [PASSED] 19 VFs
[12:51:28] [PASSED] 20 VFs
[12:51:28] [PASSED] 21 VFs
[12:51:28] [PASSED] 22 VFs
[12:51:28] [PASSED] 23 VFs
[12:51:28] [PASSED] 24 VFs
[12:51:28] [PASSED] 25 VFs
[12:51:28] [PASSED] 26 VFs
[12:51:28] [PASSED] 27 VFs
[12:51:28] [PASSED] 28 VFs
[12:51:28] [PASSED] 29 VFs
[12:51:28] [PASSED] 30 VFs
[12:51:28] [PASSED] 31 VFs
[12:51:28] [PASSED] 32 VFs
[12:51:28] [PASSED] 33 VFs
[12:51:28] [PASSED] 34 VFs
[12:51:28] [PASSED] 35 VFs
[12:51:28] [PASSED] 36 VFs
[12:51:28] [PASSED] 37 VFs
[12:51:28] [PASSED] 38 VFs
[12:51:28] [PASSED] 39 VFs
[12:51:28] [PASSED] 40 VFs
[12:51:28] [PASSED] 41 VFs
[12:51:28] [PASSED] 42 VFs
[12:51:28] [PASSED] 43 VFs
[12:51:28] [PASSED] 44 VFs
[12:51:28] [PASSED] 45 VFs
[12:51:28] [PASSED] 46 VFs
[12:51:28] [PASSED] 47 VFs
[12:51:28] [PASSED] 48 VFs
[12:51:28] [PASSED] 49 VFs
[12:51:28] [PASSED] 50 VFs
[12:51:28] [PASSED] 51 VFs
[12:51:28] [PASSED] 52 VFs
[12:51:28] [PASSED] 53 VFs
[12:51:28] [PASSED] 54 VFs
[12:51:28] [PASSED] 55 VFs
[12:51:28] [PASSED] 56 VFs
[12:51:28] [PASSED] 57 VFs
[12:51:28] [PASSED] 58 VFs
[12:51:28] [PASSED] 59 VFs
[12:51:28] [PASSED] 60 VFs
[12:51:28] [PASSED] 61 VFs
[12:51:28] [PASSED] 62 VFs
[12:51:28] [PASSED] 63 VFs
[12:51:28] ==================== [PASSED] fair_ggtt ====================
[12:51:28] ======================== fair_vram ========================
[12:51:28] [PASSED] 1 VF
[12:51:28] [PASSED] 2 VFs
[12:51:28] [PASSED] 3 VFs
[12:51:28] [PASSED] 4 VFs
[12:51:28] [PASSED] 5 VFs
[12:51:28] [PASSED] 6 VFs
[12:51:28] [PASSED] 7 VFs
[12:51:28] [PASSED] 8 VFs
[12:51:28] [PASSED] 9 VFs
[12:51:28] [PASSED] 10 VFs
[12:51:28] [PASSED] 11 VFs
[12:51:28] [PASSED] 12 VFs
[12:51:28] [PASSED] 13 VFs
[12:51:28] [PASSED] 14 VFs
[12:51:28] [PASSED] 15 VFs
[12:51:28] [PASSED] 16 VFs
[12:51:28] [PASSED] 17 VFs
[12:51:28] [PASSED] 18 VFs
[12:51:28] [PASSED] 19 VFs
[12:51:28] [PASSED] 20 VFs
[12:51:28] [PASSED] 21 VFs
[12:51:28] [PASSED] 22 VFs
[12:51:28] [PASSED] 23 VFs
[12:51:28] [PASSED] 24 VFs
[12:51:28] [PASSED] 25 VFs
[12:51:28] [PASSED] 26 VFs
[12:51:28] [PASSED] 27 VFs
[12:51:28] [PASSED] 28 VFs
[12:51:28] [PASSED] 29 VFs
[12:51:28] [PASSED] 30 VFs
[12:51:28] [PASSED] 31 VFs
[12:51:28] [PASSED] 32 VFs
[12:51:28] [PASSED] 33 VFs
[12:51:28] [PASSED] 34 VFs
[12:51:28] [PASSED] 35 VFs
[12:51:28] [PASSED] 36 VFs
[12:51:28] [PASSED] 37 VFs
[12:51:28] [PASSED] 38 VFs
[12:51:28] [PASSED] 39 VFs
[12:51:28] [PASSED] 40 VFs
[12:51:28] [PASSED] 41 VFs
[12:51:28] [PASSED] 42 VFs
[12:51:28] [PASSED] 43 VFs
[12:51:28] [PASSED] 44 VFs
[12:51:28] [PASSED] 45 VFs
[12:51:28] [PASSED] 46 VFs
[12:51:28] [PASSED] 47 VFs
[12:51:28] [PASSED] 48 VFs
[12:51:28] [PASSED] 49 VFs
[12:51:28] [PASSED] 50 VFs
[12:51:28] [PASSED] 51 VFs
[12:51:28] [PASSED] 52 VFs
[12:51:28] [PASSED] 53 VFs
[12:51:28] [PASSED] 54 VFs
[12:51:28] [PASSED] 55 VFs
[12:51:28] [PASSED] 56 VFs
[12:51:28] [PASSED] 57 VFs
[12:51:28] [PASSED] 58 VFs
[12:51:28] [PASSED] 59 VFs
[12:51:28] [PASSED] 60 VFs
[12:51:28] [PASSED] 61 VFs
[12:51:28] [PASSED] 62 VFs
[12:51:28] [PASSED] 63 VFs
[12:51:28] ==================== [PASSED] fair_vram ====================
[12:51:28] ================== [PASSED] pf_gt_config ===================
[12:51:28] ===================== lmtt (1 subtest) =====================
[12:51:28] ======================== test_ops =========================
[12:51:28] [PASSED] 2-level
[12:51:28] [PASSED] multi-level
[12:51:28] ==================== [PASSED] test_ops =====================
[12:51:28] ====================== [PASSED] lmtt =======================
[12:51:28] ================= pf_service (11 subtests) =================
[12:51:28] [PASSED] pf_negotiate_any
[12:51:28] [PASSED] pf_negotiate_base_match
[12:51:28] [PASSED] pf_negotiate_base_newer
[12:51:28] [PASSED] pf_negotiate_base_next
[12:51:28] [SKIPPED] pf_negotiate_base_older
[12:51:28] [PASSED] pf_negotiate_base_prev
[12:51:28] [PASSED] pf_negotiate_latest_match
[12:51:28] [PASSED] pf_negotiate_latest_newer
[12:51:28] [PASSED] pf_negotiate_latest_next
[12:51:28] [SKIPPED] pf_negotiate_latest_older
[12:51:28] [SKIPPED] pf_negotiate_latest_prev
[12:51:28] =================== [PASSED] pf_service ====================
[12:51:28] ================= xe_guc_g2g (2 subtests) ==================
[12:51:28] ============== xe_live_guc_g2g_kunit_default ==============
[12:51:28] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:51:28] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:51:28] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:51:28] =================== [SKIPPED] xe_guc_g2g ===================
[12:51:28] =================== xe_mocs (2 subtests) ===================
[12:51:28] ================ xe_live_mocs_kernel_kunit ================
[12:51:28] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:51:28] ================ xe_live_mocs_reset_kunit =================
[12:51:28] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:51:28] ==================== [SKIPPED] xe_mocs =====================
[12:51:28] ================= xe_migrate (2 subtests) ==================
[12:51:28] ================= xe_migrate_sanity_kunit =================
[12:51:28] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:51:28] ================== xe_validate_ccs_kunit ==================
[12:51:28] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:51:28] =================== [SKIPPED] xe_migrate ===================
[12:51:28] ================== xe_dma_buf (1 subtest) ==================
[12:51:28] ==================== xe_dma_buf_kunit =====================
[12:51:28] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:51:28] =================== [SKIPPED] xe_dma_buf ===================
[12:51:28] ================= xe_bo_shrink (1 subtest) =================
[12:51:28] =================== xe_bo_shrink_kunit ====================
[12:51:28] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:51:28] ================== [SKIPPED] xe_bo_shrink ==================
[12:51:28] ==================== xe_bo (2 subtests) ====================
[12:51:28] ================== xe_ccs_migrate_kunit ===================
[12:51:28] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:51:28] ==================== xe_bo_evict_kunit ====================
[12:51:28] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:51:28] ===================== [SKIPPED] xe_bo ======================
[12:51:28] ==================== args (13 subtests) ====================
[12:51:28] [PASSED] count_args_test
[12:51:28] [PASSED] call_args_example
[12:51:28] [PASSED] call_args_test
[12:51:28] [PASSED] drop_first_arg_example
[12:51:28] [PASSED] drop_first_arg_test
[12:51:28] [PASSED] first_arg_example
[12:51:28] [PASSED] first_arg_test
[12:51:28] [PASSED] last_arg_example
[12:51:28] [PASSED] last_arg_test
[12:51:28] [PASSED] pick_arg_example
[12:51:28] [PASSED] if_args_example
[12:51:28] [PASSED] if_args_test
[12:51:28] [PASSED] sep_comma_example
[12:51:28] ====================== [PASSED] args =======================
[12:51:28] =================== xe_pci (3 subtests) ====================
[12:51:28] ==================== check_graphics_ip ====================
[12:51:28] [PASSED] 12.00 Xe_LP
[12:51:28] [PASSED] 12.10 Xe_LP+
[12:51:28] [PASSED] 12.55 Xe_HPG
[12:51:28] [PASSED] 12.60 Xe_HPC
[12:51:28] [PASSED] 12.70 Xe_LPG
[12:51:28] [PASSED] 12.71 Xe_LPG
[12:51:28] [PASSED] 12.74 Xe_LPG+
[12:51:28] [PASSED] 20.01 Xe2_HPG
[12:51:28] [PASSED] 20.02 Xe2_HPG
[12:51:28] [PASSED] 20.04 Xe2_LPG
[12:51:28] [PASSED] 30.00 Xe3_LPG
[12:51:28] [PASSED] 30.01 Xe3_LPG
[12:51:28] [PASSED] 30.03 Xe3_LPG
[12:51:28] [PASSED] 30.04 Xe3_LPG
[12:51:28] [PASSED] 30.05 Xe3_LPG
[12:51:28] [PASSED] 35.10 Xe3p_LPG
[12:51:28] [PASSED] 35.11 Xe3p_XPC
[12:51:28] ================ [PASSED] check_graphics_ip ================
[12:51:28] ===================== check_media_ip ======================
[12:51:28] [PASSED] 12.00 Xe_M
[12:51:28] [PASSED] 12.55 Xe_HPM
[12:51:28] [PASSED] 13.00 Xe_LPM+
[12:51:28] [PASSED] 13.01 Xe2_HPM
[12:51:28] [PASSED] 20.00 Xe2_LPM
[12:51:28] [PASSED] 30.00 Xe3_LPM
[12:51:28] [PASSED] 30.02 Xe3_LPM
[12:51:28] [PASSED] 35.00 Xe3p_LPM
[12:51:28] [PASSED] 35.03 Xe3p_HPM
[12:51:28] ================= [PASSED] check_media_ip ==================
[12:51:28] =================== check_platform_desc ===================
[12:51:28] [PASSED] 0x9A60 (TIGERLAKE)
[12:51:28] [PASSED] 0x9A68 (TIGERLAKE)
[12:51:28] [PASSED] 0x9A70 (TIGERLAKE)
[12:51:28] [PASSED] 0x9A40 (TIGERLAKE)
[12:51:28] [PASSED] 0x9A49 (TIGERLAKE)
[12:51:28] [PASSED] 0x9A59 (TIGERLAKE)
[12:51:28] [PASSED] 0x9A78 (TIGERLAKE)
[12:51:28] [PASSED] 0x9AC0 (TIGERLAKE)
[12:51:28] [PASSED] 0x9AC9 (TIGERLAKE)
[12:51:28] [PASSED] 0x9AD9 (TIGERLAKE)
[12:51:28] [PASSED] 0x9AF8 (TIGERLAKE)
[12:51:28] [PASSED] 0x4C80 (ROCKETLAKE)
[12:51:28] [PASSED] 0x4C8A (ROCKETLAKE)
[12:51:28] [PASSED] 0x4C8B (ROCKETLAKE)
[12:51:28] [PASSED] 0x4C8C (ROCKETLAKE)
[12:51:28] [PASSED] 0x4C90 (ROCKETLAKE)
[12:51:28] [PASSED] 0x4C9A (ROCKETLAKE)
[12:51:28] [PASSED] 0x4680 (ALDERLAKE_S)
[12:51:28] [PASSED] 0x4682 (ALDERLAKE_S)
[12:51:28] [PASSED] 0x4688 (ALDERLAKE_S)
[12:51:28] [PASSED] 0x468A (ALDERLAKE_S)
[12:51:28] [PASSED] 0x468B (ALDERLAKE_S)
[12:51:28] [PASSED] 0x4690 (ALDERLAKE_S)
[12:51:28] [PASSED] 0x4692 (ALDERLAKE_S)
[12:51:28] [PASSED] 0x4693 (ALDERLAKE_S)
[12:51:28] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46AA (ALDERLAKE_P)
[12:51:28] [PASSED] 0x462A (ALDERLAKE_P)
[12:51:28] [PASSED] 0x4626 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x4628 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:51:28] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:51:28] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:51:28] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:51:28] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:51:28] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:51:28] [PASSED] 0xA721 (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA720 (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:51:28] [PASSED] 0xA780 (ALDERLAKE_S)
[12:51:28] [PASSED] 0xA781 (ALDERLAKE_S)
[12:51:28] [PASSED] 0xA782 (ALDERLAKE_S)
[12:51:28] [PASSED] 0xA783 (ALDERLAKE_S)
[12:51:28] [PASSED] 0xA788 (ALDERLAKE_S)
[12:51:28] [PASSED] 0xA789 (ALDERLAKE_S)
[12:51:28] [PASSED] 0xA78A (ALDERLAKE_S)
[12:51:28] [PASSED] 0xA78B (ALDERLAKE_S)
[12:51:28] [PASSED] 0x4905 (DG1)
[12:51:28] [PASSED] 0x4906 (DG1)
[12:51:28] [PASSED] 0x4907 (DG1)
[12:51:28] [PASSED] 0x4908 (DG1)
[12:51:28] [PASSED] 0x4909 (DG1)
[12:51:28] [PASSED] 0x56C0 (DG2)
[12:51:28] [PASSED] 0x56C2 (DG2)
[12:51:28] [PASSED] 0x56C1 (DG2)
[12:51:28] [PASSED] 0x7D51 (METEORLAKE)
[12:51:28] [PASSED] 0x7DD1 (METEORLAKE)
[12:51:28] [PASSED] 0x7D41 (METEORLAKE)
[12:51:28] [PASSED] 0x7D67 (METEORLAKE)
[12:51:28] [PASSED] 0xB640 (METEORLAKE)
[12:51:28] [PASSED] 0x56A0 (DG2)
[12:51:28] [PASSED] 0x56A1 (DG2)
[12:51:28] [PASSED] 0x56A2 (DG2)
[12:51:28] [PASSED] 0x56BE (DG2)
[12:51:28] [PASSED] 0x56BF (DG2)
[12:51:28] [PASSED] 0x5690 (DG2)
[12:51:28] [PASSED] 0x5691 (DG2)
[12:51:28] [PASSED] 0x5692 (DG2)
[12:51:28] [PASSED] 0x56A5 (DG2)
[12:51:28] [PASSED] 0x56A6 (DG2)
[12:51:28] [PASSED] 0x56B0 (DG2)
[12:51:28] [PASSED] 0x56B1 (DG2)
[12:51:28] [PASSED] 0x56BA (DG2)
[12:51:28] [PASSED] 0x56BB (DG2)
[12:51:28] [PASSED] 0x56BC (DG2)
[12:51:28] [PASSED] 0x56BD (DG2)
[12:51:28] [PASSED] 0x5693 (DG2)
[12:51:28] [PASSED] 0x5694 (DG2)
[12:51:28] [PASSED] 0x5695 (DG2)
[12:51:28] [PASSED] 0x56A3 (DG2)
[12:51:28] [PASSED] 0x56A4 (DG2)
[12:51:28] [PASSED] 0x56B2 (DG2)
[12:51:28] [PASSED] 0x56B3 (DG2)
[12:51:28] [PASSED] 0x5696 (DG2)
[12:51:28] [PASSED] 0x5697 (DG2)
[12:51:28] [PASSED] 0xB69 (PVC)
[12:51:28] [PASSED] 0xB6E (PVC)
[12:51:28] [PASSED] 0xBD4 (PVC)
[12:51:28] [PASSED] 0xBD5 (PVC)
[12:51:28] [PASSED] 0xBD6 (PVC)
[12:51:28] [PASSED] 0xBD7 (PVC)
[12:51:28] [PASSED] 0xBD8 (PVC)
[12:51:28] [PASSED] 0xBD9 (PVC)
[12:51:28] [PASSED] 0xBDA (PVC)
[12:51:28] [PASSED] 0xBDB (PVC)
[12:51:28] [PASSED] 0xBE0 (PVC)
[12:51:28] [PASSED] 0xBE1 (PVC)
[12:51:28] [PASSED] 0xBE5 (PVC)
[12:51:28] [PASSED] 0x7D40 (METEORLAKE)
[12:51:28] [PASSED] 0x7D45 (METEORLAKE)
[12:51:28] [PASSED] 0x7D55 (METEORLAKE)
[12:51:28] [PASSED] 0x7D60 (METEORLAKE)
[12:51:28] [PASSED] 0x7DD5 (METEORLAKE)
[12:51:28] [PASSED] 0x6420 (LUNARLAKE)
[12:51:28] [PASSED] 0x64A0 (LUNARLAKE)
[12:51:28] [PASSED] 0x64B0 (LUNARLAKE)
[12:51:28] [PASSED] 0xE202 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE209 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE20B (BATTLEMAGE)
[12:51:28] [PASSED] 0xE20C (BATTLEMAGE)
[12:51:28] [PASSED] 0xE20D (BATTLEMAGE)
[12:51:28] [PASSED] 0xE210 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE211 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE212 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE216 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE220 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE221 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE222 (BATTLEMAGE)
[12:51:28] [PASSED] 0xE223 (BATTLEMAGE)
[12:51:28] [PASSED] 0xB080 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB081 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB082 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB083 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB084 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB085 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB086 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB087 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB08F (PANTHERLAKE)
[12:51:28] [PASSED] 0xB090 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:51:28] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:51:28] [PASSED] 0xFD80 (PANTHERLAKE)
[12:51:28] [PASSED] 0xFD81 (PANTHERLAKE)
[12:51:28] [PASSED] 0xD740 (NOVALAKE_S)
[12:51:28] [PASSED] 0xD741 (NOVALAKE_S)
[12:51:28] [PASSED] 0xD742 (NOVALAKE_S)
[12:51:28] [PASSED] 0xD743 (NOVALAKE_S)
[12:51:28] [PASSED] 0xD744 (NOVALAKE_S)
[12:51:28] [PASSED] 0xD745 (NOVALAKE_S)
[12:51:28] [PASSED] 0x674C (CRESCENTISLAND)
[12:51:28] [PASSED] 0x674D (CRESCENTISLAND)
[12:51:28] [PASSED] 0x674E (CRESCENTISLAND)
[12:51:28] [PASSED] 0x674F (CRESCENTISLAND)
[12:51:28] [PASSED] 0x6750 (CRESCENTISLAND)
[12:51:28] [PASSED] 0xD750 (NOVALAKE_P)
[12:51:28] [PASSED] 0xD751 (NOVALAKE_P)
[12:51:28] [PASSED] 0xD752 (NOVALAKE_P)
[12:51:28] [PASSED] 0xD753 (NOVALAKE_P)
[12:51:28] [PASSED] 0xD754 (NOVALAKE_P)
[12:51:28] [PASSED] 0xD755 (NOVALAKE_P)
[12:51:28] [PASSED] 0xD756 (NOVALAKE_P)
[12:51:28] [PASSED] 0xD757 (NOVALAKE_P)
[12:51:28] [PASSED] 0xD75F (NOVALAKE_P)
[12:51:28] =============== [PASSED] check_platform_desc ===============
[12:51:28] ===================== [PASSED] xe_pci ======================
[12:51:28] ============= xe_rtp_tables_test (4 subtests) ==============
[12:51:28] ================== xe_rtp_table_gt_test ===================
[12:51:28] [PASSED] gt_was/14011060649
[12:51:28] [PASSED] gt_was/14011059788
[12:51:28] [PASSED] gt_was/14015795083
[12:51:28] [PASSED] gt_was/16021867713
[12:51:28] [PASSED] gt_was/14019449301
[12:51:28] [PASSED] gt_was/16028005424
[12:51:28] [PASSED] gt_was/14026578760
[12:51:28] [PASSED] gt_was/1409420604
[12:51:28] [PASSED] gt_was/1408615072
[12:51:28] [PASSED] gt_was/22010523718
[12:51:28] [PASSED] gt_was/14011006942
[12:51:28] [PASSED] gt_was/14014830051
[12:51:28] [PASSED] gt_was/18018781329
[12:51:28] [PASSED] gt_was/1509235366
[12:51:28] [PASSED] gt_was/18018781329
[12:51:28] [PASSED] gt_was/16016694945
[12:51:28] [PASSED] gt_was/14018575942
[12:51:28] [PASSED] gt_was/22016670082
[12:51:28] [PASSED] gt_was/22016670082
[12:51:28] [PASSED] gt_was/14017421178
[12:51:28] [PASSED] gt_was/16025250150
[12:51:28] [PASSED] gt_was/14021871409
[12:51:28] [PASSED] gt_was/16021865536
[12:51:28] [PASSED] gt_was/14021486841
[12:51:28] [PASSED] gt_was/14025160223
[12:51:28] [PASSED] gt_was/14026144927, 16029437861
[12:51:28] [PASSED] gt_was/14025635424
[12:51:28] [PASSED] gt_was/16028005424
[12:51:28] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:51:28] ================== xe_rtp_table_gt_test ===================
[12:51:28] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:51:28] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:51:28] [PASSED] gt_tunings/Tuning: L3 cache
[12:51:28] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:51:28] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:51:28] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:51:28] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:51:28] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:51:28] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:51:28] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:51:28] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:51:28] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:51:28] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:51:28] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:51:28] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:51:28] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:51:28] ================== xe_rtp_table_oob_test ==================
[12:51:28] [PASSED] oob_was/1607983814
[12:51:28] [PASSED] oob_was/16010904313
[12:51:28] [PASSED] oob_was/18022495364
[12:51:28] [PASSED] oob_was/22012773006
[12:51:28] [PASSED] oob_was/14014475959
[12:51:28] [PASSED] oob_was/22011391025
[12:51:28] [PASSED] oob_was/22012727170
[12:51:28] [PASSED] oob_was/22012727685
[12:51:28] [PASSED] oob_was/22016596838
[12:51:28] [PASSED] oob_was/18020744125
[12:51:28] [PASSED] oob_was/1409600907
[12:51:28] [PASSED] oob_was/22014953428
[12:51:28] [PASSED] oob_was/16017236439
[12:51:28] [PASSED] oob_was/14019821291
[12:51:28] [PASSED] oob_was/14015076503
[12:51:28] [PASSED] oob_was/14018913170
[12:51:28] [PASSED] oob_was/14018094691
[12:51:28] [PASSED] oob_was/18024947630
[12:51:28] [PASSED] oob_was/16022287689
[12:51:28] [PASSED] oob_was/13011645652
[12:51:28] [PASSED] oob_was/14022293748
[12:51:28] [PASSED] oob_was/22019794406
[12:51:28] [PASSED] oob_was/22019338487
[12:51:28] [PASSED] oob_was/16023588340
[12:51:28] [PASSED] oob_was/14019789679
[12:51:28] [PASSED] oob_was/14022866841
[12:51:28] [PASSED] oob_was/16021333562
[12:51:28] [PASSED] oob_was/14016712196
[12:51:28] [PASSED] oob_was/14015568240
[12:51:28] [PASSED] oob_was/18013179988
[12:51:28] [PASSED] oob_was/1508761755
[12:51:28] [PASSED] oob_was/16023105232
[12:51:28] [PASSED] oob_was/16026508708
[12:51:28] [PASSED] oob_was/14020001231
[12:51:28] [PASSED] oob_was/16023683509
[12:51:28] [PASSED] oob_was/14025515070
[12:51:28] [PASSED] oob_was/15015404425_disable
[12:51:28] [PASSED] oob_was/16026007364
[12:51:28] [PASSED] oob_was/14020316580
[12:51:28] [PASSED] oob_was/14025883347
[12:51:28] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:51:28] ================ xe_rtp_table_dev_oob_test ================
[12:51:28] [PASSED] device_oob_was/22010954014
[12:51:28] [PASSED] device_oob_was/15015404425
[12:51:28] [PASSED] device_oob_was/22019338487_display
[12:51:28] [PASSED] device_oob_was/14022085890
[12:51:28] [PASSED] device_oob_was/14026539277
[12:51:28] [PASSED] device_oob_was/14026633728
[12:51:28] [PASSED] device_oob_was/14026746987
[12:51:28] [PASSED] device_oob_was/14026779378
[12:51:28] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:51:28] =============== [PASSED] xe_rtp_tables_test ================
[12:51:28] =================== xe_rtp (3 subtests) ====================
[12:51:28] =================== xe_rtp_rules_tests ====================
[12:51:28] [PASSED] no
[12:51:28] [PASSED] yes
[12:51:28] [PASSED] no-and-no
[12:51:28] [PASSED] no-and-yes
[12:51:28] [PASSED] yes-and-no
[12:51:28] [PASSED] yes-and-yes
[12:51:28] [PASSED] no-or-no
[12:51:28] [PASSED] no-or-yes
[12:51:28] [PASSED] yes-or-no
[12:51:28] [PASSED] yes-or-yes
[12:51:28] [PASSED] no-yes-or-yes-no
[12:51:28] [PASSED] no-yes-or-yes-yes
[12:51:28] [PASSED] yes-yes-or-no-yes
[12:51:28] [PASSED] yes-yes-or-yes-yes
[12:51:28] [PASSED] no-no-or-yes-or-no
[12:51:28] [PASSED] or
[12:51:28] [PASSED] or-yes
[12:51:28] [PASSED] or-no
[12:51:28] [PASSED] yes-or
[12:51:28] [PASSED] no-or
[12:51:28] [PASSED] no-or-or-yes
[12:51:28] [PASSED] yes-or-or-no
[12:51:28] [PASSED] no-or-or-no
[12:51:28] [PASSED] missing-context-engine-class
[12:51:28] [PASSED] missing-context-engine-class-or-yes
[12:51:28] [PASSED] missing-context-engine-class-or-or-yes
[12:51:28] =============== [PASSED] xe_rtp_rules_tests ================
[12:51:28] =============== xe_rtp_process_to_sr_tests ================
[12:51:28] [PASSED] coalesce-same-reg
[12:51:28] [PASSED] no-match-no-add
[12:51:28] [PASSED] two-regs-two-entries
[12:51:28] [PASSED] clr-one-set-other
[12:51:28] [PASSED] set-field
[12:51:28] [PASSED] conflict-duplicate
[12:51:28] [PASSED] conflict-not-disjoint
[12:51:28] [PASSED] conflict-reg-type
[12:51:28] [PASSED] bad-mcr-reg-forced-to-regular
[12:51:28] [PASSED] bad-regular-reg-forced-to-mcr
[12:51:28] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:51:28] ================== xe_rtp_process_tests ===================
[12:51:28] [PASSED] active1
[12:51:28] [PASSED] active2
[12:51:28] [PASSED] active-inactive
[12:51:28] [PASSED] inactive-active
[12:51:28] [PASSED] inactive-active-inactive
[12:51:28] [PASSED] inactive-inactive-inactive
[12:51:28] ============== [PASSED] xe_rtp_process_tests ===============
[12:51:28] ===================== [PASSED] xe_rtp ======================
[12:51:28] ==================== xe_wa (1 subtest) =====================
[12:51:28] ======================== xe_wa_gt =========================
[12:51:28] [PASSED] TIGERLAKE B0
[12:51:28] [PASSED] DG1 A0
[12:51:28] [PASSED] DG1 B0
[12:51:28] [PASSED] ALDERLAKE_S A0
[12:51:28] [PASSED] ALDERLAKE_S B0
[12:51:28] [PASSED] ALDERLAKE_S C0
[12:51:28] [PASSED] ALDERLAKE_S D0
[12:51:28] [PASSED] ALDERLAKE_P A0
[12:51:28] [PASSED] ALDERLAKE_P B0
[12:51:28] [PASSED] ALDERLAKE_P C0
[12:51:28] [PASSED] ALDERLAKE_S RPLS D0
[12:51:28] [PASSED] ALDERLAKE_P RPLU E0
[12:51:28] [PASSED] DG2 G10 C0
[12:51:28] [PASSED] DG2 G11 B1
[12:51:28] [PASSED] DG2 G12 A1
[12:51:28] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:51:28] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:51:28] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:51:28] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:51:28] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:51:28] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:51:28] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:51:28] ==================== [PASSED] xe_wa_gt =====================
[12:51:28] ====================== [PASSED] xe_wa ======================
[12:51:28] ============================================================
[12:51:28] Testing complete. Ran 715 tests: passed: 697, skipped: 18
[12:51:28] Elapsed time: 44.821s total, 4.163s configuring, 39.941s building, 0.680s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:51:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:51:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:51:54] Starting KUnit Kernel (1/1)...
[12:51:54] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:51:54] ============ drm_test_pick_cmdline (2 subtests) ============
[12:51:54] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:51:54] =============== drm_test_pick_cmdline_named ===============
[12:51:54] [PASSED] NTSC
[12:51:54] [PASSED] NTSC-J
[12:51:54] [PASSED] PAL
[12:51:54] [PASSED] PAL-M
[12:51:54] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:51:54] ============== [PASSED] drm_test_pick_cmdline ==============
[12:51:54] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:51:54] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:51:54] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:51:54] =========== drm_validate_clone_mode (2 subtests) ===========
[12:51:54] ============== drm_test_check_in_clone_mode ===============
[12:51:54] [PASSED] in_clone_mode
[12:51:54] [PASSED] not_in_clone_mode
[12:51:54] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:51:54] =============== drm_test_check_valid_clones ===============
[12:51:54] [PASSED] not_in_clone_mode
[12:51:54] [PASSED] valid_clone
[12:51:54] [PASSED] invalid_clone
[12:51:54] =========== [PASSED] drm_test_check_valid_clones ===========
[12:51:54] ============= [PASSED] drm_validate_clone_mode =============
[12:51:54] ============= drm_validate_modeset (1 subtest) =============
[12:51:54] [PASSED] drm_test_check_connector_changed_modeset
[12:51:54] ============== [PASSED] drm_validate_modeset ===============
[12:51:54] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:51:54] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:51:54] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:51:54] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:51:54] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:51:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:51:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:51:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:51:54] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:51:54] ============== drm_bridge_alloc (2 subtests) ===============
[12:51:54] [PASSED] drm_test_drm_bridge_alloc_basic
[12:51:54] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:51:54] ================ [PASSED] drm_bridge_alloc =================
[12:51:54] ============= drm_cmdline_parser (40 subtests) =============
[12:51:54] [PASSED] drm_test_cmdline_force_d_only
[12:51:54] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:51:54] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:51:54] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:51:54] [PASSED] drm_test_cmdline_force_e_only
[12:51:54] [PASSED] drm_test_cmdline_res
[12:51:54] [PASSED] drm_test_cmdline_res_vesa
[12:51:54] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:51:54] [PASSED] drm_test_cmdline_res_rblank
[12:51:54] [PASSED] drm_test_cmdline_res_bpp
[12:51:54] [PASSED] drm_test_cmdline_res_refresh
[12:51:54] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:51:54] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:51:54] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:51:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:51:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:51:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:51:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:51:54] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:51:54] [PASSED] drm_test_cmdline_res_margins_force_on
[12:51:54] [PASSED] drm_test_cmdline_res_vesa_margins
[12:51:54] [PASSED] drm_test_cmdline_name
[12:51:54] [PASSED] drm_test_cmdline_name_bpp
[12:51:54] [PASSED] drm_test_cmdline_name_option
[12:51:54] [PASSED] drm_test_cmdline_name_bpp_option
[12:51:54] [PASSED] drm_test_cmdline_rotate_0
[12:51:54] [PASSED] drm_test_cmdline_rotate_90
[12:51:54] [PASSED] drm_test_cmdline_rotate_180
[12:51:54] [PASSED] drm_test_cmdline_rotate_270
[12:51:54] [PASSED] drm_test_cmdline_hmirror
[12:51:54] [PASSED] drm_test_cmdline_vmirror
[12:51:54] [PASSED] drm_test_cmdline_margin_options
[12:51:54] [PASSED] drm_test_cmdline_multiple_options
[12:51:54] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:51:54] [PASSED] drm_test_cmdline_extra_and_option
[12:51:54] [PASSED] drm_test_cmdline_freestanding_options
[12:51:54] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:51:54] [PASSED] drm_test_cmdline_panel_orientation
[12:51:54] ================ drm_test_cmdline_invalid =================
[12:51:54] [PASSED] margin_only
[12:51:54] [PASSED] interlace_only
[12:51:54] [PASSED] res_missing_x
[12:51:54] [PASSED] res_missing_y
[12:51:54] [PASSED] res_bad_y
[12:51:54] [PASSED] res_missing_y_bpp
[12:51:54] [PASSED] res_bad_bpp
[12:51:54] [PASSED] res_bad_refresh
[12:51:54] [PASSED] res_bpp_refresh_force_on_off
[12:51:54] [PASSED] res_invalid_mode
[12:51:54] [PASSED] res_bpp_wrong_place_mode
[12:51:54] [PASSED] name_bpp_refresh
[12:51:54] [PASSED] name_refresh
[12:51:54] [PASSED] name_refresh_wrong_mode
[12:51:54] [PASSED] name_refresh_invalid_mode
[12:51:54] [PASSED] rotate_multiple
[12:51:54] [PASSED] rotate_invalid_val
[12:51:54] [PASSED] rotate_truncated
[12:51:54] [PASSED] invalid_option
[12:51:54] [PASSED] invalid_tv_option
[12:51:54] [PASSED] truncated_tv_option
[12:51:54] ============ [PASSED] drm_test_cmdline_invalid =============
[12:51:54] =============== drm_test_cmdline_tv_options ===============
[12:51:54] [PASSED] NTSC
[12:51:54] [PASSED] NTSC_443
[12:51:54] [PASSED] NTSC_J
[12:51:54] [PASSED] PAL
[12:51:54] [PASSED] PAL_M
[12:51:54] [PASSED] PAL_N
[12:51:54] [PASSED] SECAM
[12:51:54] [PASSED] MONO_525
[12:51:54] [PASSED] MONO_625
[12:51:54] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:51:54] =============== [PASSED] drm_cmdline_parser ================
[12:51:54] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:51:54] [PASSED] drm_test_connector_hdmi_init_valid
[12:51:54] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:51:54] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:51:54] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:51:54] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:51:54] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:51:54] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:51:54] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:51:54] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:51:54] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:51:54] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:51:54] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:51:54] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:51:54] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:51:54] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:51:54] [PASSED] drm_test_connector_hdmi_init_null_product
[12:51:54] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:51:54] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:51:54] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:51:54] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:51:54] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:51:54] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:51:54] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:51:54] ========= drm_test_connector_hdmi_init_type_valid =========
[12:51:54] [PASSED] HDMI-A
[12:51:54] [PASSED] HDMI-B
[12:51:54] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:51:54] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:51:54] [PASSED] Unknown
[12:51:54] [PASSED] VGA
[12:51:54] [PASSED] DVI-I
[12:51:54] [PASSED] DVI-D
[12:51:54] [PASSED] DVI-A
[12:51:54] [PASSED] Composite
[12:51:54] [PASSED] SVIDEO
[12:51:54] [PASSED] LVDS
[12:51:54] [PASSED] Component
[12:51:54] [PASSED] DIN
[12:51:54] [PASSED] DP
[12:51:54] [PASSED] TV
[12:51:54] [PASSED] eDP
[12:51:54] [PASSED] Virtual
[12:51:54] [PASSED] DSI
[12:51:54] [PASSED] DPI
[12:51:54] [PASSED] Writeback
[12:51:54] [PASSED] SPI
[12:51:54] [PASSED] USB
[12:51:54] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:51:54] ============ [PASSED] drmm_connector_hdmi_init =============
[12:51:54] ============= drmm_connector_init (3 subtests) =============
[12:51:54] [PASSED] drm_test_drmm_connector_init
[12:51:54] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:51:54] ========= drm_test_drmm_connector_init_type_valid =========
[12:51:54] [PASSED] Unknown
[12:51:54] [PASSED] VGA
[12:51:54] [PASSED] DVI-I
[12:51:54] [PASSED] DVI-D
[12:51:54] [PASSED] DVI-A
[12:51:54] [PASSED] Composite
[12:51:54] [PASSED] SVIDEO
[12:51:54] [PASSED] LVDS
[12:51:54] [PASSED] Component
[12:51:54] [PASSED] DIN
[12:51:54] [PASSED] DP
[12:51:54] [PASSED] HDMI-A
[12:51:54] [PASSED] HDMI-B
[12:51:54] [PASSED] TV
[12:51:54] [PASSED] eDP
[12:51:54] [PASSED] Virtual
[12:51:54] [PASSED] DSI
[12:51:54] [PASSED] DPI
[12:51:54] [PASSED] Writeback
[12:51:54] [PASSED] SPI
[12:51:54] [PASSED] USB
[12:51:54] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:51:54] =============== [PASSED] drmm_connector_init ===============
[12:51:54] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_init
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:51:54] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:51:54] [PASSED] Unknown
[12:51:54] [PASSED] VGA
[12:51:54] [PASSED] DVI-I
[12:51:54] [PASSED] DVI-D
[12:51:54] [PASSED] DVI-A
[12:51:54] [PASSED] Composite
[12:51:54] [PASSED] SVIDEO
[12:51:54] [PASSED] LVDS
[12:51:54] [PASSED] Component
[12:51:54] [PASSED] DIN
[12:51:54] [PASSED] DP
[12:51:54] [PASSED] HDMI-A
[12:51:54] [PASSED] HDMI-B
[12:51:54] [PASSED] TV
[12:51:54] [PASSED] eDP
[12:51:54] [PASSED] Virtual
[12:51:54] [PASSED] DSI
[12:51:54] [PASSED] DPI
[12:51:54] [PASSED] Writeback
[12:51:54] [PASSED] SPI
[12:51:54] [PASSED] USB
[12:51:54] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:51:54] ======== drm_test_drm_connector_dynamic_init_name =========
[12:51:54] [PASSED] Unknown
[12:51:54] [PASSED] VGA
[12:51:54] [PASSED] DVI-I
[12:51:54] [PASSED] DVI-D
[12:51:54] [PASSED] DVI-A
[12:51:54] [PASSED] Composite
[12:51:54] [PASSED] SVIDEO
[12:51:54] [PASSED] LVDS
[12:51:54] [PASSED] Component
[12:51:54] [PASSED] DIN
[12:51:54] [PASSED] DP
[12:51:54] [PASSED] HDMI-A
[12:51:54] [PASSED] HDMI-B
[12:51:54] [PASSED] TV
[12:51:54] [PASSED] eDP
[12:51:54] [PASSED] Virtual
[12:51:54] [PASSED] DSI
[12:51:54] [PASSED] DPI
[12:51:54] [PASSED] Writeback
[12:51:54] [PASSED] SPI
[12:51:54] [PASSED] USB
[12:51:54] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:51:54] =========== [PASSED] drm_connector_dynamic_init ============
[12:51:54] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:51:54] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:51:54] ======= drm_connector_dynamic_register (7 subtests) ========
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:51:54] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:51:54] ========= [PASSED] drm_connector_dynamic_register ==========
[12:51:54] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:51:54] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:51:54] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:51:54] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:51:54] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:51:54] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:51:54] [PASSED] NTSC
[12:51:54] [PASSED] NTSC-443
[12:51:54] [PASSED] NTSC-J
[12:51:54] [PASSED] PAL
[12:51:54] [PASSED] PAL-M
[12:51:54] [PASSED] PAL-N
[12:51:54] [PASSED] SECAM
[12:51:54] [PASSED] Mono
[12:51:54] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:51:54] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:51:54] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:51:54] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:51:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:51:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:51:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:51:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:51:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:51:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:51:54] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:51:54] [PASSED] VIC 96
[12:51:54] [PASSED] VIC 97
[12:51:54] [PASSED] VIC 101
[12:51:54] [PASSED] VIC 102
[12:51:54] [PASSED] VIC 106
[12:51:54] [PASSED] VIC 107
[12:51:54] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:51:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:51:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:51:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:51:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:51:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:51:54] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:51:54] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:51:54] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:51:54] [PASSED] Automatic
[12:51:54] [PASSED] Full
[12:51:54] [PASSED] Limited 16:235
[12:51:54] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:51:54] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:51:54] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:51:54] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:51:54] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:51:54] [PASSED] RGB
[12:51:54] [PASSED] YUV 4:2:0
[12:51:54] [PASSED] YUV 4:2:2
[12:51:54] [PASSED] YUV 4:4:4
[12:51:54] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:51:54] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:51:54] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:51:54] ============= drm_damage_helper (21 subtests) ==============
[12:51:54] [PASSED] drm_test_damage_iter_no_damage
[12:51:54] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:51:54] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:51:54] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:51:54] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:51:54] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:51:54] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:51:54] [PASSED] drm_test_damage_iter_simple_damage
[12:51:54] [PASSED] drm_test_damage_iter_single_damage
[12:51:54] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:51:54] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:51:54] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:51:54] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:51:54] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:51:54] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:51:54] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:51:54] [PASSED] drm_test_damage_iter_damage
[12:51:54] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:51:54] [PASSED] drm_test_damage_iter_damage_one_outside
[12:51:54] [PASSED] drm_test_damage_iter_damage_src_moved
[12:51:54] [PASSED] drm_test_damage_iter_damage_not_visible
[12:51:54] ================ [PASSED] drm_damage_helper ================
[12:51:54] ============== drm_dp_mst_helper (3 subtests) ==============
[12:51:54] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:51:54] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:51:54] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:51:54] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:51:54] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:51:54] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:51:54] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:51:54] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:51:54] [PASSED] Link rate 2000000 lane count 4
[12:51:54] [PASSED] Link rate 2000000 lane count 2
[12:51:54] [PASSED] Link rate 2000000 lane count 1
[12:51:54] [PASSED] Link rate 1350000 lane count 4
[12:51:54] [PASSED] Link rate 1350000 lane count 2
[12:51:54] [PASSED] Link rate 1350000 lane count 1
[12:51:54] [PASSED] Link rate 1000000 lane count 4
[12:51:54] [PASSED] Link rate 1000000 lane count 2
[12:51:54] [PASSED] Link rate 1000000 lane count 1
[12:51:54] [PASSED] Link rate 810000 lane count 4
[12:51:54] [PASSED] Link rate 810000 lane count 2
[12:51:54] [PASSED] Link rate 810000 lane count 1
[12:51:54] [PASSED] Link rate 540000 lane count 4
[12:51:54] [PASSED] Link rate 540000 lane count 2
[12:51:54] [PASSED] Link rate 540000 lane count 1
[12:51:54] [PASSED] Link rate 270000 lane count 4
[12:51:54] [PASSED] Link rate 270000 lane count 2
[12:51:54] [PASSED] Link rate 270000 lane count 1
[12:51:54] [PASSED] Link rate 162000 lane count 4
[12:51:54] [PASSED] Link rate 162000 lane count 2
[12:51:54] [PASSED] Link rate 162000 lane count 1
[12:51:54] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:51:54] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:51:54] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:51:54] [PASSED] DP_POWER_UP_PHY with port number
[12:51:54] [PASSED] DP_POWER_DOWN_PHY with port number
[12:51:54] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:51:54] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:51:54] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:51:54] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:51:54] [PASSED] DP_QUERY_PAYLOAD with port number
[12:51:54] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:51:54] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:51:54] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:51:54] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:51:54] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:51:54] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:51:54] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:51:54] [PASSED] DP_REMOTE_I2C_READ with port number
[12:51:54] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:51:54] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:51:54] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:51:54] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:51:54] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:51:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:51:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:51:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:51:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:51:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:51:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:51:54] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:51:54] ================ [PASSED] drm_dp_mst_helper ================
[12:51:54] ================== drm_exec (7 subtests) ===================
[12:51:54] [PASSED] sanitycheck
[12:51:54] [PASSED] test_lock
[12:51:54] [PASSED] test_lock_unlock
[12:51:54] [PASSED] test_duplicates
[12:51:54] [PASSED] test_prepare
[12:51:54] [PASSED] test_prepare_array
[12:51:54] [PASSED] test_multiple_loops
[12:51:54] ==================== [PASSED] drm_exec =====================
[12:51:54] =========== drm_format_helper_test (17 subtests) ===========
[12:51:54] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:51:54] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:51:54] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:51:54] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:51:54] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:51:54] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:51:54] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:51:54] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:51:54] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:51:54] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:51:54] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:51:54] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:51:54] ==================== drm_test_fb_swab =====================
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ================ [PASSED] drm_test_fb_swab =================
[12:51:54] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:51:54] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:51:54] [PASSED] single_pixel_source_buffer
[12:51:54] [PASSED] single_pixel_clip_rectangle
[12:51:54] [PASSED] well_known_colors
[12:51:54] [PASSED] destination_pitch
[12:51:54] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:51:54] ================= drm_test_fb_clip_offset =================
[12:51:54] [PASSED] pass through
[12:51:54] [PASSED] horizontal offset
[12:51:54] [PASSED] vertical offset
[12:51:54] [PASSED] horizontal and vertical offset
[12:51:54] [PASSED] horizontal offset (custom pitch)
[12:51:54] [PASSED] vertical offset (custom pitch)
[12:51:54] [PASSED] horizontal and vertical offset (custom pitch)
[12:51:54] ============= [PASSED] drm_test_fb_clip_offset =============
[12:51:54] =================== drm_test_fb_memcpy ====================
[12:51:54] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:51:54] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:51:54] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:51:54] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:51:54] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:51:54] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:51:54] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:51:54] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:51:54] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:51:54] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:51:54] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:51:54] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:51:54] =============== [PASSED] drm_test_fb_memcpy ================
[12:51:54] ============= [PASSED] drm_format_helper_test ==============
[12:51:54] ================= drm_format (18 subtests) =================
[12:51:54] [PASSED] drm_test_format_block_width_invalid
[12:51:54] [PASSED] drm_test_format_block_width_one_plane
[12:51:54] [PASSED] drm_test_format_block_width_two_plane
[12:51:54] [PASSED] drm_test_format_block_width_three_plane
[12:51:54] [PASSED] drm_test_format_block_width_tiled
[12:51:54] [PASSED] drm_test_format_block_height_invalid
[12:51:54] [PASSED] drm_test_format_block_height_one_plane
[12:51:54] [PASSED] drm_test_format_block_height_two_plane
[12:51:54] [PASSED] drm_test_format_block_height_three_plane
[12:51:54] [PASSED] drm_test_format_block_height_tiled
[12:51:54] [PASSED] drm_test_format_min_pitch_invalid
[12:51:54] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:51:54] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:51:54] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:51:54] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:51:54] [PASSED] drm_test_format_min_pitch_two_plane
[12:51:54] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:51:54] [PASSED] drm_test_format_min_pitch_tiled
[12:51:54] =================== [PASSED] drm_format ====================
[12:51:54] ============== drm_framebuffer (10 subtests) ===============
[12:51:54] ========== drm_test_framebuffer_check_src_coords ==========
[12:51:54] [PASSED] Success: source fits into fb
[12:51:54] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:51:54] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:51:54] [PASSED] Fail: overflowing fb with source width
[12:51:54] [PASSED] Fail: overflowing fb with source height
[12:51:54] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:51:54] [PASSED] drm_test_framebuffer_cleanup
[12:51:54] =============== drm_test_framebuffer_create ===============
[12:51:54] [PASSED] ABGR8888 normal sizes
[12:51:54] [PASSED] ABGR8888 max sizes
[12:51:54] [PASSED] ABGR8888 pitch greater than min required
[12:51:54] [PASSED] ABGR8888 pitch less than min required
[12:51:54] [PASSED] ABGR8888 Invalid width
[12:51:54] [PASSED] ABGR8888 Invalid buffer handle
[12:51:54] [PASSED] No pixel format
[12:51:54] [PASSED] ABGR8888 Width 0
[12:51:54] [PASSED] ABGR8888 Height 0
[12:51:54] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:51:54] [PASSED] ABGR8888 Large buffer offset
[12:51:54] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:51:54] [PASSED] ABGR8888 Invalid flag
[12:51:54] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:51:54] [PASSED] ABGR8888 Valid buffer modifier
[12:51:54] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:51:54] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:51:54] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:51:54] [PASSED] NV12 Normal sizes
[12:51:54] [PASSED] NV12 Max sizes
[12:51:54] [PASSED] NV12 Invalid pitch
[12:51:54] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:51:54] [PASSED] NV12 different modifier per-plane
[12:51:54] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:51:54] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:51:54] [PASSED] NV12 Modifier for inexistent plane
[12:51:54] [PASSED] NV12 Handle for inexistent plane
[12:51:54] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:51:54] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:51:54] [PASSED] YVU420 Normal sizes
[12:51:54] [PASSED] YVU420 Max sizes
[12:51:54] [PASSED] YVU420 Invalid pitch
[12:51:54] [PASSED] YVU420 Different pitches
[12:51:54] [PASSED] YVU420 Different buffer offsets/pitches
[12:51:54] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:51:54] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:51:54] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:51:54] [PASSED] YVU420 Valid modifier
[12:51:54] [PASSED] YVU420 Different modifiers per plane
[12:51:54] [PASSED] YVU420 Modifier for inexistent plane
[12:51:54] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:51:54] [PASSED] X0L2 Normal sizes
[12:51:54] [PASSED] X0L2 Max sizes
[12:51:54] [PASSED] X0L2 Invalid pitch
[12:51:54] [PASSED] X0L2 Pitch greater than minimum required
[12:51:54] [PASSED] X0L2 Handle for inexistent plane
[12:51:54] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:51:54] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:51:54] [PASSED] X0L2 Valid modifier
[12:51:54] [PASSED] X0L2 Modifier for inexistent plane
[12:51:54] =========== [PASSED] drm_test_framebuffer_create ===========
[12:51:54] [PASSED] drm_test_framebuffer_free
[12:51:54] [PASSED] drm_test_framebuffer_init
[12:51:54] [PASSED] drm_test_framebuffer_init_bad_format
[12:51:54] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:51:54] [PASSED] drm_test_framebuffer_lookup
[12:51:54] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:51:54] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:51:54] ================= [PASSED] drm_framebuffer =================
[12:51:54] ================ drm_gem_shmem (8 subtests) ================
[12:51:54] [PASSED] drm_gem_shmem_test_obj_create
[12:51:54] [PASSED] drm_gem_shmem_test_obj_create_private
[12:51:54] [PASSED] drm_gem_shmem_test_pin_pages
[12:51:54] [PASSED] drm_gem_shmem_test_vmap
[12:51:54] [PASSED] drm_gem_shmem_test_get_sg_table
[12:51:54] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:51:54] [PASSED] drm_gem_shmem_test_madvise
[12:51:54] [PASSED] drm_gem_shmem_test_purge
[12:51:54] ================== [PASSED] drm_gem_shmem ==================
[12:51:54] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:51:54] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:51:54] [PASSED] Automatic
[12:51:54] [PASSED] Full
[12:51:54] [PASSED] Limited 16:235
[12:51:54] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:51:54] [PASSED] drm_test_check_disable_connector
[12:51:54] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:51:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:51:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:51:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:51:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:51:54] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:51:54] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:51:54] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:51:54] [PASSED] drm_test_check_output_bpc_dvi
[12:51:54] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:51:54] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:51:54] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:51:54] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:51:54] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:51:54] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:51:54] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:51:54] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:51:54] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:51:54] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:51:54] [PASSED] drm_test_check_broadcast_rgb_value
[12:51:54] [PASSED] drm_test_check_bpc_8_value
[12:51:54] [PASSED] drm_test_check_bpc_10_value
[12:51:54] [PASSED] drm_test_check_bpc_12_value
[12:51:54] [PASSED] drm_test_check_format_value
[12:51:54] [PASSED] drm_test_check_tmds_char_value
[12:51:54] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:51:54] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[12:51:54] [PASSED] drm_test_check_mode_valid
[12:51:54] [PASSED] drm_test_check_mode_valid_reject
[12:51:54] [PASSED] drm_test_check_mode_valid_reject_rate
[12:51:54] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:51:54] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:51:54] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:51:54] [PASSED] drm_test_check_infoframes
[12:51:54] [PASSED] drm_test_check_reject_avi_infoframe
[12:51:54] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:51:54] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:51:54] [PASSED] drm_test_check_reject_audio_infoframe
[12:51:54] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:51:54] ================= drm_managed (2 subtests) =================
[12:51:54] [PASSED] drm_test_managed_release_action
[12:51:54] [PASSED] drm_test_managed_run_action
[12:51:54] =================== [PASSED] drm_managed ===================
[12:51:54] =================== drm_mm (6 subtests) ====================
[12:51:54] [PASSED] drm_test_mm_init
[12:51:54] [PASSED] drm_test_mm_debug
[12:51:54] [PASSED] drm_test_mm_align32
[12:51:54] [PASSED] drm_test_mm_align64
[12:51:54] [PASSED] drm_test_mm_lowest
[12:51:54] [PASSED] drm_test_mm_highest
[12:51:54] ===================== [PASSED] drm_mm ======================
[12:51:54] ============= drm_modes_analog_tv (5 subtests) =============
[12:51:54] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:51:54] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:51:54] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:51:54] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:51:54] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:51:54] =============== [PASSED] drm_modes_analog_tv ===============
[12:51:54] ============== drm_plane_helper (2 subtests) ===============
[12:51:54] =============== drm_test_check_plane_state ================
[12:51:54] [PASSED] clipping_simple
[12:51:54] [PASSED] clipping_rotate_reflect
[12:51:54] [PASSED] positioning_simple
[12:51:54] [PASSED] upscaling
[12:51:54] [PASSED] downscaling
[12:51:54] [PASSED] rounding1
[12:51:54] [PASSED] rounding2
[12:51:54] [PASSED] rounding3
[12:51:54] [PASSED] rounding4
[12:51:54] =========== [PASSED] drm_test_check_plane_state ============
[12:51:54] =========== drm_test_check_invalid_plane_state ============
[12:51:54] [PASSED] positioning_invalid
[12:51:54] [PASSED] upscaling_invalid
[12:51:54] [PASSED] downscaling_invalid
[12:51:54] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:51:54] ================ [PASSED] drm_plane_helper =================
[12:51:54] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:51:54] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:51:54] [PASSED] None
[12:51:54] [PASSED] PAL
[12:51:54] [PASSED] NTSC
[12:51:54] [PASSED] Both, NTSC Default
[12:51:54] [PASSED] Both, PAL Default
[12:51:54] [PASSED] Both, NTSC Default, with PAL on command-line
[12:51:54] [PASSED] Both, PAL Default, with NTSC on command-line
[12:51:54] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:51:54] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:51:54] ================== drm_rect (9 subtests) ===================
[12:51:54] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:51:54] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:51:54] [PASSED] drm_test_rect_clip_scaled_clipped
[12:51:54] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:51:54] ================= drm_test_rect_intersect =================
[12:51:54] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:51:54] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:51:54] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:51:54] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:51:54] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:51:54] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:51:54] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:51:54] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:51:54] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:51:54] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:51:54] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:51:54] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:51:54] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:51:54] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:51:54] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:51:54] ============= [PASSED] drm_test_rect_intersect =============
[12:51:54] ================ drm_test_rect_calc_hscale ================
[12:51:54] [PASSED] normal use
[12:51:54] [PASSED] out of max range
[12:51:54] [PASSED] out of min range
[12:51:54] [PASSED] zero dst
[12:51:54] [PASSED] negative src
[12:51:54] [PASSED] negative dst
[12:51:54] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:51:54] ================ drm_test_rect_calc_vscale ================
[12:51:54] [PASSED] normal use
[12:51:54] [PASSED] out of max range
[12:51:54] [PASSED] out of min range
[12:51:54] [PASSED] zero dst
[12:51:54] [PASSED] negative src
[12:51:54] [PASSED] negative dst
[12:51:54] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:51:54] ================== drm_test_rect_rotate ===================
[12:51:54] [PASSED] reflect-x
[12:51:54] [PASSED] reflect-y
[12:51:54] [PASSED] rotate-0
[12:51:54] [PASSED] rotate-90
[12:51:54] [PASSED] rotate-180
[12:51:54] [PASSED] rotate-270
[12:51:54] ============== [PASSED] drm_test_rect_rotate ===============
[12:51:54] ================ drm_test_rect_rotate_inv =================
[12:51:54] [PASSED] reflect-x
[12:51:54] [PASSED] reflect-y
[12:51:54] [PASSED] rotate-0
[12:51:54] [PASSED] rotate-90
[12:51:54] [PASSED] rotate-180
[12:51:54] [PASSED] rotate-270
[12:51:54] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:51:54] ==================== [PASSED] drm_rect =====================
[12:51:54] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:51:54] ============ drm_test_sysfb_build_fourcc_list =============
[12:51:54] [PASSED] no native formats
[12:51:54] [PASSED] XRGB8888 as native format
[12:51:54] [PASSED] remove duplicates
[12:51:54] [PASSED] convert alpha formats
[12:51:54] [PASSED] random formats
[12:51:54] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:51:54] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:51:54] ================== drm_fixp (2 subtests) ===================
[12:51:54] [PASSED] drm_test_int2fixp
[12:51:54] [PASSED] drm_test_sm2fixp
[12:51:54] ==================== [PASSED] drm_fixp =====================
[12:51:54] ============================================================
[12:51:54] Testing complete. Ran 621 tests: passed: 621
[12:51:54] Elapsed time: 26.167s total, 1.685s configuring, 24.314s building, 0.138s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:51:54] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:51:56] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:52:11] Starting KUnit Kernel (1/1)...
[12:52:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:52:11] ================= ttm_device (5 subtests) ==================
[12:52:11] [PASSED] ttm_device_init_basic
[12:52:11] [PASSED] ttm_device_init_multiple
[12:52:11] [PASSED] ttm_device_fini_basic
[12:52:11] [PASSED] ttm_device_init_no_vma_man
[12:52:11] ================== ttm_device_init_pools ==================
[12:52:11] [PASSED] No DMA allocations, no DMA32 required
[12:52:11] [PASSED] DMA allocations, DMA32 required
[12:52:11] [PASSED] No DMA allocations, DMA32 required
[12:52:11] [PASSED] DMA allocations, no DMA32 required
[12:52:11] ============== [PASSED] ttm_device_init_pools ==============
[12:52:11] =================== [PASSED] ttm_device ====================
[12:52:11] ================== ttm_pool (8 subtests) ===================
[12:52:11] ================== ttm_pool_alloc_basic ===================
[12:52:11] [PASSED] One page
[12:52:11] [PASSED] More than one page
[12:52:11] [PASSED] Above the allocation limit
[12:52:11] [PASSED] One page, with coherent DMA mappings enabled
[12:52:11] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:52:11] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:52:11] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:52:11] [PASSED] One page
[12:52:11] [PASSED] More than one page
[12:52:11] [PASSED] Above the allocation limit
[12:52:11] [PASSED] One page, with coherent DMA mappings enabled
[12:52:11] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:52:11] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:52:11] [PASSED] ttm_pool_alloc_order_caching_match
[12:52:11] [PASSED] ttm_pool_alloc_caching_mismatch
[12:52:11] [PASSED] ttm_pool_alloc_order_mismatch
[12:52:11] [PASSED] ttm_pool_free_dma_alloc
[12:52:11] [PASSED] ttm_pool_free_no_dma_alloc
[12:52:11] [PASSED] ttm_pool_fini_basic
[12:52:11] ==================== [PASSED] ttm_pool =====================
[12:52:11] ================ ttm_resource (8 subtests) =================
[12:52:11] ================= ttm_resource_init_basic =================
[12:52:11] [PASSED] Init resource in TTM_PL_SYSTEM
[12:52:11] [PASSED] Init resource in TTM_PL_VRAM
[12:52:11] [PASSED] Init resource in a private placement
[12:52:11] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:52:11] ============= [PASSED] ttm_resource_init_basic =============
[12:52:11] [PASSED] ttm_resource_init_pinned
[12:52:11] [PASSED] ttm_resource_fini_basic
[12:52:11] [PASSED] ttm_resource_manager_init_basic
[12:52:11] [PASSED] ttm_resource_manager_usage_basic
[12:52:11] [PASSED] ttm_resource_manager_set_used_basic
[12:52:11] [PASSED] ttm_sys_man_alloc_basic
[12:52:11] [PASSED] ttm_sys_man_free_basic
[12:52:11] ================== [PASSED] ttm_resource ===================
[12:52:11] =================== ttm_tt (15 subtests) ===================
[12:52:11] ==================== ttm_tt_init_basic ====================
[12:52:11] [PASSED] Page-aligned size
[12:52:11] [PASSED] Extra pages requested
[12:52:11] ================ [PASSED] ttm_tt_init_basic ================
[12:52:11] [PASSED] ttm_tt_init_misaligned
[12:52:11] [PASSED] ttm_tt_fini_basic
[12:52:11] [PASSED] ttm_tt_fini_sg
[12:52:11] [PASSED] ttm_tt_fini_shmem
[12:52:11] [PASSED] ttm_tt_create_basic
[12:52:11] [PASSED] ttm_tt_create_invalid_bo_type
[12:52:11] [PASSED] ttm_tt_create_ttm_exists
[12:52:11] [PASSED] ttm_tt_create_failed
[12:52:11] [PASSED] ttm_tt_destroy_basic
[12:52:11] [PASSED] ttm_tt_populate_null_ttm
[12:52:11] [PASSED] ttm_tt_populate_populated_ttm
[12:52:11] [PASSED] ttm_tt_unpopulate_basic
[12:52:11] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:52:11] [PASSED] ttm_tt_swapin_basic
[12:52:11] ===================== [PASSED] ttm_tt ======================
[12:52:11] =================== ttm_bo (14 subtests) ===================
[12:52:11] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:52:11] [PASSED] Cannot be interrupted and sleeps
[12:52:11] [PASSED] Cannot be interrupted, locks straight away
[12:52:11] [PASSED] Can be interrupted, sleeps
[12:52:11] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:52:11] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:52:11] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:52:11] [PASSED] ttm_bo_reserve_double_resv
[12:52:11] [PASSED] ttm_bo_reserve_interrupted
[12:52:11] [PASSED] ttm_bo_reserve_deadlock
[12:52:11] [PASSED] ttm_bo_unreserve_basic
[12:52:11] [PASSED] ttm_bo_unreserve_pinned
[12:52:11] [PASSED] ttm_bo_unreserve_bulk
[12:52:11] [PASSED] ttm_bo_fini_basic
[12:52:11] [PASSED] ttm_bo_fini_shared_resv
[12:52:11] [PASSED] ttm_bo_pin_basic
[12:52:11] [PASSED] ttm_bo_pin_unpin_resource
[12:52:11] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:52:11] ===================== [PASSED] ttm_bo ======================
[12:52:11] ============== ttm_bo_validate (22 subtests) ===============
[12:52:11] ============== ttm_bo_init_reserved_sys_man ===============
[12:52:11] [PASSED] Buffer object for userspace
[12:52:11] [PASSED] Kernel buffer object
[12:52:11] [PASSED] Shared buffer object
[12:52:11] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:52:11] ============== ttm_bo_init_reserved_mock_man ==============
[12:52:11] [PASSED] Buffer object for userspace
[12:52:11] [PASSED] Kernel buffer object
[12:52:11] [PASSED] Shared buffer object
[12:52:11] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:52:11] [PASSED] ttm_bo_init_reserved_resv
[12:52:11] ================== ttm_bo_validate_basic ==================
[12:52:11] [PASSED] Buffer object for userspace
[12:52:11] [PASSED] Kernel buffer object
[12:52:11] [PASSED] Shared buffer object
[12:52:11] ============== [PASSED] ttm_bo_validate_basic ==============
[12:52:11] [PASSED] ttm_bo_validate_invalid_placement
[12:52:11] ============= ttm_bo_validate_same_placement ==============
[12:52:11] [PASSED] System manager
[12:52:11] [PASSED] VRAM manager
[12:52:11] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:52:11] [PASSED] ttm_bo_validate_failed_alloc
[12:52:11] [PASSED] ttm_bo_validate_pinned
[12:52:11] [PASSED] ttm_bo_validate_busy_placement
[12:52:11] ================ ttm_bo_validate_multihop =================
[12:52:11] [PASSED] Buffer object for userspace
[12:52:11] [PASSED] Kernel buffer object
[12:52:11] [PASSED] Shared buffer object
[12:52:11] ============ [PASSED] ttm_bo_validate_multihop =============
[12:52:11] ========== ttm_bo_validate_no_placement_signaled ==========
[12:52:11] [PASSED] Buffer object in system domain, no page vector
[12:52:11] [PASSED] Buffer object in system domain with an existing page vector
[12:52:11] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:52:11] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:52:11] [PASSED] Buffer object for userspace
[12:52:11] [PASSED] Kernel buffer object
[12:52:11] [PASSED] Shared buffer object
[12:52:11] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:52:11] [PASSED] ttm_bo_validate_move_fence_signaled
[12:52:11] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:52:11] [PASSED] Waits for GPU
[12:52:11] [PASSED] Tries to lock straight away
[12:52:11] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:52:11] [PASSED] ttm_bo_validate_swapout
[12:52:11] [PASSED] ttm_bo_validate_happy_evict
[12:52:11] [PASSED] ttm_bo_validate_all_pinned_evict
[12:52:11] [PASSED] ttm_bo_validate_allowed_only_evict
[12:52:11] [PASSED] ttm_bo_validate_deleted_evict
[12:52:11] [PASSED] ttm_bo_validate_busy_domain_evict
[12:52:11] [PASSED] ttm_bo_validate_evict_gutting
[12:52:11] [PASSED] ttm_bo_validate_recrusive_evict
[12:52:11] ================= [PASSED] ttm_bo_validate =================
[12:52:11] ============================================================
[12:52:11] Testing complete. Ran 102 tests: passed: 102
[12:52:11] Elapsed time: 16.346s total, 1.834s configuring, 14.242s building, 0.223s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 26+ messages in thread* ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev9)
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (16 preceding siblings ...)
2026-06-08 12:52 ` ✓ CI.KUnit: success " Patchwork
@ 2026-06-09 5:28 ` Patchwork
2026-06-09 5:29 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2026-06-09 5:28 UTC (permalink / raw)
To: Tauro, Riana; +Cc: intel-xe
== Series Details ==
Series: Introduce Xe Uncorrectable Error Handling (rev9)
URL : https://patchwork.freedesktop.org/series/160482/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit eeabc60ba0df2db78739729a53b8550cc7b054a1
Author: Riana Tauro <riana.tauro@intel.com>
Date: Mon Jun 8 14:17:16 2026 +0530
drm/xe/xe_ras: Process pages from offlined list and queue
This will be integrated with the related address-fault handling flow
once this patch is merged.
https://lore.kernel.org/intel-xe/20260506141143.4033299-12-tejas.upadhyay@intel.com/
Sending for initial comments.
On module load, process pages queued by firmware for offlining by
reserving and sending the offline/decline command to firmware.
For already offlined pages in the firmware list, reserve the pages.
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
+ /mt/dim checkpatch a65d94c6ee1e4e58b535d06684020f3992ccad6f drm-intel
8411b0b25e4e drm/xe/xe_survivability: Decouple survivability info from boot survivability
b9b0a413ff5f drm/xe/xe_sysctrl: Make sysctrl flood limit reusable
a632a0143d88 drm/xe: Improve wedged state management
52efc7eff237 drm/xe/xe_pci_error: Implement PCI error recovery callbacks
-:60: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#60:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 147 lines checked
df7cf84944d1 drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset
c68ad1ce8080 drm/xe: Skip device access during PCI error recovery
2b24293608db drm/xe/xe_ras: Initialize Uncorrectable AER Registers
bce1241c2025 drm/xe/xe_ras: Add support for uncorrectable core-compute errors
4e8515c13453 drm/xe/xe_ras: Handle uncorrectable SoC Internal errors
362771ac5804 drm/xe/xe_ras: Query errors from system controller on probe
a8741cb983b5 drm/xe/xe_pci_error: Process errors in mmio_enabled
5dae86141d72 drm/xe/xe_ras: Add support to query device memory errors
680578dfff5c drm/xe/xe_ras: Add support to query page offline queue and list
7c3fb385a6a1 drm/xe/xe_ras: Add support to offline and decline a page address
eeabc60ba0df drm/xe/xe_ras: Process pages from offlined list and queue
^ permalink raw reply [flat|nested] 26+ messages in thread* ✓ CI.KUnit: success for Introduce Xe Uncorrectable Error Handling (rev9)
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (17 preceding siblings ...)
2026-06-09 5:28 ` ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev9) Patchwork
@ 2026-06-09 5:29 ` Patchwork
2026-06-09 6:07 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-09 14:53 ` ✗ Xe.CI.FULL: failure " Patchwork
20 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2026-06-09 5:29 UTC (permalink / raw)
To: Tauro, Riana; +Cc: intel-xe
== Series Details ==
Series: Introduce Xe Uncorrectable Error Handling (rev9)
URL : https://patchwork.freedesktop.org/series/160482/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:28:21] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:28:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:28:57] Starting KUnit Kernel (1/1)...
[05:28:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:28:57] ================== guc_buf (11 subtests) ===================
[05:28:57] [PASSED] test_smallest
[05:28:57] [PASSED] test_largest
[05:28:57] [PASSED] test_granular
[05:28:57] [PASSED] test_unique
[05:28:57] [PASSED] test_overlap
[05:28:57] [PASSED] test_reusable
[05:28:57] [PASSED] test_too_big
[05:28:57] [PASSED] test_flush
[05:28:57] [PASSED] test_lookup
[05:28:57] [PASSED] test_data
[05:28:57] [PASSED] test_class
[05:28:57] ===================== [PASSED] guc_buf =====================
[05:28:57] =================== guc_dbm (7 subtests) ===================
[05:28:57] [PASSED] test_empty
[05:28:57] [PASSED] test_default
[05:28:57] ======================== test_size ========================
[05:28:57] [PASSED] 4
[05:28:57] [PASSED] 8
[05:28:57] [PASSED] 32
[05:28:57] [PASSED] 256
[05:28:57] ==================== [PASSED] test_size ====================
[05:28:57] ======================= test_reuse ========================
[05:28:57] [PASSED] 4
[05:28:57] [PASSED] 8
[05:28:57] [PASSED] 32
[05:28:57] [PASSED] 256
[05:28:57] =================== [PASSED] test_reuse ====================
[05:28:57] =================== test_range_overlap ====================
[05:28:57] [PASSED] 4
[05:28:57] [PASSED] 8
[05:28:57] [PASSED] 32
[05:28:57] [PASSED] 256
[05:28:57] =============== [PASSED] test_range_overlap ================
[05:28:57] =================== test_range_compact ====================
[05:28:57] [PASSED] 4
[05:28:57] [PASSED] 8
[05:28:57] [PASSED] 32
[05:28:57] [PASSED] 256
[05:28:57] =============== [PASSED] test_range_compact ================
[05:28:57] ==================== test_range_spare =====================
[05:28:57] [PASSED] 4
[05:28:57] [PASSED] 8
[05:28:57] [PASSED] 32
[05:28:57] [PASSED] 256
[05:28:57] ================ [PASSED] test_range_spare =================
[05:28:57] ===================== [PASSED] guc_dbm =====================
[05:28:57] =================== guc_idm (6 subtests) ===================
[05:28:57] [PASSED] bad_init
[05:28:57] [PASSED] no_init
[05:28:57] [PASSED] init_fini
[05:28:57] [PASSED] check_used
[05:28:57] [PASSED] check_quota
[05:28:57] [PASSED] check_all
[05:28:57] ===================== [PASSED] guc_idm =====================
[05:28:57] ================== no_relay (3 subtests) ===================
[05:28:57] [PASSED] xe_drops_guc2pf_if_not_ready
[05:28:57] [PASSED] xe_drops_guc2vf_if_not_ready
[05:28:57] [PASSED] xe_rejects_send_if_not_ready
[05:28:57] ==================== [PASSED] no_relay =====================
[05:28:57] ================== pf_relay (14 subtests) ==================
[05:28:57] [PASSED] pf_rejects_guc2pf_too_short
[05:28:57] [PASSED] pf_rejects_guc2pf_too_long
[05:28:57] [PASSED] pf_rejects_guc2pf_no_payload
[05:28:57] [PASSED] pf_fails_no_payload
[05:28:57] [PASSED] pf_fails_bad_origin
[05:28:57] [PASSED] pf_fails_bad_type
[05:28:57] [PASSED] pf_txn_reports_error
[05:28:57] [PASSED] pf_txn_sends_pf2guc
[05:28:57] [PASSED] pf_sends_pf2guc
[05:28:57] [SKIPPED] pf_loopback_nop
[05:28:57] [SKIPPED] pf_loopback_echo
[05:28:57] [SKIPPED] pf_loopback_fail
[05:28:57] [SKIPPED] pf_loopback_busy
[05:28:57] [SKIPPED] pf_loopback_retry
[05:28:57] ==================== [PASSED] pf_relay =====================
[05:28:57] ================== vf_relay (3 subtests) ===================
[05:28:57] [PASSED] vf_rejects_guc2vf_too_short
[05:28:57] [PASSED] vf_rejects_guc2vf_too_long
[05:28:57] [PASSED] vf_rejects_guc2vf_no_payload
[05:28:57] ==================== [PASSED] vf_relay =====================
[05:28:57] ================ pf_gt_config (9 subtests) =================
[05:28:57] [PASSED] fair_contexts_1vf
[05:28:57] [PASSED] fair_doorbells_1vf
[05:28:57] [PASSED] fair_ggtt_1vf
[05:28:57] ====================== fair_vram_1vf ======================
[05:28:57] [PASSED] 3.50 GiB
[05:28:57] [PASSED] 11.5 GiB
[05:28:57] [PASSED] 15.5 GiB
[05:28:57] [PASSED] 31.5 GiB
[05:28:57] [PASSED] 63.5 GiB
[05:28:57] [PASSED] 1.91 GiB
[05:28:57] ================== [PASSED] fair_vram_1vf ==================
[05:28:57] ================ fair_vram_1vf_admin_only =================
[05:28:57] [PASSED] 3.50 GiB
[05:28:57] [PASSED] 11.5 GiB
[05:28:57] [PASSED] 15.5 GiB
[05:28:57] [PASSED] 31.5 GiB
[05:28:57] [PASSED] 63.5 GiB
[05:28:57] [PASSED] 1.91 GiB
[05:28:57] ============ [PASSED] fair_vram_1vf_admin_only =============
[05:28:57] ====================== fair_contexts ======================
[05:28:57] [PASSED] 1 VF
[05:28:57] [PASSED] 2 VFs
[05:28:57] [PASSED] 3 VFs
[05:28:57] [PASSED] 4 VFs
[05:28:57] [PASSED] 5 VFs
[05:28:57] [PASSED] 6 VFs
[05:28:57] [PASSED] 7 VFs
[05:28:57] [PASSED] 8 VFs
[05:28:57] [PASSED] 9 VFs
[05:28:57] [PASSED] 10 VFs
[05:28:57] [PASSED] 11 VFs
[05:28:57] [PASSED] 12 VFs
[05:28:57] [PASSED] 13 VFs
[05:28:57] [PASSED] 14 VFs
[05:28:57] [PASSED] 15 VFs
[05:28:57] [PASSED] 16 VFs
[05:28:57] [PASSED] 17 VFs
[05:28:57] [PASSED] 18 VFs
[05:28:57] [PASSED] 19 VFs
[05:28:57] [PASSED] 20 VFs
[05:28:57] [PASSED] 21 VFs
[05:28:57] [PASSED] 22 VFs
[05:28:57] [PASSED] 23 VFs
[05:28:57] [PASSED] 24 VFs
[05:28:57] [PASSED] 25 VFs
[05:28:57] [PASSED] 26 VFs
[05:28:57] [PASSED] 27 VFs
[05:28:57] [PASSED] 28 VFs
[05:28:57] [PASSED] 29 VFs
[05:28:57] [PASSED] 30 VFs
[05:28:57] [PASSED] 31 VFs
[05:28:57] [PASSED] 32 VFs
[05:28:57] [PASSED] 33 VFs
[05:28:57] [PASSED] 34 VFs
[05:28:57] [PASSED] 35 VFs
[05:28:57] [PASSED] 36 VFs
[05:28:57] [PASSED] 37 VFs
[05:28:57] [PASSED] 38 VFs
[05:28:57] [PASSED] 39 VFs
[05:28:57] [PASSED] 40 VFs
[05:28:57] [PASSED] 41 VFs
[05:28:57] [PASSED] 42 VFs
[05:28:57] [PASSED] 43 VFs
[05:28:57] [PASSED] 44 VFs
[05:28:57] [PASSED] 45 VFs
[05:28:57] [PASSED] 46 VFs
[05:28:57] [PASSED] 47 VFs
[05:28:57] [PASSED] 48 VFs
[05:28:57] [PASSED] 49 VFs
[05:28:57] [PASSED] 50 VFs
[05:28:57] [PASSED] 51 VFs
[05:28:57] [PASSED] 52 VFs
[05:28:57] [PASSED] 53 VFs
[05:28:57] [PASSED] 54 VFs
[05:28:57] [PASSED] 55 VFs
[05:28:57] [PASSED] 56 VFs
[05:28:57] [PASSED] 57 VFs
[05:28:57] [PASSED] 58 VFs
[05:28:57] [PASSED] 59 VFs
[05:28:57] [PASSED] 60 VFs
[05:28:57] [PASSED] 61 VFs
[05:28:57] [PASSED] 62 VFs
[05:28:57] [PASSED] 63 VFs
[05:28:57] ================== [PASSED] fair_contexts ==================
[05:28:57] ===================== fair_doorbells ======================
[05:28:57] [PASSED] 1 VF
[05:28:57] [PASSED] 2 VFs
[05:28:57] [PASSED] 3 VFs
[05:28:57] [PASSED] 4 VFs
[05:28:57] [PASSED] 5 VFs
[05:28:57] [PASSED] 6 VFs
[05:28:57] [PASSED] 7 VFs
[05:28:57] [PASSED] 8 VFs
[05:28:57] [PASSED] 9 VFs
[05:28:57] [PASSED] 10 VFs
[05:28:57] [PASSED] 11 VFs
[05:28:57] [PASSED] 12 VFs
[05:28:57] [PASSED] 13 VFs
[05:28:57] [PASSED] 14 VFs
[05:28:57] [PASSED] 15 VFs
[05:28:57] [PASSED] 16 VFs
[05:28:57] [PASSED] 17 VFs
[05:28:57] [PASSED] 18 VFs
[05:28:57] [PASSED] 19 VFs
[05:28:57] [PASSED] 20 VFs
[05:28:57] [PASSED] 21 VFs
[05:28:57] [PASSED] 22 VFs
[05:28:57] [PASSED] 23 VFs
[05:28:57] [PASSED] 24 VFs
[05:28:57] [PASSED] 25 VFs
[05:28:57] [PASSED] 26 VFs
[05:28:57] [PASSED] 27 VFs
[05:28:57] [PASSED] 28 VFs
[05:28:57] [PASSED] 29 VFs
[05:28:57] [PASSED] 30 VFs
[05:28:57] [PASSED] 31 VFs
[05:28:57] [PASSED] 32 VFs
[05:28:57] [PASSED] 33 VFs
[05:28:57] [PASSED] 34 VFs
[05:28:57] [PASSED] 35 VFs
[05:28:57] [PASSED] 36 VFs
[05:28:57] [PASSED] 37 VFs
[05:28:57] [PASSED] 38 VFs
[05:28:57] [PASSED] 39 VFs
[05:28:57] [PASSED] 40 VFs
[05:28:57] [PASSED] 41 VFs
[05:28:57] [PASSED] 42 VFs
[05:28:57] [PASSED] 43 VFs
[05:28:57] [PASSED] 44 VFs
[05:28:57] [PASSED] 45 VFs
[05:28:57] [PASSED] 46 VFs
[05:28:57] [PASSED] 47 VFs
[05:28:57] [PASSED] 48 VFs
[05:28:57] [PASSED] 49 VFs
[05:28:57] [PASSED] 50 VFs
[05:28:57] [PASSED] 51 VFs
[05:28:57] [PASSED] 52 VFs
[05:28:57] [PASSED] 53 VFs
[05:28:57] [PASSED] 54 VFs
[05:28:57] [PASSED] 55 VFs
[05:28:57] [PASSED] 56 VFs
[05:28:57] [PASSED] 57 VFs
[05:28:57] [PASSED] 58 VFs
[05:28:57] [PASSED] 59 VFs
[05:28:57] [PASSED] 60 VFs
[05:28:57] [PASSED] 61 VFs
[05:28:57] [PASSED] 62 VFs
[05:28:57] [PASSED] 63 VFs
[05:28:57] ================= [PASSED] fair_doorbells ==================
[05:28:57] ======================== fair_ggtt ========================
[05:28:57] [PASSED] 1 VF
[05:28:57] [PASSED] 2 VFs
[05:28:57] [PASSED] 3 VFs
[05:28:57] [PASSED] 4 VFs
[05:28:57] [PASSED] 5 VFs
[05:28:57] [PASSED] 6 VFs
[05:28:57] [PASSED] 7 VFs
[05:28:57] [PASSED] 8 VFs
[05:28:57] [PASSED] 9 VFs
[05:28:57] [PASSED] 10 VFs
[05:28:57] [PASSED] 11 VFs
[05:28:57] [PASSED] 12 VFs
[05:28:57] [PASSED] 13 VFs
[05:28:57] [PASSED] 14 VFs
[05:28:57] [PASSED] 15 VFs
[05:28:57] [PASSED] 16 VFs
[05:28:57] [PASSED] 17 VFs
[05:28:57] [PASSED] 18 VFs
[05:28:57] [PASSED] 19 VFs
[05:28:57] [PASSED] 20 VFs
[05:28:57] [PASSED] 21 VFs
[05:28:57] [PASSED] 22 VFs
[05:28:57] [PASSED] 23 VFs
[05:28:57] [PASSED] 24 VFs
[05:28:57] [PASSED] 25 VFs
[05:28:57] [PASSED] 26 VFs
[05:28:57] [PASSED] 27 VFs
[05:28:57] [PASSED] 28 VFs
[05:28:57] [PASSED] 29 VFs
[05:28:57] [PASSED] 30 VFs
[05:28:57] [PASSED] 31 VFs
[05:28:57] [PASSED] 32 VFs
[05:28:57] [PASSED] 33 VFs
[05:28:57] [PASSED] 34 VFs
[05:28:57] [PASSED] 35 VFs
[05:28:57] [PASSED] 36 VFs
[05:28:57] [PASSED] 37 VFs
[05:28:57] [PASSED] 38 VFs
[05:28:57] [PASSED] 39 VFs
[05:28:57] [PASSED] 40 VFs
[05:28:57] [PASSED] 41 VFs
[05:28:57] [PASSED] 42 VFs
[05:28:57] [PASSED] 43 VFs
[05:28:57] [PASSED] 44 VFs
[05:28:57] [PASSED] 45 VFs
[05:28:57] [PASSED] 46 VFs
[05:28:57] [PASSED] 47 VFs
[05:28:57] [PASSED] 48 VFs
[05:28:57] [PASSED] 49 VFs
[05:28:57] [PASSED] 50 VFs
[05:28:57] [PASSED] 51 VFs
[05:28:57] [PASSED] 52 VFs
[05:28:57] [PASSED] 53 VFs
[05:28:57] [PASSED] 54 VFs
[05:28:57] [PASSED] 55 VFs
[05:28:57] [PASSED] 56 VFs
[05:28:57] [PASSED] 57 VFs
[05:28:57] [PASSED] 58 VFs
[05:28:57] [PASSED] 59 VFs
[05:28:57] [PASSED] 60 VFs
[05:28:57] [PASSED] 61 VFs
[05:28:57] [PASSED] 62 VFs
[05:28:57] [PASSED] 63 VFs
[05:28:57] ==================== [PASSED] fair_ggtt ====================
[05:28:57] ======================== fair_vram ========================
[05:28:57] [PASSED] 1 VF
[05:28:57] [PASSED] 2 VFs
[05:28:57] [PASSED] 3 VFs
[05:28:57] [PASSED] 4 VFs
[05:28:57] [PASSED] 5 VFs
[05:28:57] [PASSED] 6 VFs
[05:28:57] [PASSED] 7 VFs
[05:28:57] [PASSED] 8 VFs
[05:28:57] [PASSED] 9 VFs
[05:28:57] [PASSED] 10 VFs
[05:28:57] [PASSED] 11 VFs
[05:28:57] [PASSED] 12 VFs
[05:28:57] [PASSED] 13 VFs
[05:28:57] [PASSED] 14 VFs
[05:28:57] [PASSED] 15 VFs
[05:28:57] [PASSED] 16 VFs
[05:28:57] [PASSED] 17 VFs
[05:28:57] [PASSED] 18 VFs
[05:28:57] [PASSED] 19 VFs
[05:28:57] [PASSED] 20 VFs
[05:28:57] [PASSED] 21 VFs
[05:28:57] [PASSED] 22 VFs
[05:28:57] [PASSED] 23 VFs
[05:28:57] [PASSED] 24 VFs
[05:28:57] [PASSED] 25 VFs
[05:28:57] [PASSED] 26 VFs
[05:28:57] [PASSED] 27 VFs
[05:28:57] [PASSED] 28 VFs
[05:28:57] [PASSED] 29 VFs
[05:28:57] [PASSED] 30 VFs
[05:28:57] [PASSED] 31 VFs
[05:28:57] [PASSED] 32 VFs
[05:28:57] [PASSED] 33 VFs
[05:28:57] [PASSED] 34 VFs
[05:28:57] [PASSED] 35 VFs
[05:28:57] [PASSED] 36 VFs
[05:28:57] [PASSED] 37 VFs
[05:28:57] [PASSED] 38 VFs
[05:28:57] [PASSED] 39 VFs
[05:28:57] [PASSED] 40 VFs
[05:28:57] [PASSED] 41 VFs
[05:28:57] [PASSED] 42 VFs
[05:28:57] [PASSED] 43 VFs
[05:28:57] [PASSED] 44 VFs
[05:28:57] [PASSED] 45 VFs
[05:28:57] [PASSED] 46 VFs
[05:28:57] [PASSED] 47 VFs
[05:28:57] [PASSED] 48 VFs
[05:28:57] [PASSED] 49 VFs
[05:28:57] [PASSED] 50 VFs
[05:28:57] [PASSED] 51 VFs
[05:28:57] [PASSED] 52 VFs
[05:28:57] [PASSED] 53 VFs
[05:28:57] [PASSED] 54 VFs
[05:28:57] [PASSED] 55 VFs
[05:28:57] [PASSED] 56 VFs
[05:28:57] [PASSED] 57 VFs
[05:28:57] [PASSED] 58 VFs
[05:28:57] [PASSED] 59 VFs
[05:28:57] [PASSED] 60 VFs
[05:28:57] [PASSED] 61 VFs
[05:28:57] [PASSED] 62 VFs
[05:28:57] [PASSED] 63 VFs
[05:28:57] ==================== [PASSED] fair_vram ====================
[05:28:57] ================== [PASSED] pf_gt_config ===================
[05:28:57] ===================== lmtt (1 subtest) =====================
[05:28:57] ======================== test_ops =========================
[05:28:57] [PASSED] 2-level
[05:28:57] [PASSED] multi-level
[05:28:57] ==================== [PASSED] test_ops =====================
[05:28:57] ====================== [PASSED] lmtt =======================
[05:28:57] ================= pf_service (11 subtests) =================
[05:28:57] [PASSED] pf_negotiate_any
[05:28:57] [PASSED] pf_negotiate_base_match
[05:28:57] [PASSED] pf_negotiate_base_newer
[05:28:57] [PASSED] pf_negotiate_base_next
[05:28:57] [SKIPPED] pf_negotiate_base_older
[05:28:57] [PASSED] pf_negotiate_base_prev
[05:28:57] [PASSED] pf_negotiate_latest_match
[05:28:57] [PASSED] pf_negotiate_latest_newer
[05:28:57] [PASSED] pf_negotiate_latest_next
[05:28:57] [SKIPPED] pf_negotiate_latest_older
[05:28:57] [SKIPPED] pf_negotiate_latest_prev
[05:28:57] =================== [PASSED] pf_service ====================
[05:28:57] ================= xe_guc_g2g (2 subtests) ==================
[05:28:57] ============== xe_live_guc_g2g_kunit_default ==============
[05:28:57] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[05:28:57] ============== xe_live_guc_g2g_kunit_allmem ===============
[05:28:57] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[05:28:57] =================== [SKIPPED] xe_guc_g2g ===================
[05:28:57] =================== xe_mocs (2 subtests) ===================
[05:28:57] ================ xe_live_mocs_kernel_kunit ================
[05:28:57] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:28:57] ================ xe_live_mocs_reset_kunit =================
[05:28:57] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:28:57] ==================== [SKIPPED] xe_mocs =====================
[05:28:57] ================= xe_migrate (2 subtests) ==================
[05:28:57] ================= xe_migrate_sanity_kunit =================
[05:28:57] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:28:57] ================== xe_validate_ccs_kunit ==================
[05:28:57] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:28:57] =================== [SKIPPED] xe_migrate ===================
[05:28:57] ================== xe_dma_buf (1 subtest) ==================
[05:28:57] ==================== xe_dma_buf_kunit =====================
[05:28:57] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:28:57] =================== [SKIPPED] xe_dma_buf ===================
[05:28:57] ================= xe_bo_shrink (1 subtest) =================
[05:28:57] =================== xe_bo_shrink_kunit ====================
[05:28:57] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:28:57] ================== [SKIPPED] xe_bo_shrink ==================
[05:28:57] ==================== xe_bo (2 subtests) ====================
[05:28:57] ================== xe_ccs_migrate_kunit ===================
[05:28:57] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[05:28:57] ==================== xe_bo_evict_kunit ====================
[05:28:57] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:28:57] ===================== [SKIPPED] xe_bo ======================
[05:28:57] ==================== args (13 subtests) ====================
[05:28:57] [PASSED] count_args_test
[05:28:57] [PASSED] call_args_example
[05:28:57] [PASSED] call_args_test
[05:28:57] [PASSED] drop_first_arg_example
[05:28:57] [PASSED] drop_first_arg_test
[05:28:57] [PASSED] first_arg_example
[05:28:57] [PASSED] first_arg_test
[05:28:57] [PASSED] last_arg_example
[05:28:57] [PASSED] last_arg_test
[05:28:57] [PASSED] pick_arg_example
[05:28:57] [PASSED] if_args_example
[05:28:57] [PASSED] if_args_test
[05:28:57] [PASSED] sep_comma_example
[05:28:57] ====================== [PASSED] args =======================
[05:28:57] =================== xe_pci (3 subtests) ====================
[05:28:57] ==================== check_graphics_ip ====================
[05:28:57] [PASSED] 12.00 Xe_LP
[05:28:57] [PASSED] 12.10 Xe_LP+
[05:28:57] [PASSED] 12.55 Xe_HPG
[05:28:57] [PASSED] 12.60 Xe_HPC
[05:28:57] [PASSED] 12.70 Xe_LPG
[05:28:57] [PASSED] 12.71 Xe_LPG
[05:28:57] [PASSED] 12.74 Xe_LPG+
[05:28:57] [PASSED] 20.01 Xe2_HPG
[05:28:57] [PASSED] 20.02 Xe2_HPG
[05:28:57] [PASSED] 20.04 Xe2_LPG
[05:28:57] [PASSED] 30.00 Xe3_LPG
[05:28:57] [PASSED] 30.01 Xe3_LPG
[05:28:57] [PASSED] 30.03 Xe3_LPG
[05:28:57] [PASSED] 30.04 Xe3_LPG
[05:28:57] [PASSED] 30.05 Xe3_LPG
[05:28:57] [PASSED] 35.10 Xe3p_LPG
[05:28:57] [PASSED] 35.11 Xe3p_XPC
[05:28:57] ================ [PASSED] check_graphics_ip ================
[05:28:57] ===================== check_media_ip ======================
[05:28:57] [PASSED] 12.00 Xe_M
[05:28:57] [PASSED] 12.55 Xe_HPM
[05:28:57] [PASSED] 13.00 Xe_LPM+
[05:28:57] [PASSED] 13.01 Xe2_HPM
[05:28:57] [PASSED] 20.00 Xe2_LPM
[05:28:57] [PASSED] 30.00 Xe3_LPM
[05:28:57] [PASSED] 30.02 Xe3_LPM
[05:28:57] [PASSED] 35.00 Xe3p_LPM
[05:28:57] [PASSED] 35.03 Xe3p_HPM
[05:28:57] ================= [PASSED] check_media_ip ==================
[05:28:57] =================== check_platform_desc ===================
[05:28:57] [PASSED] 0x9A60 (TIGERLAKE)
[05:28:57] [PASSED] 0x9A68 (TIGERLAKE)
[05:28:57] [PASSED] 0x9A70 (TIGERLAKE)
[05:28:57] [PASSED] 0x9A40 (TIGERLAKE)
[05:28:57] [PASSED] 0x9A49 (TIGERLAKE)
[05:28:57] [PASSED] 0x9A59 (TIGERLAKE)
[05:28:57] [PASSED] 0x9A78 (TIGERLAKE)
[05:28:57] [PASSED] 0x9AC0 (TIGERLAKE)
[05:28:57] [PASSED] 0x9AC9 (TIGERLAKE)
[05:28:57] [PASSED] 0x9AD9 (TIGERLAKE)
[05:28:57] [PASSED] 0x9AF8 (TIGERLAKE)
[05:28:57] [PASSED] 0x4C80 (ROCKETLAKE)
[05:28:57] [PASSED] 0x4C8A (ROCKETLAKE)
[05:28:57] [PASSED] 0x4C8B (ROCKETLAKE)
[05:28:57] [PASSED] 0x4C8C (ROCKETLAKE)
[05:28:57] [PASSED] 0x4C90 (ROCKETLAKE)
[05:28:57] [PASSED] 0x4C9A (ROCKETLAKE)
[05:28:57] [PASSED] 0x4680 (ALDERLAKE_S)
[05:28:57] [PASSED] 0x4682 (ALDERLAKE_S)
[05:28:57] [PASSED] 0x4688 (ALDERLAKE_S)
[05:28:57] [PASSED] 0x468A (ALDERLAKE_S)
[05:28:57] [PASSED] 0x468B (ALDERLAKE_S)
[05:28:57] [PASSED] 0x4690 (ALDERLAKE_S)
[05:28:57] [PASSED] 0x4692 (ALDERLAKE_S)
[05:28:57] [PASSED] 0x4693 (ALDERLAKE_S)
[05:28:57] [PASSED] 0x46A0 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46A1 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46A2 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46A3 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46A6 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46A8 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46AA (ALDERLAKE_P)
[05:28:57] [PASSED] 0x462A (ALDERLAKE_P)
[05:28:57] [PASSED] 0x4626 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x4628 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46B0 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46B1 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46B2 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46B3 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46C0 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46C1 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46C2 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46C3 (ALDERLAKE_P)
[05:28:57] [PASSED] 0x46D0 (ALDERLAKE_N)
[05:28:57] [PASSED] 0x46D1 (ALDERLAKE_N)
[05:28:57] [PASSED] 0x46D2 (ALDERLAKE_N)
[05:28:57] [PASSED] 0x46D3 (ALDERLAKE_N)
[05:28:57] [PASSED] 0x46D4 (ALDERLAKE_N)
[05:28:57] [PASSED] 0xA721 (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA7A1 (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA7A9 (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA7AC (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA7AD (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA720 (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA7A0 (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA7A8 (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA7AA (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA7AB (ALDERLAKE_P)
[05:28:57] [PASSED] 0xA780 (ALDERLAKE_S)
[05:28:57] [PASSED] 0xA781 (ALDERLAKE_S)
[05:28:57] [PASSED] 0xA782 (ALDERLAKE_S)
[05:28:57] [PASSED] 0xA783 (ALDERLAKE_S)
[05:28:57] [PASSED] 0xA788 (ALDERLAKE_S)
[05:28:57] [PASSED] 0xA789 (ALDERLAKE_S)
[05:28:57] [PASSED] 0xA78A (ALDERLAKE_S)
[05:28:57] [PASSED] 0xA78B (ALDERLAKE_S)
[05:28:57] [PASSED] 0x4905 (DG1)
[05:28:57] [PASSED] 0x4906 (DG1)
[05:28:57] [PASSED] 0x4907 (DG1)
[05:28:57] [PASSED] 0x4908 (DG1)
[05:28:57] [PASSED] 0x4909 (DG1)
[05:28:57] [PASSED] 0x56C0 (DG2)
[05:28:57] [PASSED] 0x56C2 (DG2)
[05:28:57] [PASSED] 0x56C1 (DG2)
[05:28:57] [PASSED] 0x7D51 (METEORLAKE)
[05:28:57] [PASSED] 0x7DD1 (METEORLAKE)
[05:28:57] [PASSED] 0x7D41 (METEORLAKE)
[05:28:57] [PASSED] 0x7D67 (METEORLAKE)
[05:28:57] [PASSED] 0xB640 (METEORLAKE)
[05:28:57] [PASSED] 0x56A0 (DG2)
[05:28:57] [PASSED] 0x56A1 (DG2)
[05:28:57] [PASSED] 0x56A2 (DG2)
[05:28:57] [PASSED] 0x56BE (DG2)
[05:28:57] [PASSED] 0x56BF (DG2)
[05:28:57] [PASSED] 0x5690 (DG2)
[05:28:57] [PASSED] 0x5691 (DG2)
[05:28:57] [PASSED] 0x5692 (DG2)
[05:28:57] [PASSED] 0x56A5 (DG2)
[05:28:57] [PASSED] 0x56A6 (DG2)
[05:28:57] [PASSED] 0x56B0 (DG2)
[05:28:57] [PASSED] 0x56B1 (DG2)
[05:28:57] [PASSED] 0x56BA (DG2)
[05:28:57] [PASSED] 0x56BB (DG2)
[05:28:57] [PASSED] 0x56BC (DG2)
[05:28:57] [PASSED] 0x56BD (DG2)
[05:28:57] [PASSED] 0x5693 (DG2)
[05:28:57] [PASSED] 0x5694 (DG2)
[05:28:57] [PASSED] 0x5695 (DG2)
[05:28:57] [PASSED] 0x56A3 (DG2)
[05:28:57] [PASSED] 0x56A4 (DG2)
[05:28:57] [PASSED] 0x56B2 (DG2)
[05:28:57] [PASSED] 0x56B3 (DG2)
[05:28:57] [PASSED] 0x5696 (DG2)
[05:28:57] [PASSED] 0x5697 (DG2)
[05:28:57] [PASSED] 0xB69 (PVC)
[05:28:57] [PASSED] 0xB6E (PVC)
[05:28:57] [PASSED] 0xBD4 (PVC)
[05:28:57] [PASSED] 0xBD5 (PVC)
[05:28:57] [PASSED] 0xBD6 (PVC)
[05:28:57] [PASSED] 0xBD7 (PVC)
[05:28:57] [PASSED] 0xBD8 (PVC)
[05:28:57] [PASSED] 0xBD9 (PVC)
[05:28:57] [PASSED] 0xBDA (PVC)
[05:28:57] [PASSED] 0xBDB (PVC)
[05:28:57] [PASSED] 0xBE0 (PVC)
[05:28:57] [PASSED] 0xBE1 (PVC)
[05:28:57] [PASSED] 0xBE5 (PVC)
[05:28:57] [PASSED] 0x7D40 (METEORLAKE)
[05:28:57] [PASSED] 0x7D45 (METEORLAKE)
[05:28:57] [PASSED] 0x7D55 (METEORLAKE)
[05:28:57] [PASSED] 0x7D60 (METEORLAKE)
[05:28:57] [PASSED] 0x7DD5 (METEORLAKE)
[05:28:57] [PASSED] 0x6420 (LUNARLAKE)
[05:28:57] [PASSED] 0x64A0 (LUNARLAKE)
[05:28:57] [PASSED] 0x64B0 (LUNARLAKE)
[05:28:57] [PASSED] 0xE202 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE209 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE20B (BATTLEMAGE)
[05:28:57] [PASSED] 0xE20C (BATTLEMAGE)
[05:28:57] [PASSED] 0xE20D (BATTLEMAGE)
[05:28:57] [PASSED] 0xE210 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE211 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE212 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE216 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE220 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE221 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE222 (BATTLEMAGE)
[05:28:57] [PASSED] 0xE223 (BATTLEMAGE)
[05:28:57] [PASSED] 0xB080 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB081 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB082 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB083 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB084 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB085 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB086 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB087 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB08F (PANTHERLAKE)
[05:28:57] [PASSED] 0xB090 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB0A0 (PANTHERLAKE)
[05:28:57] [PASSED] 0xB0B0 (PANTHERLAKE)
[05:28:57] [PASSED] 0xFD80 (PANTHERLAKE)
[05:28:57] [PASSED] 0xFD81 (PANTHERLAKE)
[05:28:57] [PASSED] 0xD740 (NOVALAKE_S)
[05:28:57] [PASSED] 0xD741 (NOVALAKE_S)
[05:28:57] [PASSED] 0xD742 (NOVALAKE_S)
[05:28:57] [PASSED] 0xD743 (NOVALAKE_S)
[05:28:57] [PASSED] 0xD744 (NOVALAKE_S)
[05:28:57] [PASSED] 0xD745 (NOVALAKE_S)
[05:28:57] [PASSED] 0x674C (CRESCENTISLAND)
[05:28:57] [PASSED] 0x674D (CRESCENTISLAND)
[05:28:57] [PASSED] 0x674E (CRESCENTISLAND)
[05:28:57] [PASSED] 0x674F (CRESCENTISLAND)
[05:28:57] [PASSED] 0x6750 (CRESCENTISLAND)
[05:28:57] [PASSED] 0xD750 (NOVALAKE_P)
[05:28:57] [PASSED] 0xD751 (NOVALAKE_P)
[05:28:57] [PASSED] 0xD752 (NOVALAKE_P)
[05:28:57] [PASSED] 0xD753 (NOVALAKE_P)
[05:28:57] [PASSED] 0xD754 (NOVALAKE_P)
[05:28:57] [PASSED] 0xD755 (NOVALAKE_P)
[05:28:57] [PASSED] 0xD756 (NOVALAKE_P)
[05:28:57] [PASSED] 0xD757 (NOVALAKE_P)
[05:28:57] [PASSED] 0xD75F (NOVALAKE_P)
[05:28:57] =============== [PASSED] check_platform_desc ===============
[05:28:57] ===================== [PASSED] xe_pci ======================
[05:28:57] ============= xe_rtp_tables_test (4 subtests) ==============
[05:28:57] ================== xe_rtp_table_gt_test ===================
[05:28:57] [PASSED] gt_was/14011060649
[05:28:57] [PASSED] gt_was/14011059788
[05:28:57] [PASSED] gt_was/14015795083
[05:28:57] [PASSED] gt_was/16021867713
[05:28:57] [PASSED] gt_was/14019449301
[05:28:57] [PASSED] gt_was/16028005424
[05:28:57] [PASSED] gt_was/14026578760
[05:28:57] [PASSED] gt_was/1409420604
[05:28:57] [PASSED] gt_was/1408615072
[05:28:57] [PASSED] gt_was/22010523718
[05:28:57] [PASSED] gt_was/14011006942
[05:28:57] [PASSED] gt_was/14014830051
[05:28:57] [PASSED] gt_was/18018781329
[05:28:57] [PASSED] gt_was/1509235366
[05:28:57] [PASSED] gt_was/18018781329
[05:28:57] [PASSED] gt_was/16016694945
[05:28:57] [PASSED] gt_was/14018575942
[05:28:57] [PASSED] gt_was/22016670082
[05:28:57] [PASSED] gt_was/22016670082
[05:28:57] [PASSED] gt_was/14017421178
[05:28:57] [PASSED] gt_was/16025250150
[05:28:57] [PASSED] gt_was/14021871409
[05:28:57] [PASSED] gt_was/16021865536
[05:28:57] [PASSED] gt_was/14021486841
[05:28:57] [PASSED] gt_was/14025160223
[05:28:57] [PASSED] gt_was/14026144927, 16029437861
[05:28:57] [PASSED] gt_was/14025635424
[05:28:57] [PASSED] gt_was/16028005424
[05:28:57] ============== [PASSED] xe_rtp_table_gt_test ===============
[05:28:57] ================== xe_rtp_table_gt_test ===================
[05:28:57] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[05:28:57] [PASSED] gt_tunings/Tuning: 32B Access Enable
[05:28:57] [PASSED] gt_tunings/Tuning: L3 cache
[05:28:57] [PASSED] gt_tunings/Tuning: L3 cache - media
[05:28:57] [PASSED] gt_tunings/Tuning: Compression Overfetch
[05:28:57] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[05:28:57] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[05:28:57] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[05:28:57] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[05:28:57] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[05:28:57] [PASSED] gt_tunings/Tuning: Stateless compression control
[05:28:57] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[05:28:57] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[05:28:57] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[05:28:57] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[05:28:57] ============== [PASSED] xe_rtp_table_gt_test ===============
[05:28:57] ================== xe_rtp_table_oob_test ==================
[05:28:57] [PASSED] oob_was/1607983814
[05:28:57] [PASSED] oob_was/16010904313
[05:28:57] [PASSED] oob_was/18022495364
[05:28:57] [PASSED] oob_was/22012773006
[05:28:57] [PASSED] oob_was/14014475959
[05:28:57] [PASSED] oob_was/22011391025
[05:28:57] [PASSED] oob_was/22012727170
[05:28:57] [PASSED] oob_was/22012727685
[05:28:57] [PASSED] oob_was/22016596838
[05:28:57] [PASSED] oob_was/18020744125
[05:28:57] [PASSED] oob_was/1409600907
[05:28:57] [PASSED] oob_was/22014953428
[05:28:57] [PASSED] oob_was/16017236439
[05:28:57] [PASSED] oob_was/14019821291
[05:28:57] [PASSED] oob_was/14015076503
[05:28:57] [PASSED] oob_was/14018913170
[05:28:57] [PASSED] oob_was/14018094691
[05:28:57] [PASSED] oob_was/18024947630
[05:28:57] [PASSED] oob_was/16022287689
[05:28:57] [PASSED] oob_was/13011645652
[05:28:57] [PASSED] oob_was/14022293748
[05:28:57] [PASSED] oob_was/22019794406
[05:28:57] [PASSED] oob_was/22019338487
[05:28:57] [PASSED] oob_was/16023588340
[05:28:57] [PASSED] oob_was/14019789679
[05:28:57] [PASSED] oob_was/14022866841
[05:28:57] [PASSED] oob_was/16021333562
[05:28:57] [PASSED] oob_was/14016712196
[05:28:57] [PASSED] oob_was/14015568240
[05:28:57] [PASSED] oob_was/18013179988
[05:28:57] [PASSED] oob_was/1508761755
[05:28:57] [PASSED] oob_was/16023105232
[05:28:57] [PASSED] oob_was/16026508708
[05:28:57] [PASSED] oob_was/14020001231
[05:28:57] [PASSED] oob_was/16023683509
[05:28:57] [PASSED] oob_was/14025515070
[05:28:57] [PASSED] oob_was/15015404425_disable
[05:28:57] [PASSED] oob_was/16026007364
[05:28:57] [PASSED] oob_was/14020316580
[05:28:57] [PASSED] oob_was/14025883347
[05:28:57] ============== [PASSED] xe_rtp_table_oob_test ==============
[05:28:57] ================ xe_rtp_table_dev_oob_test ================
[05:28:57] [PASSED] device_oob_was/22010954014
[05:28:57] [PASSED] device_oob_was/15015404425
[05:28:57] [PASSED] device_oob_was/22019338487_display
[05:28:57] [PASSED] device_oob_was/14022085890
[05:28:57] [PASSED] device_oob_was/14026539277
[05:28:57] [PASSED] device_oob_was/14026633728
[05:28:57] [PASSED] device_oob_was/14026746987
[05:28:57] [PASSED] device_oob_was/14026779378
[05:28:57] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[05:28:57] =============== [PASSED] xe_rtp_tables_test ================
[05:28:57] =================== xe_rtp (3 subtests) ====================
[05:28:57] =================== xe_rtp_rules_tests ====================
[05:28:57] [PASSED] no
[05:28:57] [PASSED] yes
[05:28:57] [PASSED] no-and-no
[05:28:57] [PASSED] no-and-yes
[05:28:57] [PASSED] yes-and-no
[05:28:57] [PASSED] yes-and-yes
[05:28:57] [PASSED] no-or-no
[05:28:57] [PASSED] no-or-yes
[05:28:57] [PASSED] yes-or-no
[05:28:57] [PASSED] yes-or-yes
[05:28:57] [PASSED] no-yes-or-yes-no
[05:28:57] [PASSED] no-yes-or-yes-yes
[05:28:57] [PASSED] yes-yes-or-no-yes
[05:28:57] [PASSED] yes-yes-or-yes-yes
[05:28:57] [PASSED] no-no-or-yes-or-no
[05:28:57] [PASSED] or
[05:28:57] [PASSED] or-yes
[05:28:58] [PASSED] or-no
[05:28:58] [PASSED] yes-or
[05:28:58] [PASSED] no-or
[05:28:58] [PASSED] no-or-or-yes
[05:28:58] [PASSED] yes-or-or-no
[05:28:58] [PASSED] no-or-or-no
[05:28:58] [PASSED] missing-context-engine-class
[05:28:58] [PASSED] missing-context-engine-class-or-yes
[05:28:58] [PASSED] missing-context-engine-class-or-or-yes
[05:28:58] =============== [PASSED] xe_rtp_rules_tests ================
[05:28:58] =============== xe_rtp_process_to_sr_tests ================
[05:28:58] [PASSED] coalesce-same-reg
[05:28:58] [PASSED] no-match-no-add
[05:28:58] [PASSED] two-regs-two-entries
[05:28:58] [PASSED] clr-one-set-other
[05:28:58] [PASSED] set-field
[05:28:58] [PASSED] conflict-duplicate
[05:28:58] [PASSED] conflict-not-disjoint
[05:28:58] [PASSED] conflict-reg-type
[05:28:58] [PASSED] bad-mcr-reg-forced-to-regular
[05:28:58] [PASSED] bad-regular-reg-forced-to-mcr
[05:28:58] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:28:58] ================== xe_rtp_process_tests ===================
[05:28:58] [PASSED] active1
[05:28:58] [PASSED] active2
[05:28:58] [PASSED] active-inactive
[05:28:58] [PASSED] inactive-active
[05:28:58] [PASSED] inactive-active-inactive
[05:28:58] [PASSED] inactive-inactive-inactive
[05:28:58] ============== [PASSED] xe_rtp_process_tests ===============
[05:28:58] ===================== [PASSED] xe_rtp ======================
[05:28:58] ==================== xe_wa (1 subtest) =====================
[05:28:58] ======================== xe_wa_gt =========================
[05:28:58] [PASSED] TIGERLAKE B0
[05:28:58] [PASSED] DG1 A0
[05:28:58] [PASSED] DG1 B0
[05:28:58] [PASSED] ALDERLAKE_S A0
[05:28:58] [PASSED] ALDERLAKE_S B0
[05:28:58] [PASSED] ALDERLAKE_S C0
[05:28:58] [PASSED] ALDERLAKE_S D0
[05:28:58] [PASSED] ALDERLAKE_P A0
[05:28:58] [PASSED] ALDERLAKE_P B0
[05:28:58] [PASSED] ALDERLAKE_P C0
[05:28:58] [PASSED] ALDERLAKE_S RPLS D0
[05:28:58] [PASSED] ALDERLAKE_P RPLU E0
[05:28:58] [PASSED] DG2 G10 C0
[05:28:58] [PASSED] DG2 G11 B1
[05:28:58] [PASSED] DG2 G12 A1
[05:28:58] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:28:58] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:28:58] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[05:28:58] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[05:28:58] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[05:28:58] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[05:28:58] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[05:28:58] ==================== [PASSED] xe_wa_gt =====================
[05:28:58] ====================== [PASSED] xe_wa ======================
[05:28:58] ============================================================
[05:28:58] Testing complete. Ran 715 tests: passed: 697, skipped: 18
[05:28:58] Elapsed time: 36.829s total, 4.292s configuring, 31.871s building, 0.638s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:28:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:28:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:29:24] Starting KUnit Kernel (1/1)...
[05:29:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:29:24] ============ drm_test_pick_cmdline (2 subtests) ============
[05:29:24] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[05:29:24] =============== drm_test_pick_cmdline_named ===============
[05:29:24] [PASSED] NTSC
[05:29:24] [PASSED] NTSC-J
[05:29:24] [PASSED] PAL
[05:29:24] [PASSED] PAL-M
[05:29:24] =========== [PASSED] drm_test_pick_cmdline_named ===========
[05:29:24] ============== [PASSED] drm_test_pick_cmdline ==============
[05:29:24] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:29:24] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:29:24] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:29:24] =========== drm_validate_clone_mode (2 subtests) ===========
[05:29:24] ============== drm_test_check_in_clone_mode ===============
[05:29:24] [PASSED] in_clone_mode
[05:29:24] [PASSED] not_in_clone_mode
[05:29:24] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:29:24] =============== drm_test_check_valid_clones ===============
[05:29:24] [PASSED] not_in_clone_mode
[05:29:24] [PASSED] valid_clone
[05:29:24] [PASSED] invalid_clone
[05:29:24] =========== [PASSED] drm_test_check_valid_clones ===========
[05:29:24] ============= [PASSED] drm_validate_clone_mode =============
[05:29:24] ============= drm_validate_modeset (1 subtest) =============
[05:29:24] [PASSED] drm_test_check_connector_changed_modeset
[05:29:24] ============== [PASSED] drm_validate_modeset ===============
[05:29:24] ====== drm_test_bridge_get_current_state (2 subtests) ======
[05:29:24] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:29:24] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[05:29:24] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:29:24] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[05:29:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:29:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:29:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[05:29:24] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:29:24] ============== drm_bridge_alloc (2 subtests) ===============
[05:29:24] [PASSED] drm_test_drm_bridge_alloc_basic
[05:29:24] [PASSED] drm_test_drm_bridge_alloc_get_put
[05:29:24] ================ [PASSED] drm_bridge_alloc =================
[05:29:24] ============= drm_cmdline_parser (40 subtests) =============
[05:29:24] [PASSED] drm_test_cmdline_force_d_only
[05:29:24] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:29:24] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:29:24] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:29:24] [PASSED] drm_test_cmdline_force_e_only
[05:29:24] [PASSED] drm_test_cmdline_res
[05:29:24] [PASSED] drm_test_cmdline_res_vesa
[05:29:24] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:29:24] [PASSED] drm_test_cmdline_res_rblank
[05:29:24] [PASSED] drm_test_cmdline_res_bpp
[05:29:24] [PASSED] drm_test_cmdline_res_refresh
[05:29:24] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:29:24] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:29:24] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:29:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:29:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:29:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:29:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:29:24] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:29:24] [PASSED] drm_test_cmdline_res_margins_force_on
[05:29:24] [PASSED] drm_test_cmdline_res_vesa_margins
[05:29:24] [PASSED] drm_test_cmdline_name
[05:29:24] [PASSED] drm_test_cmdline_name_bpp
[05:29:24] [PASSED] drm_test_cmdline_name_option
[05:29:24] [PASSED] drm_test_cmdline_name_bpp_option
[05:29:24] [PASSED] drm_test_cmdline_rotate_0
[05:29:24] [PASSED] drm_test_cmdline_rotate_90
[05:29:24] [PASSED] drm_test_cmdline_rotate_180
[05:29:24] [PASSED] drm_test_cmdline_rotate_270
[05:29:24] [PASSED] drm_test_cmdline_hmirror
[05:29:24] [PASSED] drm_test_cmdline_vmirror
[05:29:24] [PASSED] drm_test_cmdline_margin_options
[05:29:24] [PASSED] drm_test_cmdline_multiple_options
[05:29:24] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:29:24] [PASSED] drm_test_cmdline_extra_and_option
[05:29:24] [PASSED] drm_test_cmdline_freestanding_options
[05:29:24] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:29:24] [PASSED] drm_test_cmdline_panel_orientation
[05:29:24] ================ drm_test_cmdline_invalid =================
[05:29:24] [PASSED] margin_only
[05:29:24] [PASSED] interlace_only
[05:29:24] [PASSED] res_missing_x
[05:29:24] [PASSED] res_missing_y
[05:29:24] [PASSED] res_bad_y
[05:29:24] [PASSED] res_missing_y_bpp
[05:29:24] [PASSED] res_bad_bpp
[05:29:24] [PASSED] res_bad_refresh
[05:29:24] [PASSED] res_bpp_refresh_force_on_off
[05:29:24] [PASSED] res_invalid_mode
[05:29:24] [PASSED] res_bpp_wrong_place_mode
[05:29:24] [PASSED] name_bpp_refresh
[05:29:24] [PASSED] name_refresh
[05:29:24] [PASSED] name_refresh_wrong_mode
[05:29:24] [PASSED] name_refresh_invalid_mode
[05:29:24] [PASSED] rotate_multiple
[05:29:24] [PASSED] rotate_invalid_val
[05:29:24] [PASSED] rotate_truncated
[05:29:24] [PASSED] invalid_option
[05:29:24] [PASSED] invalid_tv_option
[05:29:24] [PASSED] truncated_tv_option
[05:29:24] ============ [PASSED] drm_test_cmdline_invalid =============
[05:29:24] =============== drm_test_cmdline_tv_options ===============
[05:29:24] [PASSED] NTSC
[05:29:24] [PASSED] NTSC_443
[05:29:24] [PASSED] NTSC_J
[05:29:24] [PASSED] PAL
[05:29:24] [PASSED] PAL_M
[05:29:24] [PASSED] PAL_N
[05:29:24] [PASSED] SECAM
[05:29:24] [PASSED] MONO_525
[05:29:24] [PASSED] MONO_625
[05:29:24] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:29:24] =============== [PASSED] drm_cmdline_parser ================
[05:29:24] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:29:24] [PASSED] drm_test_connector_hdmi_init_valid
[05:29:24] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:29:24] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:29:24] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:29:24] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:29:24] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:29:24] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:29:24] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:29:24] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:29:24] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:29:24] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:29:24] [PASSED] supported_formats=0x5 yuv420_allowed=1
[05:29:24] [PASSED] supported_formats=0x5 yuv420_allowed=0
[05:29:24] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:29:24] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:29:24] [PASSED] drm_test_connector_hdmi_init_null_product
[05:29:24] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:29:24] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:29:24] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:29:24] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:29:24] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:29:24] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:29:24] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:29:24] ========= drm_test_connector_hdmi_init_type_valid =========
[05:29:24] [PASSED] HDMI-A
[05:29:24] [PASSED] HDMI-B
[05:29:24] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:29:24] ======== drm_test_connector_hdmi_init_type_invalid ========
[05:29:24] [PASSED] Unknown
[05:29:24] [PASSED] VGA
[05:29:24] [PASSED] DVI-I
[05:29:24] [PASSED] DVI-D
[05:29:24] [PASSED] DVI-A
[05:29:24] [PASSED] Composite
[05:29:24] [PASSED] SVIDEO
[05:29:24] [PASSED] LVDS
[05:29:24] [PASSED] Component
[05:29:24] [PASSED] DIN
[05:29:24] [PASSED] DP
[05:29:24] [PASSED] TV
[05:29:24] [PASSED] eDP
[05:29:24] [PASSED] Virtual
[05:29:24] [PASSED] DSI
[05:29:24] [PASSED] DPI
[05:29:24] [PASSED] Writeback
[05:29:24] [PASSED] SPI
[05:29:24] [PASSED] USB
[05:29:24] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:29:24] ============ [PASSED] drmm_connector_hdmi_init =============
[05:29:24] ============= drmm_connector_init (3 subtests) =============
[05:29:24] [PASSED] drm_test_drmm_connector_init
[05:29:24] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:29:24] ========= drm_test_drmm_connector_init_type_valid =========
[05:29:24] [PASSED] Unknown
[05:29:24] [PASSED] VGA
[05:29:24] [PASSED] DVI-I
[05:29:24] [PASSED] DVI-D
[05:29:24] [PASSED] DVI-A
[05:29:24] [PASSED] Composite
[05:29:24] [PASSED] SVIDEO
[05:29:24] [PASSED] LVDS
[05:29:24] [PASSED] Component
[05:29:24] [PASSED] DIN
[05:29:24] [PASSED] DP
[05:29:24] [PASSED] HDMI-A
[05:29:24] [PASSED] HDMI-B
[05:29:24] [PASSED] TV
[05:29:24] [PASSED] eDP
[05:29:24] [PASSED] Virtual
[05:29:24] [PASSED] DSI
[05:29:24] [PASSED] DPI
[05:29:24] [PASSED] Writeback
[05:29:24] [PASSED] SPI
[05:29:24] [PASSED] USB
[05:29:24] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:29:24] =============== [PASSED] drmm_connector_init ===============
[05:29:24] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_init
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:29:24] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[05:29:24] [PASSED] Unknown
[05:29:24] [PASSED] VGA
[05:29:24] [PASSED] DVI-I
[05:29:24] [PASSED] DVI-D
[05:29:24] [PASSED] DVI-A
[05:29:24] [PASSED] Composite
[05:29:24] [PASSED] SVIDEO
[05:29:24] [PASSED] LVDS
[05:29:24] [PASSED] Component
[05:29:24] [PASSED] DIN
[05:29:24] [PASSED] DP
[05:29:24] [PASSED] HDMI-A
[05:29:24] [PASSED] HDMI-B
[05:29:24] [PASSED] TV
[05:29:24] [PASSED] eDP
[05:29:24] [PASSED] Virtual
[05:29:24] [PASSED] DSI
[05:29:24] [PASSED] DPI
[05:29:24] [PASSED] Writeback
[05:29:24] [PASSED] SPI
[05:29:24] [PASSED] USB
[05:29:24] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:29:24] ======== drm_test_drm_connector_dynamic_init_name =========
[05:29:24] [PASSED] Unknown
[05:29:24] [PASSED] VGA
[05:29:24] [PASSED] DVI-I
[05:29:24] [PASSED] DVI-D
[05:29:24] [PASSED] DVI-A
[05:29:24] [PASSED] Composite
[05:29:24] [PASSED] SVIDEO
[05:29:24] [PASSED] LVDS
[05:29:24] [PASSED] Component
[05:29:24] [PASSED] DIN
[05:29:24] [PASSED] DP
[05:29:24] [PASSED] HDMI-A
[05:29:24] [PASSED] HDMI-B
[05:29:24] [PASSED] TV
[05:29:24] [PASSED] eDP
[05:29:24] [PASSED] Virtual
[05:29:24] [PASSED] DSI
[05:29:24] [PASSED] DPI
[05:29:24] [PASSED] Writeback
[05:29:24] [PASSED] SPI
[05:29:24] [PASSED] USB
[05:29:24] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:29:24] =========== [PASSED] drm_connector_dynamic_init ============
[05:29:24] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:29:24] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:29:24] ======= drm_connector_dynamic_register (7 subtests) ========
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:29:24] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:29:24] ========= [PASSED] drm_connector_dynamic_register ==========
[05:29:24] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:29:24] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:29:24] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:29:24] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:29:24] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:29:24] ========== drm_test_get_tv_mode_from_name_valid ===========
[05:29:24] [PASSED] NTSC
[05:29:24] [PASSED] NTSC-443
[05:29:24] [PASSED] NTSC-J
[05:29:24] [PASSED] PAL
[05:29:24] [PASSED] PAL-M
[05:29:24] [PASSED] PAL-N
[05:29:24] [PASSED] SECAM
[05:29:24] [PASSED] Mono
[05:29:24] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:29:24] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:29:24] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:29:24] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:29:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:29:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:29:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:29:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:29:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:29:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:29:24] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[05:29:24] [PASSED] VIC 96
[05:29:24] [PASSED] VIC 97
[05:29:24] [PASSED] VIC 101
[05:29:24] [PASSED] VIC 102
[05:29:24] [PASSED] VIC 106
[05:29:24] [PASSED] VIC 107
[05:29:24] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:29:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:29:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:29:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:29:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:29:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:29:24] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:29:24] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:29:24] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[05:29:24] [PASSED] Automatic
[05:29:24] [PASSED] Full
[05:29:24] [PASSED] Limited 16:235
[05:29:24] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:29:24] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:29:24] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:29:24] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:29:24] === drm_test_drm_hdmi_connector_get_output_format_name ====
[05:29:24] [PASSED] RGB
[05:29:24] [PASSED] YUV 4:2:0
[05:29:24] [PASSED] YUV 4:2:2
[05:29:24] [PASSED] YUV 4:4:4
[05:29:24] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:29:24] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:29:24] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:29:24] ============= drm_damage_helper (21 subtests) ==============
[05:29:24] [PASSED] drm_test_damage_iter_no_damage
[05:29:24] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:29:24] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:29:24] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:29:24] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:29:24] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:29:24] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:29:24] [PASSED] drm_test_damage_iter_simple_damage
[05:29:24] [PASSED] drm_test_damage_iter_single_damage
[05:29:24] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:29:24] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:29:24] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:29:24] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:29:24] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:29:24] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:29:24] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:29:24] [PASSED] drm_test_damage_iter_damage
[05:29:24] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:29:24] [PASSED] drm_test_damage_iter_damage_one_outside
[05:29:24] [PASSED] drm_test_damage_iter_damage_src_moved
[05:29:24] [PASSED] drm_test_damage_iter_damage_not_visible
[05:29:24] ================ [PASSED] drm_damage_helper ================
[05:29:24] ============== drm_dp_mst_helper (3 subtests) ==============
[05:29:24] ============== drm_test_dp_mst_calc_pbn_mode ==============
[05:29:24] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:29:24] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:29:24] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:29:24] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:29:24] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:29:24] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:29:24] ============== drm_test_dp_mst_calc_pbn_div ===============
[05:29:24] [PASSED] Link rate 2000000 lane count 4
[05:29:24] [PASSED] Link rate 2000000 lane count 2
[05:29:24] [PASSED] Link rate 2000000 lane count 1
[05:29:24] [PASSED] Link rate 1350000 lane count 4
[05:29:24] [PASSED] Link rate 1350000 lane count 2
[05:29:24] [PASSED] Link rate 1350000 lane count 1
[05:29:24] [PASSED] Link rate 1000000 lane count 4
[05:29:24] [PASSED] Link rate 1000000 lane count 2
[05:29:24] [PASSED] Link rate 1000000 lane count 1
[05:29:24] [PASSED] Link rate 810000 lane count 4
[05:29:24] [PASSED] Link rate 810000 lane count 2
[05:29:24] [PASSED] Link rate 810000 lane count 1
[05:29:24] [PASSED] Link rate 540000 lane count 4
[05:29:24] [PASSED] Link rate 540000 lane count 2
[05:29:24] [PASSED] Link rate 540000 lane count 1
[05:29:24] [PASSED] Link rate 270000 lane count 4
[05:29:24] [PASSED] Link rate 270000 lane count 2
[05:29:24] [PASSED] Link rate 270000 lane count 1
[05:29:24] [PASSED] Link rate 162000 lane count 4
[05:29:24] [PASSED] Link rate 162000 lane count 2
[05:29:24] [PASSED] Link rate 162000 lane count 1
[05:29:24] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:29:24] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[05:29:24] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:29:24] [PASSED] DP_POWER_UP_PHY with port number
[05:29:24] [PASSED] DP_POWER_DOWN_PHY with port number
[05:29:24] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:29:24] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:29:24] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:29:24] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:29:24] [PASSED] DP_QUERY_PAYLOAD with port number
[05:29:24] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:29:24] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:29:24] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:29:24] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:29:24] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:29:24] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:29:24] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:29:24] [PASSED] DP_REMOTE_I2C_READ with port number
[05:29:24] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:29:24] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:29:24] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:29:24] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:29:24] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:29:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:29:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:29:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:29:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:29:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:29:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:29:24] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:29:24] ================ [PASSED] drm_dp_mst_helper ================
[05:29:24] ================== drm_exec (7 subtests) ===================
[05:29:24] [PASSED] sanitycheck
[05:29:24] [PASSED] test_lock
[05:29:24] [PASSED] test_lock_unlock
[05:29:24] [PASSED] test_duplicates
[05:29:24] [PASSED] test_prepare
[05:29:24] [PASSED] test_prepare_array
[05:29:24] [PASSED] test_multiple_loops
[05:29:24] ==================== [PASSED] drm_exec =====================
[05:29:24] =========== drm_format_helper_test (17 subtests) ===========
[05:29:24] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:29:24] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:29:24] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:29:24] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:29:24] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:29:24] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:29:24] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:29:24] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:29:24] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:29:24] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:29:24] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:29:24] ============== drm_test_fb_xrgb8888_to_mono ===============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:29:24] ==================== drm_test_fb_swab =====================
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ================ [PASSED] drm_test_fb_swab =================
[05:29:24] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:29:24] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[05:29:24] [PASSED] single_pixel_source_buffer
[05:29:24] [PASSED] single_pixel_clip_rectangle
[05:29:24] [PASSED] well_known_colors
[05:29:24] [PASSED] destination_pitch
[05:29:24] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:29:24] ================= drm_test_fb_clip_offset =================
[05:29:24] [PASSED] pass through
[05:29:24] [PASSED] horizontal offset
[05:29:24] [PASSED] vertical offset
[05:29:24] [PASSED] horizontal and vertical offset
[05:29:24] [PASSED] horizontal offset (custom pitch)
[05:29:24] [PASSED] vertical offset (custom pitch)
[05:29:24] [PASSED] horizontal and vertical offset (custom pitch)
[05:29:24] ============= [PASSED] drm_test_fb_clip_offset =============
[05:29:24] =================== drm_test_fb_memcpy ====================
[05:29:24] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:29:24] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:29:24] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:29:24] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:29:24] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:29:24] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:29:24] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:29:24] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:29:24] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:29:24] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:29:24] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:29:24] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:29:24] =============== [PASSED] drm_test_fb_memcpy ================
[05:29:24] ============= [PASSED] drm_format_helper_test ==============
[05:29:24] ================= drm_format (18 subtests) =================
[05:29:24] [PASSED] drm_test_format_block_width_invalid
[05:29:24] [PASSED] drm_test_format_block_width_one_plane
[05:29:24] [PASSED] drm_test_format_block_width_two_plane
[05:29:24] [PASSED] drm_test_format_block_width_three_plane
[05:29:24] [PASSED] drm_test_format_block_width_tiled
[05:29:24] [PASSED] drm_test_format_block_height_invalid
[05:29:24] [PASSED] drm_test_format_block_height_one_plane
[05:29:24] [PASSED] drm_test_format_block_height_two_plane
[05:29:24] [PASSED] drm_test_format_block_height_three_plane
[05:29:24] [PASSED] drm_test_format_block_height_tiled
[05:29:24] [PASSED] drm_test_format_min_pitch_invalid
[05:29:24] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:29:24] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:29:24] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:29:24] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:29:24] [PASSED] drm_test_format_min_pitch_two_plane
[05:29:24] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:29:24] [PASSED] drm_test_format_min_pitch_tiled
[05:29:24] =================== [PASSED] drm_format ====================
[05:29:24] ============== drm_framebuffer (10 subtests) ===============
[05:29:24] ========== drm_test_framebuffer_check_src_coords ==========
[05:29:24] [PASSED] Success: source fits into fb
[05:29:24] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:29:24] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:29:24] [PASSED] Fail: overflowing fb with source width
[05:29:24] [PASSED] Fail: overflowing fb with source height
[05:29:24] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:29:24] [PASSED] drm_test_framebuffer_cleanup
[05:29:24] =============== drm_test_framebuffer_create ===============
[05:29:24] [PASSED] ABGR8888 normal sizes
[05:29:24] [PASSED] ABGR8888 max sizes
[05:29:24] [PASSED] ABGR8888 pitch greater than min required
[05:29:24] [PASSED] ABGR8888 pitch less than min required
[05:29:24] [PASSED] ABGR8888 Invalid width
[05:29:24] [PASSED] ABGR8888 Invalid buffer handle
[05:29:24] [PASSED] No pixel format
[05:29:24] [PASSED] ABGR8888 Width 0
[05:29:24] [PASSED] ABGR8888 Height 0
[05:29:24] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:29:24] [PASSED] ABGR8888 Large buffer offset
[05:29:24] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:29:24] [PASSED] ABGR8888 Invalid flag
[05:29:24] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:29:24] [PASSED] ABGR8888 Valid buffer modifier
[05:29:24] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:29:24] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:29:24] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:29:24] [PASSED] NV12 Normal sizes
[05:29:24] [PASSED] NV12 Max sizes
[05:29:24] [PASSED] NV12 Invalid pitch
[05:29:24] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:29:24] [PASSED] NV12 different modifier per-plane
[05:29:24] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:29:24] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:29:24] [PASSED] NV12 Modifier for inexistent plane
[05:29:24] [PASSED] NV12 Handle for inexistent plane
[05:29:24] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:29:24] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:29:24] [PASSED] YVU420 Normal sizes
[05:29:24] [PASSED] YVU420 Max sizes
[05:29:24] [PASSED] YVU420 Invalid pitch
[05:29:24] [PASSED] YVU420 Different pitches
[05:29:24] [PASSED] YVU420 Different buffer offsets/pitches
[05:29:24] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:29:24] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:29:24] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:29:24] [PASSED] YVU420 Valid modifier
[05:29:24] [PASSED] YVU420 Different modifiers per plane
[05:29:24] [PASSED] YVU420 Modifier for inexistent plane
[05:29:24] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:29:24] [PASSED] X0L2 Normal sizes
[05:29:24] [PASSED] X0L2 Max sizes
[05:29:24] [PASSED] X0L2 Invalid pitch
[05:29:24] [PASSED] X0L2 Pitch greater than minimum required
[05:29:24] [PASSED] X0L2 Handle for inexistent plane
[05:29:24] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:29:24] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:29:24] [PASSED] X0L2 Valid modifier
[05:29:24] [PASSED] X0L2 Modifier for inexistent plane
[05:29:24] =========== [PASSED] drm_test_framebuffer_create ===========
[05:29:24] [PASSED] drm_test_framebuffer_free
[05:29:24] [PASSED] drm_test_framebuffer_init
[05:29:24] [PASSED] drm_test_framebuffer_init_bad_format
[05:29:24] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:29:24] [PASSED] drm_test_framebuffer_lookup
[05:29:24] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:29:24] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:29:24] ================= [PASSED] drm_framebuffer =================
[05:29:24] ================ drm_gem_shmem (8 subtests) ================
[05:29:24] [PASSED] drm_gem_shmem_test_obj_create
[05:29:24] [PASSED] drm_gem_shmem_test_obj_create_private
[05:29:24] [PASSED] drm_gem_shmem_test_pin_pages
[05:29:24] [PASSED] drm_gem_shmem_test_vmap
[05:29:24] [PASSED] drm_gem_shmem_test_get_sg_table
[05:29:24] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:29:24] [PASSED] drm_gem_shmem_test_madvise
[05:29:24] [PASSED] drm_gem_shmem_test_purge
[05:29:24] ================== [PASSED] drm_gem_shmem ==================
[05:29:24] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:29:24] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[05:29:24] [PASSED] Automatic
[05:29:24] [PASSED] Full
[05:29:24] [PASSED] Limited 16:235
[05:29:24] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:29:24] [PASSED] drm_test_check_disable_connector
[05:29:24] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:29:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[05:29:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[05:29:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[05:29:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[05:29:24] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[05:29:24] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:29:24] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:29:24] [PASSED] drm_test_check_output_bpc_dvi
[05:29:24] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:29:24] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:29:24] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:29:24] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:29:24] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:29:24] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:29:24] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:29:24] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:29:24] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:29:24] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:29:24] [PASSED] drm_test_check_broadcast_rgb_value
[05:29:24] [PASSED] drm_test_check_bpc_8_value
[05:29:24] [PASSED] drm_test_check_bpc_10_value
[05:29:24] [PASSED] drm_test_check_bpc_12_value
[05:29:24] [PASSED] drm_test_check_format_value
[05:29:24] [PASSED] drm_test_check_tmds_char_value
[05:29:24] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:29:24] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[05:29:24] [PASSED] drm_test_check_mode_valid
[05:29:24] [PASSED] drm_test_check_mode_valid_reject
[05:29:24] [PASSED] drm_test_check_mode_valid_reject_rate
[05:29:24] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:29:24] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:29:24] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[05:29:24] [PASSED] drm_test_check_infoframes
[05:29:24] [PASSED] drm_test_check_reject_avi_infoframe
[05:29:24] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[05:29:24] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[05:29:24] [PASSED] drm_test_check_reject_audio_infoframe
[05:29:24] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[05:29:24] ================= drm_managed (2 subtests) =================
[05:29:24] [PASSED] drm_test_managed_release_action
[05:29:24] [PASSED] drm_test_managed_run_action
[05:29:24] =================== [PASSED] drm_managed ===================
[05:29:24] =================== drm_mm (6 subtests) ====================
[05:29:24] [PASSED] drm_test_mm_init
[05:29:24] [PASSED] drm_test_mm_debug
[05:29:24] [PASSED] drm_test_mm_align32
[05:29:24] [PASSED] drm_test_mm_align64
[05:29:24] [PASSED] drm_test_mm_lowest
[05:29:24] [PASSED] drm_test_mm_highest
[05:29:24] ===================== [PASSED] drm_mm ======================
[05:29:24] ============= drm_modes_analog_tv (5 subtests) =============
[05:29:24] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:29:24] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:29:24] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:29:24] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:29:24] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:29:24] =============== [PASSED] drm_modes_analog_tv ===============
[05:29:24] ============== drm_plane_helper (2 subtests) ===============
[05:29:24] =============== drm_test_check_plane_state ================
[05:29:24] [PASSED] clipping_simple
[05:29:24] [PASSED] clipping_rotate_reflect
[05:29:24] [PASSED] positioning_simple
[05:29:24] [PASSED] upscaling
[05:29:24] [PASSED] downscaling
[05:29:24] [PASSED] rounding1
[05:29:24] [PASSED] rounding2
[05:29:24] [PASSED] rounding3
[05:29:24] [PASSED] rounding4
[05:29:24] =========== [PASSED] drm_test_check_plane_state ============
[05:29:24] =========== drm_test_check_invalid_plane_state ============
[05:29:24] [PASSED] positioning_invalid
[05:29:24] [PASSED] upscaling_invalid
[05:29:24] [PASSED] downscaling_invalid
[05:29:24] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:29:24] ================ [PASSED] drm_plane_helper =================
[05:29:24] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:29:24] ====== drm_test_connector_helper_tv_get_modes_check =======
[05:29:24] [PASSED] None
[05:29:24] [PASSED] PAL
[05:29:24] [PASSED] NTSC
[05:29:24] [PASSED] Both, NTSC Default
[05:29:24] [PASSED] Both, PAL Default
[05:29:24] [PASSED] Both, NTSC Default, with PAL on command-line
[05:29:24] [PASSED] Both, PAL Default, with NTSC on command-line
[05:29:24] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:29:24] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:29:24] ================== drm_rect (9 subtests) ===================
[05:29:24] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:29:24] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:29:24] [PASSED] drm_test_rect_clip_scaled_clipped
[05:29:24] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:29:24] ================= drm_test_rect_intersect =================
[05:29:24] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:29:24] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:29:24] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:29:24] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:29:24] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:29:24] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:29:24] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:29:24] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:29:24] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:29:24] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:29:24] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:29:24] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:29:24] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:29:24] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[05:29:24] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[05:29:24] ============= [PASSED] drm_test_rect_intersect =============
[05:29:24] ================ drm_test_rect_calc_hscale ================
[05:29:24] [PASSED] normal use
[05:29:24] [PASSED] out of max range
[05:29:24] [PASSED] out of min range
[05:29:24] [PASSED] zero dst
[05:29:24] [PASSED] negative src
[05:29:24] [PASSED] negative dst
[05:29:24] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:29:24] ================ drm_test_rect_calc_vscale ================
[05:29:24] [PASSED] normal use
[05:29:24] [PASSED] out of max range
[05:29:24] [PASSED] out of min range
[05:29:24] [PASSED] zero dst
[05:29:24] [PASSED] negative src
[05:29:24] [PASSED] negative dst
[05:29:24] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:29:24] ================== drm_test_rect_rotate ===================
[05:29:24] [PASSED] reflect-x
[05:29:24] [PASSED] reflect-y
[05:29:24] [PASSED] rotate-0
[05:29:24] [PASSED] rotate-90
[05:29:24] [PASSED] rotate-180
[05:29:24] [PASSED] rotate-270
[05:29:24] ============== [PASSED] drm_test_rect_rotate ===============
[05:29:24] ================ drm_test_rect_rotate_inv =================
[05:29:24] [PASSED] reflect-x
[05:29:24] [PASSED] reflect-y
[05:29:24] [PASSED] rotate-0
[05:29:24] [PASSED] rotate-90
[05:29:24] [PASSED] rotate-180
[05:29:24] [PASSED] rotate-270
[05:29:24] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:29:24] ==================== [PASSED] drm_rect =====================
[05:29:24] ============ drm_sysfb_modeset_test (1 subtest) ============
[05:29:24] ============ drm_test_sysfb_build_fourcc_list =============
[05:29:24] [PASSED] no native formats
[05:29:24] [PASSED] XRGB8888 as native format
[05:29:24] [PASSED] remove duplicates
[05:29:24] [PASSED] convert alpha formats
[05:29:24] [PASSED] random formats
[05:29:24] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[05:29:24] ============= [PASSED] drm_sysfb_modeset_test ==============
[05:29:24] ================== drm_fixp (2 subtests) ===================
[05:29:24] [PASSED] drm_test_int2fixp
[05:29:24] [PASSED] drm_test_sm2fixp
[05:29:24] ==================== [PASSED] drm_fixp =====================
[05:29:24] ============================================================
[05:29:24] Testing complete. Ran 621 tests: passed: 621
[05:29:24] Elapsed time: 26.531s total, 1.745s configuring, 24.618s building, 0.133s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:29:24] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:29:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:29:36] Starting KUnit Kernel (1/1)...
[05:29:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:29:36] ================= ttm_device (5 subtests) ==================
[05:29:36] [PASSED] ttm_device_init_basic
[05:29:36] [PASSED] ttm_device_init_multiple
[05:29:36] [PASSED] ttm_device_fini_basic
[05:29:36] [PASSED] ttm_device_init_no_vma_man
[05:29:36] ================== ttm_device_init_pools ==================
[05:29:36] [PASSED] No DMA allocations, no DMA32 required
[05:29:36] [PASSED] DMA allocations, DMA32 required
[05:29:36] [PASSED] No DMA allocations, DMA32 required
[05:29:36] [PASSED] DMA allocations, no DMA32 required
[05:29:36] ============== [PASSED] ttm_device_init_pools ==============
[05:29:36] =================== [PASSED] ttm_device ====================
[05:29:36] ================== ttm_pool (8 subtests) ===================
[05:29:36] ================== ttm_pool_alloc_basic ===================
[05:29:36] [PASSED] One page
[05:29:36] [PASSED] More than one page
[05:29:36] [PASSED] Above the allocation limit
[05:29:36] [PASSED] One page, with coherent DMA mappings enabled
[05:29:36] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:29:36] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:29:36] ============== ttm_pool_alloc_basic_dma_addr ==============
[05:29:36] [PASSED] One page
[05:29:36] [PASSED] More than one page
[05:29:36] [PASSED] Above the allocation limit
[05:29:36] [PASSED] One page, with coherent DMA mappings enabled
[05:29:36] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:29:36] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:29:36] [PASSED] ttm_pool_alloc_order_caching_match
[05:29:36] [PASSED] ttm_pool_alloc_caching_mismatch
[05:29:36] [PASSED] ttm_pool_alloc_order_mismatch
[05:29:36] [PASSED] ttm_pool_free_dma_alloc
[05:29:36] [PASSED] ttm_pool_free_no_dma_alloc
[05:29:36] [PASSED] ttm_pool_fini_basic
[05:29:36] ==================== [PASSED] ttm_pool =====================
[05:29:36] ================ ttm_resource (8 subtests) =================
[05:29:36] ================= ttm_resource_init_basic =================
[05:29:36] [PASSED] Init resource in TTM_PL_SYSTEM
[05:29:36] [PASSED] Init resource in TTM_PL_VRAM
[05:29:36] [PASSED] Init resource in a private placement
[05:29:36] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:29:36] ============= [PASSED] ttm_resource_init_basic =============
[05:29:36] [PASSED] ttm_resource_init_pinned
[05:29:36] [PASSED] ttm_resource_fini_basic
[05:29:36] [PASSED] ttm_resource_manager_init_basic
[05:29:36] [PASSED] ttm_resource_manager_usage_basic
[05:29:36] [PASSED] ttm_resource_manager_set_used_basic
[05:29:36] [PASSED] ttm_sys_man_alloc_basic
[05:29:36] [PASSED] ttm_sys_man_free_basic
[05:29:36] ================== [PASSED] ttm_resource ===================
[05:29:36] =================== ttm_tt (15 subtests) ===================
[05:29:36] ==================== ttm_tt_init_basic ====================
[05:29:36] [PASSED] Page-aligned size
[05:29:36] [PASSED] Extra pages requested
[05:29:36] ================ [PASSED] ttm_tt_init_basic ================
[05:29:36] [PASSED] ttm_tt_init_misaligned
[05:29:36] [PASSED] ttm_tt_fini_basic
[05:29:36] [PASSED] ttm_tt_fini_sg
[05:29:36] [PASSED] ttm_tt_fini_shmem
[05:29:36] [PASSED] ttm_tt_create_basic
[05:29:36] [PASSED] ttm_tt_create_invalid_bo_type
[05:29:36] [PASSED] ttm_tt_create_ttm_exists
[05:29:36] [PASSED] ttm_tt_create_failed
[05:29:36] [PASSED] ttm_tt_destroy_basic
[05:29:36] [PASSED] ttm_tt_populate_null_ttm
[05:29:36] [PASSED] ttm_tt_populate_populated_ttm
[05:29:36] [PASSED] ttm_tt_unpopulate_basic
[05:29:36] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:29:36] [PASSED] ttm_tt_swapin_basic
[05:29:36] ===================== [PASSED] ttm_tt ======================
[05:29:36] =================== ttm_bo (14 subtests) ===================
[05:29:36] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[05:29:36] [PASSED] Cannot be interrupted and sleeps
[05:29:36] [PASSED] Cannot be interrupted, locks straight away
[05:29:36] [PASSED] Can be interrupted, sleeps
[05:29:36] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:29:36] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:29:36] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:29:36] [PASSED] ttm_bo_reserve_double_resv
[05:29:36] [PASSED] ttm_bo_reserve_interrupted
[05:29:36] [PASSED] ttm_bo_reserve_deadlock
[05:29:36] [PASSED] ttm_bo_unreserve_basic
[05:29:36] [PASSED] ttm_bo_unreserve_pinned
[05:29:36] [PASSED] ttm_bo_unreserve_bulk
[05:29:36] [PASSED] ttm_bo_fini_basic
[05:29:36] [PASSED] ttm_bo_fini_shared_resv
[05:29:36] [PASSED] ttm_bo_pin_basic
[05:29:36] [PASSED] ttm_bo_pin_unpin_resource
[05:29:36] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:29:36] ===================== [PASSED] ttm_bo ======================
[05:29:36] ============== ttm_bo_validate (22 subtests) ===============
[05:29:36] ============== ttm_bo_init_reserved_sys_man ===============
[05:29:36] [PASSED] Buffer object for userspace
[05:29:36] [PASSED] Kernel buffer object
[05:29:36] [PASSED] Shared buffer object
[05:29:36] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:29:36] ============== ttm_bo_init_reserved_mock_man ==============
[05:29:36] [PASSED] Buffer object for userspace
[05:29:36] [PASSED] Kernel buffer object
[05:29:36] [PASSED] Shared buffer object
[05:29:36] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:29:36] [PASSED] ttm_bo_init_reserved_resv
[05:29:36] ================== ttm_bo_validate_basic ==================
[05:29:36] [PASSED] Buffer object for userspace
[05:29:36] [PASSED] Kernel buffer object
[05:29:36] [PASSED] Shared buffer object
[05:29:36] ============== [PASSED] ttm_bo_validate_basic ==============
[05:29:36] [PASSED] ttm_bo_validate_invalid_placement
[05:29:36] ============= ttm_bo_validate_same_placement ==============
[05:29:36] [PASSED] System manager
[05:29:36] [PASSED] VRAM manager
[05:29:36] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:29:36] [PASSED] ttm_bo_validate_failed_alloc
[05:29:36] [PASSED] ttm_bo_validate_pinned
[05:29:36] [PASSED] ttm_bo_validate_busy_placement
[05:29:36] ================ ttm_bo_validate_multihop =================
[05:29:36] [PASSED] Buffer object for userspace
[05:29:36] [PASSED] Kernel buffer object
[05:29:36] [PASSED] Shared buffer object
[05:29:36] ============ [PASSED] ttm_bo_validate_multihop =============
[05:29:36] ========== ttm_bo_validate_no_placement_signaled ==========
[05:29:36] [PASSED] Buffer object in system domain, no page vector
[05:29:36] [PASSED] Buffer object in system domain with an existing page vector
[05:29:36] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:29:36] ======== ttm_bo_validate_no_placement_not_signaled ========
[05:29:36] [PASSED] Buffer object for userspace
[05:29:36] [PASSED] Kernel buffer object
[05:29:36] [PASSED] Shared buffer object
[05:29:36] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:29:36] [PASSED] ttm_bo_validate_move_fence_signaled
[05:29:36] ========= ttm_bo_validate_move_fence_not_signaled =========
[05:29:36] [PASSED] Waits for GPU
[05:29:36] [PASSED] Tries to lock straight away
[05:29:36] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:29:36] [PASSED] ttm_bo_validate_swapout
[05:29:36] [PASSED] ttm_bo_validate_happy_evict
[05:29:36] [PASSED] ttm_bo_validate_all_pinned_evict
[05:29:36] [PASSED] ttm_bo_validate_allowed_only_evict
[05:29:36] [PASSED] ttm_bo_validate_deleted_evict
[05:29:36] [PASSED] ttm_bo_validate_busy_domain_evict
[05:29:36] [PASSED] ttm_bo_validate_evict_gutting
[05:29:36] [PASSED] ttm_bo_validate_recrusive_evict
[05:29:36] ================= [PASSED] ttm_bo_validate =================
[05:29:36] ============================================================
[05:29:36] Testing complete. Ran 102 tests: passed: 102
[05:29:36] Elapsed time: 11.806s total, 1.805s configuring, 9.786s building, 0.180s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 26+ messages in thread* ✓ Xe.CI.BAT: success for Introduce Xe Uncorrectable Error Handling (rev9)
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (18 preceding siblings ...)
2026-06-09 5:29 ` ✓ CI.KUnit: success " Patchwork
@ 2026-06-09 6:07 ` Patchwork
2026-06-09 14:53 ` ✗ Xe.CI.FULL: failure " Patchwork
20 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2026-06-09 6:07 UTC (permalink / raw)
To: Tauro, Riana; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 918 bytes --]
== Series Details ==
Series: Introduce Xe Uncorrectable Error Handling (rev9)
URL : https://patchwork.freedesktop.org/series/160482/
State : success
== Summary ==
CI Bug Log - changes from xe-5222-cc6ecad1583df42f635269218c08a63e79218177_BAT -> xe-pw-160482v9_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8953 -> IGT_8954
* Linux: xe-5222-cc6ecad1583df42f635269218c08a63e79218177 -> xe-pw-160482v9
IGT_8953: 8953
IGT_8954: 8954
xe-5222-cc6ecad1583df42f635269218c08a63e79218177: cc6ecad1583df42f635269218c08a63e79218177
xe-pw-160482v9: 160482v9
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/index.html
[-- Attachment #2: Type: text/html, Size: 1480 bytes --]
^ permalink raw reply [flat|nested] 26+ messages in thread* ✗ Xe.CI.FULL: failure for Introduce Xe Uncorrectable Error Handling (rev9)
2026-06-08 8:47 [PATCH v8 00/15] Introduce Xe Uncorrectable Error Handling Riana Tauro
` (19 preceding siblings ...)
2026-06-09 6:07 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-09 14:53 ` Patchwork
20 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2026-06-09 14:53 UTC (permalink / raw)
To: Tauro, Riana; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 20171 bytes --]
== Series Details ==
Series: Introduce Xe Uncorrectable Error Handling (rev9)
URL : https://patchwork.freedesktop.org/series/160482/
State : failure
== Summary ==
CI Bug Log - changes from xe-5222-cc6ecad1583df42f635269218c08a63e79218177_FULL -> xe-pw-160482v9_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-160482v9_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-160482v9_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-160482v9_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-bmg: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-9/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-10/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
Known issues
------------
Here are the changes found in xe-pw-160482v9_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#1407])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-1/igt@kms_big_fb@linear-16bpp-rotate-90.html
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#2327])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-6/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2887])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-9/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs.html
* igt@kms_cursor_crc@cursor-offscreen-32x10:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2320])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-9/igt@kms_cursor_crc@cursor-offscreen-32x10.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [PASS][7] -> [FAIL][8] ([Intel XE#7571])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-10/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#1421])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-3/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [PASS][10] -> [FAIL][11] ([Intel XE#301] / [Intel XE#3149])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [PASS][12] -> [FAIL][13] ([Intel XE#301]) +1 other test fail
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#6312] / [Intel XE#651])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2311]) +4 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#4141])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#656] / [Intel XE#7905])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2313]) +4 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#7061])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#7905]) +4 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-5/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][21] -> [SKIP][22] ([Intel XE#7915]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-1/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-7/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#6911] / [Intel XE#7378])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-9/igt@kms_joiner@basic-ultra-joiner.html
- shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#6900] / [Intel XE#7362])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-2/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#7283])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-10/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html
* igt@kms_plane_multiple@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#5020] / [Intel XE#7348])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-3/igt@kms_plane_multiple@tiling-y.html
* igt@kms_sharpness_filter@filter-scaler-downscale:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#6503])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-10/igt@kms_sharpness_filter@filter-scaler-downscale.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [PASS][28] -> [INCOMPLETE][29] ([Intel XE#6321])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_evict@evict-small-external-multi-queue-cm:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#7140])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-4/igt@xe_evict@evict-small-external-multi-queue-cm.html
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#6540] / [Intel XE#688])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-7/igt@xe_evict@evict-small-external-multi-queue-cm.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2322] / [Intel XE#7372])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#1392])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-7/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-imm:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#7136])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-8/igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-imm.html
* igt@xe_exec_multi_queue@many-queues-priority-smem:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#6874])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-1/igt@xe_exec_multi_queue@many-queues-priority-smem.html
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#6874])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-1/igt@xe_exec_multi_queue@many-queues-priority-smem.html
* igt@xe_sriov_flr@flr-twice:
- shard-bmg: [PASS][37] -> [FAIL][38] ([Intel XE#6569])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-4/igt@xe_sriov_flr@flr-twice.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-7/igt@xe_sriov_flr@flr-twice.html
* igt@xe_sriov_vfio@bind-unbind-vfs@numvfs-16:
- shard-bmg: [PASS][39] -> [FAIL][40] ([Intel XE#7992]) +24 other tests fail
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-6/igt@xe_sriov_vfio@bind-unbind-vfs@numvfs-16.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-10/igt@xe_sriov_vfio@bind-unbind-vfs@numvfs-16.html
#### Possible fixes ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [FAIL][41] ([Intel XE#7445]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-1/igt@intel_hwmon@hwmon-write.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-5/igt@intel_hwmon@hwmon-write.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [FAIL][43] ([Intel XE#301]) -> [PASS][44] +1 other test pass
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][45] ([Intel XE#1503]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [SKIP][47] ([Intel XE#7922]) -> [PASS][48] +1 other test pass
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-1/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-7/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [SKIP][49] ([Intel XE#7915]) -> [PASS][50] +1 other test pass
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-6/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-9/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-bmg: [SKIP][51] ([Intel XE#2685] / [Intel XE#3307]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-6/igt@kms_plane_scaling@intel-max-src-size.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-6/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_pm_dc@dc5-psr:
- shard-lnl: [FAIL][53] ([Intel XE#7340]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-lnl-3/igt@kms_pm_dc@dc5-psr.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-3/igt@kms_pm_dc@dc5-psr.html
* igt@kms_vblank@wait-forked-hang:
- shard-bmg: [DMESG-WARN][55] ([Intel XE#7774]) -> [PASS][56] +1 other test pass
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-5/igt@kms_vblank@wait-forked-hang.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-9/igt@kms_vblank@wait-forked-hang.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [FAIL][57] ([Intel XE#2142]) -> [PASS][58] +1 other test pass
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-8/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-lnl: [ABORT][59] ([Intel XE#8007]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-lnl-3/igt@xe_wedged@wedged-mode-toggle.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-1/igt@xe_wedged@wedged-mode-toggle.html
#### Warnings ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][61] ([Intel XE#301]) -> [FAIL][62] ([Intel XE#301] / [Intel XE#3149])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][63] ([Intel XE#3544] / [Intel XE#7916]) -> [SKIP][64] ([Intel XE#3544] / [Intel XE#7915] / [Intel XE#7916])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-10/igt@kms_hdr@brightness-with-hdr.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][65] ([Intel XE#7916]) -> [SKIP][66] ([Intel XE#7915]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5222-cc6ecad1583df42f635269218c08a63e79218177/shard-bmg-10/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/shard-bmg-7/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2685]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2685
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3307
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
[Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
[Intel XE#7362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7362
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
[Intel XE#7445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7445
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7916]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7916
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
Build changes
-------------
* IGT: IGT_8953 -> IGT_8954
* Linux: xe-5222-cc6ecad1583df42f635269218c08a63e79218177 -> xe-pw-160482v9
IGT_8953: 8953
IGT_8954: 8954
xe-5222-cc6ecad1583df42f635269218c08a63e79218177: cc6ecad1583df42f635269218c08a63e79218177
xe-pw-160482v9: 160482v9
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v9/index.html
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