Re: [External] [PATCH v5 4/8] riscv_cbqri: Add capacity controller probe and allocation device ops

From: Drew Fustini <fustini@kernel.org>
To: yunhui cui <cuiyunhui@bytedance.com>
Cc: "Adrien Ricciardi" <aricciardi@baylibre.com>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Atish Kumar Patra" <atishp@rivosinc.com>,
	"Atish Patra" <atish.patra@linux.dev>,
	"Babu Moger" <babu.moger@amd.com>,
	"Ben Horgan" <ben.horgan@arm.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Chen Pei" <cp0613@linux.alibaba.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"Dave Martin" <Dave.Martin@arm.com>,
	"Fenghua Yu" <fenghuay@nvidia.com>,
	"Gong Shuai" <gong.shuai@sanechips.com.cn>,
	"Gong Shuai" <gsh517@gmail.com>,
	guo.wenjia23@zte.com.cn, "James Morse" <james.morse@arm.com>,
	"Kornel Dulęba" <mindal@semihalf.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	liu.qingtao2@zte.com.cn,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
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	"Sebastian Andrzej Siewior" <bigeasy@linutronix.de>,
	"Tony Luck" <tony.luck@intel.com>,
	"Vasudevan Srinivasan" <vasu@rivosinc.com>,
	"Ved Shanbhogue" <ved@rivosinc.com>,
	"Weiwei Li" <liwei1518@gmail.com>,
	"Zhanpeng Zhang" <zhangzhanpeng.jasper@bytedance.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	x86@kernel.org, devicetree@vger.kernel.org,
	linux-rt-devel@lists.linux.dev, linux-doc@vger.kernel.org
Subject: Re: [External] [PATCH v5 4/8] riscv_cbqri: Add capacity controller probe and allocation device ops
Date: Mon, 20 Jul 2026 10:10:05 -0700	[thread overview]
Message-ID: <al5WbTyTVYye70LW@thelio> (raw)
In-Reply-To: <CAEEQ3w=kVgMnQ8mu=X+d3xYbANT6dNfv7w71BUwmYxP6qcUhgg@mail.gmail.com>

On Mon, Jul 20, 2026 at 05:56:29PM +0800, yunhui cui wrote:
> Hi Drew,
> 
> On Wed, Jul 15, 2026 at 8:24 AM Drew Fustini <fustini@kernel.org> wrote:
> >
> > Add support for the RISC-V CBQRI capacity controller. A platform driver
> > passes a cbqri_controller_info descriptor together with the cache level
> > to riscv_cbqri_register_cc_dt(), which probes the controller and adds it
> > to the controller list.
> >
> > Assisted-by: Claude:claude-opus-4-8
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> >  MAINTAINERS                      |   3 +
> >  drivers/resctrl/Kconfig          |  13 +
> >  drivers/resctrl/Makefile         |   3 +
> >  drivers/resctrl/cbqri_devices.c  | 563 +++++++++++++++++++++++++++++++++++++++
> >  drivers/resctrl/cbqri_internal.h | 122 +++++++++
> >  include/linux/riscv_cbqri.h      |  45 ++++
> >  6 files changed, 749 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index a0a4b41f02c5..064a6ae2823e 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -23365,6 +23365,9 @@ L:      linux-riscv@lists.infradead.org
> >  S:     Supported
> >  F:     arch/riscv/include/asm/qos.h
> >  F:     arch/riscv/kernel/qos.c
> > +F:     drivers/resctrl/cbqri_devices.c
> > +F:     drivers/resctrl/cbqri_internal.h
> > +F:     include/linux/riscv_cbqri.h
> >
> >  RISC-V RPMI AND MPXY DRIVERS
> >  M:     Rahul Pathak <rahul@summations.net>
> > diff --git a/drivers/resctrl/Kconfig b/drivers/resctrl/Kconfig
> > index 672abea3b03c..92b9c82cf9f3 100644
> > --- a/drivers/resctrl/Kconfig
> > +++ b/drivers/resctrl/Kconfig
> > @@ -29,3 +29,16 @@ config ARM64_MPAM_RESCTRL_FS
> >         default y if ARM64_MPAM_DRIVER && RESCTRL_FS
> >         select RESCTRL_RMID_DEPENDS_ON_CLOSID
> >         select RESCTRL_ASSIGN_FIXED
> > +
> > +menuconfig RISCV_CBQRI
> > +       bool "RISC-V CBQRI support"
> > +       depends on RISCV && RISCV_ISA_SSQOSID
> > +       help
> > +         Capacity and Bandwidth QoS Register Interface (CBQRI) support for
> > +         RISC-V cache QoS resources. CBQRI exposes cache capacity
> > +         allocation through the resctrl filesystem at /sys/fs/resctrl when
> > +         RESCTRL_FS is also enabled.
> > +
> > +if RISCV_CBQRI
> > +
> > +endif
> 
> Should this empty if/endif block go in patch [8/8] instead?

Good point. I'll move it to patch 8.

Thanks,
Drew