From: Nicolin Chen <nicolinc@nvidia.com>
To: Pranjal Shrivastava <praan@google.com>
Cc: Will Deacon <will@kernel.org>, Jason Gunthorpe <jgg@nvidia.com>,
"Kevin Tian" <kevin.tian@intel.com>,
Lu Baolu <baolu.lu@linux.intel.com>,
"Robin Murphy" <robin.murphy@arm.com>, <joro@8bytes.org>,
David Woodhouse <dwmw2@infradead.org>,
<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/5] iommu/arm-smmu-v3-iommufd: Reject unsupported bits in invalidation commands
Date: Tue, 14 Jul 2026 11:49:50 -0700 [thread overview]
Message-ID: <alaEzoL6uMhtMWmo@nvidia.com> (raw)
In-Reply-To: <alYC3bNbXY9l0eVn@google.com>
On Tue, Jul 14, 2026 at 09:35:25AM +0000, Pranjal Shrivastava wrote:
> Regarding this series, since we are formally adding support for the DS
> bit in this series for range invalidations (preferably as a separate
> patch as mentioned above). We should also update the uAPI doc for struct
> iommu_hw_info_arm_smmuv3 in include/uapi/linux/iommufd.h? Like:
I sent v4 that should addressed all your comments here.
Thanks
Nicolin
next prev parent reply other threads:[~2026-07-14 18:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 19:44 [PATCH v3 0/5] iommufd: Iterate the cache invalidation array in the core Nicolin Chen
2026-07-08 19:44 ` [PATCH v3 1/5] iommu/arm-smmu-v3-iommufd: Reject unsupported bits in invalidation commands Nicolin Chen
2026-07-14 9:35 ` Pranjal Shrivastava
2026-07-14 12:14 ` Jason Gunthorpe
2026-07-14 13:00 ` Pranjal Shrivastava
2026-07-14 18:49 ` Nicolin Chen [this message]
2026-07-08 19:44 ` [PATCH v3 2/5] iommufd: Iterate the cache invalidation array in the core Nicolin Chen
2026-07-13 5:58 ` Baolu Lu
2026-07-14 12:29 ` Pranjal Shrivastava
2026-07-08 19:44 ` [PATCH v3 3/5] iommufd/selftest: Convert cache invalidation mocks to the core array loop Nicolin Chen
2026-07-14 13:06 ` Pranjal Shrivastava
2026-07-08 19:44 ` [PATCH v3 4/5] iommu/arm-smmu-v3-iommufd: Convert cache invalidation " Nicolin Chen
2026-07-14 13:33 ` Pranjal Shrivastava
2026-07-08 19:44 ` [PATCH v3 5/5] iommu/vt-d: Convert nested " Nicolin Chen
2026-07-13 5:58 ` Baolu Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=alaEzoL6uMhtMWmo@nvidia.com \
--to=nicolinc@nvidia.com \
--cc=baolu.lu@linux.intel.com \
--cc=dwmw2@infradead.org \
--cc=iommu@lists.linux.dev \
--cc=jgg@nvidia.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=praan@google.com \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.