[PATCH v1] arm: mediatek: add BPi-R3 Mini eMMC board support

[PATCH v1] arm: mediatek: add BPi-R3 Mini eMMC board support

[Lucien.Jheng]

Add device tree and defconfig for the Bananapi BPi-R3 Mini, an
eMMC-only variant of the BPi-R3 board built around the MT7986A SoC.

The board dtsi enables the MT7986 eMMC controller, SPI-NAND flash,
PWM, and the on-board Airoha EN8811H 2.5G PHY via mdio.

The mt7986a_bpir3_mini_emmc_defconfig enables the drivers needed for
this variant: SPI-NAND (MTD/UBI), USB xHCI, PCIe Gen3 with NVMe, the
Airoha EN8811H PHY driver, and RNG/pstore support.

Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
---
 arch/arm/dts/Makefile                     |   1 +
 arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts | 236 ++++++++++++++++++++++
 configs/mt7986a_bpir3_mini_emmc_defconfig | 139 +++++++++++++
 3 files changed, 376 insertions(+)
 create mode 100644 arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
 create mode 100644 configs/mt7986a_bpir3_mini_emmc_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1b533721bb4..b62a4334750 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1080,6 +1080,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
 	mt7981-sd-rfb.dtb \
 	mt7986a-bpi-r3-sd.dtb \
 	mt7986a-bpi-r3-emmc.dtb \
+	mt7986a-bpi-r3-mini-emmc.dtb \
 	mt7986a-rfb.dtb \
 	mt7986b-rfb.dtb \
 	mt7986a-sd-rfb.dtb \
diff --git a/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts b/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
new file mode 100644
index 00000000000..18320b20be8
--- /dev/null
+++ b/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/dts-v1/;
+#include "mt7986.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	model = "Bananapi BPi-R3 Mini";
+	compatible = "mediatek,mt7986", "mediatek,mt7986-rfb";
+
+	chosen {
+		stdout-path = &uart0;
+		tick-timer = &timer0;
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x40000000 0x80000000>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		button-reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		status_led: led-0 {
+			label = "green:status";
+			gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
+		};
+
+		led-1 {
+			label = "blue:wlan2g";
+			gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
+		};
+
+		led-2 {
+			label = "blue:wlan5g";
+			gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	reg_1p8v: regulator-1p8v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&eth {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio_pins>;
+
+	mediatek,gmac-id = <0>;
+	phy-mode = "2500base-x";
+	phy-handle = <&phy14>;
+
+	phy14: eth-phy@14 {
+		compatible = "ethernet-phy-id03a2.a411";
+		reg = <14>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&en8811_pwr_a>;
+		airoha,pnswap-rx;
+
+		reset-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <10000>;
+		reset-deassert-us = <20000>;
+	};
+
+	/*phy15: eth-phy@15 {
+		compatible = "ethernet-phy-id03a2.a411";
+		reg = <15>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&en8811_pwr_b>;
+		airoha,pnswap-rx;
+
+		reset-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <10000>;
+		reset-deassert-us = <20000>;
+	};*/
+};
+
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins_default>;
+	bus-width = <8>;
+	max-frequency = <200000000>;
+	cap-mmc-highspeed;
+	cap-mmc-hw-reset;
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_1p8v>;
+	non-removable;
+	status = "okay";
+};
+
+&pio {
+	en8811_pwr_a: en8811-pwr-a {
+		pins = "GPIO_11";
+		drive-strength = <MTK_DRIVE_8mA>;
+		bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+		output-low;
+	};
+
+	en8811_pwr_b: en8811-pwr-b {
+		pins = "GPIO_12";
+		drive-strength = <MTK_DRIVE_8mA>;
+		bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+		output-low;
+	};
+
+	mdio_pins: mdio-pins {
+		mux {
+			function = "eth";
+			groups = "mdc_mdio";
+		};
+	};
+
+	mmc0_pins_default: mmc0default {
+		mux {
+			function = "flash";
+			groups =  "emmc_51";
+		};
+
+		conf-cmd-dat {
+			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+			input-enable;
+			drive-strength = <MTK_DRIVE_4mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+		};
+
+		conf-clk {
+			pins = "EMMC_CK";
+			drive-strength = <MTK_DRIVE_6mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+		};
+
+		conf-dsl {
+			pins = "EMMC_DSL";
+			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+		};
+
+		conf-rst {
+			pins = "EMMC_RSTB";
+			drive-strength = <MTK_DRIVE_4mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+		};
+	};
+
+	spi_flash_pins: spi0-pins-func-1 {
+		mux {
+			function = "flash";
+			groups = "spi0", "spi0_wp_hold";
+		};
+
+		conf-pu {
+			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+		};
+
+		conf-pd {
+			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+		};
+	};
+
+	pwm_pins: pwm0-pins-func-1 {
+		mux {
+			function = "pwm";
+			groups = "pwm0";
+		};
+	};
+};
+
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm_pins>;
+	status = "okay";
+};
+
+&spi0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi_flash_pins>;
+	status = "okay";
+	must_tx;
+	enhance_timing;
+	dma_ext;
+	ipm_design;
+	support_quad;
+	tick_dly = <1>;
+	sample_sel = <0>;
+
+	spi_nand@0 {
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <52000000>;
+	};
+
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&watchdog {
+	status = "disabled";
+};
diff --git a/configs/mt7986a_bpir3_mini_emmc_defconfig b/configs/mt7986a_bpir3_mini_emmc_defconfig
new file mode 100644
index 00000000000..411ad11d6a7
--- /dev/null
+++ b/configs/mt7986a_bpir3_mini_emmc_defconfig
@@ -0,0 +1,139 @@
+CONFIG_ARM=y
+CONFIG_ARM_SMCCC=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x80000
+CONFIG_ENV_OFFSET=0x300000
+CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini-emmc"
+CONFIG_TARGET_MT7986=y
+CONFIG_DEBUG_UART_BASE=0x11002000
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_SYS_LOAD_ADDR=0x46000000
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="mt7986a-bpi-r3-mini-emmc"
+CONFIG_LOGLEVEL=7
+CONFIG_LOG=y
+CONFIG_SYS_PROMPT="BPI-R3M> "
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_UNLZ4 is not set
+# CONFIG_CMD_UNZIP is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_LSBLK=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_MTK=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_MDIO=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7986=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_FAT_WRITE=y
+CONFIG_HEXDUMP=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_LMB_MAX_REGIONS=64
+
+CONFIG_AUTOBOOT=y
+#CONFIG_BOOTDELAY=2
+
+CONFIG_FIT=y
+CONFIG_ENV_USE_DEFAULT_ENV_TEXT_FILE=y
+CONFIG_ENV_DEFAULT_ENV_TEXT_FILE="uEnv_r3.txt"
+CONFIG_HUSH_PARSER=y
+
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_UBI=y
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBIFS=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTK_SPIM=y
+#CONFIG_MTK_SPI_NAND=y
+#CONFIG_MTK_SPI_NAND_MTD=y
+#CONFIG_MTK_SNOR=y
+#CONFIG_MTK_SNFI_SPI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_CMD_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_CMD_SF=y
+#CONFIG_MTD_RAW_NAND=y
+#CONFIG_CMD_NAND=y
+#CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_ENABLE_NAND_NMBM=y
+CONFIG_MTDIDS_DEFAULT="nmbm0=nmbm0"
+CONFIG_MTDPARTS_DEFAULT="nmbm0:1024k(bl2),512k(u-boot-env),2048k(factory),2048k(fip),65536k(ubi)"
+CONFIG_PHY=y
+CONFIG_PHY_MTK_TPHY=y
+CONFIG_DM_USB=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_MTK=y
+CONFIG_CMD_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_STRINGS=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+
+CONFIG_FS_LOADER=y
+CONFIG_PHY_AIROHA=y
+CONFIG_PHY_AIROHA_EN8811=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_AIROHA_FW_BUILTIN=y
+CONFIG_PHY_ETHERNET_ID=y
+
+CONFIG_PCI=y
+CONFIG_PCIE_MEDIATEK_GEN3=y
+CONFIG_CMD_PCI=y
+CONFIG_NVME_PCI=y
+CONFIG_NVME=y
+CONFIG_CMD_CACHE=y
+
+CONFIG_CMD_PSTORE=y
+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
+CONFIG_CMD_PSTORE_RECORD_SIZE=0x1000
+#CONFIG_CMD_PSTORE_CONSOLE_SIZE=0x1000
+#CONFIG_CMD_PSTORE_FTRACE_SIZE=0x0
+#CONFIG_CMD_PSTORE_PMSG_SIZE=0x1000
+
+CONFIG_DM_RNG=y
+CONFIG_RNG_MTK_V2=y
+CONFIG_CMD_RNG=y
--
2.34.1

Re: [PATCH v1] arm: mediatek: add BPi-R3 Mini eMMC board support

[Daniel Golle]

On Sun, Sep 06, 2026 at 08:07:56PM +0800, Lucien.Jheng wrote:
> Add device tree and defconfig for the Bananapi BPi-R3 Mini, an
> eMMC-only variant of the BPi-R3 board built around the MT7986A SoC.

Also the BPi-R3 mini has both, eMMC and SPI-NAND. Compared to the
BPi-R3 it only lacks the microSD slot and the SPI-NOR flash.

The tiny SMD switch to pull the bootstrap pins in order to select
a bootorder with either of the two devices having precedence is
labeled SW1 and sits next to the dual-M.2 slot.

Re: [PATCH v1] arm: mediatek: add BPi-R3 Mini eMMC board support

[Frank Wunderlich]

Hi Lucien,

it seems you try to upstream the DTS from my repo [1] (i did not do it 
because of OF_UPSTREAM discussion/requirement) only with minor cleanup 
(e.g. dropped my attempt to define regulators as such - was not working 
in my tests but imho more logical).

But it would be great if you mention me as Co-developed-By or similar.

Not sure if upstream-discussion is still valid (new downstream DTS were 
rejected there), it needed many other driver patches and some hacks at 
DT level (my last state [2]).

btw. compatible should be changed to upstream one [3]

regards Frank

[1] 
https://github.com/frank-w/u-boot/blob/2024-04-bpi-r3mini/arch/arm/dts/mt7986a-bpi-r3-mini.dts

latest version: 
https://github.com/frank-w/u-boot/blob/2026-07-bpi/arch/arm/dts/mt7986a-bpi-r3-mini.dts

[2] https://github.com/frank-w/u-boot/commits/2026-01-bpi-ofupstream/

[3] 
https://github.com/frank-w/BPI-Router-Linux/blob/7.3-rc/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-mini.dts#L21

Am 06.09.26 um 14:07 schrieb Lucien.Jheng:
> Add device tree and defconfig for the Bananapi BPi-R3 Mini, an
> eMMC-only variant of the BPi-R3 board built around the MT7986A SoC.
>
> The board dtsi enables the MT7986 eMMC controller, SPI-NAND flash,
> PWM, and the on-board Airoha EN8811H 2.5G PHY via mdio.
>
> The mt7986a_bpir3_mini_emmc_defconfig enables the drivers needed for
> this variant: SPI-NAND (MTD/UBI), USB xHCI, PCIe Gen3 with NVMe, the
> Airoha EN8811H PHY driver, and RNG/pstore support.
>
> Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
> ---
>   arch/arm/dts/Makefile                     |   1 +
>   arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts | 236 ++++++++++++++++++++++
>   configs/mt7986a_bpir3_mini_emmc_defconfig | 139 +++++++++++++
>   3 files changed, 376 insertions(+)
>   create mode 100644 arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
>   create mode 100644 configs/mt7986a_bpir3_mini_emmc_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 1b533721bb4..b62a4334750 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1080,6 +1080,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
>   	mt7981-sd-rfb.dtb \
>   	mt7986a-bpi-r3-sd.dtb \
>   	mt7986a-bpi-r3-emmc.dtb \
> +	mt7986a-bpi-r3-mini-emmc.dtb \
>   	mt7986a-rfb.dtb \
>   	mt7986b-rfb.dtb \
>   	mt7986a-sd-rfb.dtb \
> diff --git a/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts b/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
> new file mode 100644
> index 00000000000..18320b20be8
> --- /dev/null
> +++ b/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
> @@ -0,0 +1,236 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +
> +/dts-v1/;
> +#include "mt7986.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/linux-event-codes.h>
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	model = "Bananapi BPi-R3 Mini";
> +	compatible = "mediatek,mt7986", "mediatek,mt7986-rfb";
> +
> +	chosen {
> +		stdout-path = &uart0;
> +		tick-timer = &timer0;
> +	};
> +
> +	memory@40000000 {
> +		device_type = "memory";
> +		reg = <0x40000000 0x80000000>;
> +	};
> +
> +	gpio-keys {
> +		compatible = "gpio-keys";
> +
> +		button-reset {
> +			label = "reset";
> +			linux,code = <KEY_RESTART>;
> +			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
> +		};
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +
> +		status_led: led-0 {
> +			label = "green:status";
> +			gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +		led-1 {
> +			label = "blue:wlan2g";
> +			gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +		led-2 {
> +			label = "blue:wlan5g";
> +			gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
> +		};
> +	};
> +
> +	reg_1p8v: regulator-1p8v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "fixed-1.8V";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	reg_3p3v: regulator-3p3v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "fixed-3.3V";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +};
> +
> +&eth {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mdio_pins>;
> +
> +	mediatek,gmac-id = <0>;
> +	phy-mode = "2500base-x";
> +	phy-handle = <&phy14>;
> +
> +	phy14: eth-phy@14 {
> +		compatible = "ethernet-phy-id03a2.a411";
> +		reg = <14>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&en8811_pwr_a>;
> +		airoha,pnswap-rx;
> +
> +		reset-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
> +		reset-assert-us = <10000>;
> +		reset-deassert-us = <20000>;
> +	};
> +
> +	/*phy15: eth-phy@15 {
> +		compatible = "ethernet-phy-id03a2.a411";
> +		reg = <15>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&en8811_pwr_b>;
> +		airoha,pnswap-rx;
> +
> +		reset-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
> +		reset-assert-us = <10000>;
> +		reset-deassert-us = <20000>;
> +	};*/
> +};
> +
> +&mmc0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mmc0_pins_default>;
> +	bus-width = <8>;
> +	max-frequency = <200000000>;
> +	cap-mmc-highspeed;
> +	cap-mmc-hw-reset;
> +	vmmc-supply = <&reg_3p3v>;
> +	vqmmc-supply = <&reg_1p8v>;
> +	non-removable;
> +	status = "okay";
> +};
> +
> +&pio {
> +	en8811_pwr_a: en8811-pwr-a {
> +		pins = "GPIO_11";
> +		drive-strength = <MTK_DRIVE_8mA>;
> +		bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
> +		output-low;
> +	};
> +
> +	en8811_pwr_b: en8811-pwr-b {
> +		pins = "GPIO_12";
> +		drive-strength = <MTK_DRIVE_8mA>;
> +		bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
> +		output-low;
> +	};
> +
> +	mdio_pins: mdio-pins {
> +		mux {
> +			function = "eth";
> +			groups = "mdc_mdio";
> +		};
> +	};
> +
> +	mmc0_pins_default: mmc0default {
> +		mux {
> +			function = "flash";
> +			groups =  "emmc_51";
> +		};
> +
> +		conf-cmd-dat {
> +			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
> +			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
> +			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
> +			input-enable;
> +			drive-strength = <MTK_DRIVE_4mA>;
> +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
> +		};
> +
> +		conf-clk {
> +			pins = "EMMC_CK";
> +			drive-strength = <MTK_DRIVE_6mA>;
> +			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
> +		};
> +
> +		conf-dsl {
> +			pins = "EMMC_DSL";
> +			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
> +		};
> +
> +		conf-rst {
> +			pins = "EMMC_RSTB";
> +			drive-strength = <MTK_DRIVE_4mA>;
> +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
> +		};
> +	};
> +
> +	spi_flash_pins: spi0-pins-func-1 {
> +		mux {
> +			function = "flash";
> +			groups = "spi0", "spi0_wp_hold";
> +		};
> +
> +		conf-pu {
> +			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
> +			drive-strength = <MTK_DRIVE_8mA>;
> +			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
> +		};
> +
> +		conf-pd {
> +			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
> +			drive-strength = <MTK_DRIVE_8mA>;
> +			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
> +		};
> +	};
> +
> +	pwm_pins: pwm0-pins-func-1 {
> +		mux {
> +			function = "pwm";
> +			groups = "pwm0";
> +		};
> +	};
> +};
> +
> +&pwm {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pwm_pins>;
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&spi_flash_pins>;
> +	status = "okay";
> +	must_tx;
> +	enhance_timing;
> +	dma_ext;
> +	ipm_design;
> +	support_quad;
> +	tick_dly = <1>;
> +	sample_sel = <0>;
> +
> +	spi_nand@0 {
> +		compatible = "spi-nand";
> +		reg = <0>;
> +		spi-max-frequency = <52000000>;
> +	};
> +
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&watchdog {
> +	status = "disabled";
> +};
> diff --git a/configs/mt7986a_bpir3_mini_emmc_defconfig b/configs/mt7986a_bpir3_mini_emmc_defconfig
> new file mode 100644
> index 00000000000..411ad11d6a7
> --- /dev/null
> +++ b/configs/mt7986a_bpir3_mini_emmc_defconfig
> @@ -0,0 +1,139 @@
> +CONFIG_ARM=y
> +CONFIG_ARM_SMCCC=y
> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
> +CONFIG_POSITION_INDEPENDENT=y
> +CONFIG_ARCH_MEDIATEK=y
> +CONFIG_TEXT_BASE=0x41e00000
> +CONFIG_SYS_MALLOC_F_LEN=0x4000
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_ENV_SIZE=0x80000
> +CONFIG_ENV_OFFSET=0x300000
> +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini-emmc"
> +CONFIG_TARGET_MT7986=y
> +CONFIG_DEBUG_UART_BASE=0x11002000
> +CONFIG_DEBUG_UART_CLOCK=40000000
> +CONFIG_SYS_LOAD_ADDR=0x46000000
> +CONFIG_DEBUG_UART=y
> +CONFIG_DEFAULT_FDT_FILE="mt7986a-bpi-r3-mini-emmc"
> +CONFIG_LOGLEVEL=7
> +CONFIG_LOG=y
> +CONFIG_SYS_PROMPT="BPI-R3M> "
> +CONFIG_SYS_CBSIZE=512
> +CONFIG_SYS_PBSIZE=1049
> +# CONFIG_BOOTM_NETBSD is not set
> +# CONFIG_BOOTM_PLAN9 is not set
> +# CONFIG_BOOTM_RTEMS is not set
> +# CONFIG_BOOTM_VXWORKS is not set
> +# CONFIG_CMD_ELF is not set
> +# CONFIG_CMD_UNLZ4 is not set
> +# CONFIG_CMD_UNZIP is not set
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_GPT_RENAME=y
> +CONFIG_CMD_LSBLK=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PART=y
> +CONFIG_CMD_READ=y
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_SMC=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_EXT4=y
> +CONFIG_CMD_FS_GENERIC=y
> +CONFIG_PARTITION_TYPE_GUID=y
> +CONFIG_ENV_OVERWRITE=y
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_REGMAP=y
> +CONFIG_SYSCON=y
> +CONFIG_CLK=y
> +CONFIG_MMC_HS200_SUPPORT=y
> +CONFIG_MMC_MTK=y
> +CONFIG_PHY_FIXED=y
> +CONFIG_DM_MDIO=y
> +CONFIG_MEDIATEK_ETH=y
> +CONFIG_PINCTRL=y
> +CONFIG_PINCONF=y
> +CONFIG_PINCTRL_MT7986=y
> +CONFIG_POWER_DOMAIN=y
> +CONFIG_MTK_POWER_DOMAIN=y
> +CONFIG_DM_REGULATOR=y
> +CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_DM_SERIAL=y
> +CONFIG_MTK_SERIAL=y
> +CONFIG_FAT_WRITE=y
> +CONFIG_HEXDUMP=y
> +# CONFIG_EFI_LOADER is not set
> +CONFIG_LMB_MAX_REGIONS=64
> +
> +CONFIG_AUTOBOOT=y
> +#CONFIG_BOOTDELAY=2
> +
> +CONFIG_FIT=y
> +CONFIG_ENV_USE_DEFAULT_ENV_TEXT_FILE=y
> +CONFIG_ENV_DEFAULT_ENV_TEXT_FILE="uEnv_r3.txt"
> +CONFIG_HUSH_PARSER=y
> +
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_MTD_UBI=y
> +CONFIG_CMD_UBI=y
> +CONFIG_CMD_UBIFS=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_MTD_SPI_NAND=y
> +CONFIG_MTK_SPIM=y
> +#CONFIG_MTK_SPI_NAND=y
> +#CONFIG_MTK_SPI_NAND_MTD=y
> +#CONFIG_MTK_SNOR=y
> +#CONFIG_MTK_SNFI_SPI=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_MTD=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_CMD_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_CMD_SF=y
> +#CONFIG_MTD_RAW_NAND=y
> +#CONFIG_CMD_NAND=y
> +#CONFIG_CMD_NAND_TRIMFFS=y
> +CONFIG_ENABLE_NAND_NMBM=y
> +CONFIG_MTDIDS_DEFAULT="nmbm0=nmbm0"
> +CONFIG_MTDPARTS_DEFAULT="nmbm0:1024k(bl2),512k(u-boot-env),2048k(factory),2048k(fip),65536k(ubi)"
> +CONFIG_PHY=y
> +CONFIG_PHY_MTK_TPHY=y
> +CONFIG_DM_USB=y
> +CONFIG_USB=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_XHCI_MTK=y
> +CONFIG_CMD_USB=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_CMD_ASKENV=y
> +CONFIG_CMD_STRINGS=y
> +CONFIG_OF_LIBFDT_OVERLAY=y
> +CONFIG_CMD_BOOTMENU=y
> +CONFIG_SUPPORT_EMMC_BOOT=y
> +
> +CONFIG_FS_LOADER=y
> +CONFIG_PHY_AIROHA=y
> +CONFIG_PHY_AIROHA_EN8811=y
> +CONFIG_DM_ETH_PHY=y
> +CONFIG_PHY_AIROHA_FW_BUILTIN=y
> +CONFIG_PHY_ETHERNET_ID=y
> +
> +CONFIG_PCI=y
> +CONFIG_PCIE_MEDIATEK_GEN3=y
> +CONFIG_CMD_PCI=y
> +CONFIG_NVME_PCI=y
> +CONFIG_NVME=y
> +CONFIG_CMD_CACHE=y
> +
> +CONFIG_CMD_PSTORE=y
> +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
> +CONFIG_CMD_PSTORE_RECORD_SIZE=0x1000
> +#CONFIG_CMD_PSTORE_CONSOLE_SIZE=0x1000
> +#CONFIG_CMD_PSTORE_FTRACE_SIZE=0x0
> +#CONFIG_CMD_PSTORE_PMSG_SIZE=0x1000
> +
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_MTK_V2=y
> +CONFIG_CMD_RNG=y
> --
> 2.34.1

Re: [PATCH v1] arm: mediatek: add BPi-R3 Mini eMMC board support

[Lucien.Jheng]

Hi Frank

My apologies for not citing your Git repository as the source for the 
DTS file.

I'll make sure to attribute you using the 'Co-developed-by' tag. Sorry 
about the oversight!

I will double-check your commit and what you mentioned about 
'compatible' earlier, and try to make the next commit.

Thank.

Frank Wunderlich 於 2026/9/6 下午 08:59 寫道:
> Hi Lucien,
>
> it seems you try to upstream the DTS from my repo [1] (i did not do it 
> because of OF_UPSTREAM discussion/requirement) only with minor cleanup 
> (e.g. dropped my attempt to define regulators as such - was not 
> working in my tests but imho more logical).
>
> But it would be great if you mention me as Co-developed-By or similar.
>
> Not sure if upstream-discussion is still valid (new downstream DTS 
> were rejected there), it needed many other driver patches and some 
> hacks at DT level (my last state [2]).
>
> btw. compatible should be changed to upstream one [3]
>
> regards Frank
>
> [1] 
> https://github.com/frank-w/u-boot/blob/2024-04-bpi-r3mini/arch/arm/dts/mt7986a-bpi-r3-mini.dts
>
> latest version: 
> https://github.com/frank-w/u-boot/blob/2026-07-bpi/arch/arm/dts/mt7986a-bpi-r3-mini.dts
>
> [2] https://github.com/frank-w/u-boot/commits/2026-01-bpi-ofupstream/
>
> [3] 
> https://github.com/frank-w/BPI-Router-Linux/blob/7.3-rc/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-mini.dts#L21
>
> Am 06.09.26 um 14:07 schrieb Lucien.Jheng:
>> Add device tree and defconfig for the Bananapi BPi-R3 Mini, an
>> eMMC-only variant of the BPi-R3 board built around the MT7986A SoC.
>>
>> The board dtsi enables the MT7986 eMMC controller, SPI-NAND flash,
>> PWM, and the on-board Airoha EN8811H 2.5G PHY via mdio.
>>
>> The mt7986a_bpir3_mini_emmc_defconfig enables the drivers needed for
>> this variant: SPI-NAND (MTD/UBI), USB xHCI, PCIe Gen3 with NVMe, the
>> Airoha EN8811H PHY driver, and RNG/pstore support.
>>
>> Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
>> ---
>>   arch/arm/dts/Makefile                     |   1 +
>>   arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts | 236 ++++++++++++++++++++++
>>   configs/mt7986a_bpir3_mini_emmc_defconfig | 139 +++++++++++++
>>   3 files changed, 376 insertions(+)
>>   create mode 100644 arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
>>   create mode 100644 configs/mt7986a_bpir3_mini_emmc_defconfig
>>
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index 1b533721bb4..b62a4334750 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -1080,6 +1080,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
>>       mt7981-sd-rfb.dtb \
>>       mt7986a-bpi-r3-sd.dtb \
>>       mt7986a-bpi-r3-emmc.dtb \
>> +    mt7986a-bpi-r3-mini-emmc.dtb \
>>       mt7986a-rfb.dtb \
>>       mt7986b-rfb.dtb \
>>       mt7986a-sd-rfb.dtb \
>> diff --git a/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts 
>> b/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
>> new file mode 100644
>> index 00000000000..18320b20be8
>> --- /dev/null
>> +++ b/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts
>> @@ -0,0 +1,236 @@
>> +// SPDX-License-Identifier: GPL-2.0-or-later
>> +
>> +/dts-v1/;
>> +#include "mt7986.dtsi"
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/linux-event-codes.h>
>> +
>> +/ {
>> +    #address-cells = <1>;
>> +    #size-cells = <1>;
>> +    model = "Bananapi BPi-R3 Mini";
>> +    compatible = "mediatek,mt7986", "mediatek,mt7986-rfb";
>> +
>> +    chosen {
>> +        stdout-path = &uart0;
>> +        tick-timer = &timer0;
>> +    };
>> +
>> +    memory@40000000 {
>> +        device_type = "memory";
>> +        reg = <0x40000000 0x80000000>;
>> +    };
>> +
>> +    gpio-keys {
>> +        compatible = "gpio-keys";
>> +
>> +        button-reset {
>> +            label = "reset";
>> +            linux,code = <KEY_RESTART>;
>> +            gpios = <&pio 7 GPIO_ACTIVE_LOW>;
>> +        };
>> +    };
>> +
>> +    leds {
>> +        compatible = "gpio-leds";
>> +
>> +        status_led: led-0 {
>> +            label = "green:status";
>> +            gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
>> +        };
>> +
>> +        led-1 {
>> +            label = "blue:wlan2g";
>> +            gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
>> +        };
>> +
>> +        led-2 {
>> +            label = "blue:wlan5g";
>> +            gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
>> +        };
>> +    };
>> +
>> +    reg_1p8v: regulator-1p8v {
>> +        compatible = "regulator-fixed";
>> +        regulator-name = "fixed-1.8V";
>> +        regulator-min-microvolt = <1800000>;
>> +        regulator-max-microvolt = <1800000>;
>> +        regulator-boot-on;
>> +        regulator-always-on;
>> +    };
>> +
>> +    reg_3p3v: regulator-3p3v {
>> +        compatible = "regulator-fixed";
>> +        regulator-name = "fixed-3.3V";
>> +        regulator-min-microvolt = <3300000>;
>> +        regulator-max-microvolt = <3300000>;
>> +        regulator-boot-on;
>> +        regulator-always-on;
>> +    };
>> +};
>> +
>> +&eth {
>> +    status = "okay";
>> +    pinctrl-names = "default";
>> +    pinctrl-0 = <&mdio_pins>;
>> +
>> +    mediatek,gmac-id = <0>;
>> +    phy-mode = "2500base-x";
>> +    phy-handle = <&phy14>;
>> +
>> +    phy14: eth-phy@14 {
>> +        compatible = "ethernet-phy-id03a2.a411";
>> +        reg = <14>;
>> +        pinctrl-names = "default";
>> +        pinctrl-0 = <&en8811_pwr_a>;
>> +        airoha,pnswap-rx;
>> +
>> +        reset-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
>> +        reset-assert-us = <10000>;
>> +        reset-deassert-us = <20000>;
>> +    };
>> +
>> +    /*phy15: eth-phy@15 {
>> +        compatible = "ethernet-phy-id03a2.a411";
>> +        reg = <15>;
>> +
>> +        pinctrl-names = "default";
>> +        pinctrl-0 = <&en8811_pwr_b>;
>> +        airoha,pnswap-rx;
>> +
>> +        reset-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
>> +        reset-assert-us = <10000>;
>> +        reset-deassert-us = <20000>;
>> +    };*/
>> +};
>> +
>> +&mmc0 {
>> +    pinctrl-names = "default";
>> +    pinctrl-0 = <&mmc0_pins_default>;
>> +    bus-width = <8>;
>> +    max-frequency = <200000000>;
>> +    cap-mmc-highspeed;
>> +    cap-mmc-hw-reset;
>> +    vmmc-supply = <&reg_3p3v>;
>> +    vqmmc-supply = <&reg_1p8v>;
>> +    non-removable;
>> +    status = "okay";
>> +};
>> +
>> +&pio {
>> +    en8811_pwr_a: en8811-pwr-a {
>> +        pins = "GPIO_11";
>> +        drive-strength = <MTK_DRIVE_8mA>;
>> +        bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
>> +        output-low;
>> +    };
>> +
>> +    en8811_pwr_b: en8811-pwr-b {
>> +        pins = "GPIO_12";
>> +        drive-strength = <MTK_DRIVE_8mA>;
>> +        bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
>> +        output-low;
>> +    };
>> +
>> +    mdio_pins: mdio-pins {
>> +        mux {
>> +            function = "eth";
>> +            groups = "mdc_mdio";
>> +        };
>> +    };
>> +
>> +    mmc0_pins_default: mmc0default {
>> +        mux {
>> +            function = "flash";
>> +            groups =  "emmc_51";
>> +        };
>> +
>> +        conf-cmd-dat {
>> +            pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
>> +                   "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
>> +                   "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
>> +            input-enable;
>> +            drive-strength = <MTK_DRIVE_4mA>;
>> +            bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
>> +        };
>> +
>> +        conf-clk {
>> +            pins = "EMMC_CK";
>> +            drive-strength = <MTK_DRIVE_6mA>;
>> +            bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
>> +        };
>> +
>> +        conf-dsl {
>> +            pins = "EMMC_DSL";
>> +            bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
>> +        };
>> +
>> +        conf-rst {
>> +            pins = "EMMC_RSTB";
>> +            drive-strength = <MTK_DRIVE_4mA>;
>> +            bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
>> +        };
>> +    };
>> +
>> +    spi_flash_pins: spi0-pins-func-1 {
>> +        mux {
>> +            function = "flash";
>> +            groups = "spi0", "spi0_wp_hold";
>> +        };
>> +
>> +        conf-pu {
>> +            pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
>> +            drive-strength = <MTK_DRIVE_8mA>;
>> +            bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
>> +        };
>> +
>> +        conf-pd {
>> +            pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
>> +            drive-strength = <MTK_DRIVE_8mA>;
>> +            bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
>> +        };
>> +    };
>> +
>> +    pwm_pins: pwm0-pins-func-1 {
>> +        mux {
>> +            function = "pwm";
>> +            groups = "pwm0";
>> +        };
>> +    };
>> +};
>> +
>> +&pwm {
>> +    pinctrl-names = "default";
>> +    pinctrl-0 = <&pwm_pins>;
>> +    status = "okay";
>> +};
>> +
>> +&spi0 {
>> +    #address-cells = <1>;
>> +    #size-cells = <0>;
>> +    pinctrl-names = "default";
>> +    pinctrl-0 = <&spi_flash_pins>;
>> +    status = "okay";
>> +    must_tx;
>> +    enhance_timing;
>> +    dma_ext;
>> +    ipm_design;
>> +    support_quad;
>> +    tick_dly = <1>;
>> +    sample_sel = <0>;
>> +
>> +    spi_nand@0 {
>> +        compatible = "spi-nand";
>> +        reg = <0>;
>> +        spi-max-frequency = <52000000>;
>> +    };
>> +
>> +};
>> +
>> +&uart0 {
>> +    status = "okay";
>> +};
>> +
>> +&watchdog {
>> +    status = "disabled";
>> +};
>> diff --git a/configs/mt7986a_bpir3_mini_emmc_defconfig 
>> b/configs/mt7986a_bpir3_mini_emmc_defconfig
>> new file mode 100644
>> index 00000000000..411ad11d6a7
>> --- /dev/null
>> +++ b/configs/mt7986a_bpir3_mini_emmc_defconfig
>> @@ -0,0 +1,139 @@
>> +CONFIG_ARM=y
>> +CONFIG_ARM_SMCCC=y
>> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
>> +CONFIG_POSITION_INDEPENDENT=y
>> +CONFIG_ARCH_MEDIATEK=y
>> +CONFIG_TEXT_BASE=0x41e00000
>> +CONFIG_SYS_MALLOC_F_LEN=0x4000
>> +CONFIG_NR_DRAM_BANKS=1
>> +CONFIG_ENV_SIZE=0x80000
>> +CONFIG_ENV_OFFSET=0x300000
>> +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini-emmc"
>> +CONFIG_TARGET_MT7986=y
>> +CONFIG_DEBUG_UART_BASE=0x11002000
>> +CONFIG_DEBUG_UART_CLOCK=40000000
>> +CONFIG_SYS_LOAD_ADDR=0x46000000
>> +CONFIG_DEBUG_UART=y
>> +CONFIG_DEFAULT_FDT_FILE="mt7986a-bpi-r3-mini-emmc"
>> +CONFIG_LOGLEVEL=7
>> +CONFIG_LOG=y
>> +CONFIG_SYS_PROMPT="BPI-R3M> "
>> +CONFIG_SYS_CBSIZE=512
>> +CONFIG_SYS_PBSIZE=1049
>> +# CONFIG_BOOTM_NETBSD is not set
>> +# CONFIG_BOOTM_PLAN9 is not set
>> +# CONFIG_BOOTM_RTEMS is not set
>> +# CONFIG_BOOTM_VXWORKS is not set
>> +# CONFIG_CMD_ELF is not set
>> +# CONFIG_CMD_UNLZ4 is not set
>> +# CONFIG_CMD_UNZIP is not set
>> +CONFIG_CMD_GPIO=y
>> +CONFIG_CMD_GPT=y
>> +CONFIG_CMD_GPT_RENAME=y
>> +CONFIG_CMD_LSBLK=y
>> +CONFIG_CMD_MMC=y
>> +CONFIG_CMD_PART=y
>> +CONFIG_CMD_READ=y
>> +CONFIG_CMD_PING=y
>> +CONFIG_CMD_SMC=y
>> +CONFIG_CMD_FAT=y
>> +CONFIG_CMD_EXT4=y
>> +CONFIG_CMD_FS_GENERIC=y
>> +CONFIG_PARTITION_TYPE_GUID=y
>> +CONFIG_ENV_OVERWRITE=y
>> +CONFIG_ENV_IS_IN_MMC=y
>> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
>> +CONFIG_NET_RANDOM_ETHADDR=y
>> +CONFIG_REGMAP=y
>> +CONFIG_SYSCON=y
>> +CONFIG_CLK=y
>> +CONFIG_MMC_HS200_SUPPORT=y
>> +CONFIG_MMC_MTK=y
>> +CONFIG_PHY_FIXED=y
>> +CONFIG_DM_MDIO=y
>> +CONFIG_MEDIATEK_ETH=y
>> +CONFIG_PINCTRL=y
>> +CONFIG_PINCONF=y
>> +CONFIG_PINCTRL_MT7986=y
>> +CONFIG_POWER_DOMAIN=y
>> +CONFIG_MTK_POWER_DOMAIN=y
>> +CONFIG_DM_REGULATOR=y
>> +CONFIG_DM_REGULATOR_FIXED=y
>> +CONFIG_DM_SERIAL=y
>> +CONFIG_MTK_SERIAL=y
>> +CONFIG_FAT_WRITE=y
>> +CONFIG_HEXDUMP=y
>> +# CONFIG_EFI_LOADER is not set
>> +CONFIG_LMB_MAX_REGIONS=64
>> +
>> +CONFIG_AUTOBOOT=y
>> +#CONFIG_BOOTDELAY=2
>> +
>> +CONFIG_FIT=y
>> +CONFIG_ENV_USE_DEFAULT_ENV_TEXT_FILE=y
>> +CONFIG_ENV_DEFAULT_ENV_TEXT_FILE="uEnv_r3.txt"
>> +CONFIG_HUSH_PARSER=y
>> +
>> +CONFIG_MTD=y
>> +CONFIG_DM_MTD=y
>> +CONFIG_MTD_UBI=y
>> +CONFIG_CMD_UBI=y
>> +CONFIG_CMD_UBIFS=y
>> +CONFIG_SPI=y
>> +CONFIG_DM_SPI=y
>> +CONFIG_MTD_SPI_NAND=y
>> +CONFIG_MTK_SPIM=y
>> +#CONFIG_MTK_SPI_NAND=y
>> +#CONFIG_MTK_SPI_NAND_MTD=y
>> +#CONFIG_MTK_SNOR=y
>> +#CONFIG_MTK_SNFI_SPI=y
>> +CONFIG_SPI_FLASH=y
>> +CONFIG_SPI_FLASH_MTD=y
>> +CONFIG_SPI_FLASH_WINBOND=y
>> +CONFIG_CMD_MTD=y
>> +CONFIG_DM_SPI_FLASH=y
>> +CONFIG_CMD_SF=y
>> +#CONFIG_MTD_RAW_NAND=y
>> +#CONFIG_CMD_NAND=y
>> +#CONFIG_CMD_NAND_TRIMFFS=y
>> +CONFIG_ENABLE_NAND_NMBM=y
>> +CONFIG_MTDIDS_DEFAULT="nmbm0=nmbm0"
>> +CONFIG_MTDPARTS_DEFAULT="nmbm0:1024k(bl2),512k(u-boot-env),2048k(factory),2048k(fip),65536k(ubi)" 
>>
>> +CONFIG_PHY=y
>> +CONFIG_PHY_MTK_TPHY=y
>> +CONFIG_DM_USB=y
>> +CONFIG_USB=y
>> +CONFIG_USB_XHCI_HCD=y
>> +CONFIG_USB_XHCI_MTK=y
>> +CONFIG_CMD_USB=y
>> +CONFIG_USB_STORAGE=y
>> +CONFIG_CMD_ASKENV=y
>> +CONFIG_CMD_STRINGS=y
>> +CONFIG_OF_LIBFDT_OVERLAY=y
>> +CONFIG_CMD_BOOTMENU=y
>> +CONFIG_SUPPORT_EMMC_BOOT=y
>> +
>> +CONFIG_FS_LOADER=y
>> +CONFIG_PHY_AIROHA=y
>> +CONFIG_PHY_AIROHA_EN8811=y
>> +CONFIG_DM_ETH_PHY=y
>> +CONFIG_PHY_AIROHA_FW_BUILTIN=y
>> +CONFIG_PHY_ETHERNET_ID=y
>> +
>> +CONFIG_PCI=y
>> +CONFIG_PCIE_MEDIATEK_GEN3=y
>> +CONFIG_CMD_PCI=y
>> +CONFIG_NVME_PCI=y
>> +CONFIG_NVME=y
>> +CONFIG_CMD_CACHE=y
>> +
>> +CONFIG_CMD_PSTORE=y
>> +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
>> +CONFIG_CMD_PSTORE_RECORD_SIZE=0x1000
>> +#CONFIG_CMD_PSTORE_CONSOLE_SIZE=0x1000
>> +#CONFIG_CMD_PSTORE_FTRACE_SIZE=0x0
>> +#CONFIG_CMD_PSTORE_PMSG_SIZE=0x1000
>> +
>> +CONFIG_DM_RNG=y
>> +CONFIG_RNG_MTK_V2=y
>> +CONFIG_CMD_RNG=y
>> -- 
>> 2.34.1

Re: [PATCH v1] arm: mediatek: add BPi-R3 Mini eMMC board support

[Frank Wunderlich]

Am 06.09.26 um 15:10 schrieb Lucien.Jheng:
> Hi Frank
>
> My apologies for not citing your Git repository as the source for the 
> DTS file.
>
> I'll make sure to attribute you using the 'Co-developed-by' tag. Sorry 
> about the oversight!
>
> I will double-check your commit and what you mentioned about 
> 'compatible' earlier, and try to make the next commit. 

Thanks, I hope my comment didn't come across as too harsh. :)

I just copied the mt7986-rfb (and added the phys+regulators), so please 
crediting the original rfb author (Weijie Gao) too.

> Thank.
>
>>> --- /dev/null
>>> +++ b/configs/mt7986a_bpir3_mini_emmc_defconfig
>>> @@ -0,0 +1,139 @@
>>> +CONFIG_ARM=y
>>> +CONFIG_ARM_SMCCC=y
>>> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
>>> +CONFIG_POSITION_INDEPENDENT=y
>>> +CONFIG_ARCH_MEDIATEK=y
>>> +CONFIG_TEXT_BASE=0x41e00000
>>> +CONFIG_SYS_MALLOC_F_LEN=0x4000
>>> +CONFIG_NR_DRAM_BANKS=1
>>> +CONFIG_ENV_SIZE=0x80000
>>> +CONFIG_ENV_OFFSET=0x300000
>>> +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini-emmc"
>>> +CONFIG_TARGET_MT7986=y
>>> +CONFIG_DEBUG_UART_BASE=0x11002000
>>> +CONFIG_DEBUG_UART_CLOCK=40000000
>>> +CONFIG_SYS_LOAD_ADDR=0x46000000
>>> +CONFIG_DEBUG_UART=y
>>> +CONFIG_DEFAULT_FDT_FILE="mt7986a-bpi-r3-mini-emmc"
>>> +CONFIG_LOGLEVEL=7
>>> +CONFIG_LOG=y
>>> +CONFIG_SYS_PROMPT="BPI-R3M> "
>>> +CONFIG_SYS_CBSIZE=512
>>> +CONFIG_SYS_PBSIZE=1049
>>> +# CONFIG_BOOTM_NETBSD is not set
>>> +# CONFIG_BOOTM_PLAN9 is not set
>>> +# CONFIG_BOOTM_RTEMS is not set
>>> +# CONFIG_BOOTM_VXWORKS is not set
>>> +# CONFIG_CMD_ELF is not set
>>> +# CONFIG_CMD_UNLZ4 is not set
>>> +# CONFIG_CMD_UNZIP is not set
>>> +CONFIG_CMD_GPIO=y
>>> +CONFIG_CMD_GPT=y
>>> +CONFIG_CMD_GPT_RENAME=y
>>> +CONFIG_CMD_LSBLK=y
>>> +CONFIG_CMD_MMC=y
>>> +CONFIG_CMD_PART=y
>>> +CONFIG_CMD_READ=y
>>> +CONFIG_CMD_PING=y
>>> +CONFIG_CMD_SMC=y
>>> +CONFIG_CMD_FAT=y
>>> +CONFIG_CMD_EXT4=y
>>> +CONFIG_CMD_FS_GENERIC=y
>>> +CONFIG_PARTITION_TYPE_GUID=y
>>> +CONFIG_ENV_OVERWRITE=y
>>> +CONFIG_ENV_IS_IN_MMC=y
>>> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
>>> +CONFIG_NET_RANDOM_ETHADDR=y
>>> +CONFIG_REGMAP=y
>>> +CONFIG_SYSCON=y
>>> +CONFIG_CLK=y
>>> +CONFIG_MMC_HS200_SUPPORT=y
>>> +CONFIG_MMC_MTK=y
>>> +CONFIG_PHY_FIXED=y
>>> +CONFIG_DM_MDIO=y
>>> +CONFIG_MEDIATEK_ETH=y
>>> +CONFIG_PINCTRL=y
>>> +CONFIG_PINCONF=y
>>> +CONFIG_PINCTRL_MT7986=y
>>> +CONFIG_POWER_DOMAIN=y
>>> +CONFIG_MTK_POWER_DOMAIN=y
>>> +CONFIG_DM_REGULATOR=y
>>> +CONFIG_DM_REGULATOR_FIXED=y
>>> +CONFIG_DM_SERIAL=y
>>> +CONFIG_MTK_SERIAL=y
>>> +CONFIG_FAT_WRITE=y
>>> +CONFIG_HEXDUMP=y
>>> +# CONFIG_EFI_LOADER is not set
>>> +CONFIG_LMB_MAX_REGIONS=64
>>> +
>>> +CONFIG_AUTOBOOT=y
>>> +#CONFIG_BOOTDELAY=2
>>> +
>>> +CONFIG_FIT=y
>>> +CONFIG_ENV_USE_DEFAULT_ENV_TEXT_FILE=y
>>> +CONFIG_ENV_DEFAULT_ENV_TEXT_FILE="uEnv_r3.txt"

this will not work upstream as this file only exists in my repo and i'm 
sure upstream will reject this.

you should mention the vars needed for phy function and firmware load 
(e.g. pointing to your driver

commit with small comment).

same for bootmenu, autoboot and bootdelay.

>>>
>>> +CONFIG_HUSH_PARSER=y
>>> +
>>> +CONFIG_MTD=y
>>> +CONFIG_DM_MTD=y
>>> +CONFIG_MTD_UBI=y
>>> +CONFIG_CMD_UBI=y
>>> +CONFIG_CMD_UBIFS=y
>>> +CONFIG_SPI=y
>>> +CONFIG_DM_SPI=y
>>> +CONFIG_MTD_SPI_NAND=y
>>> +CONFIG_MTK_SPIM=y
>>> +#CONFIG_MTK_SPI_NAND=y
>>> +#CONFIG_MTK_SPI_NAND_MTD=y
>>> +#CONFIG_MTK_SNOR=y
>>> +#CONFIG_MTK_SNFI_SPI=y
>>> +CONFIG_SPI_FLASH=y
>>> +CONFIG_SPI_FLASH_MTD=y
>>> +CONFIG_SPI_FLASH_WINBOND=y
>>> +CONFIG_CMD_MTD=y
>>> +CONFIG_DM_SPI_FLASH=y
>>> +CONFIG_CMD_SF=y
>>> +#CONFIG_MTD_RAW_NAND=y
>>> +#CONFIG_CMD_NAND=y
>>> +#CONFIG_CMD_NAND_TRIMFFS=y
>>> +CONFIG_ENABLE_NAND_NMBM=y
>>> +CONFIG_MTDIDS_DEFAULT="nmbm0=nmbm0"
>>> +CONFIG_MTDPARTS_DEFAULT="nmbm0:1024k(bl2),512k(u-boot-env),2048k(factory),2048k(fip),65536k(ubi)" 
>>>
>>> +CONFIG_PHY=y
>>> +CONFIG_PHY_MTK_TPHY=y
>>> +CONFIG_DM_USB=y
>>> +CONFIG_USB=y
>>> +CONFIG_USB_XHCI_HCD=y
>>> +CONFIG_USB_XHCI_MTK=y
>>> +CONFIG_CMD_USB=y
>>> +CONFIG_USB_STORAGE=y
>>> +CONFIG_CMD_ASKENV=y
>>> +CONFIG_CMD_STRINGS=y
>>> +CONFIG_OF_LIBFDT_OVERLAY=y
>>> +CONFIG_CMD_BOOTMENU=y
>>> +CONFIG_SUPPORT_EMMC_BOOT=y
>>> +
>>> +CONFIG_FS_LOADER=y
>>> +CONFIG_PHY_AIROHA=y
>>> +CONFIG_PHY_AIROHA_EN8811=y
>>> +CONFIG_DM_ETH_PHY=y
>>> +CONFIG_PHY_AIROHA_FW_BUILTIN=y
>>> +CONFIG_PHY_ETHERNET_ID=y
>>> +
>>> +CONFIG_PCI=y
>>> +CONFIG_PCIE_MEDIATEK_GEN3=y
>>> +CONFIG_CMD_PCI=y
>>> +CONFIG_NVME_PCI=y
>>> +CONFIG_NVME=y
>>> +CONFIG_CMD_CACHE=y
>>> +
>>> +CONFIG_CMD_PSTORE=y
>>> +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
>>> +CONFIG_CMD_PSTORE_RECORD_SIZE=0x1000
>>> +#CONFIG_CMD_PSTORE_CONSOLE_SIZE=0x1000
>>> +#CONFIG_CMD_PSTORE_FTRACE_SIZE=0x0
>>> +#CONFIG_CMD_PSTORE_PMSG_SIZE=0x1000
>>> +
>>> +CONFIG_DM_RNG=y
>>> +CONFIG_RNG_MTK_V2=y
>>> +CONFIG_CMD_RNG=y
>>>
I also guess the defconfig must be filtered and reordered (did my 
changes at the end and grouped by function) by importing and using the 
.config to follow internal order (afaik there was any command to make to 
do this).

afaik

|makemyboard_defconfig ||makesavedefconfig ||cp ||defconfig path/to/||myboard_defconfig|

and some parts like hushparser, cmd-cache and maybe the downstream mtd 
layout (nmbm) should not be part of defconfig.

had not tested nand on r3mini (kept it original to have a fallback in 
case i break emmc).

regards Frank

Re: [PATCH v1] arm: mediatek: add BPi-R3 Mini eMMC board support

[David Lechner]

On 9/6/26 7:59 AM, Frank Wunderlich wrote:
> Hi Lucien,
> 
> it seems you try to upstream the DTS from my repo [1] (i did not do it because of OF_UPSTREAM discussion/requirement) only with minor cleanup (e.g. dropped my attempt to define regulators as such - was not working in my tests but imho more logical).
> 
Yes, let's try to make this work with OF_UPSTREAM.