Re: [PATCH v6 5/8] riscv_cbqri: resctrl: Add cache allocation via capacity block mask

From: Drew Fustini <fustini@kernel.org>
To: Chen Pei <cp0613@linux.alibaba.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	x86@kernel.org, devicetree@vger.kernel.org,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Atish Patra <atish.patra@linux.dev>,
	Reinette Chatre <reinette.chatre@intel.com>,
	Tony Luck <tony.luck@intel.com>, Babu Moger <babu.moger@amd.com>,
	Peter Newman <peternewman@google.com>,
	Samuel Holland <samuel.holland@sifive.com>,
	Ved Shanbhogue <ved@rivosinc.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Rob Herring <robh@kernel.org>,
	Zhiwei Liu <zhiwei_liu@linux.alibaba.com>,
	d@gen8
Subject: Re: [PATCH v6 5/8] riscv_cbqri: resctrl: Add cache allocation via capacity block mask
Date: Tue, 1 Sep 2026 15:07:56 -0700	[thread overview]
Message-ID: <apdMvKYegtdEWntp@gen8> (raw)
In-Reply-To: <20260831100216.reply.cp0613@linux.alibaba.com>

On Mon, Aug 31, 2026 at 10:16:16AM +0800, Chen Pei wrote:
> Hi Drew,
> 
> Thanks for keeping this series alive. While testing v6 on a RISC-V
> platform with a CBQRI capacity controller (8 capacity blocks backing
> one L3, Ssqosid + CBQRI exposed via DT), I hit a problem that traces
> back to this patch; findings and a suggested fix below.

Thanks for testing the siers.

> Symptom
> -------
> With the series applied, the resctrl interface reports an empty
> capacity mask everywhere:
> 
>   # cat /sys/fs/resctrl/info/L3/cbm_mask
>   0
>   # cat /sys/fs/resctrl/schemata
>   L3:0=0
>   # cat /sys/fs/resctrl/size
>   L3:0=0
> 
> while the hardware reports NCBLKS=8 in the CC capabilities register
> (bits[23:8] of cc_capabilities, per CBQRI v1.0 §3.5), i.e. the
> expected values are cbm_mask=ff / L3:0=ff.
> 
> Root cause
> ----------
> cbqri_resctrl_control_init() fills cbm_len/shareable_bits/min_cbm_bits
> but never initializes res->default_ctrl, which therefore stays 0
> (static storage):
> 
> > +static int cbqri_resctrl_control_init(struct cbqri_cache *ctrl,
> > +				      struct rdt_resource *res)
> > +{
> > +	res->name = kasprintf(...);
> > +	res->cache.cbm_len = ctrl->cc.ncblks;
> > +	res->cache.shareable_bits = 0;
> > +	...

I think you may be looking at an older version. The function in this
patch is:

static void cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res)

struct rdt_resource no longer has a default_ctrl member. Commit
dbc58f7eec40 ("x86/resctrl: Generate default_ctrl instead of sharing
it") removed it and derives the value instead.

The default seems to work okay in my testing. For example, with Qemu [1]:

 qemu-system-riscv64 \
      -M virt,aia=aplic-imsic \
      -nographic \
      -m 1G \
      -smp 8 \
      -kernel arch/riscv/boot/Image \
      -append "root=/dev/vda ro console=ttyS0 rootwait earlycon" \
      -drive if=none,file=rootfs.ext2,format=raw,id=hd0 \
      -device virtio-blk-device,drive=hd0 \
      -device riscv.cbqri.capacity,max_mcids=256,max_rcids=64,ncblks=16,mmio_base=0x04820000

# cat /sys/fs/resctrl/info/L2/cbm_mask
ffff
# cat /sys/fs/resctrl/schemata
L2:0=ffff

I will send v7 today as I have now rebased on v7.3-rc1. It is already
available as a branch [2]. Please give that a try and let me know of any
problems.

Thanks,
Drew

[1] https://github.com/tt-fustini/qemu/tree/riscv-cbqri-cache
[2] https://github.com/tt-fustini/linux/tree/cbqri-cache-alloc-dt