* [PATCH 01/47] target/arm: Move -cpu max stuff out of cpu32.c
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 02/47] target/arm: Build cpu32.c once in system mode Pierrick Bouvier
` (45 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
target/arm/tcg/cpu-max-v8.c | 117 ++++++++++++++++++++++++++++++++++++
target/arm/tcg/cpu32.c | 111 ----------------------------------
target/arm/tcg/meson.build | 1 +
3 files changed, 118 insertions(+), 111 deletions(-)
create mode 100644 target/arm/tcg/cpu-max-v8.c
diff --git a/target/arm/tcg/cpu-max-v8.c b/target/arm/tcg/cpu-max-v8.c
new file mode 100644
index 00000000000..5c0ba28edf8
--- /dev/null
+++ b/target/arm/tcg/cpu-max-v8.c
@@ -0,0 +1,117 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "internals.h"
+
+
+/* Share AArch32 -cpu max features with AArch64. */
+void aa32_max_features(ARMCPU *cpu)
+{
+ uint32_t t;
+ ARMISARegisters *isar = &cpu->isar;
+
+ /* Add additional features supported by QEMU */
+ t = GET_IDREG(isar, ID_ISAR5);
+ t = FIELD_DP32(t, ID_ISAR5, AES, 2); /* FEAT_PMULL */
+ t = FIELD_DP32(t, ID_ISAR5, SHA1, 1); /* FEAT_SHA1 */
+ t = FIELD_DP32(t, ID_ISAR5, SHA2, 1); /* FEAT_SHA256 */
+ t = FIELD_DP32(t, ID_ISAR5, CRC32, 1);
+ t = FIELD_DP32(t, ID_ISAR5, RDM, 1); /* FEAT_RDM */
+ t = FIELD_DP32(t, ID_ISAR5, VCMA, 1); /* FEAT_FCMA */
+ SET_IDREG(isar, ID_ISAR5, t);
+
+ t = GET_IDREG(isar, ID_ISAR6);
+ t = FIELD_DP32(t, ID_ISAR6, JSCVT, 1); /* FEAT_JSCVT */
+ t = FIELD_DP32(t, ID_ISAR6, DP, 1); /* Feat_DotProd */
+ t = FIELD_DP32(t, ID_ISAR6, FHM, 1); /* FEAT_FHM */
+ t = FIELD_DP32(t, ID_ISAR6, SB, 1); /* FEAT_SB */
+ t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1); /* FEAT_SPECRES */
+ t = FIELD_DP32(t, ID_ISAR6, BF16, 1); /* FEAT_AA32BF16 */
+ t = FIELD_DP32(t, ID_ISAR6, I8MM, 1); /* FEAT_AA32I8MM */
+ SET_IDREG(isar, ID_ISAR6, t);
+
+ t = cpu->isar.mvfr1;
+ t = FIELD_DP32(t, MVFR1, FPHP, 3); /* FEAT_FP16 */
+ t = FIELD_DP32(t, MVFR1, SIMDHP, 2); /* FEAT_FP16 */
+ cpu->isar.mvfr1 = t;
+
+ t = cpu->isar.mvfr2;
+ t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */
+ t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */
+ cpu->isar.mvfr2 = t;
+
+ FIELD_DP32_IDREG(isar, ID_MMFR3, PAN, 2); /* FEAT_PAN2 */
+
+ t = GET_IDREG(isar, ID_MMFR4);
+ t = FIELD_DP32(t, ID_MMFR4, HPDS, 2); /* FEAT_HPDS2 */
+ t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
+ t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* FEAT_TTCNP */
+ t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* FEAT_XNX */
+ t = FIELD_DP32(t, ID_MMFR4, EVT, 2); /* FEAT_EVT2 */
+ SET_IDREG(isar, ID_MMFR4, t);
+
+ FIELD_DP32_IDREG(isar, ID_MMFR5, ETS, 2); /* FEAT_ETS2 */
+
+ t = GET_IDREG(isar, ID_PFR0);
+ t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CSV2 */
+ t = FIELD_DP32(t, ID_PFR0, DIT, 1); /* FEAT_DIT */
+ t = FIELD_DP32(t, ID_PFR0, RAS, 1); /* FEAT_RAS */
+ SET_IDREG(isar, ID_PFR0, t);
+
+ t = GET_IDREG(isar, ID_PFR2);
+ t = FIELD_DP32(t, ID_PFR2, CSV3, 1); /* FEAT_CSV3 */
+ t = FIELD_DP32(t, ID_PFR2, SSBS, 1); /* FEAT_SSBS */
+ SET_IDREG(isar, ID_PFR2, t);
+
+ t = GET_IDREG(isar, ID_DFR0);
+ t = FIELD_DP32(t, ID_DFR0, COPDBG, 10); /* FEAT_Debugv8p8 */
+ t = FIELD_DP32(t, ID_DFR0, COPSDBG, 10); /* FEAT_Debugv8p8 */
+ t = FIELD_DP32(t, ID_DFR0, PERFMON, 6); /* FEAT_PMUv3p5 */
+ SET_IDREG(isar, ID_DFR0, t);
+
+ /* Debug ID registers. */
+
+ /* Bit[15] is RES1, Bit[13] and Bits[11:0] are RES0. */
+ t = 0x00008000;
+ t = FIELD_DP32(t, DBGDIDR, SE_IMP, 1);
+ t = FIELD_DP32(t, DBGDIDR, NSUHD_IMP, 1);
+ t = FIELD_DP32(t, DBGDIDR, VERSION, 10); /* FEAT_Debugv8p8 */
+ t = FIELD_DP32(t, DBGDIDR, CTX_CMPS, 1);
+ t = FIELD_DP32(t, DBGDIDR, BRPS, 5);
+ t = FIELD_DP32(t, DBGDIDR, WRPS, 3);
+ cpu->isar.dbgdidr = t;
+
+ t = 0;
+ t = FIELD_DP32(t, DBGDEVID, PCSAMPLE, 3);
+ t = FIELD_DP32(t, DBGDEVID, WPADDRMASK, 1);
+ t = FIELD_DP32(t, DBGDEVID, BPADDRMASK, 15);
+ t = FIELD_DP32(t, DBGDEVID, VECTORCATCH, 0);
+ t = FIELD_DP32(t, DBGDEVID, VIRTEXTNS, 1);
+ t = FIELD_DP32(t, DBGDEVID, DOUBLELOCK, 1);
+ t = FIELD_DP32(t, DBGDEVID, AUXREGS, 0);
+ t = FIELD_DP32(t, DBGDEVID, CIDMASK, 0);
+ cpu->isar.dbgdevid = t;
+
+ /* Bits[31:4] are RES0. */
+ t = 0;
+ t = FIELD_DP32(t, DBGDEVID1, PCSROFFSET, 2);
+ cpu->isar.dbgdevid1 = t;
+
+ FIELD_DP32_IDREG(isar, ID_DFR1, HPMN0, 1); /* FEAT_HPMN0 */
+}
+
+void aarch32_max_tcg_init(ARMCPU *cpu)
+{
+ aarch64_aa32_a57_init(cpu, false);
+ aa32_max_features(cpu);
+#ifdef CONFIG_USER_ONLY
+ /*
+ * Break with true ARMv8 and add back old-style VFP short-vector
+ * support. Only do this for user-mode, where -cpu max is the default,
+ * so that older v6 and v7 programs are more likely to work without
+ * adjustment.
+ */
+ cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
+#endif
+}
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
index bc07e33877a..34436ad6ec4 100644
--- a/target/arm/tcg/cpu32.c
+++ b/target/arm/tcg/cpu32.c
@@ -758,114 +758,3 @@ static void arm_tcg_cpu_register_types(void)
type_init(arm_tcg_cpu_register_types)
#endif /* !CONFIG_USER_ONLY || !TARGET_AARCH64 */
-
-/* Share AArch32 -cpu max features with AArch64. */
-void aa32_max_features(ARMCPU *cpu)
-{
- uint32_t t;
- ARMISARegisters *isar = &cpu->isar;
-
- /* Add additional features supported by QEMU */
- t = GET_IDREG(isar, ID_ISAR5);
- t = FIELD_DP32(t, ID_ISAR5, AES, 2); /* FEAT_PMULL */
- t = FIELD_DP32(t, ID_ISAR5, SHA1, 1); /* FEAT_SHA1 */
- t = FIELD_DP32(t, ID_ISAR5, SHA2, 1); /* FEAT_SHA256 */
- t = FIELD_DP32(t, ID_ISAR5, CRC32, 1);
- t = FIELD_DP32(t, ID_ISAR5, RDM, 1); /* FEAT_RDM */
- t = FIELD_DP32(t, ID_ISAR5, VCMA, 1); /* FEAT_FCMA */
- SET_IDREG(isar, ID_ISAR5, t);
-
- t = GET_IDREG(isar, ID_ISAR6);
- t = FIELD_DP32(t, ID_ISAR6, JSCVT, 1); /* FEAT_JSCVT */
- t = FIELD_DP32(t, ID_ISAR6, DP, 1); /* Feat_DotProd */
- t = FIELD_DP32(t, ID_ISAR6, FHM, 1); /* FEAT_FHM */
- t = FIELD_DP32(t, ID_ISAR6, SB, 1); /* FEAT_SB */
- t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1); /* FEAT_SPECRES */
- t = FIELD_DP32(t, ID_ISAR6, BF16, 1); /* FEAT_AA32BF16 */
- t = FIELD_DP32(t, ID_ISAR6, I8MM, 1); /* FEAT_AA32I8MM */
- SET_IDREG(isar, ID_ISAR6, t);
-
- t = cpu->isar.mvfr1;
- t = FIELD_DP32(t, MVFR1, FPHP, 3); /* FEAT_FP16 */
- t = FIELD_DP32(t, MVFR1, SIMDHP, 2); /* FEAT_FP16 */
- cpu->isar.mvfr1 = t;
-
- t = cpu->isar.mvfr2;
- t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */
- t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */
- cpu->isar.mvfr2 = t;
-
- FIELD_DP32_IDREG(isar, ID_MMFR3, PAN, 2); /* FEAT_PAN2 */
-
- t = GET_IDREG(isar, ID_MMFR4);
- t = FIELD_DP32(t, ID_MMFR4, HPDS, 2); /* FEAT_HPDS2 */
- t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
- t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* FEAT_TTCNP */
- t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* FEAT_XNX */
- t = FIELD_DP32(t, ID_MMFR4, EVT, 2); /* FEAT_EVT2 */
- SET_IDREG(isar, ID_MMFR4, t);
-
- FIELD_DP32_IDREG(isar, ID_MMFR5, ETS, 2); /* FEAT_ETS2 */
-
- t = GET_IDREG(isar, ID_PFR0);
- t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CSV2 */
- t = FIELD_DP32(t, ID_PFR0, DIT, 1); /* FEAT_DIT */
- t = FIELD_DP32(t, ID_PFR0, RAS, 1); /* FEAT_RAS */
- SET_IDREG(isar, ID_PFR0, t);
-
- t = GET_IDREG(isar, ID_PFR2);
- t = FIELD_DP32(t, ID_PFR2, CSV3, 1); /* FEAT_CSV3 */
- t = FIELD_DP32(t, ID_PFR2, SSBS, 1); /* FEAT_SSBS */
- SET_IDREG(isar, ID_PFR2, t);
-
- t = GET_IDREG(isar, ID_DFR0);
- t = FIELD_DP32(t, ID_DFR0, COPDBG, 10); /* FEAT_Debugv8p8 */
- t = FIELD_DP32(t, ID_DFR0, COPSDBG, 10); /* FEAT_Debugv8p8 */
- t = FIELD_DP32(t, ID_DFR0, PERFMON, 6); /* FEAT_PMUv3p5 */
- SET_IDREG(isar, ID_DFR0, t);
-
- /* Debug ID registers. */
-
- /* Bit[15] is RES1, Bit[13] and Bits[11:0] are RES0. */
- t = 0x00008000;
- t = FIELD_DP32(t, DBGDIDR, SE_IMP, 1);
- t = FIELD_DP32(t, DBGDIDR, NSUHD_IMP, 1);
- t = FIELD_DP32(t, DBGDIDR, VERSION, 10); /* FEAT_Debugv8p8 */
- t = FIELD_DP32(t, DBGDIDR, CTX_CMPS, 1);
- t = FIELD_DP32(t, DBGDIDR, BRPS, 5);
- t = FIELD_DP32(t, DBGDIDR, WRPS, 3);
- cpu->isar.dbgdidr = t;
-
- t = 0;
- t = FIELD_DP32(t, DBGDEVID, PCSAMPLE, 3);
- t = FIELD_DP32(t, DBGDEVID, WPADDRMASK, 1);
- t = FIELD_DP32(t, DBGDEVID, BPADDRMASK, 15);
- t = FIELD_DP32(t, DBGDEVID, VECTORCATCH, 0);
- t = FIELD_DP32(t, DBGDEVID, VIRTEXTNS, 1);
- t = FIELD_DP32(t, DBGDEVID, DOUBLELOCK, 1);
- t = FIELD_DP32(t, DBGDEVID, AUXREGS, 0);
- t = FIELD_DP32(t, DBGDEVID, CIDMASK, 0);
- cpu->isar.dbgdevid = t;
-
- /* Bits[31:4] are RES0. */
- t = 0;
- t = FIELD_DP32(t, DBGDEVID1, PCSROFFSET, 2);
- cpu->isar.dbgdevid1 = t;
-
- FIELD_DP32_IDREG(isar, ID_DFR1, HPMN0, 1); /* FEAT_HPMN0 */
-}
-
-void aarch32_max_tcg_init(ARMCPU *cpu)
-{
- aarch64_aa32_a57_init(cpu, false);
- aa32_max_features(cpu);
-#ifdef CONFIG_USER_ONLY
- /*
- * Break with true ARMv8 and add back old-style VFP short-vector
- * support. Only do this for user-mode, where -cpu max is the default,
- * so that older v6 and v7 programs are more likely to work without
- * adjustment.
- */
- cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
-#endif
-}
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index cbfac0036e7..35e70b004d9 100644
--- a/target/arm/tcg/meson.build
+++ b/target/arm/tcg/meson.build
@@ -65,6 +65,7 @@ arm_common_user_system_ss.add(
translate32_d,
vfp_d,
files(
+ 'cpu-max-v8.c',
'debug.c',
'gengvec.c',
'hflags.c',
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 02/47] target/arm: Build cpu32.c once in system mode
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 01/47] target/arm: Move -cpu max stuff out of cpu32.c Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 03/47] target/arm: Rename and adjust aarch32_max_v8_tcg_initfn Pierrick Bouvier
` (44 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
From: Richard Henderson <richard.henderson@linaro.org>
"Move" the ifdef to meson.build rules.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
target/arm/tcg/cpu32.c | 5 -----
target/arm/tcg/meson.build | 10 +++++-----
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
index 34436ad6ec4..2d642ef8787 100644
--- a/target/arm/tcg/cpu32.c
+++ b/target/arm/tcg/cpu32.c
@@ -19,9 +19,6 @@
#include "cpregs.h"
-/* CPU models. These are not needed for the AArch64 linux-user build. */
-#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
-
static void arm926_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
@@ -756,5 +753,3 @@ static void arm_tcg_cpu_register_types(void)
}
type_init(arm_tcg_cpu_register_types)
-
-#endif /* !CONFIG_USER_ONLY || !TARGET_AARCH64 */
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index 35e70b004d9..a3e9d55e853 100644
--- a/target/arm/tcg/meson.build
+++ b/target/arm/tcg/meson.build
@@ -30,10 +30,6 @@ translate32_d = [
arm_ss.add(when: 'TARGET_AARCH64', if_true: gen_a64)
arm_stubs_ss.add(files('stubs32.c'))
-arm_ss.add(files(
- 'cpu32.c',
-))
-
arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
'gengvec64.c',
'translate-a64.c',
@@ -49,7 +45,10 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
))
arm_common_system_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('cpu-v7m.c'))
-arm_user_ss.add(when: 'TARGET_AARCH64', if_false: files('cpu-v7m.c'))
+arm_user_ss.add(when: 'TARGET_AARCH64', if_false: files(
+ 'cpu-v7m.c',
+ 'cpu32.c',
+))
arm_common_ss.add(zlib)
arm_common_ss.add(files(
@@ -86,6 +85,7 @@ arm_common_user_system_ss.add(when: 'TARGET_AARCH64', if_true: files(
))
arm_common_system_ss.add(files(
+ 'cpu32.c',
'cpregs-at.c',
'gicv5-cpuif.c',
'psci.c',
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 03/47] target/arm: Rename and adjust aarch32_max_v8_tcg_initfn
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 01/47] target/arm: Move -cpu max stuff out of cpu32.c Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 02/47] target/arm: Build cpu32.c once in system mode Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 04/47] target/arm: Introduce cpu types max-v8 and max-v9 Pierrick Bouvier
` (43 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
From: Richard Henderson <richard.henderson@linaro.org>
Rename from aarch32_max_tcg_init and take an Object pointer,
in preparation from being used with TypeInit.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
target/arm/cpu-max.c | 2 +-
target/arm/internals.h | 2 +-
target/arm/tcg/cpu-max-v8.c | 4 +++-
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu-max.c b/target/arm/cpu-max.c
index 4df52bcb08e..9ed45c8764f 100644
--- a/target/arm/cpu-max.c
+++ b/target/arm/cpu-max.c
@@ -108,7 +108,7 @@ static void cpu_max_initfn(Object *obj)
if (tcg_enabled()) {
if (!aarch64_enabled) {
- aarch32_max_tcg_init(cpu);
+ aarch32_max_v8_tcg_initfn(obj);
} else {
aarch64_max_tcg_initfn(obj);
}
diff --git a/target/arm/internals.h b/target/arm/internals.h
index f6b4e173a54..fc7d5ad6f2c 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1838,7 +1838,7 @@ uint32_t *arm_v7m_get_sp_ptr(CPUARMState *env, bool secure,
bool el_is_in_host(CPUARMState *env, int el);
void aa32_max_features(ARMCPU *cpu);
-void aarch32_max_tcg_init(ARMCPU *cpu);
+void aarch32_max_v8_tcg_initfn(Object *obj);
int exception_target_el(CPUARMState *env);
bool arm_singlestep_active(CPUARMState *env);
bool arm_generate_debug_exceptions(CPUARMState *env);
diff --git a/target/arm/tcg/cpu-max-v8.c b/target/arm/tcg/cpu-max-v8.c
index 5c0ba28edf8..5a9845d88f3 100644
--- a/target/arm/tcg/cpu-max-v8.c
+++ b/target/arm/tcg/cpu-max-v8.c
@@ -101,8 +101,10 @@ void aa32_max_features(ARMCPU *cpu)
FIELD_DP32_IDREG(isar, ID_DFR1, HPMN0, 1); /* FEAT_HPMN0 */
}
-void aarch32_max_tcg_init(ARMCPU *cpu)
+void aarch32_max_v8_tcg_initfn(Object *obj)
{
+ ARMCPU *cpu = ARM_CPU(obj);
+
aarch64_aa32_a57_init(cpu, false);
aa32_max_features(cpu);
#ifdef CONFIG_USER_ONLY
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 04/47] target/arm: Introduce cpu types max-v8 and max-v9
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (2 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 03/47] target/arm: Rename and adjust aarch32_max_v8_tcg_initfn Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 05/47] target/arm: Use -cpu max-v8 with aarch64=off Pierrick Bouvier
` (42 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
From: Richard Henderson <richard.henderson@linaro.org>
Introduce the names and allow them with the virt and sbsa-ref
machine types. So far, the cpu types both exactly match "max".
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/arm/sbsa-ref.c | 2 ++
hw/arm/virt.c | 2 ++
target/arm/tcg/cpu-max-v8.c | 11 +++++++++++
target/arm/tcg/cpu64.c | 1 +
4 files changed, 16 insertions(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 484b90053e8..56d08f605c8 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -913,6 +913,8 @@ static void sbsa_ref_class_init(ObjectClass *oc, const void *data)
ARM_CPU_TYPE_NAME("neoverse-v1"),
ARM_CPU_TYPE_NAME("neoverse-n2"),
ARM_CPU_TYPE_NAME("max"),
+ ARM_CPU_TYPE_NAME("max-v8"),
+ ARM_CPU_TYPE_NAME("max-v9"),
NULL,
};
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index e7a56e37f73..d738b95c726 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -4132,6 +4132,7 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms)
if (tcg_enabled()) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a7")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a15")));
+ g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max-v8")));
}
if (tcg_enabled() && target_aarch64()) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a35")));
@@ -4143,6 +4144,7 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms)
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n1")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-v1")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n2")));
+ g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max-v9")));
}
if (target_aarch64()) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a53")));
diff --git a/target/arm/tcg/cpu-max-v8.c b/target/arm/tcg/cpu-max-v8.c
index 5a9845d88f3..55f8c341423 100644
--- a/target/arm/tcg/cpu-max-v8.c
+++ b/target/arm/tcg/cpu-max-v8.c
@@ -2,6 +2,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "qemu/target-info.h"
#include "internals.h"
@@ -117,3 +118,13 @@ void aarch32_max_v8_tcg_initfn(Object *obj)
cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
#endif
}
+
+static void cpu_max_v8_register_type(void)
+{
+ static const ARMCPUInfo max_v8[2] = {
+ { .name = "max-v8", .initfn = aarch32_max_v8_tcg_initfn },
+ { .name = "max-v8", .initfn = aarch64_max_tcg_initfn }
+ };
+ arm_cpu_register(&max_v8[target_aarch64()]);
+}
+type_init(cpu_max_v8_register_type)
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
index b38c61ba623..d44a8221c8b 100644
--- a/target/arm/tcg/cpu64.c
+++ b/target/arm/tcg/cpu64.c
@@ -1488,6 +1488,7 @@ static const ARMCPUInfo aarch64_cpus[] = {
{ .name = "neoverse-n1", .initfn = aarch64_neoverse_n1_initfn },
{ .name = "neoverse-v1", .initfn = aarch64_neoverse_v1_initfn },
{ .name = "neoverse-n2", .initfn = aarch64_neoverse_n2_initfn },
+ { .name = "max-v9", .initfn = aarch64_max_tcg_initfn },
};
static void aarch64_cpu_register_types(void)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 05/47] target/arm: Use -cpu max-v8 with aarch64=off
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (3 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 04/47] target/arm: Introduce cpu types max-v8 and max-v9 Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 06/47] target/arm: Separate cpu types max-v8 and max-v9 Pierrick Bouvier
` (41 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
From: Richard Henderson <richard.henderson@linaro.org>
Armv9 does not support privileged aarch32 execution, so
aarch64 cannot be disabled. These tests must use Armv8.
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
tests/functional/aarch64/test_virt_aarch64_off.py | 4 ++--
tests/qtest/arm-cpu-features.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/functional/aarch64/test_virt_aarch64_off.py b/tests/functional/aarch64/test_virt_aarch64_off.py
index 13d8b73b0d7..73c9a4109c0 100755
--- a/tests/functional/aarch64/test_virt_aarch64_off.py
+++ b/tests/functional/aarch64/test_virt_aarch64_off.py
@@ -18,9 +18,9 @@ class ArmVirtMachine(LinuxKernelTest):
def test_arm_virt(self):
self.set_machine('virt')
# KVM aarch64=off requires a host CPU that supports it, so
- # restrict the test to TCG only
+ # restrict the test to TCG ARMv8.
self.require_accelerator('tcg')
- self.vm.add_args('-cpu', 'max,aarch64=off')
+ self.vm.add_args('-cpu', 'max-v8,aarch64=off')
kernel_path = self.ASSET_KERNEL.fetch()
diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
index cb4d01fd46a..7348fb8d28b 100644
--- a/tests/qtest/arm-cpu-features.c
+++ b/tests/qtest/arm-cpu-features.c
@@ -493,8 +493,8 @@ static void test_query_cpu_model_expansion(const void *data)
sve_tests_default(qts, "max");
pauth_tests_default(qts, "max");
- /* TCG allows us to turn off AArch64 on the 'max' CPU type */
- assert_set_feature(qts, "max", "aarch64", false);
+ /* TCG allows us to turn off AArch64 on the 'max-v8' CPU type */
+ assert_set_feature(qts, "max-v8", "aarch64", false);
}
qtest_quit(qts);
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 06/47] target/arm: Separate cpu types max-v8 and max-v9
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (4 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 05/47] target/arm: Use -cpu max-v8 with aarch64=off Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 07/47] hw/remote/machine: remove unsupported arm target Pierrick Bouvier
` (40 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
From: Richard Henderson <richard.henderson@linaro.org>
Do not include v9-only features in "max-v8".
Do not include the prohibited v8 features in "max-v9".
In aarch64 tcg mode, define "max" as "max-v9".
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
docs/system/arm/emulation.rst | 13 ++-
target/arm/cpu-max.c | 2 +-
target/arm/internals.h | 3 +-
target/arm/tcg/cpu-max-v8.c | 2 +-
target/arm/tcg/cpu64.c | 160 ++++++++++++++++++++++------------
target/arm/tcg/stubs32.c | 7 +-
6 files changed, 128 insertions(+), 59 deletions(-)
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index cc42db9e0b7..ff02435975b 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -230,7 +230,18 @@ to the `Arm Architecture Reference Manual for A-profile architecture
When a specific named CPU is being emulated, only those features which
are present in hardware for that CPU are emulated. (If a feature is
not in the list above then it is not supported, even if the real
-hardware should have it.) The ``max`` CPU enables all features.
+hardware should have it.)
+
+The ``max-v8`` CPU enables all of the listed Armv8-A architecture
+extensions but none of the Armv9-A architecture extensions.
+
+The ``max-v9`` CPU enables all of the listed extensions except for
+those that are prohibited by the Armv9-A architecture: FEAT_AA32EL1,
+FEAT_AA32EL2, FEAT_AA32EL3, and FEAT_DoubleLock.
+
+The ``max`` CPU is an alias for ``max-v9`` under AArch64 TCG emulation,
+an alias for ``max-v8`` under AArch32 TCG emulation, or an alias
+for ``host`` under hardware virtualization.
R-profile CPU architecture support
==================================
diff --git a/target/arm/cpu-max.c b/target/arm/cpu-max.c
index 9ed45c8764f..739500a04fc 100644
--- a/target/arm/cpu-max.c
+++ b/target/arm/cpu-max.c
@@ -110,7 +110,7 @@ static void cpu_max_initfn(Object *obj)
if (!aarch64_enabled) {
aarch32_max_v8_tcg_initfn(obj);
} else {
- aarch64_max_tcg_initfn(obj);
+ aarch64_max_v9_tcg_initfn(obj);
}
return;
}
diff --git a/target/arm/internals.h b/target/arm/internals.h
index fc7d5ad6f2c..1775835ad50 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1809,7 +1809,8 @@ void aarch64_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
void aarch64_cpu_sme_finalize(ARMCPU *cpu, Error **errp);
void aarch64_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp);
-void aarch64_max_tcg_initfn(Object *obj);
+void aarch64_max_v8_tcg_initfn(Object *obj);
+void aarch64_max_v9_tcg_initfn(Object *obj);
void aarch64_add_pauth_properties(Object *obj);
void aarch64_add_sve_properties(Object *obj);
void aarch64_add_sme_properties(Object *obj);
diff --git a/target/arm/tcg/cpu-max-v8.c b/target/arm/tcg/cpu-max-v8.c
index 55f8c341423..65f851f2006 100644
--- a/target/arm/tcg/cpu-max-v8.c
+++ b/target/arm/tcg/cpu-max-v8.c
@@ -123,7 +123,7 @@ static void cpu_max_v8_register_type(void)
{
static const ARMCPUInfo max_v8[2] = {
{ .name = "max-v8", .initfn = aarch32_max_v8_tcg_initfn },
- { .name = "max-v8", .initfn = aarch64_max_tcg_initfn }
+ { .name = "max-v8", .initfn = aarch64_max_v8_tcg_initfn },
};
arm_cpu_register(&max_v8[target_aarch64()]);
}
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
index d44a8221c8b..251c4b3cf60 100644
--- a/target/arm/tcg/cpu64.c
+++ b/target/arm/tcg/cpu64.c
@@ -1166,11 +1166,10 @@ static void aarch64_neoverse_n2_initfn(Object *obj)
}
/*
- * -cpu max: a CPU with as many features enabled as our emulation supports.
- * The version of '-cpu max' for qemu-system-arm is defined in cpu32.c;
- * this only needs to handle 64 bits.
+ * -cpu max-v8: an ARMv8 CPU with as many features enabled as
+ * our emulation supports.
*/
-void aarch64_max_tcg_initfn(Object *obj)
+void aarch64_max_v8_tcg_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
ARMISARegisters *isar = &cpu->isar;
@@ -1244,7 +1243,7 @@ void aarch64_max_tcg_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64ISAR0, SHA1, 1); /* v8.0: FEAT_SHA1 */
t = FIELD_DP64(t, ID_AA64ISAR0, SHA2, 2); /* v8.1: FEAT_SHA512 */
t = FIELD_DP64(t, ID_AA64ISAR0, CRC32, 1); /* v8.0: FEAT_CRC32 */
- t = FIELD_DP64(t, ID_AA64ISAR0, ATOMIC, 3); /* v9.3: FEAT_LSE128 */
+ t = FIELD_DP64(t, ID_AA64ISAR0, ATOMIC, 2); /* v8.0: FEAT_LSE */
t = FIELD_DP64(t, ID_AA64ISAR0, RDM, 1); /* v8.0: FEAT_RDM */
t = FIELD_DP64(t, ID_AA64ISAR0, SHA3, 1); /* v8.1: FEAT_SHA3 */
t = FIELD_DP64(t, ID_AA64ISAR0, SM3, 1); /* v8.1: FEAT_SM3 */
@@ -1277,16 +1276,10 @@ void aarch64_max_tcg_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64ISAR2, MOPS, 1); /* v8.7: FEAT_MOPS */
t = FIELD_DP64(t, ID_AA64ISAR2, BC, 1); /* v8.7: FEAT_HBC */
t = FIELD_DP64(t, ID_AA64ISAR2, WFXT, 2); /* v8.6: FEAT_WFxT */
- t = FIELD_DP64(t, ID_AA64ISAR2, CSSC, 2); /* v9.3: FEAT_CMPBR */
- t = FIELD_DP64(t, ID_AA64ISAR2, LUT, 1); /* v9.2: FEAT_LUT */
+ t = FIELD_DP64(t, ID_AA64ISAR2, CSSC, 1); /* v8.7: FEAT_CSSC */
t = FIELD_DP64(t, ID_AA64ISAR2, ATS1A, 1); /* v8.8: FEAT_ATS1A */
SET_IDREG(isar, ID_AA64ISAR2, t);
- t = GET_IDREG(isar, ID_AA64ISAR3);
- t = FIELD_DP64(t, ID_AA64ISAR3, FAMINMAX, 1); /* v9.2: FEAT_FAMINMAX */
- t = FIELD_DP64(t, ID_AA64ISAR3, FPRCVT, 1); /* v9.5: FEAT_FPRCVT */
- SET_IDREG(isar, ID_AA64ISAR3, t);
-
t = GET_IDREG(isar, ID_AA64PFR0);
t = FIELD_DP64(t, ID_AA64PFR0, FP, 1); /* v8.2: FEAT_FP16 */
t = FIELD_DP64(t, ID_AA64PFR0, ADVSIMD, 1); /* v8.2: FEAT_FP16 */
@@ -1308,17 +1301,14 @@ void aarch64_max_tcg_initfn(Object *obj)
*/
t = FIELD_DP64(t, ID_AA64PFR1, MTE, 3); /* v8.5: FEAT_MTE3 */
t = FIELD_DP64(t, ID_AA64PFR1, RAS_FRAC, 0); /* v8.3: FEAT_DoubleFault */
- t = FIELD_DP64(t, ID_AA64PFR1, SME, 2); /* v9.2: FEAT_SME2 */
t = FIELD_DP64(t, ID_AA64PFR1, RNDR_TRAP, 1); /* v8.4: FEAT_RNG_TRAP */
t = FIELD_DP64(t, ID_AA64PFR1, CSV2_FRAC, 0); /* v8.0: FEAT_CSV2_3 */
t = FIELD_DP64(t, ID_AA64PFR1, NMI, 1); /* v8.7: FEAT_NMI */
- t = FIELD_DP64(t, ID_AA64PFR1, GCS, 1); /* v9.3: FEAT_GCS */
/* v8.7: FEAT_MTE_NO_ADDRESS_TAGS + FEAT_MTE_CANONICAL_TAGS */
t = FIELD_DP64(t, ID_AA64PFR1, MTEX, 1);
SET_IDREG(isar, ID_AA64PFR1, t);
t = GET_IDREG(isar, ID_AA64PFR2);
- t = FIELD_DP64(t, ID_AA64PFR2, FPMR, 1); /* v9.2: FEAT_FPMR */
t = FIELD_DP64(t, ID_AA64PFR2, MTEFAR, 1); /* v8.7: FEAT_MTE_TAGGED_FAR */
t = FIELD_DP64(t, ID_AA64PFR2, MTESTOREONLY, 1); /* v8.7: FEAT_MTE_STORE_ONLY */
t = FIELD_DP64(t, ID_AA64PFR2, MTEPERM, 1); /* v8.7: FEAT_MTE_PERM */
@@ -1368,25 +1358,14 @@ void aarch64_max_tcg_initfn(Object *obj)
t = GET_IDREG(isar, ID_AA64MMFR3);
t = FIELD_DP64(t, ID_AA64MMFR3, TCRX, 1); /* v8.0: FEAT_TCR2 */
t = FIELD_DP64(t, ID_AA64MMFR3, SCTLRX, 1); /* v8.0: FEAT_SCTLR2 */
- t = FIELD_DP64(t, ID_AA64MMFR3, MEC, 1); /* v9.2: FEAT_MEC */
t = FIELD_DP64(t, ID_AA64MMFR3, SPEC_FPACC, 1); /* v8.2: FEAT_FPACC_SPEC */
t = FIELD_DP64(t, ID_AA64MMFR3, S1PIE, 1); /* v8.8: FEAT_S1PIE */
t = FIELD_DP64(t, ID_AA64MMFR3, S2PIE, 1); /* v8.8: FEAT_S2PIE */
t = FIELD_DP64(t, ID_AA64MMFR3, AIE, 1); /* v8.8: FEAT_AIE */
SET_IDREG(isar, ID_AA64MMFR3, t);
- t = GET_IDREG(isar, ID_AA64MMFR4);
- t = FIELD_DP64(t, ID_AA64MMFR4, ASID2, 1); /* v9.4: FEAT_ASID2 */
- SET_IDREG(isar, ID_AA64MMFR4, t);
-
t = GET_IDREG(isar, ID_AA64ZFR0);
- t = FIELD_DP64(t, ID_AA64ZFR0, SVEVER, 2); /* v9.2: FEAT_SVE2p1 */
- t = FIELD_DP64(t, ID_AA64ZFR0, AES, 2); /* v9.0: FEAT_SVE_PMULL128 */
- t = FIELD_DP64(t, ID_AA64ZFR0, BITPERM, 1); /* v9.0: FEAT_SVE_BitPerm */
t = FIELD_DP64(t, ID_AA64ZFR0, BFLOAT16, 2); /* v8.2: FEAT_EBF16 */
- t = FIELD_DP64(t, ID_AA64ZFR0, B16B16, 1); /* v9.2: FEAT_SVE_B16B16 */
- t = FIELD_DP64(t, ID_AA64ZFR0, SHA3, 1); /* v9.0: FEAT_SVE_SHA3 */
- t = FIELD_DP64(t, ID_AA64ZFR0, SM4, 1); /* v9.0: FEAT_SVE_SM4 */
t = FIELD_DP64(t, ID_AA64ZFR0, I8MM, 1); /* v8.1: FEAT_I8MM */
t = FIELD_DP64(t, ID_AA64ZFR0, F32MM, 1); /* v8.2: FEAT_F32MM */
t = FIELD_DP64(t, ID_AA64ZFR0, F64MM, 1); /* v8.2: FEAT_F64MM */
@@ -1398,6 +1377,106 @@ void aarch64_max_tcg_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64DFR0, HPMN0, 1); /* v8.5: FEAT_HPMN0 */
SET_IDREG(isar, ID_AA64DFR0, t);
+ /* Replicate the same data to the 32-bit id registers. */
+ aa32_max_features(cpu);
+
+#ifdef CONFIG_USER_ONLY
+ /*
+ * For usermode -cpu max we can use a larger and more efficient DCZ
+ * blocksize since we don't have to follow what the hardware does.
+ */
+ cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
+ set_dczid_bs(cpu, 7); /* 512 bytes */
+#endif
+
+ /* v8.2: FEAT_SVE */
+ cpu->sve_vq.supported = MAKE_64BIT_MASK(0, ARM_MAX_VQ);
+ aarch64_add_sve_properties(OBJECT(cpu));
+ object_property_add(OBJECT(cpu), "sve-max-vq", "uint32",
+ cpu_max_get_sve_max_vq, cpu_max_set_sve_max_vq,
+ NULL, NULL);
+
+ /* v8.2: FEAT_PAuth2 */
+ aarch64_add_pauth_properties(OBJECT(cpu));
+
+ /* v8.4: FEAT_MTE2 */
+ cpu->gm_blocksize = 6; /* 256 bytes */
+
+ /* v8.6: FEAT_LPA2 */
+ qdev_property_add_static(DEVICE(cpu), &arm_cpu_lpa2_property);
+}
+
+/*
+ * -cpu max-v9: an ARMv9 CPU with as many features enabled as
+ * our emulation supports.
+ */
+void aarch64_max_v9_tcg_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ ARMISARegisters *isar = &cpu->isar;
+ uint64_t t;
+
+ /* Armv9.0 is based on a minimum of Armv8.5. */
+ aarch64_max_v8_tcg_initfn(obj);
+
+ /*
+ * Armv9.0 does not support AArch32 except at EL0,
+ * therefore indicate EL1 through EL3 are AArch64-only.
+ */
+ t = GET_IDREG(isar, ID_AA64PFR0);
+ t = FIELD_DP64(t, ID_AA64PFR0, EL1, 1);
+ t = FIELD_DP64(t, ID_AA64PFR0, EL2, 1);
+ t = FIELD_DP64(t, ID_AA64PFR0, EL3, 1);
+ SET_IDREG(isar, ID_AA64PFR0, t);
+
+ /* v9.0 prohibits FEAT_DoubleLock. */
+ FIELD_DP64_IDREG(isar, ID_AA64DFR0, DOUBLELOCK, -1);
+ FIELD_DP64_IDREG(isar, ID_AA64PFR0, RAS, 1);
+ isar->dbgdevid = FIELD_DP32(isar->dbgdevid, DBGDEVID, DOUBLELOCK, 0);
+
+ /*
+ * Below, note the revision from which the feature is OPTIONAL.
+ */
+ t = GET_IDREG(isar, ID_AA64ISAR0);
+ t = FIELD_DP64(t, ID_AA64ISAR0, ATOMIC, 3); /* v9.3: FEAT_LSE128 */
+ SET_IDREG(isar, ID_AA64ISAR0, t);
+
+ t = GET_IDREG(isar, ID_AA64ISAR2);
+ t = FIELD_DP64(t, ID_AA64ISAR2, CSSC, 2); /* v9.3: FEAT_CMPBR */
+ t = FIELD_DP64(t, ID_AA64ISAR2, LUT, 1); /* v9.2: FEAT_LUT */
+ SET_IDREG(isar, ID_AA64ISAR2, t);
+
+ t = GET_IDREG(isar, ID_AA64ISAR3);
+ t = FIELD_DP64(t, ID_AA64ISAR3, FAMINMAX, 1); /* v9.2: FEAT_FAMINMAX */
+ t = FIELD_DP64(t, ID_AA64ISAR3, FPRCVT, 1); /* v9.5: FEAT_FPRCVT */
+ SET_IDREG(isar, ID_AA64ISAR3, t);
+
+ t = GET_IDREG(isar, ID_AA64PFR1);
+ t = FIELD_DP64(t, ID_AA64PFR1, SME, 2); /* v9.2: FEAT_SME2 */
+ t = FIELD_DP64(t, ID_AA64PFR1, GCS, 1); /* v9.3: FEAT_GCS */
+ SET_IDREG(isar, ID_AA64PFR1, t);
+
+ t = GET_IDREG(isar, ID_AA64PFR2);
+ t = FIELD_DP64(t, ID_AA64PFR2, FPMR, 1); /* v9.2: FEAT_FPMR */
+ SET_IDREG(isar, ID_AA64PFR2, t);
+
+ t = GET_IDREG(isar, ID_AA64MMFR3);
+ t = FIELD_DP64(t, ID_AA64MMFR3, MEC, 1); /* v9.2: FEAT_MEC */
+ SET_IDREG(isar, ID_AA64MMFR3, t);
+
+ t = GET_IDREG(isar, ID_AA64MMFR4);
+ t = FIELD_DP64(t, ID_AA64MMFR4, ASID2, 1); /* v9.4: FEAT_ASID2 */
+ SET_IDREG(isar, ID_AA64MMFR4, t);
+
+ t = GET_IDREG(isar, ID_AA64ZFR0);
+ t = FIELD_DP64(t, ID_AA64ZFR0, SVEVER, 2); /* v9.2: FEAT_SVE2p1 */
+ t = FIELD_DP64(t, ID_AA64ZFR0, AES, 2); /* v9.0: FEAT_SVE_PMULL128 */
+ t = FIELD_DP64(t, ID_AA64ZFR0, BITPERM, 1); /* v9.0: FEAT_SVE_BitPerm */
+ t = FIELD_DP64(t, ID_AA64ZFR0, B16B16, 1); /* v9.2: FEAT_SVE_B16B16 */
+ t = FIELD_DP64(t, ID_AA64ZFR0, SHA3, 1); /* v9.0: FEAT_SVE_SHA3 */
+ t = FIELD_DP64(t, ID_AA64ZFR0, SM4, 1); /* v9.0: FEAT_SVE_SM4 */
+ SET_IDREG(isar, ID_AA64ZFR0, t);
+
t = GET_IDREG(isar, ID_AA64SMFR0);
t = FIELD_DP64(t, ID_AA64SMFR0, SMOP4, 1); /* v9.4: FEAT_SME_MOP4 */
t = FIELD_DP64(t, ID_AA64SMFR0, STMOP, 1); /* v9.4: FEAT_SME_TMOP */
@@ -1434,43 +1513,16 @@ void aarch64_max_tcg_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64FPFR0, F8CVT, 1); /* v9.2: FEAT_FP8 */
SET_IDREG(isar, ID_AA64FPFR0, t);
- /* Replicate the same data to the 32-bit id registers. */
- aa32_max_features(cpu);
-
-#ifdef CONFIG_USER_ONLY
- /*
- * For usermode -cpu max we can use a larger and more efficient DCZ
- * blocksize since we don't have to follow what the hardware does.
- */
- cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
- set_dczid_bs(cpu, 7); /* 512 bytes */
-#endif
-
- /* v8.4: FEAT_MTE2 */
- cpu->gm_blocksize = 6; /* 256 bytes */
-
- /* v8.2: FEAT_SVE */
- cpu->sve_vq.supported = MAKE_64BIT_MASK(0, ARM_MAX_VQ);
- aarch64_add_sve_properties(obj);
- object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq,
- cpu_max_set_sve_max_vq, NULL, NULL);
-
/* v9.2: FEAT_SME */
cpu->sme_vq.supported = SVE_VQ_POW2_MAP;
aarch64_add_sme_properties(obj);
- /* v8.2: FEAT_PAuth2 */
- aarch64_add_pauth_properties(obj);
-
/* v9.1: FEAT_RME */
object_property_add_bool(obj, "x-rme", cpu_arm_get_rme, cpu_arm_set_rme);
/* v9.4: FEAT_RME_GPC2 */
object_property_add(obj, "x-l0gptsz", "uint32", cpu_max_get_l0gptsz,
cpu_max_set_l0gptsz, NULL, NULL);
-
- /* v8.6: FEAT_LPA2 */
- qdev_property_add_static(DEVICE(obj), &arm_cpu_lpa2_property);
}
static const ARMCPUInfo aarch64_cpus[] = {
@@ -1488,7 +1540,7 @@ static const ARMCPUInfo aarch64_cpus[] = {
{ .name = "neoverse-n1", .initfn = aarch64_neoverse_n1_initfn },
{ .name = "neoverse-v1", .initfn = aarch64_neoverse_v1_initfn },
{ .name = "neoverse-n2", .initfn = aarch64_neoverse_n2_initfn },
- { .name = "max-v9", .initfn = aarch64_max_tcg_initfn },
+ { .name = "max-v9", .initfn = aarch64_max_v9_tcg_initfn },
};
static void aarch64_cpu_register_types(void)
diff --git a/target/arm/tcg/stubs32.c b/target/arm/tcg/stubs32.c
index 78f819ef6ff..af0911a24c3 100644
--- a/target/arm/tcg/stubs32.c
+++ b/target/arm/tcg/stubs32.c
@@ -28,7 +28,12 @@ void aarch64_host_initfn(Object *obj)
g_assert_not_reached();
}
-void aarch64_max_tcg_initfn(Object *obj)
+void aarch64_max_v8_tcg_initfn(Object *obj)
+{
+ g_assert_not_reached();
+}
+
+void aarch64_max_v9_tcg_initfn(Object *obj)
{
g_assert_not_reached();
}
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 07/47] hw/remote/machine: remove unsupported arm target
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (5 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 06/47] target/arm: Separate cpu types max-v8 and max-v9 Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 09/47] qom/object: add is_available callback to TypeInfo Pierrick Bouvier
` (39 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
With recent target machine changes, this machine was made available for
AArch32. However, it depends on CONFIG_KVM (see Kconfig), and since we
don't support 32 bit anymore, we don't support it. See main
meson.build and 'kvm_targets' for more details.
Fixes: 4e8ac6857faab2 "hw/remote/machine.c: Mark x-remote machine as OK for AArch64 and AArch32"
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/remote/machine.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/remote/machine.c b/hw/remote/machine.c
index df08f640199..88d38b75d52 100644
--- a/hw/remote/machine.c
+++ b/hw/remote/machine.c
@@ -150,7 +150,6 @@ static const TypeInfo remote_machine = {
.interfaces = (const InterfaceInfo[]) {
{ TYPE_HOTPLUG_HANDLER },
{ TYPE_TARGET_AARCH64_MACHINE },
- { TYPE_TARGET_ARM_MACHINE },
{ }
}
};
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 09/47] qom/object: add is_available callback to TypeInfo
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (6 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 07/47] hw/remote/machine: remove unsupported arm target Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 6:37 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 10/47] hw/arm: filter minimal set of machines Pierrick Bouvier
` (38 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
With the single-binary, we start mixing types for different targets,
that may or may not be available for current one.
Previously, we implemented an approach based on interfaces, but it
proved to be too limited. It requires duplication between
machines/cpus/devices, and does not handle specific cases where a type
should be available based on a target configuration (Kconfig).
To solve this, we add a new callback, is_available, to TypeInfo.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/qom/object.h | 3 +++
qom/object.c | 4 ++++
rust/qom/src/qom.rs | 1 +
3 files changed, 8 insertions(+)
diff --git a/include/qom/object.h b/include/qom/object.h
index e24f0a2b2d0..7ecd0f210fb 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -469,6 +469,8 @@ struct Object
* @class_data: Data to pass to the @class_init,
* @class_base_init. This can be useful when building dynamic
* classes.
+ * @is_available: callback invoked at registration time, to dynamically check if
+ * this type should be available or not.
* @interfaces: The list of interfaces associated with this type. This
* should point to a static array that's terminated with a zero filled
* element.
@@ -491,6 +493,7 @@ struct TypeInfo
void (*class_base_init)(ObjectClass *klass, const void *data);
const void *class_data;
+ bool (*is_available)(void);
const InterfaceInfo *interfaces;
};
diff --git a/qom/object.c b/qom/object.c
index 85bbd7f9fe1..b1834a57cc9 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -163,6 +163,10 @@ static TypeImpl *type_register_internal(const TypeInfo *info)
abort();
}
+ if (info->is_available && !info->is_available()) {
+ return NULL;
+ }
+
ti = type_new(info);
type_table_add(ti);
diff --git a/rust/qom/src/qom.rs b/rust/qom/src/qom.rs
index cc00ddcfc98..bbb485e2cfd 100644
--- a/rust/qom/src/qom.rs
+++ b/rust/qom/src/qom.rs
@@ -691,6 +691,7 @@ pub trait ObjectImpl: ObjectType + IsA<Object> {
class_init: Some(rust_class_init::<Self>),
class_base_init: Self::CLASS_BASE_INIT,
class_data: core::ptr::null(),
+ is_available: None,
interfaces: core::ptr::null(),
};
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 09/47] qom/object: add is_available callback to TypeInfo
2026-08-28 22:58 ` [PATCH 09/47] qom/object: add is_available callback to TypeInfo Pierrick Bouvier
@ 2026-08-31 6:37 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 6:37 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 29/8/26 00:58, Pierrick Bouvier wrote:
> With the single-binary, we start mixing types for different targets,
> that may or may not be available for current one.
>
> Previously, we implemented an approach based on interfaces, but it
> proved to be too limited. It requires duplication between
> machines/cpus/devices, and does not handle specific cases where a type
> should be available based on a target configuration (Kconfig).
>
> To solve this, we add a new callback, is_available, to TypeInfo.
Back to 18 months ago:
https://lore.kernel.org/qemu-devel/62dcbd00-0bb6-43ff-998d-a07b85917c99@linaro.org/
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> include/qom/object.h | 3 +++
> qom/object.c | 4 ++++
> rust/qom/src/qom.rs | 1 +
> 3 files changed, 8 insertions(+)
>
> diff --git a/include/qom/object.h b/include/qom/object.h
> index e24f0a2b2d0..7ecd0f210fb 100644
> --- a/include/qom/object.h
> +++ b/include/qom/object.h
> @@ -469,6 +469,8 @@ struct Object
> * @class_data: Data to pass to the @class_init,
> * @class_base_init. This can be useful when building dynamic
> * classes.
> + * @is_available: callback invoked at registration time, to dynamically check if
> + * this type should be available or not.
> * @interfaces: The list of interfaces associated with this type. This
> * should point to a static array that's terminated with a zero filled
> * element.
> @@ -491,6 +493,7 @@ struct TypeInfo
> void (*class_base_init)(ObjectClass *klass, const void *data);
> const void *class_data;
>
> + bool (*is_available)(void);
> const InterfaceInfo *interfaces;
> };
>
> diff --git a/qom/object.c b/qom/object.c
> index 85bbd7f9fe1..b1834a57cc9 100644
> --- a/qom/object.c
> +++ b/qom/object.c
> @@ -163,6 +163,10 @@ static TypeImpl *type_register_internal(const TypeInfo *info)
> abort();
> }
>
> + if (info->is_available && !info->is_available()) {
> + return NULL;
> + }
> +
> ti = type_new(info);
>
> type_table_add(ti);
> diff --git a/rust/qom/src/qom.rs b/rust/qom/src/qom.rs
> index cc00ddcfc98..bbb485e2cfd 100644
> --- a/rust/qom/src/qom.rs
> +++ b/rust/qom/src/qom.rs
> @@ -691,6 +691,7 @@ pub trait ObjectImpl: ObjectType + IsA<Object> {
> class_init: Some(rust_class_init::<Self>),
> class_base_init: Self::CLASS_BASE_INIT,
> class_data: core::ptr::null(),
> + is_available: None,
> interfaces: core::ptr::null(),
> };
>
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 10/47] hw/arm: filter minimal set of machines
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (7 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 09/47] qom/object: add is_available callback to TypeInfo Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 6:38 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 11/47] system: query machines using TYPE_MACHINE Pierrick Bouvier
` (37 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
We are about to change the filtering logic for machines. These boards
are impacted and already are conditionally available. To not break
existing binaries, we need to filter them accordingly with new mechanic.
From there, we are free to remove the previous filtering mechanic
without changing any existing behaviour.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/arm/aspeed_ast27x0-fc.c | 1 +
hw/arm/aspeed_ast27x0_evb.c | 2 ++
hw/arm/raspi.c | 2 ++
hw/arm/raspi4b.c | 1 +
4 files changed, 6 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index ceeae336df1..54230aa92e6 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -235,6 +235,7 @@ static const TypeInfo ast2700fc_types[] = {
.parent = TYPE_MACHINE,
.class_init = ast2700fc_class_init,
.instance_size = sizeof(Ast2700FCState),
+ .is_available = target_aarch64,
.interfaces = aarch64_machine_interfaces,
},
};
diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c
index 0ff1bebeb0e..2b767808e12 100644
--- a/hw/arm/aspeed_ast27x0_evb.c
+++ b/hw/arm/aspeed_ast27x0_evb.c
@@ -76,12 +76,14 @@ static const TypeInfo aspeed_ast27x0_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast2700a1-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a1_evb_class_init,
+ .is_available = target_aarch64,
.interfaces = aarch64_machine_interfaces,
},
{
.name = MACHINE_TYPE_NAME("ast2700a2-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a2_evb_class_init,
+ .is_available = target_aarch64,
.interfaces = aarch64_machine_interfaces,
}
};
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 3f99e87428c..bbaa20bd630 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -407,11 +407,13 @@ static const TypeInfo raspi_machine_types[] = {
.name = MACHINE_TYPE_NAME("raspi3ap"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi3ap_machine_class_init,
+ .is_available = target_aarch64,
.interfaces = aarch64_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("raspi3b"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi3b_machine_class_init,
+ .is_available = target_aarch64,
.interfaces = aarch64_machine_interfaces,
}, {
.name = TYPE_RASPI_MACHINE,
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index e1595a875fe..2ad561fdcfc 100644
--- a/hw/arm/raspi4b.c
+++ b/hw/arm/raspi4b.c
@@ -126,6 +126,7 @@ static const TypeInfo raspi4b_machine_type = {
.parent = TYPE_RASPI_BASE_MACHINE,
.instance_size = sizeof(Raspi4bMachineState),
.class_init = raspi4b_machine_class_init,
+ .is_available = target_aarch64,
.interfaces = aarch64_machine_interfaces,
};
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 10/47] hw/arm: filter minimal set of machines
2026-08-28 22:58 ` [PATCH 10/47] hw/arm: filter minimal set of machines Pierrick Bouvier
@ 2026-08-31 6:38 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 6:38 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 29/8/26 00:58, Pierrick Bouvier wrote:
> We are about to change the filtering logic for machines. These boards
> are impacted and already are conditionally available. To not break
> existing binaries, we need to filter them accordingly with new mechanic.
>
> From there, we are free to remove the previous filtering mechanic
> without changing any existing behaviour.
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> hw/arm/aspeed_ast27x0-fc.c | 1 +
> hw/arm/aspeed_ast27x0_evb.c | 2 ++
> hw/arm/raspi.c | 2 ++
> hw/arm/raspi4b.c | 1 +
> 4 files changed, 6 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 11/47] system: query machines using TYPE_MACHINE
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (8 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 10/47] hw/arm: filter minimal set of machines Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 6:40 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 12/47] target-info: remove machine_typename Pierrick Bouvier
` (36 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
We drop the target_machine_typename() we introduced previously, and
revert to using TYPE_MACHINE. From there, we'll make sure only the right
types are registered at startup time.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/core/machine-qmp-cmds.c | 2 +-
monitor/qemu-config-qmp.c | 2 +-
system/vl.c | 5 ++---
3 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index 1aa5f262298..543dd3201b5 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -99,7 +99,7 @@ MachineInfoList *qmp_query_machines(bool has_compat_props, bool compat_props,
GSList *el, *machines;
MachineInfoList *mach_list = NULL;
- machines = object_class_get_list(target_machine_typename(), false);
+ machines = object_class_get_list(TYPE_MACHINE, false);
for (el = machines; el; el = el->next) {
MachineClass *mc = el->data;
const char *default_cpu_type = machine_class_default_cpu_type(mc);
diff --git a/monitor/qemu-config-qmp.c b/monitor/qemu-config-qmp.c
index 29801023564..a680c9feca5 100644
--- a/monitor/qemu-config-qmp.c
+++ b/monitor/qemu-config-qmp.c
@@ -129,7 +129,7 @@ static CommandLineParameterInfoList *query_all_machine_properties(void)
ObjectProperty *prop;
bool is_new;
- machines = object_class_get_list(target_machine_typename(), false);
+ machines = object_class_get_list(TYPE_MACHINE, false);
assert(machines);
/* Loop over all machine classes */
diff --git a/system/vl.c b/system/vl.c
index 061cbdf860b..f7f8aabd122 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -1570,7 +1570,7 @@ static void machine_help_func(const QDict *qdict)
GSList *el;
const char *type = qdict_get_try_str(qdict, "type");
- machines = object_class_get_list(target_machine_typename(), false);
+ machines = object_class_get_list(TYPE_MACHINE, false);
if (type) {
ObjectClass *machine_class = OBJECT_CLASS(find_machine(type, machines));
if (machine_class) {
@@ -1682,8 +1682,7 @@ static MachineClass *select_machine(QDict *qdict, Error **errp)
{
ERRP_GUARD();
const char *machine_type = qdict_get_try_str(qdict, "type");
- g_autoptr(GSList) machines = object_class_get_list(target_machine_typename(),
- false);
+ g_autoptr(GSList) machines = object_class_get_list(TYPE_MACHINE, false);
MachineClass *machine_class = NULL;
if (machine_type) {
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 11/47] system: query machines using TYPE_MACHINE
2026-08-28 22:58 ` [PATCH 11/47] system: query machines using TYPE_MACHINE Pierrick Bouvier
@ 2026-08-31 6:40 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 6:40 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 29/8/26 00:58, Pierrick Bouvier wrote:
> We drop the target_machine_typename() we introduced previously, and
> revert to using TYPE_MACHINE. From there, we'll make sure only the right
> types are registered at startup time.
"This reverts commit 2c6fab1c143059e59128b805f4e6a6796eedee43."
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> hw/core/machine-qmp-cmds.c | 2 +-
> monitor/qemu-config-qmp.c | 2 +-
> system/vl.c | 5 ++---
> 3 files changed, 4 insertions(+), 5 deletions(-)
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 12/47] target-info: remove machine_typename
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (9 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 11/47] system: query machines using TYPE_MACHINE Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 6:40 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 13/47] configs/targets: remove target info definitions Pierrick Bouvier
` (35 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
This field is now unused, so we can remove it.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
configs/targets/aarch64-softmmu.c | 1 -
configs/targets/arm-softmmu.c | 1 -
configs/targets/riscv32-softmmu.c | 1 -
configs/targets/riscv64-softmmu.c | 1 -
include/qemu/target-info-impl.h | 2 --
include/qemu/target-info.h | 8 --------
target-info-stub.c | 1 -
target-info.c | 5 -----
8 files changed, 20 deletions(-)
diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c
index 75d95b0e743..2200a4f19e9 100644
--- a/configs/targets/aarch64-softmmu.c
+++ b/configs/targets/aarch64-softmmu.c
@@ -18,7 +18,6 @@ static const TargetInfo target_info_aarch64_system = {
.target_arch = SYS_EMU_TARGET_AARCH64,
.long_bits = 64,
.cpu_type = TYPE_ARM_CPU,
- .machine_typename = TYPE_TARGET_AARCH64_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
.page_bits_vary = true,
.page_bits_init = TARGET_PAGE_BITS_LEGACY,
diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c
index 73546fa5737..9d558a0c1a1 100644
--- a/configs/targets/arm-softmmu.c
+++ b/configs/targets/arm-softmmu.c
@@ -18,7 +18,6 @@ static const TargetInfo target_info_arm_system = {
.target_arch = SYS_EMU_TARGET_ARM,
.long_bits = 32,
.cpu_type = TYPE_ARM_CPU,
- .machine_typename = TYPE_TARGET_ARM_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
.page_bits_vary = true,
.page_bits_init = TARGET_PAGE_BITS_LEGACY,
diff --git a/configs/targets/riscv32-softmmu.c b/configs/targets/riscv32-softmmu.c
index 752c813077e..c1d94679c7e 100644
--- a/configs/targets/riscv32-softmmu.c
+++ b/configs/targets/riscv32-softmmu.c
@@ -18,7 +18,6 @@ static const TargetInfo target_info_riscv32_system = {
.target_arch = SYS_EMU_TARGET_RISCV32,
.long_bits = 32,
.cpu_type = TYPE_RISCV_CPU,
- .machine_typename = TYPE_TARGET_RISCV32_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
.page_bits_init = TARGET_PAGE_BITS,
};
diff --git a/configs/targets/riscv64-softmmu.c b/configs/targets/riscv64-softmmu.c
index 5150f0fe9d9..f648a5c8944 100644
--- a/configs/targets/riscv64-softmmu.c
+++ b/configs/targets/riscv64-softmmu.c
@@ -18,7 +18,6 @@ static const TargetInfo target_info_riscv64_system = {
.target_arch = SYS_EMU_TARGET_RISCV64,
.long_bits = 64,
.cpu_type = TYPE_RISCV_CPU,
- .machine_typename = TYPE_TARGET_RISCV64_MACHINE,
.endianness = ENDIAN_MODE_LITTLE,
.page_bits_init = TARGET_PAGE_BITS,
};
diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
index c917d546eab..cf42aabbc8b 100644
--- a/include/qemu/target-info-impl.h
+++ b/include/qemu/target-info-impl.h
@@ -21,8 +21,6 @@ typedef struct TargetInfo {
unsigned long_bits;
/* runtime equivalent of CPU_RESOLVING_TYPE definition */
const char *cpu_type;
- /* QOM typename machines for this binary must implement */
- const char *machine_typename;
/* related to TARGET_BIG_ENDIAN definition */
EndianMode endianness;
/*
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index 6c5b714288e..b23e5bc5865 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -23,14 +23,6 @@ const char *target_name(void);
*/
unsigned target_long_bits(void);
-/**
- * target_machine_typename:
- *
- * Returns: Name of the QOM interface implemented by machines
- * usable on this target binary.
- */
-const char *target_machine_typename(void);
-
/**
* target_cpu_type:
*
diff --git a/target-info-stub.c b/target-info-stub.c
index 22b7911201c..d121b8c0170 100644
--- a/target-info-stub.c
+++ b/target-info-stub.c
@@ -29,7 +29,6 @@ static const TargetInfo target_info_stub = {
.target_arch = glue(SYS_EMU_TARGET_, TARGET_ARCH),
.long_bits = TARGET_LONG_BITS,
.cpu_type = CPU_RESOLVING_TYPE,
- .machine_typename = TYPE_MACHINE,
.endianness = TARGET_BIG_ENDIAN ? ENDIAN_MODE_BIG : ENDIAN_MODE_LITTLE,
#ifdef TARGET_PAGE_BITS_VARY
.page_bits_vary = true,
diff --git a/target-info.c b/target-info.c
index 04c69c41f8a..012b384036d 100644
--- a/target-info.c
+++ b/target-info.c
@@ -32,11 +32,6 @@ const char *target_cpu_type(void)
return target_info()->cpu_type;
}
-const char *target_machine_typename(void)
-{
- return target_info()->machine_typename;
-}
-
EndianMode target_endian_mode(void)
{
return target_info()->endianness;
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 12/47] target-info: remove machine_typename
2026-08-28 22:58 ` [PATCH 12/47] target-info: remove machine_typename Pierrick Bouvier
@ 2026-08-31 6:40 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 6:40 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 29/8/26 00:58, Pierrick Bouvier wrote:
> This field is now unused, so we can remove it.
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> configs/targets/aarch64-softmmu.c | 1 -
> configs/targets/arm-softmmu.c | 1 -
> configs/targets/riscv32-softmmu.c | 1 -
> configs/targets/riscv64-softmmu.c | 1 -
> include/qemu/target-info-impl.h | 2 --
> include/qemu/target-info.h | 8 --------
> target-info-stub.c | 1 -
> target-info.c | 5 -----
> 8 files changed, 20 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 13/47] configs/targets: remove target info definitions
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (10 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 12/47] target-info: remove machine_typename Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 14/47] target-info: rename target-info-stub.c in target-info-def.c Pierrick Bouvier
` (34 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Now that we remove machine_typename, we don't need to keep duplicated
file per target anymore. So we can just rely on target-info-stub.c.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
configs/targets/aarch64-softmmu.c | 26 --------------------------
configs/targets/arm-softmmu.c | 26 --------------------------
configs/targets/meson.build | 6 ------
configs/targets/riscv32-softmmu.c | 25 -------------------------
configs/targets/riscv64-softmmu.c | 25 -------------------------
meson.build | 7 +------
6 files changed, 1 insertion(+), 114 deletions(-)
delete mode 100644 configs/targets/aarch64-softmmu.c
delete mode 100644 configs/targets/arm-softmmu.c
delete mode 100644 configs/targets/meson.build
delete mode 100644 configs/targets/riscv32-softmmu.c
delete mode 100644 configs/targets/riscv64-softmmu.c
diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c
deleted file mode 100644
index 2200a4f19e9..00000000000
--- a/configs/targets/aarch64-softmmu.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * QEMU binary/target API (qemu-system-aarch64)
- *
- * Copyright (c) Linaro
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
- */
-
-#include "qemu/osdep.h"
-#include "qemu/target-info-impl.h"
-#include "qemu/target-info-init.h"
-#include "hw/arm/machines-qom.h"
-#include "target/arm/cpu-qom.h"
-#include "target/arm/cpu-param.h"
-
-static const TargetInfo target_info_aarch64_system = {
- .target_name = "aarch64",
- .target_arch = SYS_EMU_TARGET_AARCH64,
- .long_bits = 64,
- .cpu_type = TYPE_ARM_CPU,
- .endianness = ENDIAN_MODE_LITTLE,
- .page_bits_vary = true,
- .page_bits_init = TARGET_PAGE_BITS_LEGACY,
-};
-
-target_info_init(target_info_aarch64_system)
diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c
deleted file mode 100644
index 9d558a0c1a1..00000000000
--- a/configs/targets/arm-softmmu.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * QEMU binary/target API (qemu-system-arm)
- *
- * Copyright (c) Linaro
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
- */
-
-#include "qemu/osdep.h"
-#include "qemu/target-info-impl.h"
-#include "qemu/target-info-init.h"
-#include "hw/arm/machines-qom.h"
-#include "target/arm/cpu-qom.h"
-#include "target/arm/cpu-param.h"
-
-static const TargetInfo target_info_arm_system = {
- .target_name = "arm",
- .target_arch = SYS_EMU_TARGET_ARM,
- .long_bits = 32,
- .cpu_type = TYPE_ARM_CPU,
- .endianness = ENDIAN_MODE_LITTLE,
- .page_bits_vary = true,
- .page_bits_init = TARGET_PAGE_BITS_LEGACY,
-};
-
-target_info_init(target_info_arm_system)
diff --git a/configs/targets/meson.build b/configs/targets/meson.build
deleted file mode 100644
index 2ab4d27eaf5..00000000000
--- a/configs/targets/meson.build
+++ /dev/null
@@ -1,6 +0,0 @@
-foreach target : [
- 'arm-softmmu', 'aarch64-softmmu',
- 'riscv32-softmmu', 'riscv64-softmmu'
- ]
- config_target_info += {target : files(target + '.c')}
-endforeach
diff --git a/configs/targets/riscv32-softmmu.c b/configs/targets/riscv32-softmmu.c
deleted file mode 100644
index c1d94679c7e..00000000000
--- a/configs/targets/riscv32-softmmu.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * QEMU binary/target API (qemu-system-riscv32)
- *
- * Copyright (c) rev.ng Labs Srl.
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
- */
-
-#include "qemu/osdep.h"
-#include "qemu/target-info-impl.h"
-#include "qemu/target-info-init.h"
-#include "hw/riscv/machines-qom.h"
-#include "target/riscv/cpu-qom.h"
-#include "target/riscv/cpu-param.h"
-
-static const TargetInfo target_info_riscv32_system = {
- .target_name = "riscv32",
- .target_arch = SYS_EMU_TARGET_RISCV32,
- .long_bits = 32,
- .cpu_type = TYPE_RISCV_CPU,
- .endianness = ENDIAN_MODE_LITTLE,
- .page_bits_init = TARGET_PAGE_BITS,
-};
-
-target_info_init(target_info_riscv32_system)
diff --git a/configs/targets/riscv64-softmmu.c b/configs/targets/riscv64-softmmu.c
deleted file mode 100644
index f648a5c8944..00000000000
--- a/configs/targets/riscv64-softmmu.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * QEMU binary/target API (qemu-system-riscv64)
- *
- * Copyright (c) rev.ng Labs Srl.
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
- */
-
-#include "qemu/osdep.h"
-#include "qemu/target-info-impl.h"
-#include "qemu/target-info-init.h"
-#include "hw/riscv/machines-qom.h"
-#include "target/riscv/cpu-qom.h"
-#include "target/riscv/cpu-param.h"
-
-static const TargetInfo target_info_riscv64_system = {
- .target_name = "riscv64",
- .target_arch = SYS_EMU_TARGET_RISCV64,
- .long_bits = 64,
- .cpu_type = TYPE_RISCV_CPU,
- .endianness = ENDIAN_MODE_LITTLE,
- .page_bits_init = TARGET_PAGE_BITS,
-};
-
-target_info_init(target_info_riscv64_system)
diff --git a/meson.build b/meson.build
index 6dcfdceb507..93d495f09a0 100644
--- a/meson.build
+++ b/meson.build
@@ -3746,7 +3746,6 @@ subdir('dump')
subdir('accel')
subdir('backends')
-subdir('configs/targets')
subdir('disas')
subdir('migration')
subdir('monitor')
@@ -4323,11 +4322,7 @@ foreach target : target_dirs
endif
endif
- if target in config_target_info
- arch_srcs += config_target_info[target]
- else
- arch_srcs += files('target-info-stub.c')
- endif
+ arch_srcs += files('target-info-stub.c')
if target_base_arch in target_arch
t = target_arch[target_base_arch].apply(config_target, strict: false)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 14/47] target-info: rename target-info-stub.c in target-info-def.c
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (11 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 13/47] configs/targets: remove target info definitions Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 15/47] hw/arm: remove TYPE_TARGET_{AARCH64,ARM}_MACHINE Pierrick Bouvier
` (33 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Now it's the only file left to define target info, we call it def to
make the intent more clear.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
meson.build | 2 +-
target-info-stub.c => target-info-def.c | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename target-info-stub.c => target-info-def.c (100%)
diff --git a/meson.build b/meson.build
index 93d495f09a0..5da6c15551e 100644
--- a/meson.build
+++ b/meson.build
@@ -4322,7 +4322,7 @@ foreach target : target_dirs
endif
endif
- arch_srcs += files('target-info-stub.c')
+ arch_srcs += files('target-info-def.c')
if target_base_arch in target_arch
t = target_arch[target_base_arch].apply(config_target, strict: false)
diff --git a/target-info-stub.c b/target-info-def.c
similarity index 100%
rename from target-info-stub.c
rename to target-info-def.c
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 15/47] hw/arm: remove TYPE_TARGET_{AARCH64,ARM}_MACHINE
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (12 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 14/47] target-info: rename target-info-stub.c in target-info-def.c Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 16/47] hw/arm: remove {arm, arm_aarch64, aarch64}_machine_interfaces Pierrick Bouvier via qemu development
` (32 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
We don't need those types anymore.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/core/null-machine.c | 2 --
hw/nitro/machine.c | 5 -----
hw/remote/machine.c | 1 -
include/hw/arm/machines-qom.h | 6 ------
target-info-qom.c | 8 --------
target/arm/machine.c | 5 -----
6 files changed, 27 deletions(-)
diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index f132a7b89b4..c1ecf3214fd 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -58,8 +58,6 @@ static void machine_none_machine_init(MachineClass *mc)
}
DEFINE_MACHINE_WITH_INTERFACES("none", machine_none_machine_init,
- { TYPE_TARGET_AARCH64_MACHINE },
- { TYPE_TARGET_ARM_MACHINE },
{ TYPE_TARGET_RISCV32_MACHINE },
{ TYPE_TARGET_RISCV64_MACHINE },
{ })
diff --git a/hw/nitro/machine.c b/hw/nitro/machine.c
index 8849959359c..bb8878299bc 100644
--- a/hw/nitro/machine.c
+++ b/hw/nitro/machine.c
@@ -262,11 +262,6 @@ static const TypeInfo nitro_machine_info = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(NitroMachineState),
.class_init = nitro_machine_class_init,
- .interfaces = (const InterfaceInfo[]) {
- /* x86_64 and aarch64 only */
- { TYPE_TARGET_AARCH64_MACHINE },
- { }
- },
};
static void nitro_machine_register(void)
diff --git a/hw/remote/machine.c b/hw/remote/machine.c
index 88d38b75d52..6580e0d9683 100644
--- a/hw/remote/machine.c
+++ b/hw/remote/machine.c
@@ -149,7 +149,6 @@ static const TypeInfo remote_machine = {
.class_init = remote_machine_class_init,
.interfaces = (const InterfaceInfo[]) {
{ TYPE_HOTPLUG_HANDLER },
- { TYPE_TARGET_AARCH64_MACHINE },
{ }
}
};
diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h
index 3ed39384e59..81ffa434303 100644
--- a/include/hw/arm/machines-qom.h
+++ b/include/hw/arm/machines-qom.h
@@ -11,12 +11,6 @@
#include "hw/core/boards.h"
-#define TYPE_TARGET_ARM_MACHINE \
- "target-info-arm-machine"
-
-#define TYPE_TARGET_AARCH64_MACHINE \
- "target-info-aarch64-machine"
-
/*
* A machine filtered with arm_machine_interfaces[] or
* arm_aarch64_machine_interfaces[] will be available
diff --git a/target-info-qom.c b/target-info-qom.c
index 7958a5cc685..eb9491338ca 100644
--- a/target-info-qom.c
+++ b/target-info-qom.c
@@ -16,14 +16,6 @@
#include "hw/riscv/machines-qom.h"
static const TypeInfo target_info_types[] = {
- {
- .name = TYPE_TARGET_ARM_MACHINE,
- .parent = TYPE_INTERFACE,
- },
- {
- .name = TYPE_TARGET_AARCH64_MACHINE,
- .parent = TYPE_INTERFACE,
- },
{
.name = TYPE_TARGET_RISCV32_MACHINE,
.parent = TYPE_INTERFACE,
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 89127e5d83c..42a1427fa16 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -1348,18 +1348,13 @@ const VMStateDescription vmstate_arm_cpu = {
};
const InterfaceInfo arm_machine_interfaces[] = {
- { TYPE_TARGET_ARM_MACHINE },
- { TYPE_TARGET_AARCH64_MACHINE },
{ }
};
const InterfaceInfo arm_aarch64_machine_interfaces[] = {
- { TYPE_TARGET_ARM_MACHINE },
- { TYPE_TARGET_AARCH64_MACHINE },
{ }
};
const InterfaceInfo aarch64_machine_interfaces[] = {
- { TYPE_TARGET_AARCH64_MACHINE },
{ }
};
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 16/47] hw/arm: remove {arm, arm_aarch64, aarch64}_machine_interfaces
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (13 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 15/47] hw/arm: remove TYPE_TARGET_{AARCH64,ARM}_MACHINE Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier via qemu development
2026-08-28 22:58 ` [PATCH 17/47] hw/arm: remove DEFINE_MACHINE_{AARCH64,ARM} Pierrick Bouvier
` (31 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier via qemu development @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
We can now remove those arrays.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/arm/aspeed_ast1040_evb.c | 1 -
hw/arm/aspeed_ast10x0_evb.c | 2 --
hw/arm/aspeed_ast2400_palmetto.c | 1 -
hw/arm/aspeed_ast2400_quanta-q71l.c | 1 -
hw/arm/aspeed_ast2400_supermicrox11.c | 1 -
hw/arm/aspeed_ast2500_evb.c | 1 -
hw/arm/aspeed_ast2500_g220a.c | 1 -
hw/arm/aspeed_ast2500_romulus.c | 1 -
hw/arm/aspeed_ast2500_supermicro-x11spi.c | 1 -
hw/arm/aspeed_ast2500_tiogapass.c | 1 -
hw/arm/aspeed_ast2500_witherspoon.c | 1 -
hw/arm/aspeed_ast2500_yosemitev2.c | 1 -
hw/arm/aspeed_ast2600_anacapa.c | 1 -
hw/arm/aspeed_ast2600_bletchley.c | 1 -
hw/arm/aspeed_ast2600_catalina.c | 1 -
hw/arm/aspeed_ast2600_evb.c | 1 -
hw/arm/aspeed_ast2600_fby35.c | 1 -
hw/arm/aspeed_ast2600_fuji.c | 1 -
hw/arm/aspeed_ast2600_gb200nvl.c | 1 -
hw/arm/aspeed_ast2600_rainier.c | 1 -
hw/arm/aspeed_ast27x0-fc.c | 1 -
hw/arm/aspeed_ast27x0_evb.c | 2 --
hw/arm/ax3000-boards.c | 1 -
hw/arm/b-l475e-iot01a.c | 1 -
hw/arm/bananapi_m2u.c | 2 +-
hw/arm/collie.c | 1 -
hw/arm/cubieboard.c | 2 +-
hw/arm/exynos4_boards.c | 2 --
hw/arm/imx8mm-evk.c | 2 +-
hw/arm/imx8mp-evk.c | 1 -
hw/arm/integratorcp.c | 2 +-
hw/arm/mcimx7d-sabre.c | 2 +-
hw/arm/microbit.c | 1 -
hw/arm/mps2-tz.c | 4 ----
hw/arm/mps2.c | 4 ----
hw/arm/mps3r.c | 1 -
hw/arm/musca.c | 2 --
hw/arm/musicpal.c | 2 +-
hw/arm/npcm7xx_boards.c | 5 -----
hw/arm/npcm8xx_boards.c | 1 -
hw/arm/omap_sx1.c | 2 --
hw/arm/orangepi.c | 2 +-
hw/arm/raspi.c | 5 -----
hw/arm/raspi4b.c | 1 -
hw/arm/realview.c | 4 ----
hw/arm/sabrelite.c | 1 -
hw/arm/sbsa-ref.c | 1 -
hw/arm/stellaris.c | 2 --
hw/arm/versatilepb.c | 2 --
hw/arm/vexpress.c | 2 --
hw/arm/virt.c | 1 -
hw/arm/xen-pvh.c | 1 -
hw/arm/xilinx_zynq.c | 1 -
hw/arm/xlnx-versal-virt.c | 2 --
hw/arm/xlnx-zcu102.c | 1 -
include/hw/arm/machines-qom.h | 16 ++--------------
target/arm/machine.c | 12 ------------
57 files changed, 9 insertions(+), 107 deletions(-)
diff --git a/hw/arm/aspeed_ast1040_evb.c b/hw/arm/aspeed_ast1040_evb.c
index 2b93d4dfbc5..dd68f9e25c7 100644
--- a/hw/arm/aspeed_ast1040_evb.c
+++ b/hw/arm/aspeed_ast1040_evb.c
@@ -81,7 +81,6 @@ static const TypeInfo aspeed_ast1040_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast1040-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast1040_evb_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast10x0_evb.c b/hw/arm/aspeed_ast10x0_evb.c
index c19563d1f0a..f377e955adc 100644
--- a/hw/arm/aspeed_ast10x0_evb.c
+++ b/hw/arm/aspeed_ast10x0_evb.c
@@ -119,12 +119,10 @@ static const TypeInfo aspeed_ast10x0_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast1030-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast1060-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1060_evb_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2400_palmetto.c b/hw/arm/aspeed_ast2400_palmetto.c
index 776aa43a45d..f4918683c3d 100644
--- a/hw/arm/aspeed_ast2400_palmetto.c
+++ b/hw/arm/aspeed_ast2400_palmetto.c
@@ -73,7 +73,6 @@ static const TypeInfo aspeed_ast2400_palmetto_types[] = {
.name = MACHINE_TYPE_NAME("palmetto-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_palmetto_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2400_quanta-q71l.c b/hw/arm/aspeed_ast2400_quanta-q71l.c
index 42ad2a2303f..e1ddf682315 100644
--- a/hw/arm/aspeed_ast2400_quanta-q71l.c
+++ b/hw/arm/aspeed_ast2400_quanta-q71l.c
@@ -79,7 +79,6 @@ static const TypeInfo aspeed_ast2400_quanta_q71l_types[] = {
.name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_quanta_q71l_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2400_supermicrox11.c b/hw/arm/aspeed_ast2400_supermicrox11.c
index 88cdb01fc76..86d49fd1dee 100644
--- a/hw/arm/aspeed_ast2400_supermicrox11.c
+++ b/hw/arm/aspeed_ast2400_supermicrox11.c
@@ -74,7 +74,6 @@ static const TypeInfo aspeed_ast2400_supermicrox11_types[] = {
.name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2500_evb.c b/hw/arm/aspeed_ast2500_evb.c
index 8b5cb67be9b..5f616252e0b 100644
--- a/hw/arm/aspeed_ast2500_evb.c
+++ b/hw/arm/aspeed_ast2500_evb.c
@@ -60,7 +60,6 @@ static const TypeInfo aspeed_ast2500_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast2500-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2500_evb_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2500_g220a.c b/hw/arm/aspeed_ast2500_g220a.c
index 3f979a78e57..3c654c62dd6 100644
--- a/hw/arm/aspeed_ast2500_g220a.c
+++ b/hw/arm/aspeed_ast2500_g220a.c
@@ -85,7 +85,6 @@ static const TypeInfo aspeed_ast2500_g220a_types[] = {
.name = MACHINE_TYPE_NAME("g220a-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_g220a_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2500_romulus.c b/hw/arm/aspeed_ast2500_romulus.c
index 91b660e74bb..b2ed623f680 100644
--- a/hw/arm/aspeed_ast2500_romulus.c
+++ b/hw/arm/aspeed_ast2500_romulus.c
@@ -55,7 +55,6 @@ static const TypeInfo aspeed_ast2500_romulus_types[] = {
.name = MACHINE_TYPE_NAME("romulus-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_romulus_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2500_supermicro-x11spi.c b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
index a2450aa9623..77fa028b096 100644
--- a/hw/arm/aspeed_ast2500_supermicro-x11spi.c
+++ b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
@@ -70,7 +70,6 @@ static const TypeInfo aspeed_ast2500_supermicro_x11spi_types[] = {
.name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2500_tiogapass.c b/hw/arm/aspeed_ast2500_tiogapass.c
index 186dbc1da30..1771f376480 100644
--- a/hw/arm/aspeed_ast2500_tiogapass.c
+++ b/hw/arm/aspeed_ast2500_tiogapass.c
@@ -83,7 +83,6 @@ static const TypeInfo aspeed_ast2500_tiogapass_types[] = {
.name = MACHINE_TYPE_NAME("tiogapass-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_tiogapass_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2500_witherspoon.c b/hw/arm/aspeed_ast2500_witherspoon.c
index 28d437fec08..4cc349c3236 100644
--- a/hw/arm/aspeed_ast2500_witherspoon.c
+++ b/hw/arm/aspeed_ast2500_witherspoon.c
@@ -105,7 +105,6 @@ static const TypeInfo aspeed_ast2500_witherspoon_types[] = {
.name = MACHINE_TYPE_NAME("witherspoon-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_witherspoon_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2500_yosemitev2.c b/hw/arm/aspeed_ast2500_yosemitev2.c
index eaa75bcccbb..48c813f3c8f 100644
--- a/hw/arm/aspeed_ast2500_yosemitev2.c
+++ b/hw/arm/aspeed_ast2500_yosemitev2.c
@@ -84,7 +84,6 @@ static const TypeInfo aspeed_ast2500_yosemitev2_types[] = {
.name = MACHINE_TYPE_NAME("yosemitev2-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_yosemitev2_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2600_anacapa.c b/hw/arm/aspeed_ast2600_anacapa.c
index 65d6b0faa2d..e82f5c98f26 100644
--- a/hw/arm/aspeed_ast2600_anacapa.c
+++ b/hw/arm/aspeed_ast2600_anacapa.c
@@ -368,7 +368,6 @@ static const TypeInfo aspeed_ast2600_anacapa_types[] = {
.name = MACHINE_TYPE_NAME("anacapa-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_anacapa_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2600_bletchley.c b/hw/arm/aspeed_ast2600_bletchley.c
index b7e84db1438..9dda83ad4c0 100644
--- a/hw/arm/aspeed_ast2600_bletchley.c
+++ b/hw/arm/aspeed_ast2600_bletchley.c
@@ -90,7 +90,6 @@ static const TypeInfo aspeed_ast2600_bletchley_types[] = {
.name = MACHINE_TYPE_NAME("bletchley-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_bletchley_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2600_catalina.c b/hw/arm/aspeed_ast2600_catalina.c
index f714c9d1b32..f91e0635908 100644
--- a/hw/arm/aspeed_ast2600_catalina.c
+++ b/hw/arm/aspeed_ast2600_catalina.c
@@ -675,7 +675,6 @@ static const TypeInfo aspeed_ast2600_catalina_types[] = {
.name = MACHINE_TYPE_NAME("catalina-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_catalina_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2600_evb.c b/hw/arm/aspeed_ast2600_evb.c
index c43d2687c1c..404083b61dc 100644
--- a/hw/arm/aspeed_ast2600_evb.c
+++ b/hw/arm/aspeed_ast2600_evb.c
@@ -58,7 +58,6 @@ static const TypeInfo aspeed_ast2600_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2600_fby35.c b/hw/arm/aspeed_ast2600_fby35.c
index f6244270704..6bcda0ac630 100644
--- a/hw/arm/aspeed_ast2600_fby35.c
+++ b/hw/arm/aspeed_ast2600_fby35.c
@@ -171,7 +171,6 @@ static const TypeInfo aspeed_ast2600_fby35_types[] = {
.name = MACHINE_TYPE_NAME("fby35-bmc"),
.parent = MACHINE_TYPE_NAME("ast2600-evb"),
.class_init = aspeed_machine_fby35_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2600_fuji.c b/hw/arm/aspeed_ast2600_fuji.c
index 37db252e276..cf49149fe9a 100644
--- a/hw/arm/aspeed_ast2600_fuji.c
+++ b/hw/arm/aspeed_ast2600_fuji.c
@@ -133,7 +133,6 @@ static const TypeInfo aspeed_ast2600_fuji_types[] = {
.name = MACHINE_TYPE_NAME("fuji-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fuji_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2600_gb200nvl.c b/hw/arm/aspeed_ast2600_gb200nvl.c
index ad9a10110b8..705561afe39 100644
--- a/hw/arm/aspeed_ast2600_gb200nvl.c
+++ b/hw/arm/aspeed_ast2600_gb200nvl.c
@@ -104,7 +104,6 @@ static const TypeInfo aspeed_ast2600_gb200nvl_types[] = {
.name = MACHINE_TYPE_NAME("gb200nvl-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_gb200nvl_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast2600_rainier.c b/hw/arm/aspeed_ast2600_rainier.c
index 8f0a412ddcf..6e5debc8bc1 100644
--- a/hw/arm/aspeed_ast2600_rainier.c
+++ b/hw/arm/aspeed_ast2600_rainier.c
@@ -191,7 +191,6 @@ static const TypeInfo aspeed_ast2600_rainier_types[] = {
.name = MACHINE_TYPE_NAME("rainier-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_rainier_class_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index 54230aa92e6..ccfa4ade265 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -236,7 +236,6 @@ static const TypeInfo ast2700fc_types[] = {
.class_init = ast2700fc_class_init,
.instance_size = sizeof(Ast2700FCState),
.is_available = target_aarch64,
- .interfaces = aarch64_machine_interfaces,
},
};
diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c
index 2b767808e12..0deb3127c21 100644
--- a/hw/arm/aspeed_ast27x0_evb.c
+++ b/hw/arm/aspeed_ast27x0_evb.c
@@ -77,14 +77,12 @@ static const TypeInfo aspeed_ast27x0_evb_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a1_evb_class_init,
.is_available = target_aarch64,
- .interfaces = aarch64_machine_interfaces,
},
{
.name = MACHINE_TYPE_NAME("ast2700a2-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2700a2_evb_class_init,
.is_available = target_aarch64,
- .interfaces = aarch64_machine_interfaces,
}
};
diff --git a/hw/arm/ax3000-boards.c b/hw/arm/ax3000-boards.c
index 4b8deec15cf..c7248f9f52b 100644
--- a/hw/arm/ax3000-boards.c
+++ b/hw/arm/ax3000-boards.c
@@ -48,7 +48,6 @@ static const TypeInfo ax3000_machine_types[] = {
.instance_size = sizeof(Ax3000MachineState),
.class_size = sizeof(Ax3000MachineClass),
.class_init = ax3000_machine_class_init,
- .interfaces = aarch64_machine_interfaces,
.abstract = true,
}
};
diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
index ee789c8df94..04dce2d19ce 100644
--- a/hw/arm/b-l475e-iot01a.c
+++ b/hw/arm/b-l475e-iot01a.c
@@ -132,7 +132,6 @@ static const TypeInfo bl475e_machine_type[] = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(Bl475eMachineState),
.class_init = bl475e_machine_init,
- .interfaces = arm_machine_interfaces,
}
};
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 0079aa1dd2b..15c878d1636 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -154,4 +154,4 @@ static void bpim2u_machine_init(MachineClass *mc)
}
DEFINE_MACHINE_EXTENDED("bpim2u", MACHINE, Bpim2uMachineState,
- bpim2u_machine_init, false, arm_machine_interfaces)
+ bpim2u_machine_init, false, NULL)
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index 01d74ad38cd..4b930e6ba12 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -85,7 +85,6 @@ static const TypeInfo collie_machine_typeinfo = {
.parent = TYPE_MACHINE,
.class_init = collie_machine_class_init,
.instance_size = sizeof(CollieMachineState),
- .interfaces = arm_machine_interfaces,
};
static void collie_machine_register_types(void)
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index d59c1ebba7f..511b71fbd7e 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -135,4 +135,4 @@ static void cubieboard_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("cubieboard", MACHINE, CubieboardMachineState,
cubieboard_machine_init, false,
- arm_machine_interfaces)
+ NULL)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index b7decdb2c7f..62f7cbe875e 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -169,7 +169,6 @@ static const TypeInfo nuri_type = {
.name = MACHINE_TYPE_NAME("nuri"),
.parent = TYPE_MACHINE,
.class_init = nuri_class_init,
- .interfaces = arm_machine_interfaces,
};
static void smdkc210_class_init(ObjectClass *oc, const void *data)
@@ -190,7 +189,6 @@ static const TypeInfo smdkc210_type = {
.name = MACHINE_TYPE_NAME("smdkc210"),
.parent = TYPE_MACHINE,
.class_init = smdkc210_class_init,
- .interfaces = arm_machine_interfaces,
};
static void exynos4_machines_init(void)
diff --git a/hw/arm/imx8mm-evk.c b/hw/arm/imx8mm-evk.c
index 019c609c542..ffe8e494a57 100644
--- a/hw/arm/imx8mm-evk.c
+++ b/hw/arm/imx8mm-evk.c
@@ -136,4 +136,4 @@ static void imx8mm_evk_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("imx8mm-evk", MACHINE, Imx8mmEvkMachineState,
imx8mm_evk_machine_init, false,
- aarch64_machine_interfaces)
+ NULL)
diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c
index 16e9722d146..389e7c86d21 100644
--- a/hw/arm/imx8mp-evk.c
+++ b/hw/arm/imx8mp-evk.c
@@ -162,7 +162,6 @@ static const TypeInfo imx8mp_evk_machine_types[] = {
.class_init = imx8mp_evk_machine_class_init,
.instance_init = imx8mp_evk_machine_init,
.instance_size = sizeof(FslImx8mpEvkState),
- .interfaces = aarch64_machine_interfaces,
},
};
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index f8bcf42c615..25ecd931e76 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -706,7 +706,7 @@ static void integratorcp_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("integratorcp", MACHINE, IntegratorcpMachineState,
integratorcp_machine_init, false,
- arm_machine_interfaces)
+ NULL)
static const Property core_properties[] = {
DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 22fe1fa932f..cb4536faadd 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -88,4 +88,4 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("mcimx7d-sabre", MACHINE, Mcimx7dSabreMachineState,
mcimx7d_sabre_machine_init, false,
- arm_machine_interfaces)
+ NULL)
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index 9d5c4898469..85285861c5f 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -75,7 +75,6 @@ static const TypeInfo microbit_info = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(MicrobitMachineState),
.class_init = microbit_machine_class_init,
- .interfaces = arm_machine_interfaces,
};
static void microbit_machine_init(void)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index d6d178642ba..865009c1e0e 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -1485,28 +1485,24 @@ static const TypeInfo mps2tz_an505_info = {
.name = TYPE_MPS2TZ_AN505_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an505_class_init,
- .interfaces = arm_machine_interfaces,
};
static const TypeInfo mps2tz_an521_info = {
.name = TYPE_MPS2TZ_AN521_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an521_class_init,
- .interfaces = arm_machine_interfaces,
};
static const TypeInfo mps3tz_an524_info = {
.name = TYPE_MPS3TZ_AN524_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an524_class_init,
- .interfaces = arm_machine_interfaces,
};
static const TypeInfo mps3tz_an547_info = {
.name = TYPE_MPS3TZ_AN547_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an547_class_init,
- .interfaces = arm_machine_interfaces,
};
static void mps2tz_machine_init(void)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index ac9366d8447..b13b7bc55ec 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -568,28 +568,24 @@ static const TypeInfo mps2_an385_info = {
.name = TYPE_MPS2_AN385_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an385_class_init,
- .interfaces = arm_machine_interfaces,
};
static const TypeInfo mps2_an386_info = {
.name = TYPE_MPS2_AN386_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an386_class_init,
- .interfaces = arm_machine_interfaces,
};
static const TypeInfo mps2_an500_info = {
.name = TYPE_MPS2_AN500_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an500_class_init,
- .interfaces = arm_machine_interfaces,
};
static const TypeInfo mps2_an511_info = {
.name = TYPE_MPS2_AN511_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an511_class_init,
- .interfaces = arm_machine_interfaces,
};
static void mps2_machine_init(void)
diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
index caad820d3bc..d6f4c1640ab 100644
--- a/hw/arm/mps3r.c
+++ b/hw/arm/mps3r.c
@@ -635,7 +635,6 @@ static const TypeInfo mps3r_machine_types[] = {
.name = TYPE_MPS3R_AN536_MACHINE,
.parent = TYPE_MPS3R_MACHINE,
.class_init = mps3r_an536_class_init,
- .interfaces = arm_machine_interfaces,
},
};
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 75d82eebcac..1b161487e7e 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -658,14 +658,12 @@ static const TypeInfo musca_a_info = {
.name = TYPE_MUSCA_A_MACHINE,
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_a_class_init,
- .interfaces = arm_machine_interfaces,
};
static const TypeInfo musca_b1_info = {
.name = TYPE_MUSCA_B1_MACHINE,
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_b1_class_init,
- .interfaces = arm_machine_interfaces,
};
static void musca_machine_init(void)
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 8a70ed7377e..84d20bca72b 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1366,7 +1366,7 @@ static void musicpal_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("musicpal", MACHINE, MusicPalMachineState,
musicpal_machine_init, false,
- arm_machine_interfaces)
+ NULL)
static void mv88w8618_wlan_class_init(ObjectClass *klass, const void *data)
{
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index 4f14d257465..025de42dac6 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -550,27 +550,22 @@ static const TypeInfo npcm7xx_machine_types[] = {
.name = MACHINE_TYPE_NAME("npcm750-evb"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = npcm750_evb_machine_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("quanta-gsj"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gsj_machine_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gbs_bmc_machine_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("kudo-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = kudo_bmc_machine_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("mori-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = mori_bmc_machine_class_init,
- .interfaces = arm_machine_interfaces,
},
};
diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
index f462369bea3..2a04cf4f2c9 100644
--- a/hw/arm/npcm8xx_boards.c
+++ b/hw/arm/npcm8xx_boards.c
@@ -249,7 +249,6 @@ static const TypeInfo npcm8xx_machine_types[] = {
.name = MACHINE_TYPE_NAME("npcm845-evb"),
.parent = TYPE_NPCM8XX_MACHINE,
.class_init = npcm845_evb_machine_class_init,
- .interfaces = aarch64_machine_interfaces,
},
};
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index 3b628d13cbc..c3fe4187b8b 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -226,7 +226,6 @@ static const TypeInfo sx1_machine_v2_type = {
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v2_class_init,
.instance_size = sizeof(Sx1MachineState),
- .interfaces = arm_machine_interfaces,
};
static void sx1_machine_v1_class_init(ObjectClass *oc, const void *data)
@@ -247,7 +246,6 @@ static const TypeInfo sx1_machine_v1_type = {
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v1_class_init,
.instance_size = sizeof(Sx1MachineState),
- .interfaces = arm_machine_interfaces,
};
static void sx1_machine_init(void)
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index 0e149ed6c98..3f06716c364 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -135,4 +135,4 @@ static void orangepi_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("orangepi-pc", MACHINE, OrangePiMachineState,
orangepi_machine_init, false,
- arm_machine_interfaces)
+ NULL)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index bbaa20bd630..7ff3e8400e6 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -392,29 +392,24 @@ static const TypeInfo raspi_machine_types[] = {
.name = MACHINE_TYPE_NAME("raspi0"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi0_machine_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("raspi1ap"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi1ap_machine_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("raspi2b"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi2b_machine_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("raspi3ap"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi3ap_machine_class_init,
.is_available = target_aarch64,
- .interfaces = aarch64_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("raspi3b"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi3b_machine_class_init,
.is_available = target_aarch64,
- .interfaces = aarch64_machine_interfaces,
}, {
.name = TYPE_RASPI_MACHINE,
.parent = TYPE_RASPI_BASE_MACHINE,
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index 2ad561fdcfc..08fcdf58c9f 100644
--- a/hw/arm/raspi4b.c
+++ b/hw/arm/raspi4b.c
@@ -127,7 +127,6 @@ static const TypeInfo raspi4b_machine_type = {
.instance_size = sizeof(Raspi4bMachineState),
.class_init = raspi4b_machine_class_init,
.is_available = target_aarch64,
- .interfaces = aarch64_machine_interfaces,
};
static void raspi4b_machine_register_type(void)
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 0c2daf5c01f..aee7d05c3e6 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -437,7 +437,6 @@ static const TypeInfo realview_eb_type = {
.parent = TYPE_MACHINE,
.class_init = realview_eb_class_init,
.instance_size = sizeof(RealViewMachineState),
- .interfaces = arm_machine_interfaces,
};
static void realview_eb_mpcore_class_init(ObjectClass *oc, const void *data)
@@ -460,7 +459,6 @@ static const TypeInfo realview_eb_mpcore_type = {
.parent = TYPE_MACHINE,
.class_init = realview_eb_mpcore_class_init,
.instance_size = sizeof(RealViewMachineState),
- .interfaces = arm_machine_interfaces,
};
static void realview_pb_a8_class_init(ObjectClass *oc, const void *data)
@@ -481,7 +479,6 @@ static const TypeInfo realview_pb_a8_type = {
.parent = TYPE_MACHINE,
.class_init = realview_pb_a8_class_init,
.instance_size = sizeof(RealViewMachineState),
- .interfaces = arm_machine_interfaces,
};
static void realview_pbx_a9_class_init(ObjectClass *oc, const void *data)
@@ -503,7 +500,6 @@ static const TypeInfo realview_pbx_a9_type = {
.parent = TYPE_MACHINE,
.class_init = realview_pbx_a9_class_init,
.instance_size = sizeof(RealViewMachineState),
- .interfaces = arm_machine_interfaces,
};
static void realview_machine_init(void)
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 140b2ecb9e2..ec307388f45 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -152,7 +152,6 @@ static const TypeInfo sabrelite_machine_init_typeinfo = {
.instance_init = sabrelite_machine_instance_init,
.instance_size = sizeof(SabreliteMachineState),
.abstract = false,
- .interfaces = arm_machine_interfaces,
};
static void sabrelite_machine_init_register_types(void)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 56d08f605c8..6ba353341a1 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -946,7 +946,6 @@ static const TypeInfo sbsa_ref_info = {
.instance_finalize = sbsa_ref_instance_finalize,
.class_init = sbsa_ref_class_init,
.instance_size = sizeof(SBSAMachineState),
- .interfaces = aarch64_machine_interfaces,
};
static void sbsa_ref_machine_init(void)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 56ecc828f4f..f634918868b 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1428,7 +1428,6 @@ static const TypeInfo lm3s811evb_type = {
.name = MACHINE_TYPE_NAME("lm3s811evb"),
.parent = TYPE_MACHINE,
.class_init = lm3s811evb_class_init,
- .interfaces = arm_machine_interfaces,
};
/*
@@ -1450,7 +1449,6 @@ static const TypeInfo lm3s6965evb_type = {
.name = MACHINE_TYPE_NAME("lm3s6965evb"),
.parent = TYPE_MACHINE,
.class_init = lm3s6965evb_class_init,
- .interfaces = arm_machine_interfaces,
};
static void stellaris_machine_init(void)
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 520af79c800..1db9bc1eb24 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -438,7 +438,6 @@ static const TypeInfo versatilepb_type = {
.parent = TYPE_MACHINE,
.class_init = versatilepb_class_init,
.instance_size = sizeof(VersatileMachineState),
- .interfaces = arm_machine_interfaces,
};
static void versatileab_class_init(ObjectClass *oc, const void *data)
@@ -461,7 +460,6 @@ static const TypeInfo versatileab_type = {
.parent = TYPE_MACHINE,
.class_init = versatileab_class_init,
.instance_size = sizeof(VersatileMachineState),
- .interfaces = arm_machine_interfaces,
};
static void versatile_machine_init(void)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index f26d8c6f8d1..1e29fe0f09c 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -850,7 +850,6 @@ static const TypeInfo vexpress_a9_info = {
.parent = TYPE_VEXPRESS_MACHINE,
.class_init = vexpress_a9_class_init,
.instance_init = vexpress_a9_instance_init,
- .interfaces = arm_machine_interfaces,
};
static const TypeInfo vexpress_a15_info = {
@@ -858,7 +857,6 @@ static const TypeInfo vexpress_a15_info = {
.parent = TYPE_VEXPRESS_MACHINE,
.class_init = vexpress_a15_class_init,
.instance_init = vexpress_a15_instance_init,
- .interfaces = arm_machine_interfaces,
};
static void vexpress_machine_init(void)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index d738b95c726..eae4f0fe413 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -133,7 +133,6 @@ static void arm_virt_compat_default_set(MachineClass *mc)
.name = MACHINE_VER_TYPE_NAME("virt", __VA_ARGS__), \
.parent = TYPE_VIRT_MACHINE, \
.class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
- .interfaces = arm_aarch64_machine_interfaces, \
}; \
static void MACHINE_VER_SYM(register, virt, __VA_ARGS__)(void) \
{ \
diff --git a/hw/arm/xen-pvh.c b/hw/arm/xen-pvh.c
index 10cac28a910..b47dd9efd81 100644
--- a/hw/arm/xen-pvh.c
+++ b/hw/arm/xen-pvh.c
@@ -96,7 +96,6 @@ static const TypeInfo xen_arm_machine_type = {
.class_init = xen_arm_machine_class_init,
.instance_size = sizeof(XenPVHMachineState),
.instance_init = xen_arm_instance_init,
- .interfaces = arm_aarch64_machine_interfaces,
};
static void xen_arm_machine_register_types(void)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index f3148975406..8ebd8e5ccd5 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -479,7 +479,6 @@ static const TypeInfo zynq_machine_type = {
.parent = TYPE_MACHINE,
.class_init = zynq_machine_class_init,
.instance_size = sizeof(ZynqMachineState),
- .interfaces = arm_machine_interfaces,
};
static void zynq_machine_register_types(void)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 2b04513ba2e..e06a0c55549 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -402,14 +402,12 @@ static const TypeInfo versal_virt_machine_init_typeinfo = {
.name = TYPE_XLNX_VERSAL_VIRT_MACHINE,
.parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE,
.class_init = versal_virt_machine_class_init,
- .interfaces = aarch64_machine_interfaces,
};
static const TypeInfo versal2_virt_machine_init_typeinfo = {
.name = TYPE_XLNX_VERSAL2_VIRT_MACHINE,
.parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE,
.class_init = versal2_virt_machine_class_init,
- .interfaces = aarch64_machine_interfaces,
};
static void versal_virt_machine_init_register_types(void)
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 4e489702743..da8b3ede873 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -303,7 +303,6 @@ static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
.class_init = xlnx_zcu102_machine_class_init,
.instance_init = xlnx_zcu102_machine_instance_init,
.instance_size = sizeof(XlnxZCU102),
- .interfaces = aarch64_machine_interfaces,
};
static void xlnx_zcu102_machine_init_register_types(void)
diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h
index 81ffa434303..449592beda0 100644
--- a/include/hw/arm/machines-qom.h
+++ b/include/hw/arm/machines-qom.h
@@ -11,18 +11,6 @@
#include "hw/core/boards.h"
-/*
- * A machine filtered with arm_machine_interfaces[] or
- * arm_aarch64_machine_interfaces[] will be available
- * in both qemu-system-arm and qemu-system-aarch64 binaries.
- *
- * One filtered with aarch64_machine_interfaces[] will only
- * be available in the qemu-system-aarch64 binary.
- */
-extern const InterfaceInfo arm_machine_interfaces[];
-extern const InterfaceInfo arm_aarch64_machine_interfaces[];
-extern const InterfaceInfo aarch64_machine_interfaces[];
-
/*
* A machine defined with the DEFINE_MACHINE_ARM() macro will be
* available in both qemu-system-arm and qemu-system-aarch64 binaries.
@@ -32,9 +20,9 @@ extern const InterfaceInfo aarch64_machine_interfaces[];
*/
#define DEFINE_MACHINE_ARM(namestr, machine_initfn) \
DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- arm_machine_interfaces)
+ NULL)
#define DEFINE_MACHINE_AARCH64(namestr, machine_initfn) \
DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- aarch64_machine_interfaces)
+ NULL)
#endif
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 42a1427fa16..61106f9def6 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -1346,15 +1346,3 @@ const VMStateDescription vmstate_arm_cpu = {
NULL
}
};
-
-const InterfaceInfo arm_machine_interfaces[] = {
- { }
-};
-
-const InterfaceInfo arm_aarch64_machine_interfaces[] = {
- { }
-};
-
-const InterfaceInfo aarch64_machine_interfaces[] = {
- { }
-};
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 17/47] hw/arm: remove DEFINE_MACHINE_{AARCH64,ARM}
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (14 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 16/47] hw/arm: remove {arm, arm_aarch64, aarch64}_machine_interfaces Pierrick Bouvier via qemu development
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 18/47] hw/arm: remove machines-qom.h Pierrick Bouvier
` (30 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/arm/digic_boards.c | 2 +-
hw/arm/imx25_pdk.c | 2 +-
hw/arm/kzm.c | 2 +-
hw/arm/max78000fthr.c | 2 +-
hw/arm/mcimx6ul-evk.c | 2 +-
hw/arm/msf2-som.c | 2 +-
hw/arm/netduino2.c | 2 +-
hw/arm/netduinoplus2.c | 2 +-
hw/arm/olimex-stm32-h405.c | 2 +-
hw/arm/stm32vldiscovery.c | 2 +-
include/hw/arm/machines-qom.h | 14 --------------
11 files changed, 10 insertions(+), 24 deletions(-)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index ed12f542001..c7ecf22a958 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -146,4 +146,4 @@ static void canon_a1100_machine_init(MachineClass *mc)
mc->default_ram_id = "ram";
}
-DEFINE_MACHINE_ARM("canon-a1100", canon_a1100_machine_init)
+DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init)
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index f7a51481af0..3246512c214 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -150,4 +150,4 @@ static void imx25_pdk_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
-DEFINE_MACHINE_ARM("imx25-pdk", imx25_pdk_machine_init)
+DEFINE_MACHINE("imx25-pdk", imx25_pdk_machine_init)
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index 1aa5b49de92..909dd929e63 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -138,4 +138,4 @@ static void kzm_machine_init(MachineClass *mc)
mc->default_ram_id = "kzm.ram";
}
-DEFINE_MACHINE_ARM("kzm", kzm_machine_init)
+DEFINE_MACHINE("kzm", kzm_machine_init)
diff --git a/hw/arm/max78000fthr.c b/hw/arm/max78000fthr.c
index 530ca9dd964..290a14c8ad9 100644
--- a/hw/arm/max78000fthr.c
+++ b/hw/arm/max78000fthr.c
@@ -48,4 +48,4 @@ static void max78000_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE_ARM("max78000fthr", max78000_machine_init)
+DEFINE_MACHINE("max78000fthr", max78000_machine_init)
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index 6e9d92b1f1d..a3dafb20131 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -78,4 +78,4 @@ static void mcimx6ul_evk_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
-DEFINE_MACHINE_ARM("mcimx6ul-evk", mcimx6ul_evk_machine_init)
+DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init)
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 1ada1a13613..8d00fef43b0 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -109,4 +109,4 @@ static void emcraft_sf2_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE_ARM("emcraft-sf2", emcraft_sf2_machine_init)
+DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index c32deaf43ba..6a639264d61 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -66,4 +66,4 @@ static void netduino2_machine_init(MachineClass *mc)
mc->ignore_memory_transaction_failures = true;
}
-DEFINE_MACHINE_ARM("netduino2", netduino2_machine_init)
+DEFINE_MACHINE("netduino2", netduino2_machine_init)
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index a90dcbe8c26..d04ab8aeea4 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -66,4 +66,4 @@ static void netduinoplus2_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE_ARM("netduinoplus2", netduinoplus2_machine_init)
+DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init)
diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
index e801e4308ed..154501fc3c7 100644
--- a/hw/arm/olimex-stm32-h405.c
+++ b/hw/arm/olimex-stm32-h405.c
@@ -72,4 +72,4 @@ static void olimex_stm32_h405_machine_init(MachineClass *mc)
mc->default_ram_size = 0;
}
-DEFINE_MACHINE_ARM("olimex-stm32-h405", olimex_stm32_h405_machine_init)
+DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init)
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index 8f93c0036a3..0b39543c1ff 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -69,4 +69,4 @@ static void stm32vldiscovery_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE_ARM("stm32vldiscovery", stm32vldiscovery_machine_init)
+DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init)
diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h
index 449592beda0..e3eebbdefbc 100644
--- a/include/hw/arm/machines-qom.h
+++ b/include/hw/arm/machines-qom.h
@@ -11,18 +11,4 @@
#include "hw/core/boards.h"
-/*
- * A machine defined with the DEFINE_MACHINE_ARM() macro will be
- * available in both qemu-system-arm and qemu-system-aarch64 binaries.
- *
- * One defined with DEFINE_MACHINE_AARCH64() will only be available in
- * the qemu-system-aarch64 binary.
- */
-#define DEFINE_MACHINE_ARM(namestr, machine_initfn) \
- DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- NULL)
-#define DEFINE_MACHINE_AARCH64(namestr, machine_initfn) \
- DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- NULL)
-
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 18/47] hw/arm: remove machines-qom.h
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (15 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 17/47] hw/arm: remove DEFINE_MACHINE_{AARCH64,ARM} Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 19/47] hw/riscv: remove TYPE_TARGET_{RISCV32,RISCV64}_MACHINE Pierrick Bouvier
` (29 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Header is now empty so we can remove it.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/arm/aspeed.c | 1 -
hw/arm/aspeed_ast1040_evb.c | 1 -
hw/arm/aspeed_ast10x0_evb.c | 1 -
hw/arm/aspeed_ast2400_palmetto.c | 1 -
hw/arm/aspeed_ast2400_quanta-q71l.c | 1 -
hw/arm/aspeed_ast2400_supermicrox11.c | 1 -
hw/arm/aspeed_ast2500_evb.c | 1 -
hw/arm/aspeed_ast2500_g220a.c | 1 -
hw/arm/aspeed_ast2500_romulus.c | 1 -
hw/arm/aspeed_ast2500_supermicro-x11spi.c | 1 -
hw/arm/aspeed_ast2500_tiogapass.c | 1 -
hw/arm/aspeed_ast2500_witherspoon.c | 1 -
hw/arm/aspeed_ast2500_yosemitev2.c | 1 -
hw/arm/aspeed_ast2600_anacapa.c | 1 -
hw/arm/aspeed_ast2600_bletchley.c | 1 -
hw/arm/aspeed_ast2600_catalina.c | 1 -
hw/arm/aspeed_ast2600_evb.c | 1 -
hw/arm/aspeed_ast2600_fby35.c | 1 -
hw/arm/aspeed_ast2600_fuji.c | 1 -
hw/arm/aspeed_ast2600_gb200nvl.c | 1 -
hw/arm/aspeed_ast2600_rainier.c | 1 -
hw/arm/aspeed_ast27x0-fc.c | 1 -
hw/arm/aspeed_ast27x0_evb.c | 1 -
hw/arm/ax3000-boards.c | 1 -
hw/arm/b-l475e-iot01a.c | 1 -
hw/arm/bananapi_m2u.c | 1 -
hw/arm/collie.c | 1 -
hw/arm/cubieboard.c | 1 -
hw/arm/digic_boards.c | 1 -
hw/arm/exynos4_boards.c | 1 -
hw/arm/imx25_pdk.c | 1 -
hw/arm/imx8mm-evk.c | 1 -
hw/arm/imx8mp-evk.c | 1 -
hw/arm/integratorcp.c | 1 -
hw/arm/kzm.c | 1 -
hw/arm/max78000fthr.c | 1 -
hw/arm/mcimx6ul-evk.c | 1 -
hw/arm/mcimx7d-sabre.c | 1 -
hw/arm/microbit.c | 1 -
hw/arm/mps2-tz.c | 1 -
hw/arm/mps2.c | 1 -
hw/arm/mps3r.c | 1 -
hw/arm/msf2-som.c | 1 -
hw/arm/musca.c | 1 -
hw/arm/musicpal.c | 1 -
hw/arm/netduino2.c | 1 -
hw/arm/netduinoplus2.c | 1 -
hw/arm/npcm7xx_boards.c | 1 -
hw/arm/npcm8xx_boards.c | 1 -
hw/arm/olimex-stm32-h405.c | 1 -
hw/arm/omap_sx1.c | 1 -
hw/arm/orangepi.c | 1 -
hw/arm/raspi.c | 1 -
hw/arm/raspi4b.c | 1 -
hw/arm/realview.c | 1 -
hw/arm/sabrelite.c | 1 -
hw/arm/sbsa-ref.c | 1 -
hw/arm/stellaris.c | 1 -
hw/arm/stm32vldiscovery.c | 1 -
hw/arm/versatilepb.c | 1 -
hw/arm/vexpress.c | 1 -
hw/arm/virt.c | 1 -
hw/arm/xen-pvh.c | 1 -
hw/arm/xilinx_zynq.c | 1 -
hw/arm/xlnx-versal-virt.c | 1 -
hw/arm/xlnx-zcu102.c | 1 -
hw/core/null-machine.c | 1 -
hw/nitro/machine.c | 1 -
hw/remote/machine.c | 1 -
include/hw/arm/machines-qom.h | 14 --------------
target-info-qom.c | 1 -
target/arm/machine.c | 1 -
72 files changed, 85 deletions(-)
delete mode 100644 include/hw/arm/machines-qom.h
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 8fa16b3831c..a7cfbd6c5e0 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -14,7 +14,6 @@
#include "hw/arm/boot.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
-#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/gpio/pca9552.h"
#include "hw/gpio/pca9554.h"
diff --git a/hw/arm/aspeed_ast1040_evb.c b/hw/arm/aspeed_ast1040_evb.c
index dd68f9e25c7..486f0f6a1ba 100644
--- a/hw/arm/aspeed_ast1040_evb.c
+++ b/hw/arm/aspeed_ast1040_evb.c
@@ -9,7 +9,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/core/qdev-clock.h"
diff --git a/hw/arm/aspeed_ast10x0_evb.c b/hw/arm/aspeed_ast10x0_evb.c
index f377e955adc..c937bb74665 100644
--- a/hw/arm/aspeed_ast10x0_evb.c
+++ b/hw/arm/aspeed_ast10x0_evb.c
@@ -9,7 +9,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/core/qdev-clock.h"
diff --git a/hw/arm/aspeed_ast2400_palmetto.c b/hw/arm/aspeed_ast2400_palmetto.c
index f4918683c3d..e2350e5b6ca 100644
--- a/hw/arm/aspeed_ast2400_palmetto.c
+++ b/hw/arm/aspeed_ast2400_palmetto.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/smbus_eeprom.h"
diff --git a/hw/arm/aspeed_ast2400_quanta-q71l.c b/hw/arm/aspeed_ast2400_quanta-q71l.c
index e1ddf682315..e8cbbb8a052 100644
--- a/hw/arm/aspeed_ast2400_quanta-q71l.c
+++ b/hw/arm/aspeed_ast2400_quanta-q71l.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
diff --git a/hw/arm/aspeed_ast2400_supermicrox11.c b/hw/arm/aspeed_ast2400_supermicrox11.c
index 86d49fd1dee..c75898cc6d1 100644
--- a/hw/arm/aspeed_ast2400_supermicrox11.c
+++ b/hw/arm/aspeed_ast2400_supermicrox11.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/smbus_eeprom.h"
diff --git a/hw/arm/aspeed_ast2500_evb.c b/hw/arm/aspeed_ast2500_evb.c
index 5f616252e0b..6ca2a36322c 100644
--- a/hw/arm/aspeed_ast2500_evb.c
+++ b/hw/arm/aspeed_ast2500_evb.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/smbus_eeprom.h"
diff --git a/hw/arm/aspeed_ast2500_g220a.c b/hw/arm/aspeed_ast2500_g220a.c
index 3c654c62dd6..00bb1c61053 100644
--- a/hw/arm/aspeed_ast2500_g220a.c
+++ b/hw/arm/aspeed_ast2500_g220a.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/smbus_eeprom.h"
diff --git a/hw/arm/aspeed_ast2500_romulus.c b/hw/arm/aspeed_ast2500_romulus.c
index b2ed623f680..340a74408b6 100644
--- a/hw/arm/aspeed_ast2500_romulus.c
+++ b/hw/arm/aspeed_ast2500_romulus.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
diff --git a/hw/arm/aspeed_ast2500_supermicro-x11spi.c b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
index 77fa028b096..5a7e49d6ccd 100644
--- a/hw/arm/aspeed_ast2500_supermicro-x11spi.c
+++ b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/smbus_eeprom.h"
diff --git a/hw/arm/aspeed_ast2500_tiogapass.c b/hw/arm/aspeed_ast2500_tiogapass.c
index 1771f376480..6cb567526c4 100644
--- a/hw/arm/aspeed_ast2500_tiogapass.c
+++ b/hw/arm/aspeed_ast2500_tiogapass.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/nvram/eeprom_at24c.h"
diff --git a/hw/arm/aspeed_ast2500_witherspoon.c b/hw/arm/aspeed_ast2500_witherspoon.c
index 4cc349c3236..26ddb673470 100644
--- a/hw/arm/aspeed_ast2500_witherspoon.c
+++ b/hw/arm/aspeed_ast2500_witherspoon.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/misc/led.h"
diff --git a/hw/arm/aspeed_ast2500_yosemitev2.c b/hw/arm/aspeed_ast2500_yosemitev2.c
index 48c813f3c8f..3ba1ed5f6fa 100644
--- a/hw/arm/aspeed_ast2500_yosemitev2.c
+++ b/hw/arm/aspeed_ast2500_yosemitev2.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/nvram/eeprom_at24c.h"
diff --git a/hw/arm/aspeed_ast2600_anacapa.c b/hw/arm/aspeed_ast2600_anacapa.c
index e82f5c98f26..697be58b0e4 100644
--- a/hw/arm/aspeed_ast2600_anacapa.c
+++ b/hw/arm/aspeed_ast2600_anacapa.c
@@ -9,7 +9,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/sensor/adc128d818.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/i2c_mux_pca954x.h"
diff --git a/hw/arm/aspeed_ast2600_bletchley.c b/hw/arm/aspeed_ast2600_bletchley.c
index 9dda83ad4c0..2822f6bdf5a 100644
--- a/hw/arm/aspeed_ast2600_bletchley.c
+++ b/hw/arm/aspeed_ast2600_bletchley.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/gpio/pca9552.h"
diff --git a/hw/arm/aspeed_ast2600_catalina.c b/hw/arm/aspeed_ast2600_catalina.c
index f91e0635908..23636ab6985 100644
--- a/hw/arm/aspeed_ast2600_catalina.c
+++ b/hw/arm/aspeed_ast2600_catalina.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/i2c_mux_pca954x.h"
diff --git a/hw/arm/aspeed_ast2600_evb.c b/hw/arm/aspeed_ast2600_evb.c
index 404083b61dc..8a17c4453e9 100644
--- a/hw/arm/aspeed_ast2600_evb.c
+++ b/hw/arm/aspeed_ast2600_evb.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/smbus_eeprom.h"
diff --git a/hw/arm/aspeed_ast2600_fby35.c b/hw/arm/aspeed_ast2600_fby35.c
index 6bcda0ac630..65d98fafec6 100644
--- a/hw/arm/aspeed_ast2600_fby35.c
+++ b/hw/arm/aspeed_ast2600_fby35.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/nvram/eeprom_at24c.h"
diff --git a/hw/arm/aspeed_ast2600_fuji.c b/hw/arm/aspeed_ast2600_fuji.c
index cf49149fe9a..8a87c2dbee3 100644
--- a/hw/arm/aspeed_ast2600_fuji.c
+++ b/hw/arm/aspeed_ast2600_fuji.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/i2c/i2c_mux_pca954x.h"
diff --git a/hw/arm/aspeed_ast2600_gb200nvl.c b/hw/arm/aspeed_ast2600_gb200nvl.c
index 705561afe39..311feb82023 100644
--- a/hw/arm/aspeed_ast2600_gb200nvl.c
+++ b/hw/arm/aspeed_ast2600_gb200nvl.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/nvram/eeprom_at24c.h"
diff --git a/hw/arm/aspeed_ast2600_rainier.c b/hw/arm/aspeed_ast2600_rainier.c
index 6e5debc8bc1..43a8f01a9e7 100644
--- a/hw/arm/aspeed_ast2600_rainier.c
+++ b/hw/arm/aspeed_ast2600_rainier.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/nvram/eeprom_at24c.h"
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index ccfa4ade265..73362b60d2a 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -22,7 +22,6 @@
#include "hw/arm/boot.h"
#include "hw/block/flash.h"
#include "hw/arm/aspeed_coprocessor.h"
-#include "hw/arm/machines-qom.h"
#define TYPE_AST2700FC MACHINE_TYPE_NAME("ast2700fc")
OBJECT_DECLARE_SIMPLE_TYPE(Ast2700FCState, AST2700FC);
diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c
index 0deb3127c21..460c9ff0d2e 100644
--- a/hw/arm/aspeed_ast27x0_evb.c
+++ b/hw/arm/aspeed_ast27x0_evb.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/sensor/tmp105.h"
diff --git a/hw/arm/ax3000-boards.c b/hw/arm/ax3000-boards.c
index c7248f9f52b..dc98ee7b71a 100644
--- a/hw/arm/ax3000-boards.c
+++ b/hw/arm/ax3000-boards.c
@@ -9,7 +9,6 @@
#include "qemu/osdep.h"
#include "hw/arm/ax3000-boards.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "qemu/error-report.h"
#include "qom/object.h"
diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
index 04dce2d19ce..de19212ab85 100644
--- a/hw/arm/b-l475e-iot01a.c
+++ b/hw/arm/b-l475e-iot01a.c
@@ -29,7 +29,6 @@
#include "qemu/error-report.h"
#include "hw/arm/boot.h"
#include "hw/core/split-irq.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/stm32l4x5_soc.h"
#include "hw/gpio/stm32l4x5_gpio.h"
#include "hw/display/dm163.h"
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 15c878d1636..8f59111fd4e 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -27,7 +27,6 @@
#include "hw/core/qdev-properties.h"
#include "hw/arm/allwinner-r40.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#define TYPE_BPIM2U_MACHINE MACHINE_TYPE_NAME("bpim2u")
OBJECT_DECLARE_SIMPLE_TYPE(Bpim2uMachineState, BPIM2U_MACHINE)
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index 4b930e6ba12..ca6b3addb7b 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -15,7 +15,6 @@
#include "hw/core/boards.h"
#include "strongarm.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "system/address-spaces.h"
#include "qom/object.h"
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index 511b71fbd7e..ae27056938f 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -22,7 +22,6 @@
#include "hw/core/qdev-properties.h"
#include "hw/arm/allwinner-a10.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/i2c/i2c.h"
#define TYPE_CUBIEBOARD_MACHINE MACHINE_TYPE_NAME("cubieboard")
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index c7ecf22a958..90c19106ad0 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -29,7 +29,6 @@
#include "hw/core/boards.h"
#include "qemu/error-report.h"
#include "hw/arm/digic.h"
-#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/core/loader.h"
#include "system/qtest.h"
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index 62f7cbe875e..78632877df8 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -28,7 +28,6 @@
#include "hw/core/sysbus.h"
#include "net/net.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "system/address-spaces.h"
#include "hw/arm/exynos4210.h"
#include "hw/net/lan9118.h"
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index 3246512c214..243c30a67e7 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -28,7 +28,6 @@
#include "hw/core/qdev-properties.h"
#include "hw/arm/fsl-imx25.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "qemu/error-report.h"
#include "system/qtest.h"
diff --git a/hw/arm/imx8mm-evk.c b/hw/arm/imx8mm-evk.c
index ffe8e494a57..8a5737502fd 100644
--- a/hw/arm/imx8mm-evk.c
+++ b/hw/arm/imx8mm-evk.c
@@ -11,7 +11,6 @@
#include "system/address-spaces.h"
#include "hw/arm/boot.h"
#include "hw/arm/fsl-imx8mm.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "system/kvm.h"
diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c
index 389e7c86d21..3f376f86d91 100644
--- a/hw/arm/imx8mp-evk.c
+++ b/hw/arm/imx8mp-evk.c
@@ -10,7 +10,6 @@
#include "system/address-spaces.h"
#include "hw/arm/boot.h"
#include "hw/arm/fsl-imx8mp.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "system/kvm.h"
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 25ecd931e76..382ea7850d8 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -13,7 +13,6 @@
#include "migration/vmstate.h"
#include "hw/core/boards.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/misc/arm_integrator_debug.h"
#include "hw/net/smc91c111.h"
#include "net/net.h"
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index 909dd929e63..387bf54ced1 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -17,7 +17,6 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx31.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "qemu/error-report.h"
#include "system/address-spaces.h"
diff --git a/hw/arm/max78000fthr.c b/hw/arm/max78000fthr.c
index 290a14c8ad9..ed50bb91979 100644
--- a/hw/arm/max78000fthr.c
+++ b/hw/arm/max78000fthr.c
@@ -12,7 +12,6 @@
#include "hw/core/qdev-properties.h"
#include "hw/core/qdev-clock.h"
#include "qemu/error-report.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/max78000_soc.h"
#include "hw/arm/boot.h"
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index a3dafb20131..40071d2c7b9 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -14,7 +14,6 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx6ul.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "qemu/error-report.h"
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index cb4536faadd..db8a62e5f6c 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -16,7 +16,6 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx7.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "qemu/error-report.h"
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index 85285861c5f..c1a3f6903fe 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -12,7 +12,6 @@
#include "qapi/error.h"
#include "hw/core/boards.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "system/system.h"
#include "system/address-spaces.h"
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 865009c1e0e..d767207e2e1 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -52,7 +52,6 @@
#include "qemu/error-report.h"
#include "hw/arm/boot.h"
#include "hw/arm/armv7m.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/or-irq.h"
#include "hw/core/boards.h"
#include "system/address-spaces.h"
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index b13b7bc55ec..35d867328a9 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -31,7 +31,6 @@
#include "qemu/error-report.h"
#include "hw/arm/boot.h"
#include "hw/arm/armv7m.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/or-irq.h"
#include "hw/core/boards.h"
#include "system/address-spaces.h"
diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
index d6f4c1640ab..eedb877e4bc 100644
--- a/hw/arm/mps3r.c
+++ b/hw/arm/mps3r.c
@@ -37,7 +37,6 @@
#include "hw/core/qdev-properties.h"
#include "hw/arm/boot.h"
#include "hw/arm/bsa.h"
-#include "hw/arm/machines-qom.h"
#include "hw/char/cmsdk-apb-uart.h"
#include "hw/i2c/arm_sbcon_i2c.h"
#include "hw/intc/arm_gicv3.h"
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 8d00fef43b0..1372d7f628a 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -32,7 +32,6 @@
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/qdev-clock.h"
#include "system/address-spaces.h"
#include "hw/arm/msf2-soc.h"
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 1b161487e7e..571bee1b72b 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -26,7 +26,6 @@
#include "system/system.h"
#include "hw/arm/boot.h"
#include "hw/arm/armsse.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "hw/char/pl011.h"
#include "hw/core/split-irq.h"
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 84d20bca72b..e1a336e861a 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -15,7 +15,6 @@
#include "hw/core/sysbus.h"
#include "migration/vmstate.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "net/net.h"
#include "system/system.h"
#include "hw/core/boards.h"
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index 6a639264d61..0db8798b4bd 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -30,7 +30,6 @@
#include "qemu/error-report.h"
#include "hw/arm/stm32f205_soc.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
/* Main SYSCLK frequency in Hz (120MHz) */
#define SYSCLK_FRQ 120000000ULL
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index d04ab8aeea4..5ac0eb81637 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -30,7 +30,6 @@
#include "qemu/error-report.h"
#include "hw/arm/stm32f405_soc.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
/* Main SYSCLK frequency in Hz (168MHz) */
#define SYSCLK_FRQ 168000000ULL
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index 025de42dac6..9c526a26839 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -17,7 +17,6 @@
#include "qemu/osdep.h"
#include "hw/arm/npcm7xx.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/cpu.h"
#include "hw/i2c/i2c_mux_pca954x.h"
#include "hw/i2c/smbus_eeprom.h"
diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
index 2a04cf4f2c9..4b3af165034 100644
--- a/hw/arm/npcm8xx_boards.c
+++ b/hw/arm/npcm8xx_boards.c
@@ -19,7 +19,6 @@
#include "chardev/char.h"
#include "hw/core/boards.h"
#include "hw/arm/npcm8xx.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/cpu.h"
#include "hw/core/loader.h"
#include "hw/core/qdev.h"
diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
index 154501fc3c7..de9ac4978ce 100644
--- a/hw/arm/olimex-stm32-h405.c
+++ b/hw/arm/olimex-stm32-h405.c
@@ -31,7 +31,6 @@
#include "qemu/error-report.h"
#include "hw/arm/stm32f405_soc.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
/* olimex-stm32-h405 implementation is derived from netduinoplus2 */
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index c3fe4187b8b..a7e469ea6a3 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -32,7 +32,6 @@
#include "hw/arm/omap.h"
#include "hw/core/boards.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "system/qtest.h"
#include "system/address-spaces.h"
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index 3f06716c364..7a19732f5df 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -26,7 +26,6 @@
#include "hw/core/qdev-properties.h"
#include "hw/arm/allwinner-h3.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#define TYPE_ORANGEPI_MACHINE MACHINE_TYPE_NAME("orangepi-pc")
OBJECT_DECLARE_SIMPLE_TYPE(OrangePiMachineState, ORANGEPI_MACHINE)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 7ff3e8400e6..fadbacb2534 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -24,7 +24,6 @@
#include "qemu/error-report.h"
#include "hw/core/boards.h"
#include "hw/core/loader.h"
-#include "hw/arm/machines-qom.h"
#include "qom/object.h"
#define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common")
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index 08fcdf58c9f..7d3eed96304 100644
--- a/hw/arm/raspi4b.c
+++ b/hw/arm/raspi4b.c
@@ -11,7 +11,6 @@
#include "qemu/cutils.h"
#include "qapi/error.h"
#include "qapi/visitor.h"
-#include "hw/arm/machines-qom.h"
#include "hw/arm/raspi_platform.h"
#include "hw/display/bcm2835_fb.h"
#include "hw/core/registerfields.h"
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index aee7d05c3e6..ceba0331b08 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -12,7 +12,6 @@
#include "target/arm/cpu.h"
#include "hw/core/sysbus.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/split-irq.h"
#include "hw/misc/arm_sysctl.h"
#include "hw/net/lan9118.h"
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index ec307388f45..05dfabd9376 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -14,7 +14,6 @@
#include "qapi/error.h"
#include "hw/arm/fsl-imx6.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "qemu/error-report.h"
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 6ba353341a1..158b461eb48 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -35,7 +35,6 @@
#include "hw/arm/bsa.h"
#include "hw/arm/fdt.h"
#include "hw/arm/smmuv3.h"
-#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/core/boards.h"
#include "hw/ide/ide-bus.h"
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index f634918868b..f41315e1928 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -15,7 +15,6 @@
#include "hw/sd/sd.h"
#include "hw/ssi/ssi.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "qemu/timer.h"
#include "hw/i2c/i2c.h"
#include "net/net.h"
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index 0b39543c1ff..d899a134b38 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -31,7 +31,6 @@
#include "qemu/error-report.h"
#include "hw/arm/stm32f100_soc.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
/* stm32vldiscovery implementation is derived from netduinoplus2 */
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 1db9bc1eb24..f94bf96599e 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -12,7 +12,6 @@
#include "hw/core/sysbus.h"
#include "migration/vmstate.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/net/smc91c111.h"
#include "net/net.h"
#include "system/system.h"
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 1e29fe0f09c..914cda66d20 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -26,7 +26,6 @@
#include "qemu/datadir.h"
#include "hw/core/sysbus.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/misc/arm_sysctl.h"
#include "hw/net/lan9118.h"
#include "hw/i2c/i2c.h"
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index eae4f0fe413..0871a35e11f 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -37,7 +37,6 @@
#include "hw/core/sysbus.h"
#include "hw/arm/boot.h"
#include "hw/arm/virt.h"
-#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/display/ramfb.h"
#include "net/net.h"
diff --git a/hw/arm/xen-pvh.c b/hw/arm/xen-pvh.c
index b47dd9efd81..f05956c1662 100644
--- a/hw/arm/xen-pvh.c
+++ b/hw/arm/xen-pvh.c
@@ -10,7 +10,6 @@
#include "hw/core/boards.h"
#include "system/system.h"
#include "hw/xen/xen-pvh-common.h"
-#include "hw/arm/machines-qom.h"
#define TYPE_XEN_ARM MACHINE_TYPE_NAME("xenpvh")
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 8ebd8e5ccd5..c1897ab1cf3 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -20,7 +20,6 @@
#include "qapi/error.h"
#include "hw/core/sysbus.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "net/net.h"
#include "system/system.h"
#include "hw/core/boards.h"
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index e06a0c55549..4018f2bf7d1 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -21,7 +21,6 @@
#include "hw/arm/fdt.h"
#include "hw/arm/xlnx-versal.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "qom/object.h"
#include "target/arm/cpu.h"
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index da8b3ede873..bb596218540 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -19,7 +19,6 @@
#include "qapi/error.h"
#include "hw/arm/xlnx-zynqmp.h"
#include "hw/arm/boot.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/boards.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index c1ecf3214fd..2aa748233b3 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -16,7 +16,6 @@
#include "hw/core/boards.h"
#include "system/address-spaces.h"
#include "hw/core/cpu.h"
-#include "hw/arm/machines-qom.h"
#include "hw/riscv/machines-qom.h"
static void machine_none_init(MachineState *mch)
diff --git a/hw/nitro/machine.c b/hw/nitro/machine.c
index bb8878299bc..88d01960a01 100644
--- a/hw/nitro/machine.c
+++ b/hw/nitro/machine.c
@@ -31,7 +31,6 @@
#include "system/system.h"
#include "system/nitro-accel.h"
#include "qemu/accel.h"
-#include "hw/arm/machines-qom.h"
#include "hw/core/eif.h"
#include <zlib.h> /* for crc32 */
diff --git a/hw/remote/machine.c b/hw/remote/machine.c
index 6580e0d9683..ced782f6a9c 100644
--- a/hw/remote/machine.c
+++ b/hw/remote/machine.c
@@ -24,7 +24,6 @@
#include "hw/core/qdev.h"
#include "hw/remote/vfio-user-obj.h"
#include "hw/pci/msi.h"
-#include "hw/arm/machines-qom.h"
static void remote_machine_init(MachineState *machine)
{
diff --git a/include/hw/arm/machines-qom.h b/include/hw/arm/machines-qom.h
deleted file mode 100644
index e3eebbdefbc..00000000000
--- a/include/hw/arm/machines-qom.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * QOM type definitions for ARM / Aarch64 machines
- *
- * Copyright (c) Linaro
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
- */
-
-#ifndef HW_ARM_MACHINES_QOM_H
-#define HW_ARM_MACHINES_QOM_H
-
-#include "hw/core/boards.h"
-
-#endif
diff --git a/target-info-qom.c b/target-info-qom.c
index eb9491338ca..7959853e0da 100644
--- a/target-info-qom.c
+++ b/target-info-qom.c
@@ -12,7 +12,6 @@
#include "qemu/target-info-impl.h"
#include "qemu/target-info-init.h"
#include "qemu/target-info-qom.h"
-#include "hw/arm/machines-qom.h"
#include "hw/riscv/machines-qom.h"
static const TypeInfo target_info_types[] = {
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 61106f9def6..7005f4e5d77 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -11,7 +11,6 @@
#include "migration/qemu-file-types.h"
#include "migration/vmstate.h"
#include "target/arm/gtimer.h"
-#include "hw/arm/machines-qom.h"
static bool vfp_needed(void *opaque)
{
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 19/47] hw/riscv: remove TYPE_TARGET_{RISCV32,RISCV64}_MACHINE
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (16 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 18/47] hw/arm: remove machines-qom.h Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 20/47] hw/riscv: remove {riscv32, riscv32_64, riscv64}_machine_interfaces Pierrick Bouvier via qemu development
` (28 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/core/null-machine.c | 5 +----
hw/riscv/virt.c | 2 --
include/hw/riscv/machines-qom.h | 6 ------
target-info-qom.c | 13 -------------
target/riscv/machine.c | 4 ----
5 files changed, 1 insertion(+), 29 deletions(-)
diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index 2aa748233b3..2f008c4a702 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -56,7 +56,4 @@ static void machine_none_machine_init(MachineClass *mc)
mc->no_cdrom = 1;
}
-DEFINE_MACHINE_WITH_INTERFACES("none", machine_none_machine_init,
- { TYPE_TARGET_RISCV32_MACHINE },
- { TYPE_TARGET_RISCV64_MACHINE },
- { })
+DEFINE_MACHINE("none", machine_none_machine_init)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d58656f70d1..d2ae321a376 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1811,8 +1811,6 @@ static const TypeInfo virt_machine_typeinfo = {
.instance_size = sizeof(RISCVVirtState),
.interfaces = (const InterfaceInfo[]) {
{ TYPE_HOTPLUG_HANDLER },
- { TYPE_TARGET_RISCV32_MACHINE },
- { TYPE_TARGET_RISCV64_MACHINE },
{ }
},
};
diff --git a/include/hw/riscv/machines-qom.h b/include/hw/riscv/machines-qom.h
index ee346227bb2..6c0bbdfc159 100644
--- a/include/hw/riscv/machines-qom.h
+++ b/include/hw/riscv/machines-qom.h
@@ -11,12 +11,6 @@
#include "hw/core/boards.h"
-#define TYPE_TARGET_RISCV32_MACHINE \
- "target-info-riscv32-machine"
-
-#define TYPE_TARGET_RISCV64_MACHINE \
- "target-info-riscv64-machine"
-
/*
* Interfaces specifying whether a given QOM object is available in
* qemu-system-riscv32, qemu-system-riscv64, or both.
diff --git a/target-info-qom.c b/target-info-qom.c
index 7959853e0da..f98d3d7698e 100644
--- a/target-info-qom.c
+++ b/target-info-qom.c
@@ -14,19 +14,6 @@
#include "qemu/target-info-qom.h"
#include "hw/riscv/machines-qom.h"
-static const TypeInfo target_info_types[] = {
- {
- .name = TYPE_TARGET_RISCV32_MACHINE,
- .parent = TYPE_INTERFACE,
- },
- {
- .name = TYPE_TARGET_RISCV64_MACHINE,
- .parent = TYPE_INTERFACE,
- },
-};
-
-DEFINE_TYPES(target_info_types)
-
static void target_info_qom_class_init(ObjectClass *oc, const void * data)
{
TargetInfoQomClass *klass = TARGET_INFO_CLASS(oc);
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 31c49ca3e6a..59676c94470 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -582,17 +582,13 @@ const VMStateDescription vmstate_riscv_cpu = {
};
const InterfaceInfo riscv32_machine_interfaces[] = {
- { TYPE_TARGET_RISCV32_MACHINE },
{ }
};
const InterfaceInfo riscv64_machine_interfaces[] = {
- { TYPE_TARGET_RISCV64_MACHINE },
{ }
};
const InterfaceInfo riscv32_64_machine_interfaces[] = {
- { TYPE_TARGET_RISCV32_MACHINE },
- { TYPE_TARGET_RISCV64_MACHINE },
{ }
};
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 20/47] hw/riscv: remove {riscv32, riscv32_64, riscv64}_machine_interfaces
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (17 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 19/47] hw/riscv: remove TYPE_TARGET_{RISCV32,RISCV64}_MACHINE Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier via qemu development
2026-08-28 22:58 ` [PATCH 21/47] hw/riscv: remove DEFINE_MACHINE_{RISCV32,RISCV64} Pierrick Bouvier
` (27 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier via qemu development @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/riscv/k230.c | 1 -
hw/riscv/microchip_pfsoc.c | 1 -
hw/riscv/opentitan.c | 1 -
hw/riscv/shakti_c.c | 1 -
hw/riscv/sifive_e.c | 1 -
hw/riscv/sifive_u.c | 1 -
hw/riscv/spike.c | 1 -
hw/riscv/tt_atlantis.c | 1 -
hw/riscv/xiangshan_kmh.c | 1 -
include/hw/riscv/machines-qom.h | 15 +++------------
target/riscv/machine.c | 12 ------------
11 files changed, 3 insertions(+), 33 deletions(-)
diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c
index 558f30b97e9..72d50d369a9 100644
--- a/hw/riscv/k230.c
+++ b/hw/riscv/k230.c
@@ -556,7 +556,6 @@ static const TypeInfo k230_machine_typeinfo = {
.class_init = k230_machine_class_init,
.instance_init = k230_machine_instance_init,
.instance_size = sizeof(K230MachineState),
- .interfaces = riscv64_machine_interfaces,
};
static void k230_machine_init_register_types(void)
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 4017129c830..42d4fc39734 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -756,7 +756,6 @@ static const TypeInfo microchip_icicle_kit_machine_typeinfo = {
.class_init = microchip_icicle_kit_machine_class_init,
.instance_init = microchip_icicle_kit_machine_instance_init,
.instance_size = sizeof(MicrochipIcicleKitState),
- .interfaces = riscv64_machine_interfaces,
};
static void microchip_icicle_kit_machine_init_register_types(void)
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 5b2f33d5aca..c58d8993303 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -338,7 +338,6 @@ static const TypeInfo open_titan_types[] = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(OpenTitanState),
.class_init = opentitan_machine_class_init,
- .interfaces = riscv32_machine_interfaces,
}
};
diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index 835b1f879b7..9fd7856dc24 100644
--- a/hw/riscv/shakti_c.c
+++ b/hw/riscv/shakti_c.c
@@ -98,7 +98,6 @@ static const TypeInfo shakti_c_machine_type_info = {
.class_init = shakti_c_machine_class_init,
.instance_init = shakti_c_machine_instance_init,
.instance_size = sizeof(ShaktiCMachineState),
- .interfaces = riscv64_machine_interfaces,
};
static void shakti_c_machine_type_info_register(void)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index 71925583bd9..ede7cb52f00 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -168,7 +168,6 @@ static const TypeInfo sifive_e_machine_typeinfo = {
.class_init = sifive_e_machine_class_init,
.instance_init = sifive_e_machine_instance_init,
.instance_size = sizeof(SiFiveEState),
- .interfaces = riscv32_64_machine_interfaces,
};
static void sifive_e_machine_init_register_types(void)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 57a57c96e16..08687cfc363 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -680,7 +680,6 @@ static const TypeInfo sifive_u_machine_typeinfo = {
.class_init = sifive_u_machine_class_init,
.instance_init = sifive_u_machine_instance_init,
.instance_size = sizeof(SiFiveUState),
- .interfaces = riscv32_64_machine_interfaces,
};
static void sifive_u_machine_init_register_types(void)
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 630b65f5697..3786de4b0b7 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -292,7 +292,6 @@ static const TypeInfo spike_machine_typeinfo = {
.class_init = spike_machine_class_init,
.instance_init = spike_machine_instance_init,
.instance_size = sizeof(SpikeState),
- .interfaces = riscv32_64_machine_interfaces,
};
static void spike_machine_init_register_types(void)
diff --git a/hw/riscv/tt_atlantis.c b/hw/riscv/tt_atlantis.c
index d808bcc11c3..5e155726abf 100644
--- a/hw/riscv/tt_atlantis.c
+++ b/hw/riscv/tt_atlantis.c
@@ -609,7 +609,6 @@ static const TypeInfo tt_atlantis_types[] = {
.parent = TYPE_MACHINE,
.class_init = tt_atlantis_machine_class_init,
.instance_size = sizeof(TTAtlantisState),
- .interfaces = riscv64_machine_interfaces,
},
};
diff --git a/hw/riscv/xiangshan_kmh.c b/hw/riscv/xiangshan_kmh.c
index 384624d69ad..e02624b62b4 100644
--- a/hw/riscv/xiangshan_kmh.c
+++ b/hw/riscv/xiangshan_kmh.c
@@ -216,7 +216,6 @@ static const TypeInfo xiangshan_kmh_machine_info = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(XiangshanKmhState),
.class_init = xiangshan_kmh_machine_class_init,
- .interfaces = riscv64_machine_interfaces,
};
static void xiangshan_kmh_machine_register_types(void)
diff --git a/include/hw/riscv/machines-qom.h b/include/hw/riscv/machines-qom.h
index 6c0bbdfc159..e5f45b32e69 100644
--- a/include/hw/riscv/machines-qom.h
+++ b/include/hw/riscv/machines-qom.h
@@ -11,15 +11,6 @@
#include "hw/core/boards.h"
-/*
- * Interfaces specifying whether a given QOM object is available in
- * qemu-system-riscv32, qemu-system-riscv64, or both.
- */
-
-extern const InterfaceInfo riscv32_machine_interfaces[];
-extern const InterfaceInfo riscv64_machine_interfaces[];
-extern const InterfaceInfo riscv32_64_machine_interfaces[];
-
/*
* Helper macros for defining machines available in qemu-system-riscv32,
* qemu-system-riscv64, or both.
@@ -27,14 +18,14 @@ extern const InterfaceInfo riscv32_64_machine_interfaces[];
#define DEFINE_MACHINE_RISCV32(namestr, machine_initfn) \
DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- riscv32_machine_interfaces)
+ NULL)
#define DEFINE_MACHINE_RISCV64(namestr, machine_initfn) \
DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- riscv64_machine_interfaces)
+ NULL)
#define DEFINE_MACHINE_RISCV32_64(namestr, machine_initfn) \
DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- riscv32_64_machine_interfaces)
+ NULL)
#endif
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 59676c94470..22a918cec95 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -580,15 +580,3 @@ const VMStateDescription vmstate_riscv_cpu = {
NULL
}
};
-
-const InterfaceInfo riscv32_machine_interfaces[] = {
- { }
-};
-
-const InterfaceInfo riscv64_machine_interfaces[] = {
- { }
-};
-
-const InterfaceInfo riscv32_64_machine_interfaces[] = {
- { }
-};
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 21/47] hw/riscv: remove DEFINE_MACHINE_{RISCV32,RISCV64}
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (18 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 20/47] hw/riscv: remove {riscv32, riscv32_64, riscv64}_machine_interfaces Pierrick Bouvier via qemu development
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 22/47] hw/riscv: remove machines-qom.h Pierrick Bouvier
` (26 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/riscv/boston-aia.c | 2 +-
hw/riscv/microblaze-v-generic.c | 2 +-
include/hw/riscv/machines-qom.h | 17 -----------------
3 files changed, 2 insertions(+), 19 deletions(-)
diff --git a/hw/riscv/boston-aia.c b/hw/riscv/boston-aia.c
index 965d0f5699e..30eff10bc5f 100644
--- a/hw/riscv/boston-aia.c
+++ b/hw/riscv/boston-aia.c
@@ -474,4 +474,4 @@ static void boston_mach_class_init(MachineClass *mc)
mc->default_cpu_type = TYPE_RISCV_CPU_MIPS_P8700;
}
-DEFINE_MACHINE_RISCV64("boston-aia", boston_mach_class_init)
+DEFINE_MACHINE("boston-aia", boston_mach_class_init)
diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generic.c
index d33ac39a68c..503e8e08992 100644
--- a/hw/riscv/microblaze-v-generic.c
+++ b/hw/riscv/microblaze-v-generic.c
@@ -187,4 +187,4 @@ static void mb_v_generic_machine_init(MachineClass *mc)
mc->default_cpus = 1;
}
-DEFINE_MACHINE_RISCV32_64("amd-microblaze-v-generic", mb_v_generic_machine_init)
+DEFINE_MACHINE("amd-microblaze-v-generic", mb_v_generic_machine_init)
diff --git a/include/hw/riscv/machines-qom.h b/include/hw/riscv/machines-qom.h
index e5f45b32e69..79d212eeb7d 100644
--- a/include/hw/riscv/machines-qom.h
+++ b/include/hw/riscv/machines-qom.h
@@ -11,21 +11,4 @@
#include "hw/core/boards.h"
-/*
- * Helper macros for defining machines available in qemu-system-riscv32,
- * qemu-system-riscv64, or both.
- */
-
-#define DEFINE_MACHINE_RISCV32(namestr, machine_initfn) \
- DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- NULL)
-
-#define DEFINE_MACHINE_RISCV64(namestr, machine_initfn) \
- DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- NULL)
-
-#define DEFINE_MACHINE_RISCV32_64(namestr, machine_initfn) \
- DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
- NULL)
-
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 22/47] hw/riscv: remove machines-qom.h
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (19 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 21/47] hw/riscv: remove DEFINE_MACHINE_{RISCV32,RISCV64} Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 12:36 ` Yonggang Luo
2026-08-28 22:58 ` [PATCH 23/47] target-info: add target_config_multiprocess Pierrick Bouvier
` (25 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/core/null-machine.c | 1 -
hw/riscv/boston-aia.c | 1 -
hw/riscv/k230.c | 1 -
hw/riscv/microblaze-v-generic.c | 1 -
hw/riscv/microchip_pfsoc.c | 1 -
hw/riscv/opentitan.c | 1 -
hw/riscv/shakti_c.c | 1 -
hw/riscv/sifive_e.c | 1 -
hw/riscv/sifive_u.c | 1 -
hw/riscv/spike.c | 1 -
hw/riscv/tt_atlantis.c | 1 -
hw/riscv/virt.c | 1 -
hw/riscv/xiangshan_kmh.c | 1 -
include/hw/riscv/machines-qom.h | 14 --------------
target-info-qom.c | 1 -
target/riscv/machine.c | 1 -
16 files changed, 29 deletions(-)
delete mode 100644 include/hw/riscv/machines-qom.h
diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index 2f008c4a702..60254913019 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -16,7 +16,6 @@
#include "hw/core/boards.h"
#include "system/address-spaces.h"
#include "hw/core/cpu.h"
-#include "hw/riscv/machines-qom.h"
static void machine_none_init(MachineState *mch)
{
diff --git a/hw/riscv/boston-aia.c b/hw/riscv/boston-aia.c
index 30eff10bc5f..b90da096ea8 100644
--- a/hw/riscv/boston-aia.c
+++ b/hw/riscv/boston-aia.c
@@ -18,7 +18,6 @@
#include "hw/ide/ahci-pci.h"
#include "hw/core/loader.h"
#include "hw/riscv/cps.h"
-#include "hw/riscv/machines-qom.h"
#include "hw/pci-host/xilinx-pcie.h"
#include "hw/core/qdev-properties.h"
#include "qapi/error.h"
diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c
index 72d50d369a9..34905bb1702 100644
--- a/hw/riscv/k230.c
+++ b/hw/riscv/k230.c
@@ -26,7 +26,6 @@
#include "hw/core/sysbus.h"
#include "hw/riscv/k230.h"
#include "hw/riscv/boot.h"
-#include "hw/riscv/machines-qom.h"
#include "hw/intc/riscv_aclint.h"
#include "hw/intc/sifive_plic.h"
#include "hw/char/serial-mm.h"
diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generic.c
index 503e8e08992..b0494b1ac50 100644
--- a/hw/riscv/microblaze-v-generic.c
+++ b/hw/riscv/microblaze-v-generic.c
@@ -25,7 +25,6 @@
#include "system/address-spaces.h"
#include "hw/char/xilinx_uartlite.h"
#include "hw/misc/unimp.h"
-#include "hw/riscv/machines-qom.h"
#define LMB_BRAM_SIZE (128 * KiB)
#define MEMORY_BASEADDR 0x80000000
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 42d4fc39734..60bb96da016 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -49,7 +49,6 @@
#include "hw/misc/unimp.h"
#include "hw/riscv/boot.h"
#include "hw/riscv/riscv_hart.h"
-#include "hw/riscv/machines-qom.h"
#include "hw/riscv/microchip_pfsoc.h"
#include "hw/intc/riscv_aclint.h"
#include "hw/intc/sifive_plic.h"
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index c58d8993303..8cd660dd415 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -26,7 +26,6 @@
#include "hw/core/boards.h"
#include "hw/misc/unimp.h"
#include "hw/riscv/boot.h"
-#include "hw/riscv/machines-qom.h"
#include "qemu/units.h"
#include "system/system.h"
#include "system/address-spaces.h"
diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index 9fd7856dc24..a205a213324 100644
--- a/hw/riscv/shakti_c.c
+++ b/hw/riscv/shakti_c.c
@@ -19,7 +19,6 @@
#include "qemu/osdep.h"
#include "hw/core/boards.h"
#include "hw/riscv/shakti_c.h"
-#include "hw/riscv/machines-qom.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/intc/sifive_plic.h"
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index ede7cb52f00..1acfea49668 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -40,7 +40,6 @@
#include "hw/riscv/riscv_hart.h"
#include "hw/riscv/sifive_e.h"
#include "hw/riscv/boot.h"
-#include "hw/riscv/machines-qom.h"
#include "hw/char/sifive_uart.h"
#include "hw/intc/riscv_aclint.h"
#include "hw/intc/sifive_plic.h"
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 08687cfc363..997ee91aa0e 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -51,7 +51,6 @@
#include "hw/riscv/riscv_hart.h"
#include "hw/riscv/sifive_u.h"
#include "hw/riscv/boot.h"
-#include "hw/riscv/machines-qom.h"
#include "hw/riscv/fdt-common.h"
#include "hw/char/sifive_uart.h"
#include "hw/intc/riscv_aclint.h"
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 3786de4b0b7..e36fe996b09 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -34,7 +34,6 @@
#include "hw/riscv/boot.h"
#include "hw/riscv/fdt-common.h"
#include "hw/riscv/numa.h"
-#include "hw/riscv/machines-qom.h"
#include "hw/char/riscv_htif.h"
#include "hw/intc/riscv_aclint.h"
#include "chardev/char.h"
diff --git a/hw/riscv/tt_atlantis.c b/hw/riscv/tt_atlantis.c
index 5e155726abf..7d02868b222 100644
--- a/hw/riscv/tt_atlantis.c
+++ b/hw/riscv/tt_atlantis.c
@@ -20,7 +20,6 @@
#include "hw/riscv/boot.h"
#include "hw/riscv/fdt-common.h"
-#include "hw/riscv/machines-qom.h"
#include "hw/riscv/riscv_hart.h"
#include "hw/char/serial-mm.h"
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d2ae321a376..dd396410178 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -36,7 +36,6 @@
#include "hw/riscv/virt.h"
#include "hw/riscv/boot.h"
#include "hw/riscv/fdt-common.h"
-#include "hw/riscv/machines-qom.h"
#include "hw/riscv/numa.h"
#include "kvm/kvm_riscv.h"
#include "hw/firmware/smbios.h"
diff --git a/hw/riscv/xiangshan_kmh.c b/hw/riscv/xiangshan_kmh.c
index e02624b62b4..247a0b5d1f2 100644
--- a/hw/riscv/xiangshan_kmh.c
+++ b/hw/riscv/xiangshan_kmh.c
@@ -41,7 +41,6 @@
#include "hw/riscv/boot.h"
#include "hw/riscv/xiangshan_kmh.h"
#include "hw/riscv/riscv_hart.h"
-#include "hw/riscv/machines-qom.h"
#include "system/system.h"
static const MemMapEntry xiangshan_kmh_memmap[] = {
diff --git a/include/hw/riscv/machines-qom.h b/include/hw/riscv/machines-qom.h
deleted file mode 100644
index 79d212eeb7d..00000000000
--- a/include/hw/riscv/machines-qom.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * QOM type definitions for riscv32 / riscv64 machines
- *
- * Copyright (c) rev.ng Labs Srl.
- *
- * SPDX-License-Identifier: GPL-2.0-or-later
- */
-
-#ifndef HW_RISCV_MACHINES_QOM_H
-#define HW_RISCV_MACHINES_QOM_H
-
-#include "hw/core/boards.h"
-
-#endif
diff --git a/target-info-qom.c b/target-info-qom.c
index f98d3d7698e..6965e4d1169 100644
--- a/target-info-qom.c
+++ b/target-info-qom.c
@@ -12,7 +12,6 @@
#include "qemu/target-info-impl.h"
#include "qemu/target-info-init.h"
#include "qemu/target-info-qom.h"
-#include "hw/riscv/machines-qom.h"
static void target_info_qom_class_init(ObjectClass *oc, const void * data)
{
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 22a918cec95..c3f5a255099 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -24,7 +24,6 @@
#include "migration/cpu.h"
#include "exec/icount.h"
#include "target/riscv/tcg/debug.h"
-#include "hw/riscv/machines-qom.h"
#ifdef CONFIG_KVM
#include "kvm/kvm_riscv.h"
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 22/47] hw/riscv: remove machines-qom.h
2026-08-28 22:58 ` [PATCH 22/47] hw/riscv: remove machines-qom.h Pierrick Bouvier
@ 2026-08-31 12:36 ` Yonggang Luo
2026-08-31 17:58 ` Pierrick Bouvier
0 siblings, 1 reply; 99+ messages in thread
From: Yonggang Luo @ 2026-08-31 12:36 UTC (permalink / raw)
To: Pierrick Bouvier
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé
[-- Attachment #1: Type: text/plain, Size: 9530 bytes --]
The changes to DEFINE_MACHINE_* is too much and redundant
They can be simplified by preserving DEFINE_MACHINE_RISCV32
DEFINE_MACHINE_RISCV64 DEFINE_MACHINE_RISCV32_64, along with ARM related
macros.
For example: for riscv we can do this, we can do the same for arm and other
arch when use DEFINE_MACHINE_*.
Pierrick
I've reworked the commits at
https://github.com/lygstate/qemu/tree/s11.1-riscv-arm-tmp1.0.1, you can
check the commits there, I do not post patches to mail-list to avoid review
burden.
/*
* QOM type definitions for riscv32 / riscv64 machines
*
* Copyright (c) rev.ng Labs Srl.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_RISCV_MACHINES_QOM_H
#define HW_RISCV_MACHINES_QOM_H
#include "hw/core/boards.h"
#include "qemu/target-info.h"
/*
* Helper macros for defining machines available in qemu-system-riscv32,
* qemu-system-riscv64, or both.
*/
#define DEFINE_MACHINE_RISCV32(namestr, machine_initfn) \
DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState, \
machine_initfn, false, target_riscv32, \
NULL)
#define DEFINE_MACHINE_RISCV64(namestr, machine_initfn) \
DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState, \
machine_initfn, false, target_riscv64, \
NULL)
#define DEFINE_MACHINE_RISCV32_64(namestr, machine_initfn) \
DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState, \
machine_initfn, false, target_base_riscv, \
NULL)
#endif
On Sat, Aug 29, 2026 at 7:04 AM Pierrick Bouvier <
pierrick.bouvier@oss.qualcomm.com> wrote:
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> hw/core/null-machine.c | 1 -
> hw/riscv/boston-aia.c | 1 -
> hw/riscv/k230.c | 1 -
> hw/riscv/microblaze-v-generic.c | 1 -
> hw/riscv/microchip_pfsoc.c | 1 -
> hw/riscv/opentitan.c | 1 -
> hw/riscv/shakti_c.c | 1 -
> hw/riscv/sifive_e.c | 1 -
> hw/riscv/sifive_u.c | 1 -
> hw/riscv/spike.c | 1 -
> hw/riscv/tt_atlantis.c | 1 -
> hw/riscv/virt.c | 1 -
> hw/riscv/xiangshan_kmh.c | 1 -
> include/hw/riscv/machines-qom.h | 14 --------------
> target-info-qom.c | 1 -
> target/riscv/machine.c | 1 -
> 16 files changed, 29 deletions(-)
> delete mode 100644 include/hw/riscv/machines-qom.h
>
> diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
> index 2f008c4a702..60254913019 100644
> --- a/hw/core/null-machine.c
> +++ b/hw/core/null-machine.c
> @@ -16,7 +16,6 @@
> #include "hw/core/boards.h"
> #include "system/address-spaces.h"
> #include "hw/core/cpu.h"
> -#include "hw/riscv/machines-qom.h"
>
> static void machine_none_init(MachineState *mch)
> {
> diff --git a/hw/riscv/boston-aia.c b/hw/riscv/boston-aia.c
> index 30eff10bc5f..b90da096ea8 100644
> --- a/hw/riscv/boston-aia.c
> +++ b/hw/riscv/boston-aia.c
> @@ -18,7 +18,6 @@
> #include "hw/ide/ahci-pci.h"
> #include "hw/core/loader.h"
> #include "hw/riscv/cps.h"
> -#include "hw/riscv/machines-qom.h"
> #include "hw/pci-host/xilinx-pcie.h"
> #include "hw/core/qdev-properties.h"
> #include "qapi/error.h"
> diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c
> index 72d50d369a9..34905bb1702 100644
> --- a/hw/riscv/k230.c
> +++ b/hw/riscv/k230.c
> @@ -26,7 +26,6 @@
> #include "hw/core/sysbus.h"
> #include "hw/riscv/k230.h"
> #include "hw/riscv/boot.h"
> -#include "hw/riscv/machines-qom.h"
> #include "hw/intc/riscv_aclint.h"
> #include "hw/intc/sifive_plic.h"
> #include "hw/char/serial-mm.h"
> diff --git a/hw/riscv/microblaze-v-generic.c
b/hw/riscv/microblaze-v-generic.c
> index 503e8e08992..b0494b1ac50 100644
> --- a/hw/riscv/microblaze-v-generic.c
> +++ b/hw/riscv/microblaze-v-generic.c
> @@ -25,7 +25,6 @@
> #include "system/address-spaces.h"
> #include "hw/char/xilinx_uartlite.h"
> #include "hw/misc/unimp.h"
> -#include "hw/riscv/machines-qom.h"
>
> #define LMB_BRAM_SIZE (128 * KiB)
> #define MEMORY_BASEADDR 0x80000000
> diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
> index 42d4fc39734..60bb96da016 100644
> --- a/hw/riscv/microchip_pfsoc.c
> +++ b/hw/riscv/microchip_pfsoc.c
> @@ -49,7 +49,6 @@
> #include "hw/misc/unimp.h"
> #include "hw/riscv/boot.h"
> #include "hw/riscv/riscv_hart.h"
> -#include "hw/riscv/machines-qom.h"
> #include "hw/riscv/microchip_pfsoc.h"
> #include "hw/intc/riscv_aclint.h"
> #include "hw/intc/sifive_plic.h"
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index c58d8993303..8cd660dd415 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -26,7 +26,6 @@
> #include "hw/core/boards.h"
> #include "hw/misc/unimp.h"
> #include "hw/riscv/boot.h"
> -#include "hw/riscv/machines-qom.h"
> #include "qemu/units.h"
> #include "system/system.h"
> #include "system/address-spaces.h"
> diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
> index 9fd7856dc24..a205a213324 100644
> --- a/hw/riscv/shakti_c.c
> +++ b/hw/riscv/shakti_c.c
> @@ -19,7 +19,6 @@
> #include "qemu/osdep.h"
> #include "hw/core/boards.h"
> #include "hw/riscv/shakti_c.h"
> -#include "hw/riscv/machines-qom.h"
> #include "qapi/error.h"
> #include "qemu/error-report.h"
> #include "hw/intc/sifive_plic.h"
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index ede7cb52f00..1acfea49668 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -40,7 +40,6 @@
> #include "hw/riscv/riscv_hart.h"
> #include "hw/riscv/sifive_e.h"
> #include "hw/riscv/boot.h"
> -#include "hw/riscv/machines-qom.h"
> #include "hw/char/sifive_uart.h"
> #include "hw/intc/riscv_aclint.h"
> #include "hw/intc/sifive_plic.h"
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 08687cfc363..997ee91aa0e 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -51,7 +51,6 @@
> #include "hw/riscv/riscv_hart.h"
> #include "hw/riscv/sifive_u.h"
> #include "hw/riscv/boot.h"
> -#include "hw/riscv/machines-qom.h"
> #include "hw/riscv/fdt-common.h"
> #include "hw/char/sifive_uart.h"
> #include "hw/intc/riscv_aclint.h"
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index 3786de4b0b7..e36fe996b09 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -34,7 +34,6 @@
> #include "hw/riscv/boot.h"
> #include "hw/riscv/fdt-common.h"
> #include "hw/riscv/numa.h"
> -#include "hw/riscv/machines-qom.h"
> #include "hw/char/riscv_htif.h"
> #include "hw/intc/riscv_aclint.h"
> #include "chardev/char.h"
> diff --git a/hw/riscv/tt_atlantis.c b/hw/riscv/tt_atlantis.c
> index 5e155726abf..7d02868b222 100644
> --- a/hw/riscv/tt_atlantis.c
> +++ b/hw/riscv/tt_atlantis.c
> @@ -20,7 +20,6 @@
>
> #include "hw/riscv/boot.h"
> #include "hw/riscv/fdt-common.h"
> -#include "hw/riscv/machines-qom.h"
> #include "hw/riscv/riscv_hart.h"
>
> #include "hw/char/serial-mm.h"
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index d2ae321a376..dd396410178 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -36,7 +36,6 @@
> #include "hw/riscv/virt.h"
> #include "hw/riscv/boot.h"
> #include "hw/riscv/fdt-common.h"
> -#include "hw/riscv/machines-qom.h"
> #include "hw/riscv/numa.h"
> #include "kvm/kvm_riscv.h"
> #include "hw/firmware/smbios.h"
> diff --git a/hw/riscv/xiangshan_kmh.c b/hw/riscv/xiangshan_kmh.c
> index e02624b62b4..247a0b5d1f2 100644
> --- a/hw/riscv/xiangshan_kmh.c
> +++ b/hw/riscv/xiangshan_kmh.c
> @@ -41,7 +41,6 @@
> #include "hw/riscv/boot.h"
> #include "hw/riscv/xiangshan_kmh.h"
> #include "hw/riscv/riscv_hart.h"
> -#include "hw/riscv/machines-qom.h"
> #include "system/system.h"
>
> static const MemMapEntry xiangshan_kmh_memmap[] = {
> diff --git a/include/hw/riscv/machines-qom.h
b/include/hw/riscv/machines-qom.h
> deleted file mode 100644
> index 79d212eeb7d..00000000000
> --- a/include/hw/riscv/machines-qom.h
> +++ /dev/null
> @@ -1,14 +0,0 @@
> -/*
> - * QOM type definitions for riscv32 / riscv64 machines
> - *
> - * Copyright (c) rev.ng Labs Srl.
> - *
> - * SPDX-License-Identifier: GPL-2.0-or-later
> - */
> -
> -#ifndef HW_RISCV_MACHINES_QOM_H
> -#define HW_RISCV_MACHINES_QOM_H
> -
> -#include "hw/core/boards.h"
> -
> -#endif
> diff --git a/target-info-qom.c b/target-info-qom.c
> index f98d3d7698e..6965e4d1169 100644
> --- a/target-info-qom.c
> +++ b/target-info-qom.c
> @@ -12,7 +12,6 @@
> #include "qemu/target-info-impl.h"
> #include "qemu/target-info-init.h"
> #include "qemu/target-info-qom.h"
> -#include "hw/riscv/machines-qom.h"
>
> static void target_info_qom_class_init(ObjectClass *oc, const void *
data)
> {
> diff --git a/target/riscv/machine.c b/target/riscv/machine.c
> index 22a918cec95..c3f5a255099 100644
> --- a/target/riscv/machine.c
> +++ b/target/riscv/machine.c
> @@ -24,7 +24,6 @@
> #include "migration/cpu.h"
> #include "exec/icount.h"
> #include "target/riscv/tcg/debug.h"
> -#include "hw/riscv/machines-qom.h"
> #ifdef CONFIG_KVM
> #include "kvm/kvm_riscv.h"
> #endif
> --
> 2.43.0
>
>
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
[-- Attachment #2: Type: text/html, Size: 12302 bytes --]
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 22/47] hw/riscv: remove machines-qom.h
2026-08-31 12:36 ` Yonggang Luo
@ 2026-08-31 17:58 ` Pierrick Bouvier
2026-08-31 18:28 ` Yonggang Luo
0 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 17:58 UTC (permalink / raw)
To: luoyonggang
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé
On 8/31/2026 5:36 AM, Yonggang Luo wrote:
> The changes to DEFINE_MACHINE_* is too much and redundant
>
> They can be simplified by preserving DEFINE_MACHINE_RISCV32
> DEFINE_MACHINE_RISCV64 DEFINE_MACHINE_RISCV32_64, along with ARM related
> macros.
>
> For example: for riscv we can do this, we can do the same for arm and
> other arch when use DEFINE_MACHINE_*.
>
We went down this way, mostly because Richard asked us to factorize
interfaces array to not create static data duplication.
Now we don't need this anymore, this is questionable to keep this.
Since it requires to duplicate those macros/header for *all*
architectures, IMHO, it would be better to not do this. That's why
current series removes this.
> Pierrick
>
> I've reworked the commits at https://github.com/lygstate/qemu/tree/
> s11.1-riscv-arm-tmp1.0.1 <https://github.com/lygstate/qemu/tree/s11.1-
> riscv-arm-tmp1.0.1>, you can check the commits there, I do not post
> patches to mail-list to avoid review burden.
>
Be careful to not do extra work for nothing. We first need to agree on
current filtering approach, before dealing with details on the
single-binary itself.
...
Regards,
Pierrick
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 22/47] hw/riscv: remove machines-qom.h
2026-08-31 17:58 ` Pierrick Bouvier
@ 2026-08-31 18:28 ` Yonggang Luo
0 siblings, 0 replies; 99+ messages in thread
From: Yonggang Luo @ 2026-08-31 18:28 UTC (permalink / raw)
To: Pierrick Bouvier
Cc: qemu-level, Anton Johansson, Daniel Henrique Barboza,
Philippe Mathieu-Daudé, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
[-- Attachment #1: Type: text/plain, Size: 1645 bytes --]
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com> 于 2026年9月1日周二 01:58写道：
> On 8/31/2026 5:36 AM, Yonggang Luo wrote:
> > The changes to DEFINE_MACHINE_* is too much and redundant
> >
> > They can be simplified by preserving DEFINE_MACHINE_RISCV32
> > DEFINE_MACHINE_RISCV64 DEFINE_MACHINE_RISCV32_64, along with ARM related
> > macros.
> >
> > For example: for riscv we can do this, we can do the same for arm and
> > other arch when use DEFINE_MACHINE_*.
> >
>
> We went down this way, mostly because Richard asked us to factorize
> interfaces array to not create static data duplication.
> Now we don't need this anymore, this is questionable to keep this.
>
> Since it requires to duplicate those macros/header for *all*
> architectures, IMHO, it would be better to not do this. That's why
> current series removes this.
>
> > Pierrick
> >
> > I've reworked the commits at https://github.com/lygstate/qemu/tree/
> > s11.1-riscv-arm-tmp1.0.1 <https://github.com/lygstate/qemu/tree/s11.1-
> > riscv-arm-tmp1.0.1>, you can check the commits there, I do not post
> > patches to mail-list to avoid review burden.
> >
>
> Be careful to not do extra work for nothing. We first need to agree on
> current filtering approach, before dealing with details on the
> single-binary itself.
>
These patches are better, great job, I like these patches. I ask to
preserve these enum because that would makes the patches smaller, we can
wait others
accept this direction first.
>
> ...
>
> Regards,
> Pierrick
>
[-- Attachment #2: Type: text/html, Size: 2729 bytes --]
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 23/47] target-info: add target_config_multiprocess
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (20 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 22/47] hw/riscv: remove machines-qom.h Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 14:48 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 24/47] hw/remote/machine: filter from CONFIG_MULTIPROCESS Pierrick Bouvier
` (24 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
For some devices/machines, we'll need to access target configuration,
but without relying to target headers. Thus, we add the needed
information in target-info.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/qemu/target-info-impl.h | 3 +++
include/qemu/target-info.h | 7 +++++++
meson.build | 1 +
target-info-def.c | 7 +++++++
target-info.c | 5 +++++
5 files changed, 23 insertions(+)
diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
index cf42aabbc8b..dbd7a5a2071 100644
--- a/include/qemu/target-info-impl.h
+++ b/include/qemu/target-info-impl.h
@@ -30,6 +30,9 @@ typedef struct TargetInfo {
unsigned page_bits_init;
/* runtime equivalent of TARGET_PAGE_BITS_VARY definition */
bool page_bits_vary;
+
+ /* CONFIG_MULTIPROCESS */
+ bool config_multiprocess;
} TargetInfo;
/**
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index b23e5bc5865..579c43332fb 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -42,6 +42,13 @@ const char *target_cpu_type(void);
*/
bool target_big_endian(void);
+/**
+ * target_config_multiprocess:
+ *
+ * Returns true if target defines CONFIG_MULTIPROCESS.
+ */
+bool target_config_multiprocess(void);
+
/**
* target_base_arm:
*
diff --git a/meson.build b/meson.build
index 5da6c15551e..8023da4a147 100644
--- a/meson.build
+++ b/meson.build
@@ -4259,6 +4259,7 @@ foreach target : target_dirs
arch_deps = []
c_args = ['-DCOMPILING_PER_TARGET',
'-DCONFIG_TARGET="@0@-config-target.h"'.format(target),
+ '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target),
]
link_args = emulator_link_args
diff --git a/target-info-def.c b/target-info-def.c
index d121b8c0170..9d51371f766 100644
--- a/target-info-def.c
+++ b/target-info-def.c
@@ -15,6 +15,10 @@
#include "exec/cpu-defs.h"
#include "exec/page-vary.h"
+#ifndef CONFIG_USER_ONLY
+#include CONFIG_DEVICES
+#endif
+
/* Validate correct placement of CPUArchState. */
QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
@@ -39,6 +43,9 @@ static const TargetInfo target_info_stub = {
.page_bits_vary = false,
.page_bits_init = TARGET_PAGE_BITS,
#endif
+#ifdef CONFIG_MULTIPROCESS
+ .config_multiprocess = true,
+#endif
};
target_info_init(target_info_stub)
diff --git a/target-info.c b/target-info.c
index 012b384036d..5db2a6049ac 100644
--- a/target-info.c
+++ b/target-info.c
@@ -42,6 +42,11 @@ bool target_big_endian(void)
return target_endian_mode() == ENDIAN_MODE_BIG;
}
+bool target_config_multiprocess(void)
+{
+ return target_info()->config_multiprocess;
+}
+
bool target_base_arm(void)
{
switch (target_arch()) {
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 23/47] target-info: add target_config_multiprocess
2026-08-28 22:58 ` [PATCH 23/47] target-info: add target_config_multiprocess Pierrick Bouvier
@ 2026-08-31 14:48 ` Philippe Mathieu-Daudé
2026-08-31 14:57 ` Yonggang Luo
2026-08-31 18:00 ` Pierrick Bouvier
0 siblings, 2 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 14:48 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 2026-08-29 0:58, Pierrick Bouvier wrote:
> For some devices/machines, we'll need to access target configuration,
> but without relying to target headers. Thus, we add the needed
> information in target-info.
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> include/qemu/target-info-impl.h | 3 +++
> include/qemu/target-info.h | 7 +++++++
> meson.build | 1 +
> target-info-def.c | 7 +++++++
> target-info.c | 5 +++++
> 5 files changed, 23 insertions(+)
>
> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
> index cf42aabbc8b..dbd7a5a2071 100644
> --- a/include/qemu/target-info-impl.h
> +++ b/include/qemu/target-info-impl.h
> @@ -30,6 +30,9 @@ typedef struct TargetInfo {
> unsigned page_bits_init;
> /* runtime equivalent of TARGET_PAGE_BITS_VARY definition */
> bool page_bits_vary;
> +
> + /* CONFIG_MULTIPROCESS */
> + bool config_multiprocess;
> } TargetInfo;
>
> /**
> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
> index b23e5bc5865..579c43332fb 100644
> --- a/include/qemu/target-info.h
> +++ b/include/qemu/target-info.h
> @@ -42,6 +42,13 @@ const char *target_cpu_type(void);
> */
> bool target_big_endian(void);
>
> +/**
> + * target_config_multiprocess:
> + *
> + * Returns true if target defines CONFIG_MULTIPROCESS.
> + */
> +bool target_config_multiprocess(void);
> +
> /**
> * target_base_arm:
> *
> diff --git a/meson.build b/meson.build
> index 5da6c15551e..8023da4a147 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -4259,6 +4259,7 @@ foreach target : target_dirs
> arch_deps = []
> c_args = ['-DCOMPILING_PER_TARGET',
> '-DCONFIG_TARGET="@0@-config-target.h"'.format(target),
> + '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target),
> ]
> link_args = emulator_link_args
>
> diff --git a/target-info-def.c b/target-info-def.c
> index d121b8c0170..9d51371f766 100644
> --- a/target-info-def.c
> +++ b/target-info-def.c
> @@ -15,6 +15,10 @@
> #include "exec/cpu-defs.h"
> #include "exec/page-vary.h"
>
> +#ifndef CONFIG_USER_ONLY
> +#include CONFIG_DEVICES
> +#endif
> +
> /* Validate correct placement of CPUArchState. */
> QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
> QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
> @@ -39,6 +43,9 @@ static const TargetInfo target_info_stub = {
> .page_bits_vary = false,
> .page_bits_init = TARGET_PAGE_BITS,
> #endif
> +#ifdef CONFIG_MULTIPROCESS
> + .config_multiprocess = true,
> +#endif
> };
>
> target_info_init(target_info_stub)
> diff --git a/target-info.c b/target-info.c
> index 012b384036d..5db2a6049ac 100644
> --- a/target-info.c
> +++ b/target-info.c
> @@ -42,6 +42,11 @@ bool target_big_endian(void)
> return target_endian_mode() == ENDIAN_MODE_BIG;
> }
>
> +bool target_config_multiprocess(void)
> +{
> + return target_info()->config_multiprocess;
> +}
> +
> bool target_base_arm(void)
> {
> switch (target_arch()) {
To avoid TargetInfo::config_multiprocess we can use:
-- >8 --
diff --git a/include/hw/remote/mpqemu-link.h
b/include/hw/remote/mpqemu-link.h
index 4ec0915885..2dee94ac64 100644
--- a/include/hw/remote/mpqemu-link.h
+++ b/include/hw/remote/mpqemu-link.h
@@ -98,2 +98,7 @@ bool mpqemu_msg_valid(MPQemuMsg *msg);
+static inline bool target_config_multiprocess(void)
+{
+ return IS_ENABLED(CONFIG_MULTIPROCESS_ALLOWED);
+}
+
#endif
---
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 23/47] target-info: add target_config_multiprocess
2026-08-31 14:48 ` Philippe Mathieu-Daudé
@ 2026-08-31 14:57 ` Yonggang Luo
2026-08-31 18:00 ` Pierrick Bouvier
1 sibling, 0 replies; 99+ messages in thread
From: Yonggang Luo @ 2026-08-31 14:57 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Pierrick Bouvier, qemu-devel, anjo, Daniel Henrique Barboza,
Peter Maydell, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
[-- Attachment #1: Type: text/plain, Size: 1027 bytes --]
> diff --git a/include/hw/remote/mpqemu-link.h
> b/include/hw/remote/mpqemu-link.h
> index 4ec0915885..2dee94ac64 100644
> --- a/include/hw/remote/mpqemu-link.h
> +++ b/include/hw/remote/mpqemu-link.h
> @@ -98,2 +98,7 @@ bool mpqemu_msg_valid(MPQemuMsg *msg);
>
> +static inline bool target_config_multiprocess(void)
> +{
> + return IS_ENABLED(CONFIG_MULTIPROCESS_ALLOWED);
> +}
Why inline it here?
as target_config_multiprocess should be used as a function pointer for
example:
```
static const TypeInfo remote_machine = {
.name = TYPE_REMOTE_MACHINE,
.parent = TYPE_MACHINE,
.instance_size = sizeof(RemoteMachineState),
.instance_init = remote_machine_instance_init,
.class_init = remote_machine_class_init,
.is_available = target_config_multiprocess,
.interfaces = (const InterfaceInfo[]) {
{ TYPE_HOTPLUG_HANDLER },
{ }
}
};
```
> +
> #endif
> ---
>
>
>
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
[-- Attachment #2: Type: text/html, Size: 1229 bytes --]
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 23/47] target-info: add target_config_multiprocess
2026-08-31 14:48 ` Philippe Mathieu-Daudé
2026-08-31 14:57 ` Yonggang Luo
@ 2026-08-31 18:00 ` Pierrick Bouvier
1 sibling, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 18:00 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 8/31/2026 7:48 AM, Philippe Mathieu-Daudé wrote:
> On 2026-08-29 0:58, Pierrick Bouvier wrote:
>> For some devices/machines, we'll need to access target configuration,
>> but without relying to target headers. Thus, we add the needed
>> information in target-info.
>>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
>> ---
>> include/qemu/target-info-impl.h | 3 +++
>> include/qemu/target-info.h | 7 +++++++
>> meson.build | 1 +
>> target-info-def.c | 7 +++++++
>> target-info.c | 5 +++++
>> 5 files changed, 23 insertions(+)
>>
>> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-
>> info-impl.h
>> index cf42aabbc8b..dbd7a5a2071 100644
>> --- a/include/qemu/target-info-impl.h
>> +++ b/include/qemu/target-info-impl.h
>> @@ -30,6 +30,9 @@ typedef struct TargetInfo {
>> unsigned page_bits_init;
>> /* runtime equivalent of TARGET_PAGE_BITS_VARY definition */
>> bool page_bits_vary;
>> +
>> + /* CONFIG_MULTIPROCESS */
>> + bool config_multiprocess;
>> } TargetInfo;
>> /**
>> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
>> index b23e5bc5865..579c43332fb 100644
>> --- a/include/qemu/target-info.h
>> +++ b/include/qemu/target-info.h
>> @@ -42,6 +42,13 @@ const char *target_cpu_type(void);
>> */
>> bool target_big_endian(void);
>> +/**
>> + * target_config_multiprocess:
>> + *
>> + * Returns true if target defines CONFIG_MULTIPROCESS.
>> + */
>> +bool target_config_multiprocess(void);
>> +
>> /**
>> * target_base_arm:
>> *
>> diff --git a/meson.build b/meson.build
>> index 5da6c15551e..8023da4a147 100644
>> --- a/meson.build
>> +++ b/meson.build
>> @@ -4259,6 +4259,7 @@ foreach target : target_dirs
>> arch_deps = []
>> c_args = ['-DCOMPILING_PER_TARGET',
>> '-DCONFIG_TARGET="@0@-config-target.h"'.format(target),
>> + '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target),
>> ]
>> link_args = emulator_link_args
>> diff --git a/target-info-def.c b/target-info-def.c
>> index d121b8c0170..9d51371f766 100644
>> --- a/target-info-def.c
>> +++ b/target-info-def.c
>> @@ -15,6 +15,10 @@
>> #include "exec/cpu-defs.h"
>> #include "exec/page-vary.h"
>> +#ifndef CONFIG_USER_ONLY
>> +#include CONFIG_DEVICES
>> +#endif
>> +
>> /* Validate correct placement of CPUArchState. */
>> QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
>> QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
>> @@ -39,6 +43,9 @@ static const TargetInfo target_info_stub = {
>> .page_bits_vary = false,
>> .page_bits_init = TARGET_PAGE_BITS,
>> #endif
>> +#ifdef CONFIG_MULTIPROCESS
>> + .config_multiprocess = true,
>> +#endif
>> };
>> target_info_init(target_info_stub)
>> diff --git a/target-info.c b/target-info.c
>> index 012b384036d..5db2a6049ac 100644
>> --- a/target-info.c
>> +++ b/target-info.c
>> @@ -42,6 +42,11 @@ bool target_big_endian(void)
>> return target_endian_mode() == ENDIAN_MODE_BIG;
>> }
>> +bool target_config_multiprocess(void)
>> +{
>> + return target_info()->config_multiprocess;
>> +}
>> +
>> bool target_base_arm(void)
>> {
>> switch (target_arch()) {
>
> To avoid TargetInfo::config_multiprocess we can use:
>
> -- >8 --
> diff --git a/include/hw/remote/mpqemu-link.h b/include/hw/remote/mpqemu-
> link.h
> index 4ec0915885..2dee94ac64 100644
> --- a/include/hw/remote/mpqemu-link.h
> +++ b/include/hw/remote/mpqemu-link.h
> @@ -98,2 +98,7 @@ bool mpqemu_msg_valid(MPQemuMsg *msg);
>
> +static inline bool target_config_multiprocess(void)
> +{
> + return IS_ENABLED(CONFIG_MULTIPROCESS_ALLOWED);
> +}
> +
We need to store the value of CONFIG_MULTIPROCESS somewhere per target,
so it can't be a common function.
Also, I tried using IS_ENABLED in target-info structure instead of
ifdef, but for some reason, it always returned false. Also, its
implementation is far from being easy to read.
> #endif
> ---
>
>
Regards,
Pierrick
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 24/47] hw/remote/machine: filter from CONFIG_MULTIPROCESS
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (21 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 23/47] target-info: add target_config_multiprocess Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 25/47] target-info: add target_config_nitro Pierrick Bouvier
` (23 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/remote/machine.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/remote/machine.c b/hw/remote/machine.c
index ced782f6a9c..2068da9d5be 100644
--- a/hw/remote/machine.c
+++ b/hw/remote/machine.c
@@ -146,6 +146,7 @@ static const TypeInfo remote_machine = {
.instance_size = sizeof(RemoteMachineState),
.instance_init = remote_machine_instance_init,
.class_init = remote_machine_class_init,
+ .is_available = target_config_multiprocess,
.interfaces = (const InterfaceInfo[]) {
{ TYPE_HOTPLUG_HANDLER },
{ }
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 25/47] target-info: add target_config_nitro
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (22 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 24/47] hw/remote/machine: filter from CONFIG_MULTIPROCESS Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 7:15 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 26/47] hw/nitro/machine: filter from CONFIG_NITRO Pierrick Bouvier
` (22 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/qemu/target-info-impl.h | 2 ++
include/qemu/target-info.h | 7 +++++++
target-info-def.c | 3 +++
target-info.c | 5 +++++
4 files changed, 17 insertions(+)
diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
index dbd7a5a2071..4f6c898c707 100644
--- a/include/qemu/target-info-impl.h
+++ b/include/qemu/target-info-impl.h
@@ -33,6 +33,8 @@ typedef struct TargetInfo {
/* CONFIG_MULTIPROCESS */
bool config_multiprocess;
+ /* CONFIG_NITRO */
+ bool config_nitro;
} TargetInfo;
/**
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index 579c43332fb..d775c94d1e3 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -49,6 +49,13 @@ bool target_big_endian(void);
*/
bool target_config_multiprocess(void);
+/**
+ * target_config_nitro:
+ *
+ * Returns true if target defines CONFIG_NITRO.
+ */
+bool target_config_nitro(void);
+
/**
* target_base_arm:
*
diff --git a/target-info-def.c b/target-info-def.c
index 9d51371f766..96fd1f8c73d 100644
--- a/target-info-def.c
+++ b/target-info-def.c
@@ -46,6 +46,9 @@ static const TargetInfo target_info_stub = {
#ifdef CONFIG_MULTIPROCESS
.config_multiprocess = true,
#endif
+#ifdef CONFIG_NITRO
+ .config_nitro = true,
+#endif
};
target_info_init(target_info_stub)
diff --git a/target-info.c b/target-info.c
index 5db2a6049ac..67127da16fe 100644
--- a/target-info.c
+++ b/target-info.c
@@ -47,6 +47,11 @@ bool target_config_multiprocess(void)
return target_info()->config_multiprocess;
}
+bool target_config_nitro(void)
+{
+ return target_info()->config_nitro;
+}
+
bool target_base_arm(void)
{
switch (target_arch()) {
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 25/47] target-info: add target_config_nitro
2026-08-28 22:58 ` [PATCH 25/47] target-info: add target_config_nitro Pierrick Bouvier
@ 2026-08-31 7:15 ` Philippe Mathieu-Daudé
2026-08-31 14:33 ` Philippe Mathieu-Daudé
2026-08-31 18:03 ` Pierrick Bouvier
0 siblings, 2 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 7:15 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé, Alexander Graf
On 29/8/26 00:58, Pierrick Bouvier wrote:
Also wondering why we need a special config for a target device.
So why are we listing we can not plug? Maybe the bus Kconfig is
missing the accelerator dependency?
-- >8 --
diff --git a/hw/nitro/Kconfig b/hw/nitro/Kconfig
index cfae85920a0..2e4125f8710 100644
--- a/hw/nitro/Kconfig
+++ b/hw/nitro/Kconfig
@@ -1,4 +1,5 @@
config NITRO_VSOCK_BUS
+ depends on NITRO
bool
config NITRO_SERIAL_VSOCK
---
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> include/qemu/target-info-impl.h | 2 ++
> include/qemu/target-info.h | 7 +++++++
> target-info-def.c | 3 +++
> target-info.c | 5 +++++
> 4 files changed, 17 insertions(+)
>
> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
> index dbd7a5a2071..4f6c898c707 100644
> --- a/include/qemu/target-info-impl.h
> +++ b/include/qemu/target-info-impl.h
> @@ -33,6 +33,8 @@ typedef struct TargetInfo {
>
> /* CONFIG_MULTIPROCESS */
> bool config_multiprocess;
> + /* CONFIG_NITRO */
> + bool config_nitro;
> } TargetInfo;
>
> /**
> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
> index 579c43332fb..d775c94d1e3 100644
> --- a/include/qemu/target-info.h
> +++ b/include/qemu/target-info.h
> @@ -49,6 +49,13 @@ bool target_big_endian(void);
> */
> bool target_config_multiprocess(void);
>
> +/**
> + * target_config_nitro:
> + *
> + * Returns true if target defines CONFIG_NITRO.
> + */
> +bool target_config_nitro(void);
> +
> /**
> * target_base_arm:
> *
> diff --git a/target-info-def.c b/target-info-def.c
> index 9d51371f766..96fd1f8c73d 100644
> --- a/target-info-def.c
> +++ b/target-info-def.c
> @@ -46,6 +46,9 @@ static const TargetInfo target_info_stub = {
> #ifdef CONFIG_MULTIPROCESS
> .config_multiprocess = true,
> #endif
> +#ifdef CONFIG_NITRO
> + .config_nitro = true,
> +#endif
> };
>
> target_info_init(target_info_stub)
> diff --git a/target-info.c b/target-info.c
> index 5db2a6049ac..67127da16fe 100644
> --- a/target-info.c
> +++ b/target-info.c
> @@ -47,6 +47,11 @@ bool target_config_multiprocess(void)
> return target_info()->config_multiprocess;
> }
>
> +bool target_config_nitro(void)
> +{
> + return target_info()->config_nitro;
> +}
> +
> bool target_base_arm(void)
> {
> switch (target_arch()) {
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 25/47] target-info: add target_config_nitro
2026-08-31 7:15 ` Philippe Mathieu-Daudé
@ 2026-08-31 14:33 ` Philippe Mathieu-Daudé
2026-08-31 18:05 ` Pierrick Bouvier
2026-08-31 18:03 ` Pierrick Bouvier
1 sibling, 1 reply; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 14:33 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé, Alexander Graf
On 2026-08-31 9:15, Philippe Mathieu-Daudé wrote:
> On 29/8/26 00:58, Pierrick Bouvier wrote:
>
> Also wondering why we need a special config for a target device.
>
> So why are we listing we can not plug? Maybe the bus Kconfig is
> missing the accelerator dependency?
>
> -- >8 --
> diff --git a/hw/nitro/Kconfig b/hw/nitro/Kconfig
> index cfae85920a0..2e4125f8710 100644
> --- a/hw/nitro/Kconfig
> +++ b/hw/nitro/Kconfig
> @@ -1,4 +1,5 @@
> config NITRO_VSOCK_BUS
> + depends on NITRO
> bool
>
> config NITRO_SERIAL_VSOCK
> ---
>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
>> ---
>> include/qemu/target-info-impl.h | 2 ++
>> include/qemu/target-info.h | 7 +++++++
>> target-info-def.c | 3 +++
>> target-info.c | 5 +++++
>> 4 files changed, 17 insertions(+)
>>
>> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-
>> info-impl.h
>> index dbd7a5a2071..4f6c898c707 100644
>> --- a/include/qemu/target-info-impl.h
>> +++ b/include/qemu/target-info-impl.h
>> @@ -33,6 +33,8 @@ typedef struct TargetInfo {
>> /* CONFIG_MULTIPROCESS */
>> bool config_multiprocess;
>> + /* CONFIG_NITRO */
>> + bool config_nitro;
>> } TargetInfo;
>> /**
>> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
>> index 579c43332fb..d775c94d1e3 100644
>> --- a/include/qemu/target-info.h
>> +++ b/include/qemu/target-info.h
>> @@ -49,6 +49,13 @@ bool target_big_endian(void);
>> */
>> bool target_config_multiprocess(void);
>> +/**
>> + * target_config_nitro:
>> + *
>> + * Returns true if target defines CONFIG_NITRO.
>> + */
>> +bool target_config_nitro(void);
>> +
>> /**
>> * target_base_arm:
>> *
>> diff --git a/target-info-def.c b/target-info-def.c
>> index 9d51371f766..96fd1f8c73d 100644
>> --- a/target-info-def.c
>> +++ b/target-info-def.c
>> @@ -46,6 +46,9 @@ static const TargetInfo target_info_stub = {
>> #ifdef CONFIG_MULTIPROCESS
>> .config_multiprocess = true,
>> #endif
>> +#ifdef CONFIG_NITRO
>> + .config_nitro = true,
>> +#endif
>> };
>> target_info_init(target_info_stub)
>> diff --git a/target-info.c b/target-info.c
>> index 5db2a6049ac..67127da16fe 100644
>> --- a/target-info.c
>> +++ b/target-info.c
>> @@ -47,6 +47,11 @@ bool target_config_multiprocess(void)
>> return target_info()->config_multiprocess;
>> }
>> +bool target_config_nitro(void)
>> +{
>> + return target_info()->config_nitro;
>> +}
>> +
>> bool target_base_arm(void)
>> {
>> switch (target_arch()) {
>
Since the goal of this effort is solely to keep the CLI
output unchanged, we can do simpler without having to add
TargetInfo::config_nitro:
-- >8 --
diff --git a/hw/nitro/Kconfig b/hw/nitro/Kconfig
index cfae85920a..2e4125f871 100644
--- a/hw/nitro/Kconfig
+++ b/hw/nitro/Kconfig
@@ -1,2 +1,3 @@
config NITRO_VSOCK_BUS
+ depends on NITRO
bool
diff --git a/hw/nitro/meson.build b/hw/nitro/meson.build
index b9bd0d4300..39a087f8d7 100644
--- a/hw/nitro/meson.build
+++ b/hw/nitro/meson.build
@@ -1 +1,2 @@
+system_ss.add(when: 'CONFIG_NITRO', if_true: files('nitro-common.c'))
system_ss.add(when: 'CONFIG_NITRO_VSOCK_BUS', if_true:
files('nitro-vsock-bus.c'))
diff --git a/hw/nitro/nitro-common.c b/hw/nitro/nitro-common.c
new file mode 100644
index 0000000000..cfb47a9a49
--- /dev/null
+++ b/hw/nitro/nitro-common.c
@@ -0,0 +1,15 @@
+/*
+ * Nitro common helpers
+ *
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include "qemu/osdep.h"
+#include "qemu/target-info.h"
+#include "system/nitro-accel.h"
+
+bool target_config_nitro(void)
+{
+ return (target_aarch64() || target_x86_64()) && nitro_enabled();
+}
diff --git a/include/system/nitro-accel.h b/include/system/nitro-accel.h
index a93aa6fb00..a5126bcf02 100644
--- a/include/system/nitro-accel.h
+++ b/include/system/nitro-accel.h
@@ -18,2 +18,4 @@ static inline bool nitro_enabled(void)
+bool target_config_nitro(void);
+
#define TYPE_NITRO_ACCEL ACCEL_CLASS_NAME("nitro")
---
Amending in patches #30 "hw/nitro: filter from CONFIG_NITRO":
-- >8 --
diff --git a/hw/nitro/heartbeat.c b/hw/nitro/heartbeat.c
index dc41323266..c4d2a4637e 100644
--- a/hw/nitro/heartbeat.c
+++ b/hw/nitro/heartbeat.c
@@ -21,2 +21,3 @@
#include "hw/nitro/heartbeat.h"
+#include "system/nitro-accel.h"
#include "trace.h"
diff --git a/hw/nitro/serial-vsock.c b/hw/nitro/serial-vsock.c
index 1d56c33804..ec5aea4617 100644
--- a/hw/nitro/serial-vsock.c
+++ b/hw/nitro/serial-vsock.c
@@ -25,2 +25,3 @@
#include "hw/nitro/serial-vsock.h"
+#include "system/nitro-accel.h"
#include "trace.h"
---
And with another preliminary patch introducing target_x86_64():
-- >8 --
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index 5cce27d4f6..f71a1b8bb6 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -128,2 +128,9 @@ bool target_riscv64(void);
+/**
+ * target_x86_64:
+ *
+ * Returns whether the target architecture is 64-bit x86.
+ */
+bool target_x86_64(void);
+
#endif
diff --git a/target-info.c b/target-info.c
index c9e0be3279..6f03f412b7 100644
--- a/target-info.c
+++ b/target-info.c
@@ -116 +116,6 @@ bool target_riscv64(void)
}
+
+bool target_x86_64(void)
+{
+ return target_arch() == SYS_EMU_TARGET_X86_64;
+}
---
Only tested on Linux/Aarch64, not Linux/x86_64.
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 25/47] target-info: add target_config_nitro
2026-08-31 14:33 ` Philippe Mathieu-Daudé
@ 2026-08-31 18:05 ` Pierrick Bouvier
0 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 18:05 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé, Alexander Graf
On 8/31/2026 7:33 AM, Philippe Mathieu-Daudé wrote:
> On 2026-08-31 9:15, Philippe Mathieu-Daudé wrote:
>> On 29/8/26 00:58, Pierrick Bouvier wrote:
>>
>> Also wondering why we need a special config for a target device.
>>
>> So why are we listing we can not plug? Maybe the bus Kconfig is
>> missing the accelerator dependency?
>>
>> -- >8 --
>> diff --git a/hw/nitro/Kconfig b/hw/nitro/Kconfig
>> index cfae85920a0..2e4125f8710 100644
>> --- a/hw/nitro/Kconfig
>> +++ b/hw/nitro/Kconfig
>> @@ -1,4 +1,5 @@
>> config NITRO_VSOCK_BUS
>> + depends on NITRO
>> bool
>>
>> config NITRO_SERIAL_VSOCK
>> ---
>>
>>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
>>> ---
>>> include/qemu/target-info-impl.h | 2 ++
>>> include/qemu/target-info.h | 7 +++++++
>>> target-info-def.c | 3 +++
>>> target-info.c | 5 +++++
>>> 4 files changed, 17 insertions(+)
>>>
>>> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-
>>> info-impl.h
>>> index dbd7a5a2071..4f6c898c707 100644
>>> --- a/include/qemu/target-info-impl.h
>>> +++ b/include/qemu/target-info-impl.h
>>> @@ -33,6 +33,8 @@ typedef struct TargetInfo {
>>> /* CONFIG_MULTIPROCESS */
>>> bool config_multiprocess;
>>> + /* CONFIG_NITRO */
>>> + bool config_nitro;
>>> } TargetInfo;
>>> /**
>>> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
>>> index 579c43332fb..d775c94d1e3 100644
>>> --- a/include/qemu/target-info.h
>>> +++ b/include/qemu/target-info.h
>>> @@ -49,6 +49,13 @@ bool target_big_endian(void);
>>> */
>>> bool target_config_multiprocess(void);
>>> +/**
>>> + * target_config_nitro:
>>> + *
>>> + * Returns true if target defines CONFIG_NITRO.
>>> + */
>>> +bool target_config_nitro(void);
>>> +
>>> /**
>>> * target_base_arm:
>>> *
>>> diff --git a/target-info-def.c b/target-info-def.c
>>> index 9d51371f766..96fd1f8c73d 100644
>>> --- a/target-info-def.c
>>> +++ b/target-info-def.c
>>> @@ -46,6 +46,9 @@ static const TargetInfo target_info_stub = {
>>> #ifdef CONFIG_MULTIPROCESS
>>> .config_multiprocess = true,
>>> #endif
>>> +#ifdef CONFIG_NITRO
>>> + .config_nitro = true,
>>> +#endif
>>> };
>>> target_info_init(target_info_stub)
>>> diff --git a/target-info.c b/target-info.c
>>> index 5db2a6049ac..67127da16fe 100644
>>> --- a/target-info.c
>>> +++ b/target-info.c
>>> @@ -47,6 +47,11 @@ bool target_config_multiprocess(void)
>>> return target_info()->config_multiprocess;
>>> }
>>> +bool target_config_nitro(void)
>>> +{
>>> + return target_info()->config_nitro;
>>> +}
>>> +
>>> bool target_base_arm(void)
>>> {
>>> switch (target_arch()) {
>>
>
> Since the goal of this effort is solely to keep the CLI
> output unchanged, we can do simpler without having to add
> TargetInfo::config_nitro:
>
> -- >8 --
> diff --git a/hw/nitro/Kconfig b/hw/nitro/Kconfig
> index cfae85920a..2e4125f871 100644
> --- a/hw/nitro/Kconfig
> +++ b/hw/nitro/Kconfig
> @@ -1,2 +1,3 @@
> config NITRO_VSOCK_BUS
> + depends on NITRO
> bool
> diff --git a/hw/nitro/meson.build b/hw/nitro/meson.build
> index b9bd0d4300..39a087f8d7 100644
> --- a/hw/nitro/meson.build
> +++ b/hw/nitro/meson.build
> @@ -1 +1,2 @@
> +system_ss.add(when: 'CONFIG_NITRO', if_true: files('nitro-common.c'))
> system_ss.add(when: 'CONFIG_NITRO_VSOCK_BUS', if_true: files('nitro-
> vsock-bus.c'))
> diff --git a/hw/nitro/nitro-common.c b/hw/nitro/nitro-common.c
> new file mode 100644
> index 0000000000..cfb47a9a49
> --- /dev/null
> +++ b/hw/nitro/nitro-common.c
> @@ -0,0 +1,15 @@
> +/*
> + * Nitro common helpers
> + *
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include "qemu/osdep.h"
> +#include "qemu/target-info.h"
> +#include "system/nitro-accel.h"
> +
> +bool target_config_nitro(void)
> +{
> + return (target_aarch64() || target_x86_64()) && nitro_enabled();
> +}
This duplicates information we have in root meson.build, where NITRO is
set. NITRO is a bit special, since it's set from meson.build, and not
from Kconfig constraints.
> diff --git a/include/system/nitro-accel.h b/include/system/nitro-accel.h
> index a93aa6fb00..a5126bcf02 100644
> --- a/include/system/nitro-accel.h
> +++ b/include/system/nitro-accel.h
> @@ -18,2 +18,4 @@ static inline bool nitro_enabled(void)
>
> +bool target_config_nitro(void);
> +
> #define TYPE_NITRO_ACCEL ACCEL_CLASS_NAME("nitro")
> ---
>
> Amending in patches #30 "hw/nitro: filter from CONFIG_NITRO":
>
> -- >8 --
> diff --git a/hw/nitro/heartbeat.c b/hw/nitro/heartbeat.c
> index dc41323266..c4d2a4637e 100644
> --- a/hw/nitro/heartbeat.c
> +++ b/hw/nitro/heartbeat.c
> @@ -21,2 +21,3 @@
> #include "hw/nitro/heartbeat.h"
> +#include "system/nitro-accel.h"
> #include "trace.h"
> diff --git a/hw/nitro/serial-vsock.c b/hw/nitro/serial-vsock.c
> index 1d56c33804..ec5aea4617 100644
> --- a/hw/nitro/serial-vsock.c
> +++ b/hw/nitro/serial-vsock.c
> @@ -25,2 +25,3 @@
> #include "hw/nitro/serial-vsock.h"
> +#include "system/nitro-accel.h"
> #include "trace.h"
> ---
>
> And with another preliminary patch introducing target_x86_64():
>
> -- >8 --
> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
> index 5cce27d4f6..f71a1b8bb6 100644
> --- a/include/qemu/target-info.h
> +++ b/include/qemu/target-info.h
> @@ -128,2 +128,9 @@ bool target_riscv64(void);
>
> +/**
> + * target_x86_64:
> + *
> + * Returns whether the target architecture is 64-bit x86.
> + */
> +bool target_x86_64(void);
> +
> #endif
> diff --git a/target-info.c b/target-info.c
> index c9e0be3279..6f03f412b7 100644
> --- a/target-info.c
> +++ b/target-info.c
> @@ -116 +116,6 @@ bool target_riscv64(void)
> }
> +
> +bool target_x86_64(void)
> +{
> + return target_arch() == SYS_EMU_TARGET_X86_64;
> +}
> ---
>
> Only tested on Linux/Aarch64, not Linux/x86_64.
Also, it solves maybe one case, but there are dozens of other CONFIG_*
defines we'll have to deal with also.
Thus why I mentioned in answer to cover letter that maybe we could
generate this (functions + target-info struct fill) from Kconfig
directly to avoid boilerplate.
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 25/47] target-info: add target_config_nitro
2026-08-31 7:15 ` Philippe Mathieu-Daudé
2026-08-31 14:33 ` Philippe Mathieu-Daudé
@ 2026-08-31 18:03 ` Pierrick Bouvier
1 sibling, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 18:03 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé, Alexander Graf
On 8/31/2026 12:15 AM, Philippe Mathieu-Daudé wrote:
> On 29/8/26 00:58, Pierrick Bouvier wrote:
>
> Also wondering why we need a special config for a target device.
>
A lot of devices are concerned: basically all those included in
meson.build using 'when:' directive. Beyond host/target/libraries
dependencies, we should not forget that a user is free to create a
custom Kconfig for its need.
It implies that we need to represent Kconfig constraints in our C code,
which is done through CONFIG_* defines per target.
> So why are we listing we can not plug? Maybe the bus Kconfig is
> missing the accelerator dependency?
>
> -- >8 --
> diff --git a/hw/nitro/Kconfig b/hw/nitro/Kconfig
> index cfae85920a0..2e4125f8710 100644
> --- a/hw/nitro/Kconfig
> +++ b/hw/nitro/Kconfig
> @@ -1,4 +1,5 @@
> config NITRO_VSOCK_BUS
> + depends on NITRO
> bool
>
> config NITRO_SERIAL_VSOCK
> ---
>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
>> ---
>> include/qemu/target-info-impl.h | 2 ++
>> include/qemu/target-info.h | 7 +++++++
>> target-info-def.c | 3 +++
>> target-info.c | 5 +++++
>> 4 files changed, 17 insertions(+)
>>
>> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-
>> info-impl.h
>> index dbd7a5a2071..4f6c898c707 100644
>> --- a/include/qemu/target-info-impl.h
>> +++ b/include/qemu/target-info-impl.h
>> @@ -33,6 +33,8 @@ typedef struct TargetInfo {
>> /* CONFIG_MULTIPROCESS */
>> bool config_multiprocess;
>> + /* CONFIG_NITRO */
>> + bool config_nitro;
>> } TargetInfo;
>> /**
>> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
>> index 579c43332fb..d775c94d1e3 100644
>> --- a/include/qemu/target-info.h
>> +++ b/include/qemu/target-info.h
>> @@ -49,6 +49,13 @@ bool target_big_endian(void);
>> */
>> bool target_config_multiprocess(void);
>> +/**
>> + * target_config_nitro:
>> + *
>> + * Returns true if target defines CONFIG_NITRO.
>> + */
>> +bool target_config_nitro(void);
>> +
>> /**
>> * target_base_arm:
>> *
>> diff --git a/target-info-def.c b/target-info-def.c
>> index 9d51371f766..96fd1f8c73d 100644
>> --- a/target-info-def.c
>> +++ b/target-info-def.c
>> @@ -46,6 +46,9 @@ static const TargetInfo target_info_stub = {
>> #ifdef CONFIG_MULTIPROCESS
>> .config_multiprocess = true,
>> #endif
>> +#ifdef CONFIG_NITRO
>> + .config_nitro = true,
>> +#endif
>> };
>> target_info_init(target_info_stub)
>> diff --git a/target-info.c b/target-info.c
>> index 5db2a6049ac..67127da16fe 100644
>> --- a/target-info.c
>> +++ b/target-info.c
>> @@ -47,6 +47,11 @@ bool target_config_multiprocess(void)
>> return target_info()->config_multiprocess;
>> }
>> +bool target_config_nitro(void)
>> +{
>> + return target_info()->config_nitro;
>> +}
>> +
>> bool target_base_arm(void)
>> {
>> switch (target_arch()) {
>
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 26/47] hw/nitro/machine: filter from CONFIG_NITRO
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (23 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 25/47] target-info: add target_config_nitro Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 27/47] hw/arm: filter aarch64 only machines Pierrick Bouvier
` (21 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/nitro/machine.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/nitro/machine.c b/hw/nitro/machine.c
index 88d01960a01..e3c8f097661 100644
--- a/hw/nitro/machine.c
+++ b/hw/nitro/machine.c
@@ -261,6 +261,7 @@ static const TypeInfo nitro_machine_info = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(NitroMachineState),
.class_init = nitro_machine_class_init,
+ .is_available = target_config_nitro,
};
static void nitro_machine_register(void)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 27/47] hw/arm: filter aarch64 only machines
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (24 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 26/47] hw/nitro/machine: filter from CONFIG_NITRO Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 28/47] target-info: add target_config_dpcd Pierrick Bouvier
` (20 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
We know have all the machines correctly filtered when mixing arm and
aarch64 targets.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/arm/ax3000-evk.c | 1 +
hw/arm/imx8mm-evk.c | 18 ++++++++++++++----
hw/arm/imx8mp-evk.c | 1 +
hw/arm/npcm8xx_boards.c | 1 +
hw/arm/sbsa-ref.c | 1 +
hw/arm/xlnx-versal-virt.c | 2 ++
hw/arm/xlnx-zcu102.c | 1 +
7 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/hw/arm/ax3000-evk.c b/hw/arm/ax3000-evk.c
index a1708488710..191610fc075 100644
--- a/hw/arm/ax3000-evk.c
+++ b/hw/arm/ax3000-evk.c
@@ -21,6 +21,7 @@ static const TypeInfo ax3000_evk_types[] = {
.name = MACHINE_TYPE_NAME("axiado-scm3003"),
.parent = TYPE_AX3000_MACHINE,
.class_init = axiado_scm3003_class_init,
+ .is_available = target_aarch64,
}
};
diff --git a/hw/arm/imx8mm-evk.c b/hw/arm/imx8mm-evk.c
index 8a5737502fd..d1f8c8ee215 100644
--- a/hw/arm/imx8mm-evk.c
+++ b/hw/arm/imx8mm-evk.c
@@ -122,8 +122,10 @@ static const char *imx8mm_evk_get_default_cpu_type(const MachineState *ms)
return ARM_CPU_TYPE_NAME("cortex-a53");
}
-static void imx8mm_evk_machine_init(MachineClass *mc)
+static void imx8mm_evk_machine_class_init(ObjectClass *oc, const void *data)
{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
mc->desc = "NXP i.MX 8MM EVK Board";
mc->init = imx8mm_evk_init;
mc->max_cpus = FSL_IMX8MM_NUM_CPUS;
@@ -133,6 +135,14 @@ static void imx8mm_evk_machine_init(MachineClass *mc)
mc->get_default_cpu_type = imx8mm_evk_get_default_cpu_type;
}
-DEFINE_MACHINE_EXTENDED("imx8mm-evk", MACHINE, Imx8mmEvkMachineState,
- imx8mm_evk_machine_init, false,
- NULL)
+static const TypeInfo imx8mm_evk_machine_types[] = {
+ {
+ .name = TYPE_IMX8MM_EVK_MACHINE,
+ .parent = TYPE_MACHINE,
+ .class_init = imx8mm_evk_machine_class_init,
+ .instance_size = sizeof(Imx8mmEvkMachineState),
+ .is_available = target_aarch64,
+ },
+};
+
+DEFINE_TYPES(imx8mm_evk_machine_types)
diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c
index 3f376f86d91..a16243a1e4a 100644
--- a/hw/arm/imx8mp-evk.c
+++ b/hw/arm/imx8mp-evk.c
@@ -161,6 +161,7 @@ static const TypeInfo imx8mp_evk_machine_types[] = {
.class_init = imx8mp_evk_machine_class_init,
.instance_init = imx8mp_evk_machine_init,
.instance_size = sizeof(FslImx8mpEvkState),
+ .is_available = target_aarch64,
},
};
diff --git a/hw/arm/npcm8xx_boards.c b/hw/arm/npcm8xx_boards.c
index 4b3af165034..ca12ba2d6cb 100644
--- a/hw/arm/npcm8xx_boards.c
+++ b/hw/arm/npcm8xx_boards.c
@@ -248,6 +248,7 @@ static const TypeInfo npcm8xx_machine_types[] = {
.name = MACHINE_TYPE_NAME("npcm845-evb"),
.parent = TYPE_NPCM8XX_MACHINE,
.class_init = npcm845_evb_machine_class_init,
+ .is_available = target_aarch64,
},
};
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 158b461eb48..e7e1f93e367 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -945,6 +945,7 @@ static const TypeInfo sbsa_ref_info = {
.instance_finalize = sbsa_ref_instance_finalize,
.class_init = sbsa_ref_class_init,
.instance_size = sizeof(SBSAMachineState),
+ .is_available = target_aarch64,
};
static void sbsa_ref_machine_init(void)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 4018f2bf7d1..02fe4794a5e 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -401,12 +401,14 @@ static const TypeInfo versal_virt_machine_init_typeinfo = {
.name = TYPE_XLNX_VERSAL_VIRT_MACHINE,
.parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE,
.class_init = versal_virt_machine_class_init,
+ .is_available = target_aarch64,
};
static const TypeInfo versal2_virt_machine_init_typeinfo = {
.name = TYPE_XLNX_VERSAL2_VIRT_MACHINE,
.parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE,
.class_init = versal2_virt_machine_class_init,
+ .is_available = target_aarch64,
};
static void versal_virt_machine_init_register_types(void)
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index bb596218540..04903b59e2b 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -302,6 +302,7 @@ static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
.class_init = xlnx_zcu102_machine_class_init,
.instance_init = xlnx_zcu102_machine_instance_init,
.instance_size = sizeof(XlnxZCU102),
+ .is_available = target_aarch64,
};
static void xlnx_zcu102_machine_init_register_types(void)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 28/47] target-info: add target_config_dpcd
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (25 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 27/47] hw/arm: filter aarch64 only machines Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 7:04 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 29/47] hw/display/dpcd: filter from CONFIG_DPCD Pierrick Bouvier
` (19 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/qemu/target-info-impl.h | 2 ++
include/qemu/target-info.h | 7 +++++++
target-info-def.c | 3 +++
target-info.c | 5 +++++
4 files changed, 17 insertions(+)
diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
index 4f6c898c707..045799a771a 100644
--- a/include/qemu/target-info-impl.h
+++ b/include/qemu/target-info-impl.h
@@ -31,6 +31,8 @@ typedef struct TargetInfo {
/* runtime equivalent of TARGET_PAGE_BITS_VARY definition */
bool page_bits_vary;
+ /* CONFIG_DPCD */
+ bool config_dpcd;
/* CONFIG_MULTIPROCESS */
bool config_multiprocess;
/* CONFIG_NITRO */
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index d775c94d1e3..a60751a4ef6 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -42,6 +42,13 @@ const char *target_cpu_type(void);
*/
bool target_big_endian(void);
+/**
+ * target_config_dpcd:
+ *
+ * Returns true if target defines CONFIG_DPCD.
+ */
+bool target_config_dpcd(void);
+
/**
* target_config_multiprocess:
*
diff --git a/target-info-def.c b/target-info-def.c
index 96fd1f8c73d..543278eb949 100644
--- a/target-info-def.c
+++ b/target-info-def.c
@@ -43,6 +43,9 @@ static const TargetInfo target_info_stub = {
.page_bits_vary = false,
.page_bits_init = TARGET_PAGE_BITS,
#endif
+#ifdef CONFIG_DPCD
+ .config_dpcd = true,
+#endif
#ifdef CONFIG_MULTIPROCESS
.config_multiprocess = true,
#endif
diff --git a/target-info.c b/target-info.c
index 67127da16fe..8e9f1823dc0 100644
--- a/target-info.c
+++ b/target-info.c
@@ -42,6 +42,11 @@ bool target_big_endian(void)
return target_endian_mode() == ENDIAN_MODE_BIG;
}
+bool target_config_dpcd(void)
+{
+ return target_info()->config_dpcd;
+}
+
bool target_config_multiprocess(void)
{
return target_info()->config_multiprocess;
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 28/47] target-info: add target_config_dpcd
2026-08-28 22:58 ` [PATCH 28/47] target-info: add target_config_dpcd Pierrick Bouvier
@ 2026-08-31 7:04 ` Philippe Mathieu-Daudé
2026-08-31 10:15 ` Philippe Mathieu-Daudé
` (2 more replies)
0 siblings, 3 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 7:04 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé, Frederic Konrad,
Thomas Huth, Edgar E. Iglesias
On 29/8/26 00:58, Pierrick Bouvier wrote:
No commit description explaining why we need this change.
Guessing, XLNX_ZYNQMP_ARM is AARCH64 specific and is the single
Kconfig selecting DPCD:
$ qemu-system-aarch64 -device help|fgrep -i dpcd
name "dpcd", bus aux-bus
We want to keep '-device help' output unchanged, thus we add a
TargetInfo dpcd field. This however doesn't sound right to handle
a target device config in a distinct way.
IIUC the DPCD device is plugged on a AUX bus, but the wiring is
done explicitly calling aux_map_slave(), meaning so far devices
can not be plugged from the command line interface (maybe they
could, but the code required to do that is not in the repository).
IOW we shouldn't allow TYPE_AUX_BUS children to be user creatable:
-- >8 --
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
index 877f3456062..240447598ad 100644
--- a/hw/misc/auxbus.c
+++ b/hw/misc/auxbus.c
@@ -317,6 +317,7 @@ static void aux_slave_class_init(ObjectClass *klass,
const void *data)
set_bit(DEVICE_CATEGORY_MISC, k->categories);
k->bus_type = TYPE_AUX_BUS;
+ k->user_creatable = false; /* Must be wired calling aux_map_slave() */
}
---
My suggestion is to simply add a previous hunk as a patch before your
"single-binary: command line reference" patch in this series (can send
if you want), and not add the TargetInfo::config_dpcd field at all.
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> include/qemu/target-info-impl.h | 2 ++
> include/qemu/target-info.h | 7 +++++++
> target-info-def.c | 3 +++
> target-info.c | 5 +++++
> 4 files changed, 17 insertions(+)
>
> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
> index 4f6c898c707..045799a771a 100644
> --- a/include/qemu/target-info-impl.h
> +++ b/include/qemu/target-info-impl.h
> @@ -31,6 +31,8 @@ typedef struct TargetInfo {
> /* runtime equivalent of TARGET_PAGE_BITS_VARY definition */
> bool page_bits_vary;
>
> + /* CONFIG_DPCD */
> + bool config_dpcd;
> /* CONFIG_MULTIPROCESS */
> bool config_multiprocess;
> /* CONFIG_NITRO */
> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
> index d775c94d1e3..a60751a4ef6 100644
> --- a/include/qemu/target-info.h
> +++ b/include/qemu/target-info.h
> @@ -42,6 +42,13 @@ const char *target_cpu_type(void);
> */
> bool target_big_endian(void);
>
> +/**
> + * target_config_dpcd:
> + *
> + * Returns true if target defines CONFIG_DPCD.
> + */
> +bool target_config_dpcd(void);
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 28/47] target-info: add target_config_dpcd
2026-08-31 7:04 ` Philippe Mathieu-Daudé
@ 2026-08-31 10:15 ` Philippe Mathieu-Daudé
2026-08-31 18:07 ` Pierrick Bouvier
2026-08-31 18:08 ` Pierrick Bouvier
2 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 10:15 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé, Frederic Konrad,
Thomas Huth, Edgar E. Iglesias
On 31/8/26 09:04, Philippe Mathieu-Daudé wrote:
> On 29/8/26 00:58, Pierrick Bouvier wrote:
>
> No commit description explaining why we need this change.
>
> Guessing, XLNX_ZYNQMP_ARM is AARCH64 specific and is the single
> Kconfig selecting DPCD:
>
> $ qemu-system-aarch64 -device help|fgrep -i dpcd
> name "dpcd", bus aux-bus
>
> We want to keep '-device help' output unchanged, thus we add a
> TargetInfo dpcd field. This however doesn't sound right to handle
> a target device config in a distinct way.
>
> IIUC the DPCD device is plugged on a AUX bus, but the wiring is
> done explicitly calling aux_map_slave(), meaning so far devices
> can not be plugged from the command line interface (maybe they
> could, but the code required to do that is not in the repository).
> IOW we shouldn't allow TYPE_AUX_BUS children to be user creatable:
>
> -- >8 --
> diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
> index 877f3456062..240447598ad 100644
> --- a/hw/misc/auxbus.c
> +++ b/hw/misc/auxbus.c
> @@ -317,6 +317,7 @@ static void aux_slave_class_init(ObjectClass *klass,
> const void *data)
>
> set_bit(DEVICE_CATEGORY_MISC, k->categories);
> k->bus_type = TYPE_AUX_BUS;
> + k->user_creatable = false; /* Must be wired calling aux_map_slave() */
> }
>
> ---
>
> My suggestion is to simply add a previous hunk as a patch before your
> "single-binary: command line reference" patch in this series (can send
> if you want), and not add the TargetInfo::config_dpcd field at all.
I tested your series with this patch placed before #8 "single-binary:
command line reference" and (modulo the optional libraries you don't
seem to have installed on your system) it works as expected.
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 28/47] target-info: add target_config_dpcd
2026-08-31 7:04 ` Philippe Mathieu-Daudé
2026-08-31 10:15 ` Philippe Mathieu-Daudé
@ 2026-08-31 18:07 ` Pierrick Bouvier
2026-08-31 18:08 ` Pierrick Bouvier
2 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 18:07 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé, Frederic Konrad,
Thomas Huth, Edgar E. Iglesias
On 8/31/2026 12:04 AM, Philippe Mathieu-Daudé wrote:
> On 29/8/26 00:58, Pierrick Bouvier wrote:
>
> No commit description explaining why we need this change.
>
See next commit in series using this.
> Guessing, XLNX_ZYNQMP_ARM is AARCH64 specific and is the single
> Kconfig selecting DPCD:
>
> $ qemu-system-aarch64 -device help|fgrep -i dpcd
> name "dpcd", bus aux-bus
>
> We want to keep '-device help' output unchanged, thus we add a
> TargetInfo dpcd field. This however doesn't sound right to handle
> a target device config in a distinct way.
>
> IIUC the DPCD device is plugged on a AUX bus, but the wiring is
> done explicitly calling aux_map_slave(), meaning so far devices
> can not be plugged from the command line interface (maybe they
> could, but the code required to do that is not in the repository).
> IOW we shouldn't allow TYPE_AUX_BUS children to be user creatable:
>
> -- >8 --
> diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
> index 877f3456062..240447598ad 100644
> --- a/hw/misc/auxbus.c
> +++ b/hw/misc/auxbus.c
> @@ -317,6 +317,7 @@ static void aux_slave_class_init(ObjectClass *klass,
> const void *data)
>
> set_bit(DEVICE_CATEGORY_MISC, k->categories);
> k->bus_type = TYPE_AUX_BUS;
> + k->user_creatable = false; /* Must be wired calling aux_map_slave() */
> }
>
> ---
>
> My suggestion is to simply add a previous hunk as a patch before your
> "single-binary: command line reference" patch in this series (can send
> if you want), and not add the TargetInfo::config_dpcd field at all.
>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
>> ---
>> include/qemu/target-info-impl.h | 2 ++
>> include/qemu/target-info.h | 7 +++++++
>> target-info-def.c | 3 +++
>> target-info.c | 5 +++++
>> 4 files changed, 17 insertions(+)
>>
>> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-
>> info-impl.h
>> index 4f6c898c707..045799a771a 100644
>> --- a/include/qemu/target-info-impl.h
>> +++ b/include/qemu/target-info-impl.h
>> @@ -31,6 +31,8 @@ typedef struct TargetInfo {
>> /* runtime equivalent of TARGET_PAGE_BITS_VARY definition */
>> bool page_bits_vary;
>> + /* CONFIG_DPCD */
>> + bool config_dpcd;
>> /* CONFIG_MULTIPROCESS */
>> bool config_multiprocess;
>> /* CONFIG_NITRO */
>> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
>> index d775c94d1e3..a60751a4ef6 100644
>> --- a/include/qemu/target-info.h
>> +++ b/include/qemu/target-info.h
>> @@ -42,6 +42,13 @@ const char *target_cpu_type(void);
>> */
>> bool target_big_endian(void);
>> +/**
>> + * target_config_dpcd:
>> + *
>> + * Returns true if target defines CONFIG_DPCD.
>> + */
>> +bool target_config_dpcd(void);
>
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 28/47] target-info: add target_config_dpcd
2026-08-31 7:04 ` Philippe Mathieu-Daudé
2026-08-31 10:15 ` Philippe Mathieu-Daudé
2026-08-31 18:07 ` Pierrick Bouvier
@ 2026-08-31 18:08 ` Pierrick Bouvier
2 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 18:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé, Frederic Konrad,
Thomas Huth, Edgar E. Iglesias
On 8/31/2026 12:04 AM, Philippe Mathieu-Daudé wrote:
> On 29/8/26 00:58, Pierrick Bouvier wrote:
>
> No commit description explaining why we need this change.
>
> Guessing, XLNX_ZYNQMP_ARM is AARCH64 specific and is the single
> Kconfig selecting DPCD:
>
> $ qemu-system-aarch64 -device help|fgrep -i dpcd
> name "dpcd", bus aux-bus
>
> We want to keep '-device help' output unchanged, thus we add a
> TargetInfo dpcd field. This however doesn't sound right to handle
> a target device config in a distinct way.
>
> IIUC the DPCD device is plugged on a AUX bus, but the wiring is
> done explicitly calling aux_map_slave(), meaning so far devices
> can not be plugged from the command line interface (maybe they
> could, but the code required to do that is not in the repository).
> IOW we shouldn't allow TYPE_AUX_BUS children to be user creatable:
>
> -- >8 --
> diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
> index 877f3456062..240447598ad 100644
> --- a/hw/misc/auxbus.c
> +++ b/hw/misc/auxbus.c
> @@ -317,6 +317,7 @@ static void aux_slave_class_init(ObjectClass *klass,
> const void *data)
>
> set_bit(DEVICE_CATEGORY_MISC, k->categories);
> k->bus_type = TYPE_AUX_BUS;
> + k->user_creatable = false; /* Must be wired calling aux_map_slave() */
> }
>
I'm fine with this change, but if the approach is "let's find
workarounds for all CONFIG_* to not add them in target-info", I think we
are going to have a hard time dealing with all existing types.
There are simply types that depend on Kconfig whether we like it or not.
For instance, all virtio devices. And a user is free to deactivate them
with a custom Kconfig, so we can't escape the need to represent that per
target.
> ---
>
> My suggestion is to simply add a previous hunk as a patch before your
> "single-binary: command line reference" patch in this series (can send
> if you want), and not add the TargetInfo::config_dpcd field at all.
>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
>> ---
>> include/qemu/target-info-impl.h | 2 ++
>> include/qemu/target-info.h | 7 +++++++
>> target-info-def.c | 3 +++
>> target-info.c | 5 +++++
>> 4 files changed, 17 insertions(+)
>>
>> diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-
>> info-impl.h
>> index 4f6c898c707..045799a771a 100644
>> --- a/include/qemu/target-info-impl.h
>> +++ b/include/qemu/target-info-impl.h
>> @@ -31,6 +31,8 @@ typedef struct TargetInfo {
>> /* runtime equivalent of TARGET_PAGE_BITS_VARY definition */
>> bool page_bits_vary;
>> + /* CONFIG_DPCD */
>> + bool config_dpcd;
>> /* CONFIG_MULTIPROCESS */
>> bool config_multiprocess;
>> /* CONFIG_NITRO */
>> diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
>> index d775c94d1e3..a60751a4ef6 100644
>> --- a/include/qemu/target-info.h
>> +++ b/include/qemu/target-info.h
>> @@ -42,6 +42,13 @@ const char *target_cpu_type(void);
>> */
>> bool target_big_endian(void);
>> +/**
>> + * target_config_dpcd:
>> + *
>> + * Returns true if target defines CONFIG_DPCD.
>> + */
>> +bool target_config_dpcd(void);
>
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 29/47] hw/display/dpcd: filter from CONFIG_DPCD
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (26 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 28/47] target-info: add target_config_dpcd Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 30/47] hw/nitro: filter from CONFIG_NITRO Pierrick Bouvier
` (18 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/display/dpcd.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/display/dpcd.c b/hw/display/dpcd.c
index a157dc64e76..66942e6dd6a 100644
--- a/hw/display/dpcd.c
+++ b/hw/display/dpcd.c
@@ -155,6 +155,7 @@ static const TypeInfo dpcd_info = {
.instance_size = sizeof(DPCDState),
.class_init = dpcd_class_init,
.instance_init = dpcd_init,
+ .is_available = target_config_dpcd,
};
static void dpcd_register_types(void)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 30/47] hw/nitro: filter from CONFIG_NITRO
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (27 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 29/47] hw/display/dpcd: filter from CONFIG_DPCD Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 31/47] hw/remote/proxy: filter from CONFIG_MULTIPROCESS Pierrick Bouvier
` (17 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/nitro/heartbeat.c | 1 +
hw/nitro/serial-vsock.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/hw/nitro/heartbeat.c b/hw/nitro/heartbeat.c
index dc413232667..4f18bde9a68 100644
--- a/hw/nitro/heartbeat.c
+++ b/hw/nitro/heartbeat.c
@@ -105,6 +105,7 @@ static const TypeInfo nitro_heartbeat_info = {
.parent = TYPE_NITRO_VSOCK_DEVICE,
.instance_size = sizeof(NitroHeartbeatState),
.class_init = nitro_heartbeat_class_init,
+ .is_available = target_config_nitro,
};
static void nitro_heartbeat_register(void)
diff --git a/hw/nitro/serial-vsock.c b/hw/nitro/serial-vsock.c
index 1d56c338049..ead27f381a2 100644
--- a/hw/nitro/serial-vsock.c
+++ b/hw/nitro/serial-vsock.c
@@ -113,6 +113,7 @@ static const TypeInfo nitro_serial_vsock_info = {
.parent = TYPE_NITRO_VSOCK_DEVICE,
.instance_size = sizeof(NitroSerialVsockState),
.class_init = nitro_serial_vsock_class_init,
+ .is_available = target_config_nitro,
};
static void nitro_serial_vsock_register(void)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 31/47] hw/remote/proxy: filter from CONFIG_MULTIPROCESS
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (28 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 30/47] hw/nitro: filter from CONFIG_NITRO Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 32/47] target/arm: filter cpus from target Pierrick Bouvier
` (16 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
We now have filtered all devices between arm and aarch64 targets.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/remote/proxy.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/remote/proxy.c b/hw/remote/proxy.c
index e91566509f3..68df12cd8f5 100644
--- a/hw/remote/proxy.c
+++ b/hw/remote/proxy.c
@@ -230,6 +230,7 @@ static const TypeInfo pci_proxy_dev_type_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIProxyDev),
.class_init = pci_proxy_dev_class_init,
+ .is_available = target_config_multiprocess,
.interfaces = (const InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
{ },
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 32/47] target/arm: filter cpus from target
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (29 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 31/47] hw/remote/proxy: filter from CONFIG_MULTIPROCESS Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 33/47] system/vl: add new option -target Pierrick Bouvier
` (15 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
We add a new callback to arm_cpu_register, that will be used for
.is_available field in matching TypeInfo.
With this change, we now have filtered all cpus/machines/devices between
arm and aarch64 targets.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
target/arm/cpu-max.c | 2 +-
target/arm/cpu.c | 3 ++-
target/arm/cpu64.c | 2 +-
target/arm/internals.h | 2 +-
target/arm/tcg/cpu-max-v8.c | 2 +-
target/arm/tcg/cpu-v7m.c | 2 +-
target/arm/tcg/cpu32.c | 2 +-
target/arm/tcg/cpu64.c | 2 +-
8 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu-max.c b/target/arm/cpu-max.c
index 739500a04fc..d55e711acec 100644
--- a/target/arm/cpu-max.c
+++ b/target/arm/cpu-max.c
@@ -127,7 +127,7 @@ static const ARMCPUInfo arm_max_cpu = {
static void arm_max_cpu_register_types(void)
{
- arm_cpu_register(&arm_max_cpu);
+ arm_cpu_register(&arm_max_cpu, target_base_arm);
}
type_init(arm_max_cpu_register_types)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 77aa78f00e2..e062456526c 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2670,13 +2670,14 @@ static void cpu_register_class_init(ObjectClass *oc, const void *data)
}
}
-void arm_cpu_register(const ARMCPUInfo *info)
+void arm_cpu_register(const ARMCPUInfo *info, bool (*is_available)(void))
{
TypeInfo type_info = {
.parent = TYPE_ARM_CPU,
.instance_init = arm_cpu_instance_init,
.class_init = info->class_init ?: cpu_register_class_init,
.class_data = info,
+ .is_available = is_available,
};
type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 4e8c4725308..e55275d9661 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -832,7 +832,7 @@ static void aarch64_cpu_register_types(void)
size_t i;
for (i = 0; i < ARRAY_SIZE(aarch64_cpus); ++i) {
- arm_cpu_register(&aarch64_cpus[i]);
+ arm_cpu_register(&aarch64_cpus[i], target_aarch64);
}
}
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 1775835ad50..cfe3544054e 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -406,7 +406,7 @@ static inline int r14_bank_number(int mode)
return (mode == ARM_CPU_MODE_HYP) ? BANK_USRSYS : bank_number(mode);
}
-void arm_cpu_register(const ARMCPUInfo *info);
+void arm_cpu_register(const ARMCPUInfo *info, bool (*is_available)(void));
void arm_do_plugin_vcpu_discon_cb(CPUState *cs, uint64_t from);
void register_cp_regs_for_features(ARMCPU *cpu);
diff --git a/target/arm/tcg/cpu-max-v8.c b/target/arm/tcg/cpu-max-v8.c
index 65f851f2006..c6cbb90bb86 100644
--- a/target/arm/tcg/cpu-max-v8.c
+++ b/target/arm/tcg/cpu-max-v8.c
@@ -125,6 +125,6 @@ static void cpu_max_v8_register_type(void)
{ .name = "max-v8", .initfn = aarch32_max_v8_tcg_initfn },
{ .name = "max-v8", .initfn = aarch64_max_v8_tcg_initfn },
};
- arm_cpu_register(&max_v8[target_aarch64()]);
+ arm_cpu_register(&max_v8[target_aarch64()], target_base_arm);
}
type_init(cpu_max_v8_register_type)
diff --git a/target/arm/tcg/cpu-v7m.c b/target/arm/tcg/cpu-v7m.c
index dc249ce1f14..9ffd2becb66 100644
--- a/target/arm/tcg/cpu-v7m.c
+++ b/target/arm/tcg/cpu-v7m.c
@@ -297,7 +297,7 @@ static void arm_v7m_cpu_register_types(void)
size_t i;
for (i = 0; i < ARRAY_SIZE(arm_v7m_cpus); ++i) {
- arm_cpu_register(&arm_v7m_cpus[i]);
+ arm_cpu_register(&arm_v7m_cpus[i], target_base_arm);
}
}
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
index 2d642ef8787..86560d8d254 100644
--- a/target/arm/tcg/cpu32.c
+++ b/target/arm/tcg/cpu32.c
@@ -748,7 +748,7 @@ static void arm_tcg_cpu_register_types(void)
size_t i;
for (i = 0; i < ARRAY_SIZE(arm_tcg_cpus); ++i) {
- arm_cpu_register(&arm_tcg_cpus[i]);
+ arm_cpu_register(&arm_tcg_cpus[i], target_base_arm);
}
}
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
index 251c4b3cf60..20399d42ef3 100644
--- a/target/arm/tcg/cpu64.c
+++ b/target/arm/tcg/cpu64.c
@@ -1548,7 +1548,7 @@ static void aarch64_cpu_register_types(void)
size_t i;
for (i = 0; i < ARRAY_SIZE(aarch64_cpus); ++i) {
- arm_cpu_register(&aarch64_cpus[i]);
+ arm_cpu_register(&aarch64_cpus[i], target_aarch64);
}
}
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 33/47] system/vl: add new option -target
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (30 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 32/47] target/arm: filter cpus from target Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 12:39 ` Yonggang Luo
2026-08-28 22:58 ` [PATCH 34/47] system/vl: fallback to detect target from argv[0] Pierrick Bouvier
` (14 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
This commit adds a new option -target, which can be allowed to set
current target, or retrieve list of targets available with 'help'.
This option is the first we need to handle, as all the rest of
initialization depends on it.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/qemu/target-info-qom.h | 1 +
qemu-options.hx | 8 ++++++++
system/vl.c | 34 +++++++++++++++++++++++++++++++++-
target-info-qom.c | 33 ++++++++++++++++++++++++++++++++-
4 files changed, 74 insertions(+), 2 deletions(-)
diff --git a/include/qemu/target-info-qom.h b/include/qemu/target-info-qom.h
index 91be415ed33..87f3a51ccd4 100644
--- a/include/qemu/target-info-qom.h
+++ b/include/qemu/target-info-qom.h
@@ -26,5 +26,6 @@ typedef struct TargetInfoQomClass {
OBJECT_DECLARE_TYPE(TargetInfoQom, TargetInfoQomClass, TARGET_INFO)
void target_info_qom_set_target(void);
+void target_info_qom_set_target_from_name(const char *name);
#endif /* QEMU_TARGET_INFO_QOM_H */
diff --git a/qemu-options.hx b/qemu-options.hx
index 562c4c2b035..68d0c1d42da 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -24,6 +24,14 @@ SRST
Display version information and exit
ERST
+DEF("target", HAS_ARG, QEMU_OPTION_target, \
+ "-target target selects the target architecture ('-target help' for list)\n",
+ QEMU_ARCH_ALL)
+SRST
+``-target target``
+ Selects target architecture ('-target help' for list)
+ERST
+
DEF("machine", HAS_ARG, QEMU_OPTION_machine, \
"-machine [type=]name[,prop=value[,...]]\n"
" selects emulated machine ('-machine help' for list)\n"
diff --git a/system/vl.c b/system/vl.c
index f7f8aabd122..60c5ce85580 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -281,6 +281,15 @@ static QemuOptsList qemu_accel_opts = {
},
};
+static QemuOptsList qemu_target_opts = {
+ .name = "target",
+ .implied_opt_name = "target",
+ .head = QTAILQ_HEAD_INITIALIZER(qemu_target_opts.head),
+ .desc = {
+ { /* end of list */ },
+ },
+};
+
static QemuOptsList qemu_boot_opts = {
.name = "boot-opts",
.implied_opt_name = "order",
@@ -2891,6 +2900,7 @@ void qemu_init(int argc, char **argv)
qemu_add_opts(&qemu_semihosting_config_opts);
qemu_add_opts(&qemu_fw_cfg_opts);
qemu_add_opts(&qemu_action_opts);
+ qemu_add_opts(&qemu_target_opts);
qemu_add_run_with_opts();
module_call_init(MODULE_INIT_OPTS);
@@ -2900,7 +2910,26 @@ void qemu_init(int argc, char **argv)
os_setup_limits();
module_call_init(MODULE_INIT_TARGET_INFO);
- target_info_qom_set_target();
+
+ /*
+ * Identify target: first from option, then from argv[0].
+ * This happens even before handling --help option, because it may contain
+ * entries that are target specific.
+ */
+ for (int idx = 1; idx < argc;) {
+ if (argv[idx][0] != '-') {
+ idx++;
+ } else {
+ const QEMUOption *popt = lookup_opt(argc, argv, &optarg, &idx);
+ if (popt->index == QEMU_OPTION_target) {
+ target_info_qom_set_target_from_name(optarg);
+ break;
+ }
+ }
+ }
+ if (!target_info()) {
+ target_info_qom_set_target();
+ }
module_init_info(qemu_modinfo);
module_allow_arch(target_name());
@@ -2948,6 +2977,9 @@ void qemu_init(int argc, char **argv)
exit(1);
}
switch(popt->index) {
+ case QEMU_OPTION_target:
+ /* handled previously, ignore it here */
+ break;
case QEMU_OPTION_cpu:
/* hw initialization will check this */
cpu_option = optarg;
diff --git a/target-info-qom.c b/target-info-qom.c
index 6965e4d1169..a2f506c15ef 100644
--- a/target-info-qom.c
+++ b/target-info-qom.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qom/object.h"
+#include "qemu/error-report.h"
#include "qemu/target-info-impl.h"
#include "qemu/target-info-init.h"
#include "qemu/target-info-qom.h"
@@ -50,6 +51,36 @@ void target_info_qom_set_target(void)
"no target-info is available" :
"more than one target-info is available");
}
-
target_info_ptr = TARGET_INFO_CLASS(targets->data)->target_info;
}
+
+static void list_targets_available(void)
+{
+ printf("List of targets available:\n");
+ g_autoptr(GSList) targets = object_class_get_list_sorted(TYPE_TARGET_INFO, false);
+ for (GSList *elem = targets; elem; elem = elem->next) {
+ const TargetInfo *ti = TARGET_INFO_CLASS(elem->data)->target_info;
+ printf("- %s\n", ti->target_name);
+ }
+}
+
+void target_info_qom_set_target_from_name(const char *name)
+{
+ if (!strcmp(name, "help")) {
+ list_targets_available();
+ exit(0);
+ }
+
+ g_autoptr(GSList) targets = object_class_get_list(TYPE_TARGET_INFO, false);
+ for (GSList *elem = targets; elem; elem = elem->next) {
+ const TargetInfo *ti = TARGET_INFO_CLASS(elem->data)->target_info;
+ if (!strcmp(name, ti->target_name)) {
+ target_info_ptr = ti;
+ return;
+ }
+ }
+
+ error_report("target '%s' is not available", name);
+ list_targets_available();
+ exit(1);
+}
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 33/47] system/vl: add new option -target
2026-08-28 22:58 ` [PATCH 33/47] system/vl: add new option -target Pierrick Bouvier
@ 2026-08-31 12:39 ` Yonggang Luo
2026-08-31 18:10 ` Pierrick Bouvier
0 siblings, 1 reply; 99+ messages in thread
From: Yonggang Luo @ 2026-08-31 12:39 UTC (permalink / raw)
To: Pierrick Bouvier
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé
[-- Attachment #1.1: Type: text/plain, Size: 6949 bytes --]
I would suggest to handle the condition and argv0 and target name
consitencely, here is my patch summary:
- Parse -target with QEMU_OPTION_nouserconfig, right after
MODULE_INIT_TARGET_INFO, because later init depends on TargetInfo.
- target_info_qom_set_target() takes Error **errp. A name comes from
-target or from argv0 (qemu-system-aarch64).
- Define SYS_EMU_TARGET_UNSPECIFIED as SYS_EMU_TARGET__MAX. Bare
qemu-system with no suffix and no -target binds a dummy TargetInfo.
qemu-system-* still selects from the argv[0] suffix.
- -M help lists the union. Starting a real board without a target
errors; -M none is allowed.
- qemu_arch_available() is true when unspecified. query-target errors
instead of emitting an invalid SysEmuTarget.
- Fuzz passes TARGET_NAME instead of relying on a unique TargetInfo.
and patch is attached to replace this commit and next commit
On Sat, Aug 29, 2026 at 7:04 AM Pierrick Bouvier <
pierrick.bouvier@oss.qualcomm.com> wrote:
>
> This commit adds a new option -target, which can be allowed to set
> current target, or retrieve list of targets available with 'help'.
>
> This option is the first we need to handle, as all the rest of
> initialization depends on it.
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> include/qemu/target-info-qom.h | 1 +
> qemu-options.hx | 8 ++++++++
> system/vl.c | 34 +++++++++++++++++++++++++++++++++-
> target-info-qom.c | 33 ++++++++++++++++++++++++++++++++-
> 4 files changed, 74 insertions(+), 2 deletions(-)
>
> diff --git a/include/qemu/target-info-qom.h
b/include/qemu/target-info-qom.h
> index 91be415ed33..87f3a51ccd4 100644
> --- a/include/qemu/target-info-qom.h
> +++ b/include/qemu/target-info-qom.h
> @@ -26,5 +26,6 @@ typedef struct TargetInfoQomClass {
> OBJECT_DECLARE_TYPE(TargetInfoQom, TargetInfoQomClass, TARGET_INFO)
>
> void target_info_qom_set_target(void);
> +void target_info_qom_set_target_from_name(const char *name);
>
> #endif /* QEMU_TARGET_INFO_QOM_H */
> diff --git a/qemu-options.hx b/qemu-options.hx
> index 562c4c2b035..68d0c1d42da 100644
> --- a/qemu-options.hx
> +++ b/qemu-options.hx
> @@ -24,6 +24,14 @@ SRST
> Display version information and exit
> ERST
>
> +DEF("target", HAS_ARG, QEMU_OPTION_target, \
> + "-target target selects the target architecture ('-target help' for
list)\n",
> + QEMU_ARCH_ALL)
> +SRST
> +``-target target``
> + Selects target architecture ('-target help' for list)
> +ERST
> +
> DEF("machine", HAS_ARG, QEMU_OPTION_machine, \
> "-machine [type=]name[,prop=value[,...]]\n"
> " selects emulated machine ('-machine help' for
list)\n"
> diff --git a/system/vl.c b/system/vl.c
> index f7f8aabd122..60c5ce85580 100644
> --- a/system/vl.c
> +++ b/system/vl.c
> @@ -281,6 +281,15 @@ static QemuOptsList qemu_accel_opts = {
> },
> };
>
> +static QemuOptsList qemu_target_opts = {
> + .name = "target",
> + .implied_opt_name = "target",
> + .head = QTAILQ_HEAD_INITIALIZER(qemu_target_opts.head),
> + .desc = {
> + { /* end of list */ },
> + },
> +};
> +
> static QemuOptsList qemu_boot_opts = {
> .name = "boot-opts",
> .implied_opt_name = "order",
> @@ -2891,6 +2900,7 @@ void qemu_init(int argc, char **argv)
> qemu_add_opts(&qemu_semihosting_config_opts);
> qemu_add_opts(&qemu_fw_cfg_opts);
> qemu_add_opts(&qemu_action_opts);
> + qemu_add_opts(&qemu_target_opts);
> qemu_add_run_with_opts();
> module_call_init(MODULE_INIT_OPTS);
>
> @@ -2900,7 +2910,26 @@ void qemu_init(int argc, char **argv)
> os_setup_limits();
>
> module_call_init(MODULE_INIT_TARGET_INFO);
> - target_info_qom_set_target();
> +
> + /*
> + * Identify target: first from option, then from argv[0].
> + * This happens even before handling --help option, because it may
contain
> + * entries that are target specific.
> + */
> + for (int idx = 1; idx < argc;) {
> + if (argv[idx][0] != '-') {
> + idx++;
> + } else {
> + const QEMUOption *popt = lookup_opt(argc, argv, &optarg,
&idx);
> + if (popt->index == QEMU_OPTION_target) {
> + target_info_qom_set_target_from_name(optarg);
> + break;
> + }
> + }
> + }
> + if (!target_info()) {
> + target_info_qom_set_target();
> + }
>
> module_init_info(qemu_modinfo);
> module_allow_arch(target_name());
> @@ -2948,6 +2977,9 @@ void qemu_init(int argc, char **argv)
> exit(1);
> }
> switch(popt->index) {
> + case QEMU_OPTION_target:
> + /* handled previously, ignore it here */
> + break;
> case QEMU_OPTION_cpu:
> /* hw initialization will check this */
> cpu_option = optarg;
> diff --git a/target-info-qom.c b/target-info-qom.c
> index 6965e4d1169..a2f506c15ef 100644
> --- a/target-info-qom.c
> +++ b/target-info-qom.c
> @@ -9,6 +9,7 @@
> #include "qemu/osdep.h"
> #include "qapi/error.h"
> #include "qom/object.h"
> +#include "qemu/error-report.h"
> #include "qemu/target-info-impl.h"
> #include "qemu/target-info-init.h"
> #include "qemu/target-info-qom.h"
> @@ -50,6 +51,36 @@ void target_info_qom_set_target(void)
> "no target-info is available" :
> "more than one target-info is
available");
> }
> -
> target_info_ptr = TARGET_INFO_CLASS(targets->data)->target_info;
> }
> +
> +static void list_targets_available(void)
> +{
> + printf("List of targets available:\n");
> + g_autoptr(GSList) targets =
object_class_get_list_sorted(TYPE_TARGET_INFO, false);
> + for (GSList *elem = targets; elem; elem = elem->next) {
> + const TargetInfo *ti =
TARGET_INFO_CLASS(elem->data)->target_info;
> + printf("- %s\n", ti->target_name);
> + }
> +}
> +
> +void target_info_qom_set_target_from_name(const char *name)
> +{
> + if (!strcmp(name, "help")) {
> + list_targets_available();
> + exit(0);
> + }
> +
> + g_autoptr(GSList) targets = object_class_get_list(TYPE_TARGET_INFO,
false);
> + for (GSList *elem = targets; elem; elem = elem->next) {
> + const TargetInfo *ti =
TARGET_INFO_CLASS(elem->data)->target_info;
> + if (!strcmp(name, ti->target_name)) {
> + target_info_ptr = ti;
> + return;
> + }
> + }
> +
> + error_report("target '%s' is not available", name);
> + list_targets_available();
> + exit(1);
> +}
> --
> 2.43.0
>
>
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
[-- Attachment #1.2: Type: text/html, Size: 8722 bytes --]
[-- Attachment #2: 0001-system-vl-add-new-option-target.patch --]
[-- Type: text/plain, Size: 11835 bytes --]
From 10341f879a10da715230e1d6ae648175c8245329 Mon Sep 17 00:00:00 2001
From: Yonggang Luo <luoyonggang@gmail.com>
Date: Mon, 31 Aug 2026 14:26:51 +0800
Subject: [PATCH] system/vl: add new option -target
- Parse -target with QEMU_OPTION_nouserconfig, right after
MODULE_INIT_TARGET_INFO, because later init depends on TargetInfo.
- target_info_qom_set_target() takes Error **errp. A name comes from
-target or from argv0 (qemu-system-aarch64).
- Define SYS_EMU_TARGET_UNSPECIFIED as SYS_EMU_TARGET__MAX. Bare
qemu-system with no suffix and no -target binds a dummy TargetInfo.
qemu-system-* still selects from the argv[0] suffix.
- -M help lists the union. Starting a real board without a target
errors; -M none is allowed.
- qemu_arch_available() is true when unspecified. query-target errors
instead of emitting an invalid SysEmuTarget.
- Fuzz passes TARGET_NAME instead of relying on a unique TargetInfo.
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
---
hw/core/machine-qmp-cmds.c | 8 ++-
include/qemu/target-info-qapi.h | 22 ++++++++-
include/qemu/target-info-qom.h | 8 ++-
qemu-options.hx | 8 +++
system/arch_init.c | 4 ++
system/vl.c | 31 +++++++++---
target-info-qom.c | 87 ++++++++++++++++++++++++++++++---
tests/qtest/fuzz/fuzz.c | 2 +-
8 files changed, 153 insertions(+), 17 deletions(-)
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index 543dd3201b5..2fd10612a21 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -165,8 +165,14 @@ CurrentMachineParams *qmp_query_current_machine(Error **errp)
QemuTargetInfo *qmp_query_target(Error **errp)
{
- QemuTargetInfo *info = g_malloc0(sizeof(*info));
+ QemuTargetInfo *info;
+ if (target_unspecified()) {
+ error_setg(errp, "query-target requires a selected target");
+ return NULL;
+ }
+
+ info = g_malloc0(sizeof(*info));
info->arch = target_arch();
return info;
diff --git a/include/qemu/target-info-qapi.h b/include/qemu/target-info-qapi.h
index d5ce0523238..cb2cc669d94 100644
--- a/include/qemu/target-info-qapi.h
+++ b/include/qemu/target-info-qapi.h
@@ -12,13 +12,33 @@
#include "qapi/qapi-types-common.h"
#include "qapi/qapi-types-machine.h"
+/*
+ * Sentinel when combined qemu-system has not bound a TargetInfo.
+ * Not a QAPI SysEmuTarget member and not a heterogeneous VM mode.
+ * One past the last generated enumerator.
+ */
+#define SYS_EMU_TARGET_UNSPECIFIED SYS_EMU_TARGET__MAX
+
/**
* target_arch:
*
- * Returns: QAPI SysEmuTarget enum (e.g. SYS_EMU_TARGET_X86_64).
+ * Returns: QAPI SysEmuTarget enum (e.g. SYS_EMU_TARGET_X86_64), or
+ * SYS_EMU_TARGET_UNSPECIFIED when no target is selected.
*/
SysEmuTarget target_arch(void);
+/**
+ * target_unspecified:
+ *
+ * Returns true if the process has no single selected TargetInfo
+ * (SYS_EMU_TARGET_UNSPECIFIED). Combined qemu-system uses this
+ * when argv[0] has no arch suffix and -target is omitted.
+ */
+static inline bool target_unspecified(void)
+{
+ return target_arch() == SYS_EMU_TARGET_UNSPECIFIED;
+}
+
/**
* target_endian_mode:
*
diff --git a/include/qemu/target-info-qom.h b/include/qemu/target-info-qom.h
index 91be415ed33..20dcb214bf2 100644
--- a/include/qemu/target-info-qom.h
+++ b/include/qemu/target-info-qom.h
@@ -10,6 +10,7 @@
#define QEMU_TARGET_INFO_QOM_H
#include "qemu/target-info-impl.h"
+#include "qapi/error.h"
#include "qom/object.h"
#define TYPE_TARGET_INFO "target-info"
@@ -25,6 +26,11 @@ typedef struct TargetInfoQomClass {
OBJECT_DECLARE_TYPE(TargetInfoQom, TargetInfoQomClass, TARGET_INFO)
-void target_info_qom_set_target(void);
+/*
+ * Identify target: first from option, then from argv[0].
+ * This happens even before handling --help option, because it may contain
+ * entries that are target specific.
+ */
+void target_info_qom_set_target(const char *name, Error **errp);
#endif /* QEMU_TARGET_INFO_QOM_H */
diff --git a/qemu-options.hx b/qemu-options.hx
index 562c4c2b035..68d0c1d42da 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -24,6 +24,14 @@ SRST
Display version information and exit
ERST
+DEF("target", HAS_ARG, QEMU_OPTION_target, \
+ "-target target selects the target architecture ('-target help' for list)\n",
+ QEMU_ARCH_ALL)
+SRST
+``-target target``
+ Selects target architecture ('-target help' for list)
+ERST
+
DEF("machine", HAS_ARG, QEMU_OPTION_machine, \
"-machine [type=]name[,prop=value[,...]]\n"
" selects emulated machine ('-machine help' for list)\n"
diff --git a/system/arch_init.c b/system/arch_init.c
index 1ad2f3d6f78..60a53b478a1 100644
--- a/system/arch_init.c
+++ b/system/arch_init.c
@@ -24,9 +24,13 @@
#include "qemu/osdep.h"
#include "qemu/base-arch-defs.h"
#include "qemu/bitops.h"
+#include "qemu/target-info.h"
#include "qemu/target-info-qapi.h"
bool qemu_arch_available(uint32_t arch_bitmask)
{
+ if (target_unspecified()) {
+ return true;
+ }
return extract32(arch_bitmask, target_arch(), 1);
}
diff --git a/system/vl.c b/system/vl.c
index f7f8aabd122..60b4bc98f12 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -281,6 +281,15 @@ static QemuOptsList qemu_accel_opts = {
},
};
+static QemuOptsList qemu_target_opts = {
+ .name = "target",
+ .implied_opt_name = "target",
+ .head = QTAILQ_HEAD_INITIALIZER(qemu_target_opts.head),
+ .desc = {
+ { /* end of list */ },
+ },
+};
+
static QemuOptsList qemu_boot_opts = {
.name = "boot-opts",
.implied_opt_name = "order",
@@ -2858,6 +2867,7 @@ void qemu_init(int argc, char **argv)
const char *optarg;
MachineClass *machine_class;
bool userconfig = true;
+ const char *target_name_option = NULL;
FILE *vmstate_dump_file = NULL;
qemu_add_opts(&qemu_drive_opts);
@@ -2891,6 +2901,7 @@ void qemu_init(int argc, char **argv)
qemu_add_opts(&qemu_semihosting_config_opts);
qemu_add_opts(&qemu_fw_cfg_opts);
qemu_add_opts(&qemu_action_opts);
+ qemu_add_opts(&qemu_target_opts);
qemu_add_run_with_opts();
module_call_init(MODULE_INIT_OPTS);
@@ -2900,13 +2911,6 @@ void qemu_init(int argc, char **argv)
os_setup_limits();
module_call_init(MODULE_INIT_TARGET_INFO);
- target_info_qom_set_target();
-
- module_init_info(qemu_modinfo);
- module_allow_arch(target_name());
-
- qemu_init_subsystems();
-
/* first pass of option parsing */
optind = 1;
while (optind < argc) {
@@ -2921,10 +2925,20 @@ void qemu_init(int argc, char **argv)
case QEMU_OPTION_nouserconfig:
userconfig = false;
break;
+ case QEMU_OPTION_target:
+ target_name_option = optarg;
+ break;
}
}
}
+ target_info_qom_set_target(target_name_option, &error_fatal);
+
+ module_init_info(qemu_modinfo);
+ module_allow_arch(target_name());
+
+ qemu_init_subsystems();
+
machine_opts_dict = qdict_new();
if (userconfig) {
qemu_read_default_config_file(&error_fatal);
@@ -2948,6 +2962,9 @@ void qemu_init(int argc, char **argv)
exit(1);
}
switch(popt->index) {
+ case QEMU_OPTION_target:
+ /* handled previously, ignore it here */
+ break;
case QEMU_OPTION_cpu:
/* hw initialization will check this */
cpu_option = optarg;
diff --git a/target-info-qom.c b/target-info-qom.c
index 0ffb0c044e3..60f2aed8e3e 100644
--- a/target-info-qom.c
+++ b/target-info-qom.c
@@ -7,10 +7,13 @@
*/
#include "qemu/osdep.h"
+#include "qemu/help_option.h"
#include "qapi/error.h"
#include "qom/object.h"
+#include "qemu/target-info.h"
#include "qemu/target-info-impl.h"
#include "qemu/target-info-init.h"
+#include "qemu/target-info-qapi.h"
#include "qemu/target-info-qom.h"
#include "hw/arm/machines-qom.h"
#include "hw/riscv/machines-qom.h"
@@ -37,21 +40,93 @@ DEFINE_TARGET_INFO_TYPE(target_info_parent_type)
static const TargetInfo *target_info_ptr;
+/*
+ * Fallback when -target is omitted and argv[0] is qemu-system (no
+ * arch suffix). qemu-system-* always gets a name from argv[0]
+ * (qemu-system-aarch64 -> aarch64), so it never selects this.
+ */
+static const TargetInfo target_info_unspecified = {
+ .target_name = "unspecified",
+ .target_arch = SYS_EMU_TARGET_UNSPECIFIED,
+ .long_bits = 64,
+ .cpu_type = "",
+ .endianness = ENDIAN_MODE_LITTLE,
+ .page_bits_init = 12,
+ .page_bits_vary = true,
+};
+
const TargetInfo *target_info(void)
{
return target_info_ptr;
}
-void target_info_qom_set_target(void)
+static void set_target_info(const TargetInfo *chosen)
+{
+ target_info_ptr = chosen;
+}
+
+static void list_targets_available(void)
+{
+ printf("List of targets available:\n");
+ g_autoptr(GSList) targets = object_class_get_list_sorted(TYPE_TARGET_INFO, false);
+ for (GSList *elem = targets; elem; elem = elem->next) {
+ const TargetInfo *ti = TARGET_INFO_CLASS(elem->data)->target_info;
+ printf("- %s\n", ti->target_name);
+ }
+}
+
+/* qemu-system-aarch64[.exe] -> aarch64; qemu-system[.exe] -> NULL. */
+static const char *target_from_argv0(char *base)
+{
+ if (g_str_has_prefix(base, "qemu-system-")) {
+ return base + strlen("qemu-system-");
+ }
+ return NULL;
+}
+
+void target_info_qom_set_target(const char *name, Error **errp)
{
g_autoptr(GSList) targets = object_class_get_list(TYPE_TARGET_INFO, false);
size_t num_found = g_slist_length(targets);
- if (num_found != 1) {
- error_setg(&error_fatal, num_found == 0 ?
- "no target-info is available" :
- "more than one target-info is available");
+ g_autofree char *prg_base = NULL;
+
+ if (num_found == 0) {
+ error_setg(errp, "no target-info is available");
+ return;
+ }
+
+ if (!name) {
+ const char *prg = g_get_prgname();
+ if (prg && prg[0]) {
+ char *dot;
+
+ prg_base = g_path_get_basename(prg);
+ dot = strrchr(prg_base, '.');
+ if (dot && g_ascii_strcasecmp(dot, ".exe") == 0) {
+ *dot = '\0';
+ }
+ name = target_from_argv0(prg_base);
+ }
+ }
+
+ if (name) {
+ if (is_help_option(name)) {
+ list_targets_available();
+ exit(0);
+ }
+ for (GSList *elem = targets; elem; elem = elem->next) {
+ const TargetInfo *ti = TARGET_INFO_CLASS(elem->data)->target_info;
+ if (!strcmp(name, ti->target_name)) {
+ set_target_info(ti);
+ return;
+ }
+ }
+ error_setg(errp, "target '%s' is not available, "
+ "use -target ? to list available targets", name);
+ return;
}
- target_info_ptr = TARGET_INFO_CLASS(targets->data)->target_info;
+ /* Not reached for qemu-system-*: name came from the argv[0] suffix. */
+ set_target_info(&target_info_unspecified);
}
diff --git a/tests/qtest/fuzz/fuzz.c b/tests/qtest/fuzz/fuzz.c
index a3a131c80f8..c992fab4079 100644
--- a/tests/qtest/fuzz/fuzz.c
+++ b/tests/qtest/fuzz/fuzz.c
@@ -174,7 +174,7 @@ int LLVMFuzzerInitialize(int *argc, char ***argv, char ***envp)
/* Initialize qgraph and modules */
qos_graph_init();
module_call_init(MODULE_INIT_TARGET_INFO);
- target_info_qom_set_target();
+ target_info_qom_set_target(fuzz_arch, &error_fatal);
module_call_init(MODULE_INIT_FUZZ_TARGET);
module_call_init(MODULE_INIT_QOM);
module_call_init(MODULE_INIT_LIBQOS);
--
2.52.0.windows.1
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 33/47] system/vl: add new option -target
2026-08-31 12:39 ` Yonggang Luo
@ 2026-08-31 18:10 ` Pierrick Bouvier
0 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 18:10 UTC (permalink / raw)
To: luoyonggang
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé
On 8/31/2026 5:39 AM, Yonggang Luo wrote:
> I would suggest to handle the condition and argv0 and target name
> consitencely, here is my patch summary:
> - Parse -target with QEMU_OPTION_nouserconfig, right after
> MODULE_INIT_TARGET_INFO, because later init depends on TargetInfo.
> - target_info_qom_set_target() takes Error **errp. A name comes from
> -target or from argv0 (qemu-system-aarch64).
> - Define SYS_EMU_TARGET_UNSPECIFIED as SYS_EMU_TARGET__MAX. Bare
> qemu-system with no suffix and no -target binds a dummy TargetInfo.
> qemu-system-* still selects from the argv[0] suffix.
> - -M help lists the union. Starting a real board without a target
> errors; -M none is allowed.
> - qemu_arch_available() is true when unspecified. query-target errors
> instead of emitting an invalid SysEmuTarget.
> - Fuzz passes TARGET_NAME instead of relying on a unique TargetInfo.
>
> and patch is attached to replace this commit and next commit
>
For now, I'll focus the efforts on the filtering mechanism for this
series. Once we agree, we can debate the details of single-binary itself.
>
>
> On Sat, Aug 29, 2026 at 7:04 AM Pierrick Bouvier
> <pierrick.bouvier@oss.qualcomm.com
> <mailto:pierrick.bouvier@oss.qualcomm.com>> wrote:
>>
>> This commit adds a new option -target, which can be allowed to set
>> current target, or retrieve list of targets available with 'help'.
>>
>> This option is the first we need to handle, as all the rest of
>> initialization depends on it.
>>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com
> <mailto:pierrick.bouvier@oss.qualcomm.com>>
>> ---
>> include/qemu/target-info-qom.h | 1 +
>> qemu-options.hx | 8 ++++++++
>> system/vl.c | 34 +++++++++++++++++++++++++++++++++-
>> target-info-qom.c | 33 ++++++++++++++++++++++++++++++++-
>> 4 files changed, 74 insertions(+), 2 deletions(-)
>>
>> diff --git a/include/qemu/target-info-qom.h b/include/qemu/target-
> info-qom.h
>> index 91be415ed33..87f3a51ccd4 100644
>> --- a/include/qemu/target-info-qom.h
>> +++ b/include/qemu/target-info-qom.h
>> @@ -26,5 +26,6 @@ typedef struct TargetInfoQomClass {
>> OBJECT_DECLARE_TYPE(TargetInfoQom, TargetInfoQomClass, TARGET_INFO)
>>
>> void target_info_qom_set_target(void);
>> +void target_info_qom_set_target_from_name(const char *name);
>>
>> #endif /* QEMU_TARGET_INFO_QOM_H */
>> diff --git a/qemu-options.hx b/qemu-options.hx
>> index 562c4c2b035..68d0c1d42da 100644
>> --- a/qemu-options.hx
>> +++ b/qemu-options.hx
>> @@ -24,6 +24,14 @@ SRST
>> Display version information and exit
>> ERST
>>
>> +DEF("target", HAS_ARG, QEMU_OPTION_target, \
>> + "-target target selects the target architecture ('-target help'
> for list)\n",
>> + QEMU_ARCH_ALL)
>> +SRST
>> +``-target target``
>> + Selects target architecture ('-target help' for list)
>> +ERST
>> +
>> DEF("machine", HAS_ARG, QEMU_OPTION_machine, \
>> "-machine [type=]name[,prop=value[,...]]\n"
>> " selects emulated machine ('-machine help' for
> list)\n"
>> diff --git a/system/vl.c b/system/vl.c
>> index f7f8aabd122..60c5ce85580 100644
>> --- a/system/vl.c
>> +++ b/system/vl.c
>> @@ -281,6 +281,15 @@ static QemuOptsList qemu_accel_opts = {
>> },
>> };
>>
>> +static QemuOptsList qemu_target_opts = {
>> + .name = "target",
>> + .implied_opt_name = "target",
>> + .head = QTAILQ_HEAD_INITIALIZER(qemu_target_opts.head),
>> + .desc = {
>> + { /* end of list */ },
>> + },
>> +};
>> +
>> static QemuOptsList qemu_boot_opts = {
>> .name = "boot-opts",
>> .implied_opt_name = "order",
>> @@ -2891,6 +2900,7 @@ void qemu_init(int argc, char **argv)
>> qemu_add_opts(&qemu_semihosting_config_opts);
>> qemu_add_opts(&qemu_fw_cfg_opts);
>> qemu_add_opts(&qemu_action_opts);
>> + qemu_add_opts(&qemu_target_opts);
>> qemu_add_run_with_opts();
>> module_call_init(MODULE_INIT_OPTS);
>>
>> @@ -2900,7 +2910,26 @@ void qemu_init(int argc, char **argv)
>> os_setup_limits();
>>
>> module_call_init(MODULE_INIT_TARGET_INFO);
>> - target_info_qom_set_target();
>> +
>> + /*
>> + * Identify target: first from option, then from argv[0].
>> + * This happens even before handling --help option, because it
> may contain
>> + * entries that are target specific.
>> + */
>> + for (int idx = 1; idx < argc;) {
>> + if (argv[idx][0] != '-') {
>> + idx++;
>> + } else {
>> + const QEMUOption *popt = lookup_opt(argc, argv, &optarg,
> &idx);
>> + if (popt->index == QEMU_OPTION_target) {
>> + target_info_qom_set_target_from_name(optarg);
>> + break;
>> + }
>> + }
>> + }
>> + if (!target_info()) {
>> + target_info_qom_set_target();
>> + }
>>
>> module_init_info(qemu_modinfo);
>> module_allow_arch(target_name());
>> @@ -2948,6 +2977,9 @@ void qemu_init(int argc, char **argv)
>> exit(1);
>> }
>> switch(popt->index) {
>> + case QEMU_OPTION_target:
>> + /* handled previously, ignore it here */
>> + break;
>> case QEMU_OPTION_cpu:
>> /* hw initialization will check this */
>> cpu_option = optarg;
>> diff --git a/target-info-qom.c b/target-info-qom.c
>> index 6965e4d1169..a2f506c15ef 100644
>> --- a/target-info-qom.c
>> +++ b/target-info-qom.c
>> @@ -9,6 +9,7 @@
>> #include "qemu/osdep.h"
>> #include "qapi/error.h"
>> #include "qom/object.h"
>> +#include "qemu/error-report.h"
>> #include "qemu/target-info-impl.h"
>> #include "qemu/target-info-init.h"
>> #include "qemu/target-info-qom.h"
>> @@ -50,6 +51,36 @@ void target_info_qom_set_target(void)
>> "no target-info is available" :
>> "more than one target-info is
> available");
>> }
>> -
>> target_info_ptr = TARGET_INFO_CLASS(targets->data)->target_info;
>> }
>> +
>> +static void list_targets_available(void)
>> +{
>> + printf("List of targets available:\n");
>> + g_autoptr(GSList) targets =
> object_class_get_list_sorted(TYPE_TARGET_INFO, false);
>> + for (GSList *elem = targets; elem; elem = elem->next) {
>> + const TargetInfo *ti = TARGET_INFO_CLASS(elem->data)-
>>target_info;
>> + printf("- %s\n", ti->target_name);
>> + }
>> +}
>> +
>> +void target_info_qom_set_target_from_name(const char *name)
>> +{
>> + if (!strcmp(name, "help")) {
>> + list_targets_available();
>> + exit(0);
>> + }
>> +
>> + g_autoptr(GSList) targets =
> object_class_get_list(TYPE_TARGET_INFO, false);
>> + for (GSList *elem = targets; elem; elem = elem->next) {
>> + const TargetInfo *ti = TARGET_INFO_CLASS(elem->data)-
>>target_info;
>> + if (!strcmp(name, ti->target_name)) {
>> + target_info_ptr = ti;
>> + return;
>> + }
>> + }
>> +
>> + error_report("target '%s' is not available", name);
>> + list_targets_available();
>> + exit(1);
>> +}
>> --
>> 2.43.0
>>
>>
>
>
> --
> 此致
> 礼
> 罗勇刚
> Yours
> sincerely,
> Yonggang Luo
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 34/47] system/vl: fallback to detect target from argv[0]
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (31 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 33/47] system/vl: add new option -target Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 35/47] meson: build single binary for arm+aarch64 targets Pierrick Bouvier
` (13 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
The existing target_info_qom_set_target() enforces that a single target
is available at runtime.
Now, we can derive target from current qemu binary name.
If a single target is available, select it and ignore binary name.
If multiple targets are available, we strip various parts from binary
name and check if an available target match this name.
In case target is set through -target option, we simply pick this one.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/qemu/target-info-qom.h | 1 +
system/vl.c | 2 +-
target-info-qom.c | 61 ++++++++++++++++++++++++++++++++++
tests/qtest/fuzz/fuzz.c | 2 +-
4 files changed, 64 insertions(+), 2 deletions(-)
diff --git a/include/qemu/target-info-qom.h b/include/qemu/target-info-qom.h
index 87f3a51ccd4..7643a90d49b 100644
--- a/include/qemu/target-info-qom.h
+++ b/include/qemu/target-info-qom.h
@@ -27,5 +27,6 @@ OBJECT_DECLARE_TYPE(TargetInfoQom, TargetInfoQomClass, TARGET_INFO)
void target_info_qom_set_target(void);
void target_info_qom_set_target_from_name(const char *name);
+void target_info_qom_set_target_from_argv0(const char *argv0);
#endif /* QEMU_TARGET_INFO_QOM_H */
diff --git a/system/vl.c b/system/vl.c
index 60c5ce85580..dc415bfe02d 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -2928,7 +2928,7 @@ void qemu_init(int argc, char **argv)
}
}
if (!target_info()) {
- target_info_qom_set_target();
+ target_info_qom_set_target_from_argv0(argv[0]);
}
module_init_info(qemu_modinfo);
diff --git a/target-info-qom.c b/target-info-qom.c
index a2f506c15ef..069d867ea30 100644
--- a/target-info-qom.c
+++ b/target-info-qom.c
@@ -84,3 +84,64 @@ void target_info_qom_set_target_from_name(const char *name)
list_targets_available();
exit(1);
}
+
+void target_info_qom_set_target_from_argv0(const char *argv0)
+{
+ g_autoptr(GSList) targets = object_class_get_list(TYPE_TARGET_INFO, false);
+ size_t num_targets = g_slist_length(targets);
+ g_assert(num_targets > 0);
+
+ /* if we have only one target, set it as default */
+ if (num_targets == 1) {
+ const TargetInfo *ti = TARGET_INFO_CLASS(targets->data)->target_info;
+ target_info_ptr = ti;
+ return;
+ }
+
+ g_autofree char *basename_cstr = g_path_get_basename(argv0);
+ g_autoptr(GString) basename = g_string_new(basename_cstr);
+
+ const char *rm_common_patterns[] = {"qemu-system",
+ "qemu-fuzz",
+ "-target",
+ "-unsigned",
+ ".exe",
+ NULL};
+ for (const char **rm = rm_common_patterns; *rm; ++rm) {
+ size_t len = strlen(*rm);
+ char *found = strstr(basename->str, *rm);
+ if (found) {
+ size_t pos = found - basename->str;
+ g_string_erase(basename, pos, len);
+ }
+ }
+
+ /* remove ^[-.] */
+ const char *rm_separator[] = {"-", ".", NULL};
+ for (const char **rm = rm_separator; *rm; ++rm) {
+ size_t len = strlen(*rm);
+ if (!strncmp(basename->str, *rm, len)) {
+ g_string_erase(basename, 0, len);
+ }
+ }
+
+ /* remove [-.]{ok, ko, this-is-my-custom-binary-name, .*} */
+ for (const char **rm = rm_separator; *rm; ++rm) {
+ char *end = strstr(basename->str, *rm);
+ if (end) {
+ size_t pos = end - basename->str;
+ size_t len = basename->len - pos;
+ g_string_erase(basename, pos, len);
+ }
+ }
+
+ if (basename->len > 0) {
+ target_info_qom_set_target_from_name(basename->str);
+ return;
+ }
+
+ /* we have a qemu-system single-binary and multiple targets */
+ error_report("missing -target parameter");
+ list_targets_available();
+ exit(1);
+}
diff --git a/tests/qtest/fuzz/fuzz.c b/tests/qtest/fuzz/fuzz.c
index a3a131c80f8..eda899d43ae 100644
--- a/tests/qtest/fuzz/fuzz.c
+++ b/tests/qtest/fuzz/fuzz.c
@@ -174,7 +174,7 @@ int LLVMFuzzerInitialize(int *argc, char ***argv, char ***envp)
/* Initialize qgraph and modules */
qos_graph_init();
module_call_init(MODULE_INIT_TARGET_INFO);
- target_info_qom_set_target();
+ target_info_qom_set_target_from_argv0((*argv)[0]);
module_call_init(MODULE_INIT_FUZZ_TARGET);
module_call_init(MODULE_INIT_QOM);
module_call_init(MODULE_INIT_LIBQOS);
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 35/47] meson: build single binary for arm+aarch64 targets
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (32 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 34/47] system/vl: fallback to detect target from argv[0] Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 14:50 ` Philippe Mathieu-Daudé
2026-08-31 15:21 ` Yonggang Luo
2026-08-28 22:58 ` [PATCH 36/47] scripts: add single-binary-compare-cmdline.sh Pierrick Bouvier
` (12 subsequent siblings)
46 siblings, 2 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Build with: ninja -C build qemu-system
This is not built by default.
All available *-softmmu targets are aggregated, ./configure
--target-list can be used to restrict which targets are included.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
meson.build | 44 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/meson.build b/meson.build
index 8023da4a147..9cf441382d3 100644
--- a/meson.build
+++ b/meson.build
@@ -4250,6 +4250,16 @@ if host_os == 'darwin'
endif
traceable = []
+single_binary_libs = []
+single_binary_deps = []
+single_binary_crates = []
+single_binary_available = false
+
+single_binary_supported_targets = [
+ 'aarch64-softmmu',
+ 'arm-softmmu',
+]
+
emulators = {}
foreach target : target_dirs
config_target = config_target_mak[target]
@@ -4402,6 +4412,13 @@ foreach target : target_dirs
build_by_default: false)
if target.endswith('-softmmu')
+ if target in single_binary_supported_targets
+ single_binary_libs += lib
+ single_binary_deps += arch_deps
+ single_binary_deps += target_stubs
+ single_binary_crates += main_rs
+ single_binary_available = true
+ endif
execs = [{
'name': 'qemu-system-' + target_name,
'win_subsystem': 'console',
@@ -4483,6 +4500,33 @@ foreach target : target_dirs
endforeach
endforeach
+single_binary_objects = []
+foreach lib: single_binary_libs
+ single_binary_objects += lib.extract_all_objects(recursive: true)
+endforeach
+
+single_binary_link_args = emulator_link_args
+single_binary_link_args += enable_modules ? ['@block.syms', '@qemu.syms'] : []
+
+if single_binary_available
+ executable('qemu-system',
+ sources: [single_binary_crates, files('system/main.c')],
+ dependencies: single_binary_deps,
+ objects: single_binary_objects,
+ link_depends: [block_syms, qemu_syms],
+ link_args: single_binary_link_args,
+ build_by_default: false)
+else
+ error_str = f'''qemu-system only support targets:
+@single_binary_supported_targets@
+
+use ./configure --target-list= to choose at least one of them'''
+ t = custom_target(command: ['sh', '-c', 'echo "' + error_str + '" && exit 1'],
+ output: 'none',
+ build_by_default: false)
+ alias_target('qemu-system', t)
+endif
+
# Other build targets
if get_option('plugins')
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 35/47] meson: build single binary for arm+aarch64 targets
2026-08-28 22:58 ` [PATCH 35/47] meson: build single binary for arm+aarch64 targets Pierrick Bouvier
@ 2026-08-31 14:50 ` Philippe Mathieu-Daudé
2026-08-31 15:21 ` Yonggang Luo
1 sibling, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 14:50 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 29/8/26 00:58, Pierrick Bouvier wrote:
> Build with: ninja -C build qemu-system
> This is not built by default.
>
> All available *-softmmu targets are aggregated, ./configure
> --target-list can be used to restrict which targets are included.
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> meson.build | 44 ++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 35/47] meson: build single binary for arm+aarch64 targets
2026-08-28 22:58 ` [PATCH 35/47] meson: build single binary for arm+aarch64 targets Pierrick Bouvier
2026-08-31 14:50 ` Philippe Mathieu-Daudé
@ 2026-08-31 15:21 ` Yonggang Luo
2026-08-31 18:12 ` Pierrick Bouvier
1 sibling, 1 reply; 99+ messages in thread
From: Yonggang Luo @ 2026-08-31 15:21 UTC (permalink / raw)
To: Pierrick Bouvier
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé
[-- Attachment #1.1: Type: text/plain, Size: 3199 bytes --]
On Sat, Aug 29, 2026 at 7:03 AM Pierrick Bouvier <
pierrick.bouvier@oss.qualcomm.com> wrote:
>
> Build with: ninja -C build qemu-system
> This is not built by default.
>
> All available *-softmmu targets are aggregated, ./configure
> --target-list can be used to restrict which targets are included.
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> meson.build | 44 ++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/meson.build b/meson.build
> index 8023da4a147..9cf441382d3 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -4250,6 +4250,16 @@ if host_os == 'darwin'
> endif
>
> traceable = []
> +single_binary_libs = []
> +single_binary_deps = []
> +single_binary_crates = []
> +single_binary_available = false
> +
> +single_binary_supported_targets = [
> + 'aarch64-softmmu',
> + 'arm-softmmu',
> +]
> +
> emulators = {}
> foreach target : target_dirs
> config_target = config_target_mak[target]
> @@ -4402,6 +4412,13 @@ foreach target : target_dirs
> build_by_default: false)
>
> if target.endswith('-softmmu')
> + if target in single_binary_supported_targets
> + single_binary_libs += lib
> + single_binary_deps += arch_deps
> + single_binary_deps += target_stubs
> + single_binary_crates += main_rs
> + single_binary_available = true
> + endif
> execs = [{
> 'name': 'qemu-system-' + target_name,
> 'win_subsystem': 'console',
> @@ -4483,6 +4500,33 @@ foreach target : target_dirs
> endforeach
> endforeach
>
> +single_binary_objects = []
> +foreach lib: single_binary_libs
> + single_binary_objects += lib.extract_all_objects(recursive: true)
> +endforeach
> +
> +single_binary_link_args = emulator_link_args
> +single_binary_link_args += enable_modules ? ['@block.syms',
'@qemu.syms'] : []
> +
> +if single_binary_available
> + executable('qemu-system',
> + sources: [single_binary_crates, files('system/main.c')],
> + dependencies: single_binary_deps,
> + objects: single_binary_objects,
> + link_depends: [block_syms, qemu_syms],
> + link_args: single_binary_link_args,
> + build_by_default: false)
A. better assign executable to qemu_system. so it can be tested.
Maybe a simple test is better.
B. single_binary_available should be a meson option, maybe
single_binary_enabled, and disabled by default maybe... don't know which is
better.
as it's still experiential
The patch to squash is attached.
> +else
> + error_str = f'''qemu-system only support targets:
> +@single_binary_supported_targets@
> +
> +use ./configure --target-list= to choose at least one of them'''
> + t = custom_target(command: ['sh', '-c', 'echo "' + error_str + '" &&
exit 1'],
> + output: 'none',
> + build_by_default: false)
> + alias_target('qemu-system', t)
> +endif
> +
> # Other build targets
>
> if get_option('plugins')
> --
> 2.43.0
>
>
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
[-- Attachment #1.2: Type: text/html, Size: 4151 bytes --]
[-- Attachment #2: 0001-meson-keep-qemu-system-executable-for-tests.patch --]
[-- Type: text/plain, Size: 1613 bytes --]
From bed48399155b22ef143f7fa0ef71113810f592d6 Mon Sep 17 00:00:00 2001
From: Yonggang Luo <luoyonggang@gmail.com>
Date: Mon, 31 Aug 2026 23:17:00 +0800
Subject: [PATCH] meson: keep qemu-system executable for tests
- Assign the combined qemu-system target to qemu_system so qtests can
depend on it.
- Align executable() kwargs with the assignment.
---
meson.build | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/meson.build b/meson.build
index 9b9f727119..d295c91f2c 100644
--- a/meson.build
+++ b/meson.build
@@ -4510,13 +4510,13 @@ single_binary_link_args = emulator_link_args
single_binary_link_args += enable_modules ? ['@block.syms', '@qemu.syms'] : []
if single_binary_available
- executable('qemu-system',
- sources: [single_binary_crates, files('system/main.c')],
- dependencies: single_binary_deps,
- objects: single_binary_objects,
- link_depends: [block_syms, qemu_syms],
- link_args: single_binary_link_args,
- build_by_default: false)
+ qemu_system = executable('qemu-system',
+ sources: [single_binary_crates, files('system/main.c')],
+ dependencies: single_binary_deps,
+ objects: single_binary_objects,
+ link_depends: [block_syms, qemu_syms],
+ link_args: single_binary_link_args,
+ build_by_default: false)
else
error_str = f'''qemu-system only support targets:
@single_binary_supported_targets@
--
2.52.0.windows.1
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 35/47] meson: build single binary for arm+aarch64 targets
2026-08-31 15:21 ` Yonggang Luo
@ 2026-08-31 18:12 ` Pierrick Bouvier
0 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 18:12 UTC (permalink / raw)
To: luoyonggang
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé
On 8/31/2026 8:21 AM, Yonggang Luo wrote:
>
>
> On Sat, Aug 29, 2026 at 7:03 AM Pierrick Bouvier
> <pierrick.bouvier@oss.qualcomm.com
> <mailto:pierrick.bouvier@oss.qualcomm.com>> wrote:
>>
>> Build with: ninja -C build qemu-system
>> This is not built by default.
>>
>> All available *-softmmu targets are aggregated, ./configure
>> --target-list can be used to restrict which targets are included.
>>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com
> <mailto:pierrick.bouvier@oss.qualcomm.com>>
>> ---
>> meson.build | 44 ++++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 44 insertions(+)
>>
>> diff --git a/meson.build b/meson.build
>> index 8023da4a147..9cf441382d3 100644
>> --- a/meson.build
>> +++ b/meson.build
>> @@ -4250,6 +4250,16 @@ if host_os == 'darwin'
>> endif
>>
>> traceable = []
>> +single_binary_libs = []
>> +single_binary_deps = []
>> +single_binary_crates = []
>> +single_binary_available = false
>> +
>> +single_binary_supported_targets = [
>> + 'aarch64-softmmu',
>> + 'arm-softmmu',
>> +]
>> +
>> emulators = {}
>> foreach target : target_dirs
>> config_target = config_target_mak[target]
>> @@ -4402,6 +4412,13 @@ foreach target : target_dirs
>> build_by_default: false)
>>
>> if target.endswith('-softmmu')
>> + if target in single_binary_supported_targets
>> + single_binary_libs += lib
>> + single_binary_deps += arch_deps
>> + single_binary_deps += target_stubs
>> + single_binary_crates += main_rs
>> + single_binary_available = true
>> + endif
>> execs = [{
>> 'name': 'qemu-system-' + target_name,
>> 'win_subsystem': 'console',
>> @@ -4483,6 +4500,33 @@ foreach target : target_dirs
>> endforeach
>> endforeach
>>
>> +single_binary_objects = []
>> +foreach lib: single_binary_libs
>> + single_binary_objects += lib.extract_all_objects(recursive: true)
>> +endforeach
>> +
>> +single_binary_link_args = emulator_link_args
>> +single_binary_link_args += enable_modules ? ['@block.syms',
> '@qemu.syms'] : []
>> +
>> +if single_binary_available
>> + executable('qemu-system',
>> + sources: [single_binary_crates, files('system/main.c')],
>> + dependencies: single_binary_deps,
>> + objects: single_binary_objects,
>> + link_depends: [block_syms, qemu_syms],
>> + link_args: single_binary_link_args,
>> + build_by_default: false)
>
> A. better assign executable to qemu_system. so it can be tested.
> Maybe a simple test is better.
I'm not sure to see what you mean by "assign executable to qemu_system",
can you tell us more?
> B. single_binary_available should be a meson option, maybe
> single_binary_enabled, and disabled by default maybe... don't know which
> is better.
> as it's still experiential
>
We could add an option needed, but since binary is not built by default,
I don't see why it should be enabled optionally.
> The patch to squash is attached.
>
>
>
>> +else
>> + error_str = f'''qemu-system only support targets:
>> +@single_binary_supported_targets@
>> +
>> +use ./configure --target-list= to choose at least one of them'''
>> + t = custom_target(command: ['sh', '-c', 'echo "' + error_str + '"
> && exit 1'],
>> + output: 'none',
>> + build_by_default: false)
>> + alias_target('qemu-system', t)
>> +endif
>> +
>> # Other build targets
>>
>> if get_option('plugins')
>> --
>> 2.43.0
>>
>>
>
>
> --
> 此致
> 礼
> 罗勇刚
> Yours
> sincerely,
> Yonggang Luo
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 36/47] scripts: add single-binary-compare-cmdline.sh
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (33 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 35/47] meson: build single binary for arm+aarch64 targets Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 37/47] hw/core/boards.h: add available callback to DEFINE_MACHINE_EXTENDED Pierrick Bouvier
` (11 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
This script compares output of single-binary for each target with
original binary. We compare cpus, devices and machines.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
scripts/single-binary-compare-cmdline.sh | 51 ++++++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100755 scripts/single-binary-compare-cmdline.sh
diff --git a/scripts/single-binary-compare-cmdline.sh b/scripts/single-binary-compare-cmdline.sh
new file mode 100755
index 00000000000..a9d4cb4fe43
--- /dev/null
+++ b/scripts/single-binary-compare-cmdline.sh
@@ -0,0 +1,51 @@
+#!/usr/bin/env bash
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+set -euo pipefail
+
+targets()
+{
+ ./build/qemu-system -target help |& grep '^-' | sed -e 's/-//g'
+}
+
+filter_version()
+{
+ grep -v 'QEMU emulator version'
+}
+
+filter_usage()
+{
+ grep -v '^usage:' | grep -v '^-target' || true
+}
+
+filter_trailing_whitespace()
+{
+ sed -e 's/\s+$//'
+}
+
+f()
+{
+ filter_version | filter_usage | filter_trailing_whitespace
+}
+
+ninja -C build all qemu-system
+
+ref=cmdline_ref
+err=0
+for t in $(targets); do
+ echo ------------------------------------------------------------------
+ git diff --color-words --no-index \
+ <(./build/qemu-system-$t -help |& f) \
+ <(./build/qemu-system -target $t -help |& f) || err=1
+ git diff --color-words --no-index \
+ <(./build/qemu-system-$t -cpu help |& f) \
+ <(./build/qemu-system -target $t -cpu help |& f) || err=1
+ git diff --color-words --no-index \
+ <(./build/qemu-system-$t -machine help |& f) \
+ <(./build/qemu-system -target $t -machine help |& f) || err=1
+ git diff --color-words --no-index \
+ <(./build/qemu-system-$t -device help |& f) \
+ <(./build/qemu-system -target $t -device help |& f) || err=1
+done
+
+exit $err
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 37/47] hw/core/boards.h: add available callback to DEFINE_MACHINE_EXTENDED
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (34 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 36/47] scripts: add single-binary-compare-cmdline.sh Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 12:43 ` Yonggang Luo
2026-08-28 22:58 ` [PATCH 38/47] hw/core/boards.h: remove unused DEFINE_MACHINE_WITH_INTERFACE* Pierrick Bouvier
` (10 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/arm/bananapi_m2u.c | 2 +-
hw/arm/cubieboard.c | 2 +-
hw/arm/integratorcp.c | 2 +-
hw/arm/mcimx7d-sabre.c | 2 +-
hw/arm/musicpal.c | 2 +-
hw/arm/orangepi.c | 2 +-
hw/ppc/pegasos.c | 2 +-
include/hw/core/boards.h | 10 ++++++----
8 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 8f59111fd4e..7b86986efb1 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -153,4 +153,4 @@ static void bpim2u_machine_init(MachineClass *mc)
}
DEFINE_MACHINE_EXTENDED("bpim2u", MACHINE, Bpim2uMachineState,
- bpim2u_machine_init, false, NULL)
+ bpim2u_machine_init, false, NULL, NULL)
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index ae27056938f..da45bb2be52 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -134,4 +134,4 @@ static void cubieboard_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("cubieboard", MACHINE, CubieboardMachineState,
cubieboard_machine_init, false,
- NULL)
+ NULL, NULL)
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 382ea7850d8..6314bbb6c13 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -705,7 +705,7 @@ static void integratorcp_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("integratorcp", MACHINE, IntegratorcpMachineState,
integratorcp_machine_init, false,
- NULL)
+ NULL, NULL)
static const Property core_properties[] = {
DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index db8a62e5f6c..2c884b5c78f 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -87,4 +87,4 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("mcimx7d-sabre", MACHINE, Mcimx7dSabreMachineState,
mcimx7d_sabre_machine_init, false,
- NULL)
+ NULL, NULL)
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index e1a336e861a..52805e41892 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1365,7 +1365,7 @@ static void musicpal_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("musicpal", MACHINE, MusicPalMachineState,
musicpal_machine_init, false,
- NULL)
+ NULL, NULL)
static void mv88w8618_wlan_class_init(ObjectClass *klass, const void *data)
{
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index 7a19732f5df..87ed2ef4b69 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -134,4 +134,4 @@ static void orangepi_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("orangepi-pc", MACHINE, OrangePiMachineState,
orangepi_machine_init, false,
- NULL)
+ NULL, NULL)
diff --git a/hw/ppc/pegasos.c b/hw/ppc/pegasos.c
index 9d7e279123b..ad8aca85ab3 100644
--- a/hw/ppc/pegasos.c
+++ b/hw/ppc/pegasos.c
@@ -788,7 +788,7 @@ static void pegasos2_machine_class_init(ObjectClass *oc, const void *data)
}
DEFINE_MACHINE_EXTENDED("pegasos", MACHINE, PegasosMachineState,
- pegasos_machine_init, true, (const InterfaceInfo[]) {
+ pegasos_machine_init, true, NULL, (const InterfaceInfo[]) {
{ TYPE_PPC_VIRTUAL_HYPERVISOR },
{ TYPE_VOF_MACHINE_IF }, { } })
diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index a436d48c8e5..2e2acdb6867 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -514,7 +514,8 @@ struct MachineState {
*/
#define DEFINE_MACHINE_EXTENDED(namestr, PARENT_NAME, InstanceName, \
- machine_initfn, ABSTRACT, ifaces...) \
+ machine_initfn, ABSTRACT, available_cb, \
+ ifaces...) \
static void machine_initfn##_class_init(ObjectClass *oc, const void *data) \
{ \
MachineClass *mc = MACHINE_CLASS(oc); \
@@ -526,6 +527,7 @@ struct MachineState {
.class_init = machine_initfn##_class_init, \
.instance_size = sizeof(InstanceName), \
.abstract = ABSTRACT, \
+ .is_available = available_cb, \
.interfaces = ifaces, \
}; \
static void machine_initfn##_register_types(void) \
@@ -536,14 +538,14 @@ struct MachineState {
#define DEFINE_MACHINE(namestr, machine_initfn) \
DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState, machine_initfn, \
- false, NULL)
+ false, NULL, NULL)
#define DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, ifaces...)\
DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState, machine_initfn, \
- false, ifaces)
+ false, NULL, ifaces)
#define DEFINE_MACHINE_WITH_INTERFACES(namestr, machine_initfn, ...) \
- DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
+ DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, NULL, \
(const InterfaceInfo[]) { __VA_ARGS__ })
/*
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 37/47] hw/core/boards.h: add available callback to DEFINE_MACHINE_EXTENDED
2026-08-28 22:58 ` [PATCH 37/47] hw/core/boards.h: add available callback to DEFINE_MACHINE_EXTENDED Pierrick Bouvier
@ 2026-08-31 12:43 ` Yonggang Luo
2026-08-31 18:13 ` Pierrick Bouvier
0 siblings, 1 reply; 99+ messages in thread
From: Yonggang Luo @ 2026-08-31 12:43 UTC (permalink / raw)
To: Pierrick Bouvier
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé
[-- Attachment #1: Type: text/plain, Size: 6158 bytes --]
This change is minimal, I think it's can use proper target_is_* in this
patch(maybe). so we have no need change it twice.
On Sat, Aug 29, 2026 at 7:03 AM Pierrick Bouvier <
pierrick.bouvier@oss.qualcomm.com> wrote:
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> hw/arm/bananapi_m2u.c | 2 +-
> hw/arm/cubieboard.c | 2 +-
> hw/arm/integratorcp.c | 2 +-
> hw/arm/mcimx7d-sabre.c | 2 +-
> hw/arm/musicpal.c | 2 +-
> hw/arm/orangepi.c | 2 +-
> hw/ppc/pegasos.c | 2 +-
> include/hw/core/boards.h | 10 ++++++----
> 8 files changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
> index 8f59111fd4e..7b86986efb1 100644
> --- a/hw/arm/bananapi_m2u.c
> +++ b/hw/arm/bananapi_m2u.c
> @@ -153,4 +153,4 @@ static void bpim2u_machine_init(MachineClass *mc)
> }
>
> DEFINE_MACHINE_EXTENDED("bpim2u", MACHINE, Bpim2uMachineState,
> - bpim2u_machine_init, false, NULL)
> + bpim2u_machine_init, false, NULL, NULL)
> diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
> index ae27056938f..da45bb2be52 100644
> --- a/hw/arm/cubieboard.c
> +++ b/hw/arm/cubieboard.c
> @@ -134,4 +134,4 @@ static void cubieboard_machine_init(MachineClass *mc)
>
> DEFINE_MACHINE_EXTENDED("cubieboard", MACHINE, CubieboardMachineState,
> cubieboard_machine_init, false,
> - NULL)
> + NULL, NULL)
> diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
> index 382ea7850d8..6314bbb6c13 100644
> --- a/hw/arm/integratorcp.c
> +++ b/hw/arm/integratorcp.c
> @@ -705,7 +705,7 @@ static void integratorcp_machine_init(MachineClass
*mc)
>
> DEFINE_MACHINE_EXTENDED("integratorcp", MACHINE,
IntegratorcpMachineState,
> integratorcp_machine_init, false,
> - NULL)
> + NULL, NULL)
>
> static const Property core_properties[] = {
> DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),
> diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
> index db8a62e5f6c..2c884b5c78f 100644
> --- a/hw/arm/mcimx7d-sabre.c
> +++ b/hw/arm/mcimx7d-sabre.c
> @@ -87,4 +87,4 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
>
> DEFINE_MACHINE_EXTENDED("mcimx7d-sabre", MACHINE,
Mcimx7dSabreMachineState,
> mcimx7d_sabre_machine_init, false,
> - NULL)
> + NULL, NULL)
> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
> index e1a336e861a..52805e41892 100644
> --- a/hw/arm/musicpal.c
> +++ b/hw/arm/musicpal.c
> @@ -1365,7 +1365,7 @@ static void musicpal_machine_init(MachineClass *mc)
>
> DEFINE_MACHINE_EXTENDED("musicpal", MACHINE, MusicPalMachineState,
> musicpal_machine_init, false,
> - NULL)
> + NULL, NULL)
>
> static void mv88w8618_wlan_class_init(ObjectClass *klass, const void
*data)
> {
> diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
> index 7a19732f5df..87ed2ef4b69 100644
> --- a/hw/arm/orangepi.c
> +++ b/hw/arm/orangepi.c
> @@ -134,4 +134,4 @@ static void orangepi_machine_init(MachineClass *mc)
>
> DEFINE_MACHINE_EXTENDED("orangepi-pc", MACHINE, OrangePiMachineState,
> orangepi_machine_init, false,
> - NULL)
> + NULL, NULL)
> diff --git a/hw/ppc/pegasos.c b/hw/ppc/pegasos.c
> index 9d7e279123b..ad8aca85ab3 100644
> --- a/hw/ppc/pegasos.c
> +++ b/hw/ppc/pegasos.c
> @@ -788,7 +788,7 @@ static void pegasos2_machine_class_init(ObjectClass
*oc, const void *data)
> }
>
> DEFINE_MACHINE_EXTENDED("pegasos", MACHINE, PegasosMachineState,
> - pegasos_machine_init, true, (const
InterfaceInfo[]) {
> + pegasos_machine_init, true, NULL, (const
InterfaceInfo[]) {
> { TYPE_PPC_VIRTUAL_HYPERVISOR },
> { TYPE_VOF_MACHINE_IF }, { } })
>
> diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
> index a436d48c8e5..2e2acdb6867 100644
> --- a/include/hw/core/boards.h
> +++ b/include/hw/core/boards.h
> @@ -514,7 +514,8 @@ struct MachineState {
> */
>
> #define DEFINE_MACHINE_EXTENDED(namestr, PARENT_NAME, InstanceName, \
> - machine_initfn, ABSTRACT, ifaces...) \
> + machine_initfn, ABSTRACT, available_cb, \
> + ifaces...) \
> static void machine_initfn##_class_init(ObjectClass *oc, const void
*data) \
> { \
> MachineClass *mc = MACHINE_CLASS(oc); \
> @@ -526,6 +527,7 @@ struct MachineState {
> .class_init = machine_initfn##_class_init, \
> .instance_size = sizeof(InstanceName), \
> .abstract = ABSTRACT, \
> + .is_available = available_cb, \
> .interfaces = ifaces, \
> }; \
> static void machine_initfn##_register_types(void) \
> @@ -536,14 +538,14 @@ struct MachineState {
>
> #define DEFINE_MACHINE(namestr, machine_initfn) \
> DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState,
machine_initfn, \
> - false, NULL)
> + false, NULL, NULL)
>
> #define DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn,
ifaces...)\
> DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState,
machine_initfn, \
> - false, ifaces)
> + false, NULL, ifaces)
>
> #define DEFINE_MACHINE_WITH_INTERFACES(namestr, machine_initfn, ...) \
> - DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
> + DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, NULL, \
> (const InterfaceInfo[]) {
__VA_ARGS__ })
>
> /*
> --
> 2.43.0
>
>
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
[-- Attachment #2: Type: text/html, Size: 7571 bytes --]
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 37/47] hw/core/boards.h: add available callback to DEFINE_MACHINE_EXTENDED
2026-08-31 12:43 ` Yonggang Luo
@ 2026-08-31 18:13 ` Pierrick Bouvier
0 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-31 18:13 UTC (permalink / raw)
To: luoyonggang
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé
On 8/31/2026 5:43 AM, Yonggang Luo wrote:
> This change is minimal, I think it's can use proper target_is_* in this
> patch(maybe). so we have no need change it twice.
>
That's the idea: keep it minimal.
Usually, mixing cleanup and code change is discouraged in QEMU. People
will ask "can you please split it up again?".
> On Sat, Aug 29, 2026 at 7:03 AM Pierrick Bouvier
> <pierrick.bouvier@oss.qualcomm.com
> <mailto:pierrick.bouvier@oss.qualcomm.com>> wrote:
>>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com
> <mailto:pierrick.bouvier@oss.qualcomm.com>>
>> ---
>> hw/arm/bananapi_m2u.c | 2 +-
>> hw/arm/cubieboard.c | 2 +-
>> hw/arm/integratorcp.c | 2 +-
>> hw/arm/mcimx7d-sabre.c | 2 +-
>> hw/arm/musicpal.c | 2 +-
>> hw/arm/orangepi.c | 2 +-
>> hw/ppc/pegasos.c | 2 +-
>> include/hw/core/boards.h | 10 ++++++----
>> 8 files changed, 13 insertions(+), 11 deletions(-)
>>
>> diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
>> index 8f59111fd4e..7b86986efb1 100644
>> --- a/hw/arm/bananapi_m2u.c
>> +++ b/hw/arm/bananapi_m2u.c
>> @@ -153,4 +153,4 @@ static void bpim2u_machine_init(MachineClass *mc)
>> }
>>
>> DEFINE_MACHINE_EXTENDED("bpim2u", MACHINE, Bpim2uMachineState,
>> - bpim2u_machine_init, false, NULL)
>> + bpim2u_machine_init, false, NULL, NULL)
>> diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
>> index ae27056938f..da45bb2be52 100644
>> --- a/hw/arm/cubieboard.c
>> +++ b/hw/arm/cubieboard.c
>> @@ -134,4 +134,4 @@ static void cubieboard_machine_init(MachineClass *mc)
>>
>> DEFINE_MACHINE_EXTENDED("cubieboard", MACHINE, CubieboardMachineState,
>> cubieboard_machine_init, false,
>> - NULL)
>> + NULL, NULL)
>> diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
>> index 382ea7850d8..6314bbb6c13 100644
>> --- a/hw/arm/integratorcp.c
>> +++ b/hw/arm/integratorcp.c
>> @@ -705,7 +705,7 @@ static void integratorcp_machine_init(MachineClass
> *mc)
>>
>> DEFINE_MACHINE_EXTENDED("integratorcp", MACHINE,
> IntegratorcpMachineState,
>> integratorcp_machine_init, false,
>> - NULL)
>> + NULL, NULL)
>>
>> static const Property core_properties[] = {
>> DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),
>> diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
>> index db8a62e5f6c..2c884b5c78f 100644
>> --- a/hw/arm/mcimx7d-sabre.c
>> +++ b/hw/arm/mcimx7d-sabre.c
>> @@ -87,4 +87,4 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
>>
>> DEFINE_MACHINE_EXTENDED("mcimx7d-sabre", MACHINE,
> Mcimx7dSabreMachineState,
>> mcimx7d_sabre_machine_init, false,
>> - NULL)
>> + NULL, NULL)
>> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
>> index e1a336e861a..52805e41892 100644
>> --- a/hw/arm/musicpal.c
>> +++ b/hw/arm/musicpal.c
>> @@ -1365,7 +1365,7 @@ static void musicpal_machine_init(MachineClass *mc)
>>
>> DEFINE_MACHINE_EXTENDED("musicpal", MACHINE, MusicPalMachineState,
>> musicpal_machine_init, false,
>> - NULL)
>> + NULL, NULL)
>>
>> static void mv88w8618_wlan_class_init(ObjectClass *klass, const void
> *data)
>> {
>> diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
>> index 7a19732f5df..87ed2ef4b69 100644
>> --- a/hw/arm/orangepi.c
>> +++ b/hw/arm/orangepi.c
>> @@ -134,4 +134,4 @@ static void orangepi_machine_init(MachineClass *mc)
>>
>> DEFINE_MACHINE_EXTENDED("orangepi-pc", MACHINE, OrangePiMachineState,
>> orangepi_machine_init, false,
>> - NULL)
>> + NULL, NULL)
>> diff --git a/hw/ppc/pegasos.c b/hw/ppc/pegasos.c
>> index 9d7e279123b..ad8aca85ab3 100644
>> --- a/hw/ppc/pegasos.c
>> +++ b/hw/ppc/pegasos.c
>> @@ -788,7 +788,7 @@ static void
> pegasos2_machine_class_init(ObjectClass *oc, const void *data)
>> }
>>
>> DEFINE_MACHINE_EXTENDED("pegasos", MACHINE, PegasosMachineState,
>> - pegasos_machine_init, true, (const
> InterfaceInfo[]) {
>> + pegasos_machine_init, true, NULL, (const
> InterfaceInfo[]) {
>> { TYPE_PPC_VIRTUAL_HYPERVISOR },
>> { TYPE_VOF_MACHINE_IF }, { } })
>>
>> diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
>> index a436d48c8e5..2e2acdb6867 100644
>> --- a/include/hw/core/boards.h
>> +++ b/include/hw/core/boards.h
>> @@ -514,7 +514,8 @@ struct MachineState {
>> */
>>
>> #define DEFINE_MACHINE_EXTENDED(namestr, PARENT_NAME, InstanceName, \
>> - machine_initfn, ABSTRACT, ifaces...) \
>> + machine_initfn, ABSTRACT, available_cb, \
>> + ifaces...) \
>> static void machine_initfn##_class_init(ObjectClass *oc, const
> void *data) \
>> { \
>> MachineClass *mc = MACHINE_CLASS(oc); \
>> @@ -526,6 +527,7 @@ struct MachineState {
>> .class_init = machine_initfn##_class_init, \
>> .instance_size = sizeof(InstanceName), \
>> .abstract = ABSTRACT, \
>> + .is_available = available_cb, \
>> .interfaces = ifaces, \
>> }; \
>> static void machine_initfn##_register_types(void) \
>> @@ -536,14 +538,14 @@ struct MachineState {
>>
>> #define DEFINE_MACHINE(namestr, machine_initfn) \
>> DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState,
> machine_initfn, \
>> - false, NULL)
>> + false, NULL, NULL)
>>
>> #define DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn,
> ifaces...)\
>> DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState,
> machine_initfn, \
>> - false, ifaces)
>> + false, NULL, ifaces)
>>
>> #define DEFINE_MACHINE_WITH_INTERFACES(namestr, machine_initfn, ...) \
>> - DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \
>> + DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, NULL, \
>> (const InterfaceInfo[])
> { __VA_ARGS__ })
>>
>> /*
>> --
>> 2.43.0
>>
>>
>
>
> --
> 此致
> 礼
> 罗勇刚
> Yours
> sincerely,
> Yonggang Luo
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 38/47] hw/core/boards.h: remove unused DEFINE_MACHINE_WITH_INTERFACE*
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (35 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 37/47] hw/core/boards.h: add available callback to DEFINE_MACHINE_EXTENDED Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 39/47] hw/core/boards.h: add available callback to DEFINE_MACHINE Pierrick Bouvier
` (9 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/hw/core/boards.h | 8 --------
1 file changed, 8 deletions(-)
diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index 2e2acdb6867..a745187847c 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -540,14 +540,6 @@ struct MachineState {
DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState, machine_initfn, \
false, NULL, NULL)
-#define DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, ifaces...)\
- DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState, machine_initfn, \
- false, NULL, ifaces)
-
-#define DEFINE_MACHINE_WITH_INTERFACES(namestr, machine_initfn, ...) \
- DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, NULL, \
- (const InterfaceInfo[]) { __VA_ARGS__ })
-
/*
* Helper for dispatching different macros based on how
* many __VA_ARGS__ are passed. Supports 1 to 5 variadic
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 39/47] hw/core/boards.h: add available callback to DEFINE_MACHINE
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (36 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 38/47] hw/core/boards.h: remove unused DEFINE_MACHINE_WITH_INTERFACE* Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 40/47] hw/arm: filter arm machines Pierrick Bouvier
` (8 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/alpha/dp264.c | 2 +-
hw/arm/digic_boards.c | 2 +-
hw/arm/imx25_pdk.c | 2 +-
hw/arm/kzm.c | 2 +-
hw/arm/max78000fthr.c | 2 +-
hw/arm/mcimx6ul-evk.c | 2 +-
hw/arm/msf2-som.c | 2 +-
hw/arm/netduino2.c | 2 +-
hw/arm/netduinoplus2.c | 2 +-
hw/arm/olimex-stm32-h405.c | 2 +-
hw/arm/stm32vldiscovery.c | 2 +-
hw/core/null-machine.c | 2 +-
hw/m68k/an5206.c | 2 +-
hw/m68k/mcf5208.c | 2 +-
hw/microblaze/petalogix_ml605_mmu.c | 2 +-
hw/microblaze/xlnx-zynqmp-pmu.c | 2 +-
hw/mips/boston.c | 2 +-
hw/mips/fuloong2e.c | 2 +-
hw/mips/malta.c | 2 +-
hw/ppc/amigaone.c | 2 +-
hw/ppc/ppc440_bamboo.c | 2 +-
hw/ppc/prep.c | 2 +-
hw/ppc/sam460ex.c | 2 +-
hw/ppc/virtex_ml507.c | 2 +-
hw/riscv/boston-aia.c | 2 +-
hw/riscv/microblaze-v-generic.c | 2 +-
hw/sh4/r2d.c | 2 +-
hw/sparc/leon3.c | 2 +-
hw/tricore/tricore_testboard.c | 2 +-
hw/xenpv/xen_machine_pv.c | 2 +-
hw/xtensa/sim.c | 2 +-
hw/xtensa/virt.c | 2 +-
include/hw/core/boards.h | 4 ++--
33 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index f928e0cee82..b145a76dc61 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -213,4 +213,4 @@ static void clipper_machine_init(MachineClass *mc)
mc->default_nic = "e1000";
}
-DEFINE_MACHINE("clipper", clipper_machine_init)
+DEFINE_MACHINE("clipper", clipper_machine_init, NULL)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 90c19106ad0..5fd7ed5dc42 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -145,4 +145,4 @@ static void canon_a1100_machine_init(MachineClass *mc)
mc->default_ram_id = "ram";
}
-DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init)
+DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init, NULL)
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index 243c30a67e7..50e53585447 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -149,4 +149,4 @@ static void imx25_pdk_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
-DEFINE_MACHINE("imx25-pdk", imx25_pdk_machine_init)
+DEFINE_MACHINE("imx25-pdk", imx25_pdk_machine_init, NULL)
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index 387bf54ced1..2353e73b243 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -137,4 +137,4 @@ static void kzm_machine_init(MachineClass *mc)
mc->default_ram_id = "kzm.ram";
}
-DEFINE_MACHINE("kzm", kzm_machine_init)
+DEFINE_MACHINE("kzm", kzm_machine_init, NULL)
diff --git a/hw/arm/max78000fthr.c b/hw/arm/max78000fthr.c
index ed50bb91979..a182e1379b9 100644
--- a/hw/arm/max78000fthr.c
+++ b/hw/arm/max78000fthr.c
@@ -47,4 +47,4 @@ static void max78000_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE("max78000fthr", max78000_machine_init)
+DEFINE_MACHINE("max78000fthr", max78000_machine_init, NULL)
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index 40071d2c7b9..f7e654b6228 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -77,4 +77,4 @@ static void mcimx6ul_evk_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
-DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init)
+DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init, NULL)
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 1372d7f628a..92f36ce3785 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -108,4 +108,4 @@ static void emcraft_sf2_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)
+DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init, NULL)
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index 0db8798b4bd..47e9e55213c 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -65,4 +65,4 @@ static void netduino2_machine_init(MachineClass *mc)
mc->ignore_memory_transaction_failures = true;
}
-DEFINE_MACHINE("netduino2", netduino2_machine_init)
+DEFINE_MACHINE("netduino2", netduino2_machine_init, NULL)
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index 5ac0eb81637..40701f47f09 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -65,4 +65,4 @@ static void netduinoplus2_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init)
+DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init, NULL)
diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
index de9ac4978ce..4630f78617b 100644
--- a/hw/arm/olimex-stm32-h405.c
+++ b/hw/arm/olimex-stm32-h405.c
@@ -71,4 +71,4 @@ static void olimex_stm32_h405_machine_init(MachineClass *mc)
mc->default_ram_size = 0;
}
-DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init)
+DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init, NULL)
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index d899a134b38..35c16bda411 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -68,4 +68,4 @@ static void stm32vldiscovery_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init)
+DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init, NULL)
diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c
index 60254913019..c95ac0aba38 100644
--- a/hw/core/null-machine.c
+++ b/hw/core/null-machine.c
@@ -55,4 +55,4 @@ static void machine_none_machine_init(MachineClass *mc)
mc->no_cdrom = 1;
}
-DEFINE_MACHINE("none", machine_none_machine_init)
+DEFINE_MACHINE("none", machine_none_machine_init, NULL)
diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c
index 1acd2fbdfb3..3d8d63bc68b 100644
--- a/hw/m68k/an5206.c
+++ b/hw/m68k/an5206.c
@@ -101,4 +101,4 @@ static void an5206_machine_init(MachineClass *mc)
mc->default_ram_id = "an5206.ram";
}
-DEFINE_MACHINE("an5206", an5206_machine_init)
+DEFINE_MACHINE("an5206", an5206_machine_init, NULL)
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index a8068c91f24..379ff2e68fc 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -398,4 +398,4 @@ static void mcf5208evb_machine_init(MachineClass *mc)
mc->default_ram_id = "mcf5208.ram";
}
-DEFINE_MACHINE("mcf5208evb", mcf5208evb_machine_init)
+DEFINE_MACHINE("mcf5208evb", mcf5208evb_machine_init, NULL)
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 8f9f54ff1e2..240f5a31aa5 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -220,4 +220,4 @@ static void petalogix_ml605_machine_init(MachineClass *mc)
mc->init = petalogix_ml605_init;
}
-DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init)
+DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init, NULL)
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 00154236bf8..59d34f5846e 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -185,4 +185,4 @@ static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc)
mc->init = xlnx_zynqmp_pmu_init;
}
-DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init)
+DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init, NULL)
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 4579df23eb7..dcb23b6f558 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -850,4 +850,4 @@ static void boston_mach_class_init(MachineClass *mc)
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("I6400");
}
-DEFINE_MACHINE("boston", boston_mach_class_init)
+DEFINE_MACHINE("boston", boston_mach_class_init, NULL)
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 9a712ee9309..a72b10b46b9 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -339,4 +339,4 @@ static void mips_fuloong2e_machine_init(MachineClass *mc)
machine_add_audiodev_property(mc);
}
-DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
+DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init, NULL)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 38c71f66f2e..aabe18dcdeb 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1301,7 +1301,7 @@ static void mips_malta_machine_init(MachineClass *mc)
compat_props_add(mc->compat_props, malta_compat, malta_compat_len);
}
-DEFINE_MACHINE("malta", mips_malta_machine_init)
+DEFINE_MACHINE("malta", mips_malta_machine_init, NULL)
static void mips_malta_register_types(void)
{
diff --git a/hw/ppc/amigaone.c b/hw/ppc/amigaone.c
index 2e94e80b569..9cf789ddec8 100644
--- a/hw/ppc/amigaone.c
+++ b/hw/ppc/amigaone.c
@@ -427,4 +427,4 @@ static void amigaone_machine_init(MachineClass *mc)
mc->default_ram_size = 512 * MiB;
}
-DEFINE_MACHINE("amigaone", amigaone_machine_init)
+DEFINE_MACHINE("amigaone", amigaone_machine_init, NULL)
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index 2dde008b0e4..64ecb5b2281 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -265,4 +265,4 @@ static void bamboo_machine_init(MachineClass *mc)
mc->default_nic = "e1000";
}
-DEFINE_MACHINE("bamboo", bamboo_machine_init)
+DEFINE_MACHINE("bamboo", bamboo_machine_init, NULL)
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 2672eb9e7a7..6f155f5af05 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -456,4 +456,4 @@ static void ibm_40p_machine_init(MachineClass *mc)
machine_add_audiodev_property(mc);
}
-DEFINE_MACHINE("40p", ibm_40p_machine_init)
+DEFINE_MACHINE("40p", ibm_40p_machine_init, NULL)
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index b13dd224ba1..5031022e244 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -519,4 +519,4 @@ static void sam460ex_machine_init(MachineClass *mc)
mc->default_ram_id = "ppc4xx.sdram";
}
-DEFINE_MACHINE("sam460ex", sam460ex_machine_init)
+DEFINE_MACHINE("sam460ex", sam460ex_machine_init, NULL)
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index 09686360e16..0e7257ad4a7 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -289,4 +289,4 @@ static void virtex_machine_init(MachineClass *mc)
mc->default_ram_id = "ram";
}
-DEFINE_MACHINE("virtex-ml507", virtex_machine_init)
+DEFINE_MACHINE("virtex-ml507", virtex_machine_init, NULL)
diff --git a/hw/riscv/boston-aia.c b/hw/riscv/boston-aia.c
index b90da096ea8..d90216eb4b1 100644
--- a/hw/riscv/boston-aia.c
+++ b/hw/riscv/boston-aia.c
@@ -473,4 +473,4 @@ static void boston_mach_class_init(MachineClass *mc)
mc->default_cpu_type = TYPE_RISCV_CPU_MIPS_P8700;
}
-DEFINE_MACHINE("boston-aia", boston_mach_class_init)
+DEFINE_MACHINE("boston-aia", boston_mach_class_init, NULL)
diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generic.c
index b0494b1ac50..d6f3a8ce635 100644
--- a/hw/riscv/microblaze-v-generic.c
+++ b/hw/riscv/microblaze-v-generic.c
@@ -186,4 +186,4 @@ static void mb_v_generic_machine_init(MachineClass *mc)
mc->default_cpus = 1;
}
-DEFINE_MACHINE("amd-microblaze-v-generic", mb_v_generic_machine_init)
+DEFINE_MACHINE("amd-microblaze-v-generic", mb_v_generic_machine_init, NULL)
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 99afe3618e8..9c68ccdcf00 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -387,4 +387,4 @@ static void r2d_machine_init(MachineClass *mc)
mc->default_nic = "rtl8139";
}
-DEFINE_MACHINE("r2d", r2d_machine_init)
+DEFINE_MACHINE("r2d", r2d_machine_init, NULL)
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index d4a6e917598..30d9bb7adab 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -443,4 +443,4 @@ static void leon3_generic_machine_init(MachineClass *mc)
mc->max_cpus = MAX_CPUS;
}
-DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)
+DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init, NULL)
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index d5d796c8eec..40d8dd76324 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -113,4 +113,4 @@ static void ttb_machine_init(MachineClass *mc)
mc->default_cpu_type = TRICORE_CPU_TYPE_NAME("tc1796");
}
-DEFINE_MACHINE("tricore_testboard", ttb_machine_init)
+DEFINE_MACHINE("tricore_testboard", ttb_machine_init, NULL)
diff --git a/hw/xenpv/xen_machine_pv.c b/hw/xenpv/xen_machine_pv.c
index c406821c34c..02bd32dd0f4 100644
--- a/hw/xenpv/xen_machine_pv.c
+++ b/hw/xenpv/xen_machine_pv.c
@@ -69,4 +69,4 @@ static void xenpv_machine_init(MachineClass *mc)
mc->default_machine_opts = "accel=xen";
}
-DEFINE_MACHINE("xenpv", xenpv_machine_init)
+DEFINE_MACHINE("xenpv", xenpv_machine_init, NULL)
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index 835cd04fe01..7649bde9cdb 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -131,4 +131,4 @@ static void xtensa_sim_machine_init(MachineClass *mc)
mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
}
-DEFINE_MACHINE("sim", xtensa_sim_machine_init)
+DEFINE_MACHINE("sim", xtensa_sim_machine_init, NULL)
diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c
index 271f06e0953..4f6418ff44a 100644
--- a/hw/xtensa/virt.c
+++ b/hw/xtensa/virt.c
@@ -124,4 +124,4 @@ static void xtensa_virt_machine_init(MachineClass *mc)
mc->default_nic = "virtio-net-pci";
}
-DEFINE_MACHINE("virt", xtensa_virt_machine_init)
+DEFINE_MACHINE("virt", xtensa_virt_machine_init, NULL)
diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index a745187847c..d51b49ec860 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -536,9 +536,9 @@ struct MachineState {
} \
type_init(machine_initfn##_register_types)
-#define DEFINE_MACHINE(namestr, machine_initfn) \
+#define DEFINE_MACHINE(namestr, machine_initfn, available_cb) \
DEFINE_MACHINE_EXTENDED(namestr, MACHINE, MachineState, machine_initfn, \
- false, NULL, NULL)
+ false, available_cb, NULL)
/*
* Helper for dispatching different macros based on how
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 40/47] hw/arm: filter arm machines
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (37 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 39/47] hw/core/boards.h: add available callback to DEFINE_MACHINE Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 41/47] target-info: add target_microblaze Pierrick Bouvier
` (7 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
This ensures those machines are not visible from other targets having a
different base architecture.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/arm/aspeed_ast1040_evb.c | 1 +
hw/arm/aspeed_ast10x0_evb.c | 2 ++
hw/arm/aspeed_ast2400_palmetto.c | 1 +
hw/arm/aspeed_ast2400_quanta-q71l.c | 1 +
hw/arm/aspeed_ast2400_supermicrox11.c | 1 +
hw/arm/aspeed_ast2500_evb.c | 1 +
hw/arm/aspeed_ast2500_g220a.c | 1 +
hw/arm/aspeed_ast2500_romulus.c | 1 +
hw/arm/aspeed_ast2500_supermicro-x11spi.c | 1 +
hw/arm/aspeed_ast2500_tiogapass.c | 1 +
hw/arm/aspeed_ast2500_witherspoon.c | 1 +
hw/arm/aspeed_ast2500_yosemitev2.c | 1 +
hw/arm/aspeed_ast2600_anacapa.c | 1 +
hw/arm/aspeed_ast2600_bletchley.c | 1 +
hw/arm/aspeed_ast2600_catalina.c | 1 +
hw/arm/aspeed_ast2600_evb.c | 1 +
hw/arm/aspeed_ast2600_fby35.c | 1 +
hw/arm/aspeed_ast2600_fuji.c | 1 +
hw/arm/aspeed_ast2600_gb200nvl.c | 1 +
hw/arm/aspeed_ast2600_rainier.c | 1 +
hw/arm/b-l475e-iot01a.c | 1 +
hw/arm/bananapi_m2u.c | 2 +-
hw/arm/collie.c | 1 +
hw/arm/cubieboard.c | 2 +-
hw/arm/digic_boards.c | 2 +-
hw/arm/exynos4_boards.c | 2 ++
hw/arm/imx25_pdk.c | 2 +-
hw/arm/integratorcp.c | 2 +-
hw/arm/kzm.c | 2 +-
hw/arm/max78000fthr.c | 2 +-
hw/arm/mcimx6ul-evk.c | 2 +-
hw/arm/mcimx7d-sabre.c | 2 +-
hw/arm/microbit.c | 1 +
hw/arm/mps2-tz.c | 4 ++++
hw/arm/mps2.c | 4 ++++
hw/arm/mps3r.c | 1 +
hw/arm/msf2-som.c | 2 +-
hw/arm/musca.c | 2 ++
hw/arm/musicpal.c | 2 +-
hw/arm/netduino2.c | 2 +-
hw/arm/netduinoplus2.c | 2 +-
hw/arm/npcm7xx_boards.c | 5 +++++
hw/arm/olimex-stm32-h405.c | 3 ++-
hw/arm/omap_sx1.c | 2 ++
hw/arm/orangepi.c | 2 +-
hw/arm/raspi.c | 3 +++
hw/arm/realview.c | 4 ++++
hw/arm/sabrelite.c | 1 +
hw/arm/stellaris.c | 2 ++
hw/arm/stm32vldiscovery.c | 3 ++-
hw/arm/versatilepb.c | 2 ++
hw/arm/vexpress.c | 2 ++
hw/arm/virt.c | 1 +
hw/arm/xilinx_zynq.c | 1 +
54 files changed, 78 insertions(+), 16 deletions(-)
diff --git a/hw/arm/aspeed_ast1040_evb.c b/hw/arm/aspeed_ast1040_evb.c
index 486f0f6a1ba..f8bdd22b5b7 100644
--- a/hw/arm/aspeed_ast1040_evb.c
+++ b/hw/arm/aspeed_ast1040_evb.c
@@ -80,6 +80,7 @@ static const TypeInfo aspeed_ast1040_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast1040-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast1040_evb_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast10x0_evb.c b/hw/arm/aspeed_ast10x0_evb.c
index c937bb74665..38a3dbb946d 100644
--- a/hw/arm/aspeed_ast10x0_evb.c
+++ b/hw/arm/aspeed_ast10x0_evb.c
@@ -118,10 +118,12 @@ static const TypeInfo aspeed_ast10x0_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast1030-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
+ .is_available = target_base_arm,
}, {
.name = MACHINE_TYPE_NAME("ast1060-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1060_evb_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2400_palmetto.c b/hw/arm/aspeed_ast2400_palmetto.c
index e2350e5b6ca..d4de48343d8 100644
--- a/hw/arm/aspeed_ast2400_palmetto.c
+++ b/hw/arm/aspeed_ast2400_palmetto.c
@@ -72,6 +72,7 @@ static const TypeInfo aspeed_ast2400_palmetto_types[] = {
.name = MACHINE_TYPE_NAME("palmetto-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_palmetto_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2400_quanta-q71l.c b/hw/arm/aspeed_ast2400_quanta-q71l.c
index e8cbbb8a052..2a34d7a5158 100644
--- a/hw/arm/aspeed_ast2400_quanta-q71l.c
+++ b/hw/arm/aspeed_ast2400_quanta-q71l.c
@@ -78,6 +78,7 @@ static const TypeInfo aspeed_ast2400_quanta_q71l_types[] = {
.name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_quanta_q71l_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2400_supermicrox11.c b/hw/arm/aspeed_ast2400_supermicrox11.c
index c75898cc6d1..d45cee6ed76 100644
--- a/hw/arm/aspeed_ast2400_supermicrox11.c
+++ b/hw/arm/aspeed_ast2400_supermicrox11.c
@@ -73,6 +73,7 @@ static const TypeInfo aspeed_ast2400_supermicrox11_types[] = {
.name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2500_evb.c b/hw/arm/aspeed_ast2500_evb.c
index 6ca2a36322c..7b46434bd93 100644
--- a/hw/arm/aspeed_ast2500_evb.c
+++ b/hw/arm/aspeed_ast2500_evb.c
@@ -59,6 +59,7 @@ static const TypeInfo aspeed_ast2500_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast2500-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2500_evb_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2500_g220a.c b/hw/arm/aspeed_ast2500_g220a.c
index 00bb1c61053..81181f49f19 100644
--- a/hw/arm/aspeed_ast2500_g220a.c
+++ b/hw/arm/aspeed_ast2500_g220a.c
@@ -84,6 +84,7 @@ static const TypeInfo aspeed_ast2500_g220a_types[] = {
.name = MACHINE_TYPE_NAME("g220a-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_g220a_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2500_romulus.c b/hw/arm/aspeed_ast2500_romulus.c
index 340a74408b6..680ea27279e 100644
--- a/hw/arm/aspeed_ast2500_romulus.c
+++ b/hw/arm/aspeed_ast2500_romulus.c
@@ -54,6 +54,7 @@ static const TypeInfo aspeed_ast2500_romulus_types[] = {
.name = MACHINE_TYPE_NAME("romulus-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_romulus_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2500_supermicro-x11spi.c b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
index 5a7e49d6ccd..2b27c5791f5 100644
--- a/hw/arm/aspeed_ast2500_supermicro-x11spi.c
+++ b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
@@ -69,6 +69,7 @@ static const TypeInfo aspeed_ast2500_supermicro_x11spi_types[] = {
.name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2500_tiogapass.c b/hw/arm/aspeed_ast2500_tiogapass.c
index 6cb567526c4..6e611e65a44 100644
--- a/hw/arm/aspeed_ast2500_tiogapass.c
+++ b/hw/arm/aspeed_ast2500_tiogapass.c
@@ -82,6 +82,7 @@ static const TypeInfo aspeed_ast2500_tiogapass_types[] = {
.name = MACHINE_TYPE_NAME("tiogapass-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_tiogapass_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2500_witherspoon.c b/hw/arm/aspeed_ast2500_witherspoon.c
index 26ddb673470..acf5d19c2b1 100644
--- a/hw/arm/aspeed_ast2500_witherspoon.c
+++ b/hw/arm/aspeed_ast2500_witherspoon.c
@@ -104,6 +104,7 @@ static const TypeInfo aspeed_ast2500_witherspoon_types[] = {
.name = MACHINE_TYPE_NAME("witherspoon-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_witherspoon_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2500_yosemitev2.c b/hw/arm/aspeed_ast2500_yosemitev2.c
index 3ba1ed5f6fa..94066ddda2e 100644
--- a/hw/arm/aspeed_ast2500_yosemitev2.c
+++ b/hw/arm/aspeed_ast2500_yosemitev2.c
@@ -83,6 +83,7 @@ static const TypeInfo aspeed_ast2500_yosemitev2_types[] = {
.name = MACHINE_TYPE_NAME("yosemitev2-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_yosemitev2_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2600_anacapa.c b/hw/arm/aspeed_ast2600_anacapa.c
index 697be58b0e4..4c1172a2c9e 100644
--- a/hw/arm/aspeed_ast2600_anacapa.c
+++ b/hw/arm/aspeed_ast2600_anacapa.c
@@ -367,6 +367,7 @@ static const TypeInfo aspeed_ast2600_anacapa_types[] = {
.name = MACHINE_TYPE_NAME("anacapa-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_anacapa_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2600_bletchley.c b/hw/arm/aspeed_ast2600_bletchley.c
index 2822f6bdf5a..f4579f12764 100644
--- a/hw/arm/aspeed_ast2600_bletchley.c
+++ b/hw/arm/aspeed_ast2600_bletchley.c
@@ -89,6 +89,7 @@ static const TypeInfo aspeed_ast2600_bletchley_types[] = {
.name = MACHINE_TYPE_NAME("bletchley-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_bletchley_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2600_catalina.c b/hw/arm/aspeed_ast2600_catalina.c
index 23636ab6985..4e79120d542 100644
--- a/hw/arm/aspeed_ast2600_catalina.c
+++ b/hw/arm/aspeed_ast2600_catalina.c
@@ -674,6 +674,7 @@ static const TypeInfo aspeed_ast2600_catalina_types[] = {
.name = MACHINE_TYPE_NAME("catalina-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_catalina_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2600_evb.c b/hw/arm/aspeed_ast2600_evb.c
index 8a17c4453e9..7e59e94c9e4 100644
--- a/hw/arm/aspeed_ast2600_evb.c
+++ b/hw/arm/aspeed_ast2600_evb.c
@@ -57,6 +57,7 @@ static const TypeInfo aspeed_ast2600_evb_types[] = {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2600_fby35.c b/hw/arm/aspeed_ast2600_fby35.c
index 65d98fafec6..6c17999fa14 100644
--- a/hw/arm/aspeed_ast2600_fby35.c
+++ b/hw/arm/aspeed_ast2600_fby35.c
@@ -170,6 +170,7 @@ static const TypeInfo aspeed_ast2600_fby35_types[] = {
.name = MACHINE_TYPE_NAME("fby35-bmc"),
.parent = MACHINE_TYPE_NAME("ast2600-evb"),
.class_init = aspeed_machine_fby35_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2600_fuji.c b/hw/arm/aspeed_ast2600_fuji.c
index 8a87c2dbee3..84b96a4d108 100644
--- a/hw/arm/aspeed_ast2600_fuji.c
+++ b/hw/arm/aspeed_ast2600_fuji.c
@@ -132,6 +132,7 @@ static const TypeInfo aspeed_ast2600_fuji_types[] = {
.name = MACHINE_TYPE_NAME("fuji-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fuji_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2600_gb200nvl.c b/hw/arm/aspeed_ast2600_gb200nvl.c
index 311feb82023..47eb53dd912 100644
--- a/hw/arm/aspeed_ast2600_gb200nvl.c
+++ b/hw/arm/aspeed_ast2600_gb200nvl.c
@@ -103,6 +103,7 @@ static const TypeInfo aspeed_ast2600_gb200nvl_types[] = {
.name = MACHINE_TYPE_NAME("gb200nvl-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_gb200nvl_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/aspeed_ast2600_rainier.c b/hw/arm/aspeed_ast2600_rainier.c
index 43a8f01a9e7..4e000ae98b1 100644
--- a/hw/arm/aspeed_ast2600_rainier.c
+++ b/hw/arm/aspeed_ast2600_rainier.c
@@ -190,6 +190,7 @@ static const TypeInfo aspeed_ast2600_rainier_types[] = {
.name = MACHINE_TYPE_NAME("rainier-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_rainier_class_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
index de19212ab85..1b93eb1b30f 100644
--- a/hw/arm/b-l475e-iot01a.c
+++ b/hw/arm/b-l475e-iot01a.c
@@ -131,6 +131,7 @@ static const TypeInfo bl475e_machine_type[] = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(Bl475eMachineState),
.class_init = bl475e_machine_init,
+ .is_available = target_base_arm,
}
};
diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 7b86986efb1..c72e55d6f18 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -153,4 +153,4 @@ static void bpim2u_machine_init(MachineClass *mc)
}
DEFINE_MACHINE_EXTENDED("bpim2u", MACHINE, Bpim2uMachineState,
- bpim2u_machine_init, false, NULL, NULL)
+ bpim2u_machine_init, false, target_base_arm, NULL)
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index ca6b3addb7b..a849c04b86e 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -84,6 +84,7 @@ static const TypeInfo collie_machine_typeinfo = {
.parent = TYPE_MACHINE,
.class_init = collie_machine_class_init,
.instance_size = sizeof(CollieMachineState),
+ .is_available = target_base_arm,
};
static void collie_machine_register_types(void)
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index da45bb2be52..929d4c8267f 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -134,4 +134,4 @@ static void cubieboard_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("cubieboard", MACHINE, CubieboardMachineState,
cubieboard_machine_init, false,
- NULL, NULL)
+ target_base_arm, NULL)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 5fd7ed5dc42..e600a647d62 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -145,4 +145,4 @@ static void canon_a1100_machine_init(MachineClass *mc)
mc->default_ram_id = "ram";
}
-DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init, NULL)
+DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init, target_base_arm)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index 78632877df8..f45bd419fb5 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -168,6 +168,7 @@ static const TypeInfo nuri_type = {
.name = MACHINE_TYPE_NAME("nuri"),
.parent = TYPE_MACHINE,
.class_init = nuri_class_init,
+ .is_available = target_base_arm,
};
static void smdkc210_class_init(ObjectClass *oc, const void *data)
@@ -188,6 +189,7 @@ static const TypeInfo smdkc210_type = {
.name = MACHINE_TYPE_NAME("smdkc210"),
.parent = TYPE_MACHINE,
.class_init = smdkc210_class_init,
+ .is_available = target_base_arm,
};
static void exynos4_machines_init(void)
diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c
index 50e53585447..03f1fd5078e 100644
--- a/hw/arm/imx25_pdk.c
+++ b/hw/arm/imx25_pdk.c
@@ -149,4 +149,4 @@ static void imx25_pdk_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
-DEFINE_MACHINE("imx25-pdk", imx25_pdk_machine_init, NULL)
+DEFINE_MACHINE("imx25-pdk", imx25_pdk_machine_init, target_base_arm)
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 6314bbb6c13..d575c8856e2 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -705,7 +705,7 @@ static void integratorcp_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("integratorcp", MACHINE, IntegratorcpMachineState,
integratorcp_machine_init, false,
- NULL, NULL)
+ target_base_arm, NULL)
static const Property core_properties[] = {
DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),
diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c
index 2353e73b243..aabc38c6052 100644
--- a/hw/arm/kzm.c
+++ b/hw/arm/kzm.c
@@ -137,4 +137,4 @@ static void kzm_machine_init(MachineClass *mc)
mc->default_ram_id = "kzm.ram";
}
-DEFINE_MACHINE("kzm", kzm_machine_init, NULL)
+DEFINE_MACHINE("kzm", kzm_machine_init, target_base_arm)
diff --git a/hw/arm/max78000fthr.c b/hw/arm/max78000fthr.c
index a182e1379b9..b5e46da1444 100644
--- a/hw/arm/max78000fthr.c
+++ b/hw/arm/max78000fthr.c
@@ -47,4 +47,4 @@ static void max78000_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE("max78000fthr", max78000_machine_init, NULL)
+DEFINE_MACHINE("max78000fthr", max78000_machine_init, target_base_arm)
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index f7e654b6228..eb9215f5225 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -77,4 +77,4 @@ static void mcimx6ul_evk_machine_init(MachineClass *mc)
mc->auto_create_sdcard = true;
}
-DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init, NULL)
+DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init, target_base_arm)
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 2c884b5c78f..84b293c256a 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -87,4 +87,4 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("mcimx7d-sabre", MACHINE, Mcimx7dSabreMachineState,
mcimx7d_sabre_machine_init, false,
- NULL, NULL)
+ target_base_arm, NULL)
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index c1a3f6903fe..e82ed9901d6 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -74,6 +74,7 @@ static const TypeInfo microbit_info = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(MicrobitMachineState),
.class_init = microbit_machine_class_init,
+ .is_available = target_base_arm,
};
static void microbit_machine_init(void)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index d767207e2e1..4f9a5dfe53b 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -1484,24 +1484,28 @@ static const TypeInfo mps2tz_an505_info = {
.name = TYPE_MPS2TZ_AN505_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an505_class_init,
+ .is_available = target_base_arm,
};
static const TypeInfo mps2tz_an521_info = {
.name = TYPE_MPS2TZ_AN521_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps2tz_an521_class_init,
+ .is_available = target_base_arm,
};
static const TypeInfo mps3tz_an524_info = {
.name = TYPE_MPS3TZ_AN524_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an524_class_init,
+ .is_available = target_base_arm,
};
static const TypeInfo mps3tz_an547_info = {
.name = TYPE_MPS3TZ_AN547_MACHINE,
.parent = TYPE_MPS2TZ_MACHINE,
.class_init = mps3tz_an547_class_init,
+ .is_available = target_base_arm,
};
static void mps2tz_machine_init(void)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 35d867328a9..d721cc1a436 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -567,24 +567,28 @@ static const TypeInfo mps2_an385_info = {
.name = TYPE_MPS2_AN385_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an385_class_init,
+ .is_available = target_base_arm,
};
static const TypeInfo mps2_an386_info = {
.name = TYPE_MPS2_AN386_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an386_class_init,
+ .is_available = target_base_arm,
};
static const TypeInfo mps2_an500_info = {
.name = TYPE_MPS2_AN500_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an500_class_init,
+ .is_available = target_base_arm,
};
static const TypeInfo mps2_an511_info = {
.name = TYPE_MPS2_AN511_MACHINE,
.parent = TYPE_MPS2_MACHINE,
.class_init = mps2_an511_class_init,
+ .is_available = target_base_arm,
};
static void mps2_machine_init(void)
diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
index eedb877e4bc..0f78cb6ccfb 100644
--- a/hw/arm/mps3r.c
+++ b/hw/arm/mps3r.c
@@ -634,6 +634,7 @@ static const TypeInfo mps3r_machine_types[] = {
.name = TYPE_MPS3R_AN536_MACHINE,
.parent = TYPE_MPS3R_MACHINE,
.class_init = mps3r_an536_class_init,
+ .is_available = target_base_arm,
},
};
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 92f36ce3785..f8f188574cb 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -108,4 +108,4 @@ static void emcraft_sf2_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init, NULL)
+DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init, target_base_arm)
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 571bee1b72b..67cfd92f279 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -657,12 +657,14 @@ static const TypeInfo musca_a_info = {
.name = TYPE_MUSCA_A_MACHINE,
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_a_class_init,
+ .is_available = target_base_arm,
};
static const TypeInfo musca_b1_info = {
.name = TYPE_MUSCA_B1_MACHINE,
.parent = TYPE_MUSCA_MACHINE,
.class_init = musca_b1_class_init,
+ .is_available = target_base_arm,
};
static void musca_machine_init(void)
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 52805e41892..4720377629d 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1365,7 +1365,7 @@ static void musicpal_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("musicpal", MACHINE, MusicPalMachineState,
musicpal_machine_init, false,
- NULL, NULL)
+ target_base_arm, NULL)
static void mv88w8618_wlan_class_init(ObjectClass *klass, const void *data)
{
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index 47e9e55213c..bb16dec169c 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -65,4 +65,4 @@ static void netduino2_machine_init(MachineClass *mc)
mc->ignore_memory_transaction_failures = true;
}
-DEFINE_MACHINE("netduino2", netduino2_machine_init, NULL)
+DEFINE_MACHINE("netduino2", netduino2_machine_init, target_base_arm)
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index 40701f47f09..47cef82fda6 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -65,4 +65,4 @@ static void netduinoplus2_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init, NULL)
+DEFINE_MACHINE("netduinoplus2", netduinoplus2_machine_init, target_base_arm)
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index 9c526a26839..6c4297b4a0f 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -549,22 +549,27 @@ static const TypeInfo npcm7xx_machine_types[] = {
.name = MACHINE_TYPE_NAME("npcm750-evb"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = npcm750_evb_machine_class_init,
+ .is_available = target_base_arm,
}, {
.name = MACHINE_TYPE_NAME("quanta-gsj"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gsj_machine_class_init,
+ .is_available = target_base_arm,
}, {
.name = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = gbs_bmc_machine_class_init,
+ .is_available = target_base_arm,
}, {
.name = MACHINE_TYPE_NAME("kudo-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = kudo_bmc_machine_class_init,
+ .is_available = target_base_arm,
}, {
.name = MACHINE_TYPE_NAME("mori-bmc"),
.parent = TYPE_NPCM7XX_MACHINE,
.class_init = mori_bmc_machine_class_init,
+ .is_available = target_base_arm,
},
};
diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c
index 4630f78617b..eed4e387f5e 100644
--- a/hw/arm/olimex-stm32-h405.c
+++ b/hw/arm/olimex-stm32-h405.c
@@ -71,4 +71,5 @@ static void olimex_stm32_h405_machine_init(MachineClass *mc)
mc->default_ram_size = 0;
}
-DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init, NULL)
+DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init,
+ target_base_arm)
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index a7e469ea6a3..de70f21aa77 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -225,6 +225,7 @@ static const TypeInfo sx1_machine_v2_type = {
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v2_class_init,
.instance_size = sizeof(Sx1MachineState),
+ .is_available = target_base_arm,
};
static void sx1_machine_v1_class_init(ObjectClass *oc, const void *data)
@@ -245,6 +246,7 @@ static const TypeInfo sx1_machine_v1_type = {
.parent = TYPE_MACHINE,
.class_init = sx1_machine_v1_class_init,
.instance_size = sizeof(Sx1MachineState),
+ .is_available = target_base_arm,
};
static void sx1_machine_init(void)
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index 87ed2ef4b69..dada6d95417 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -134,4 +134,4 @@ static void orangepi_machine_init(MachineClass *mc)
DEFINE_MACHINE_EXTENDED("orangepi-pc", MACHINE, OrangePiMachineState,
orangepi_machine_init, false,
- NULL, NULL)
+ target_base_arm, NULL)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index fadbacb2534..9c223efaa3f 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -391,14 +391,17 @@ static const TypeInfo raspi_machine_types[] = {
.name = MACHINE_TYPE_NAME("raspi0"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi0_machine_class_init,
+ .is_available = target_base_arm,
}, {
.name = MACHINE_TYPE_NAME("raspi1ap"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi1ap_machine_class_init,
+ .is_available = target_base_arm,
}, {
.name = MACHINE_TYPE_NAME("raspi2b"),
.parent = TYPE_RASPI_MACHINE,
.class_init = raspi2b_machine_class_init,
+ .is_available = target_base_arm,
}, {
.name = MACHINE_TYPE_NAME("raspi3ap"),
.parent = TYPE_RASPI_MACHINE,
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index ceba0331b08..63f0a9bcbaa 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -436,6 +436,7 @@ static const TypeInfo realview_eb_type = {
.parent = TYPE_MACHINE,
.class_init = realview_eb_class_init,
.instance_size = sizeof(RealViewMachineState),
+ .is_available = target_base_arm,
};
static void realview_eb_mpcore_class_init(ObjectClass *oc, const void *data)
@@ -458,6 +459,7 @@ static const TypeInfo realview_eb_mpcore_type = {
.parent = TYPE_MACHINE,
.class_init = realview_eb_mpcore_class_init,
.instance_size = sizeof(RealViewMachineState),
+ .is_available = target_base_arm,
};
static void realview_pb_a8_class_init(ObjectClass *oc, const void *data)
@@ -478,6 +480,7 @@ static const TypeInfo realview_pb_a8_type = {
.parent = TYPE_MACHINE,
.class_init = realview_pb_a8_class_init,
.instance_size = sizeof(RealViewMachineState),
+ .is_available = target_base_arm,
};
static void realview_pbx_a9_class_init(ObjectClass *oc, const void *data)
@@ -499,6 +502,7 @@ static const TypeInfo realview_pbx_a9_type = {
.parent = TYPE_MACHINE,
.class_init = realview_pbx_a9_class_init,
.instance_size = sizeof(RealViewMachineState),
+ .is_available = target_base_arm,
};
static void realview_machine_init(void)
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 05dfabd9376..57c2fda362e 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -151,6 +151,7 @@ static const TypeInfo sabrelite_machine_init_typeinfo = {
.instance_init = sabrelite_machine_instance_init,
.instance_size = sizeof(SabreliteMachineState),
.abstract = false,
+ .is_available = target_base_arm,
};
static void sabrelite_machine_init_register_types(void)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index f41315e1928..5c13a29b95e 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1427,6 +1427,7 @@ static const TypeInfo lm3s811evb_type = {
.name = MACHINE_TYPE_NAME("lm3s811evb"),
.parent = TYPE_MACHINE,
.class_init = lm3s811evb_class_init,
+ .is_available = target_base_arm,
};
/*
@@ -1448,6 +1449,7 @@ static const TypeInfo lm3s6965evb_type = {
.name = MACHINE_TYPE_NAME("lm3s6965evb"),
.parent = TYPE_MACHINE,
.class_init = lm3s6965evb_class_init,
+ .is_available = target_base_arm,
};
static void stellaris_machine_init(void)
diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c
index 35c16bda411..4bab9340942 100644
--- a/hw/arm/stm32vldiscovery.c
+++ b/hw/arm/stm32vldiscovery.c
@@ -68,4 +68,5 @@ static void stm32vldiscovery_machine_init(MachineClass *mc)
mc->valid_cpu_types = valid_cpu_types;
}
-DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init, NULL)
+DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init,
+ target_base_arm)
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index f94bf96599e..c75448f12b7 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -437,6 +437,7 @@ static const TypeInfo versatilepb_type = {
.parent = TYPE_MACHINE,
.class_init = versatilepb_class_init,
.instance_size = sizeof(VersatileMachineState),
+ .is_available = target_base_arm,
};
static void versatileab_class_init(ObjectClass *oc, const void *data)
@@ -459,6 +460,7 @@ static const TypeInfo versatileab_type = {
.parent = TYPE_MACHINE,
.class_init = versatileab_class_init,
.instance_size = sizeof(VersatileMachineState),
+ .is_available = target_base_arm,
};
static void versatile_machine_init(void)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 914cda66d20..a75a80f38b5 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -849,6 +849,7 @@ static const TypeInfo vexpress_a9_info = {
.parent = TYPE_VEXPRESS_MACHINE,
.class_init = vexpress_a9_class_init,
.instance_init = vexpress_a9_instance_init,
+ .is_available = target_base_arm,
};
static const TypeInfo vexpress_a15_info = {
@@ -856,6 +857,7 @@ static const TypeInfo vexpress_a15_info = {
.parent = TYPE_VEXPRESS_MACHINE,
.class_init = vexpress_a15_class_init,
.instance_init = vexpress_a15_instance_init,
+ .is_available = target_base_arm,
};
static void vexpress_machine_init(void)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 0871a35e11f..583b5edf9a6 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -132,6 +132,7 @@ static void arm_virt_compat_default_set(MachineClass *mc)
.name = MACHINE_VER_TYPE_NAME("virt", __VA_ARGS__), \
.parent = TYPE_VIRT_MACHINE, \
.class_init = MACHINE_VER_SYM(class_init, virt, __VA_ARGS__), \
+ .is_available = target_base_arm, \
}; \
static void MACHINE_VER_SYM(register, virt, __VA_ARGS__)(void) \
{ \
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index c1897ab1cf3..d18b6b1cd8c 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -478,6 +478,7 @@ static const TypeInfo zynq_machine_type = {
.parent = TYPE_MACHINE,
.class_init = zynq_machine_class_init,
.instance_size = sizeof(ZynqMachineState),
+ .is_available = target_base_arm,
};
static void zynq_machine_register_types(void)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 41/47] target-info: add target_microblaze
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (38 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 40/47] hw/arm: filter arm machines Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 7:16 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 42/47] hw/microblaze: filter microblaze machines Pierrick Bouvier
` (6 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/qemu/target-info.h | 7 +++++++
target-info.c | 6 ++++++
2 files changed, 13 insertions(+)
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index a60751a4ef6..e6524a8001e 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -84,6 +84,13 @@ bool target_arm(void);
*/
bool target_aarch64(void);
+/**
+ * target_microblaze:
+ *
+ * Returns whether the target architecture is Microblaze.
+ */
+bool target_microblaze(void);
+
/**
* target_base_ppc:
*
diff --git a/target-info.c b/target-info.c
index 8e9f1823dc0..1124aa5f780 100644
--- a/target-info.c
+++ b/target-info.c
@@ -78,6 +78,12 @@ bool target_aarch64(void)
return target_arch() == SYS_EMU_TARGET_AARCH64;
}
+bool target_microblaze(void)
+{
+ return target_arch() == SYS_EMU_TARGET_MICROBLAZE;
+}
+
+
bool target_base_ppc(void)
{
switch (target_arch()) {
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 41/47] target-info: add target_microblaze
2026-08-28 22:58 ` [PATCH 41/47] target-info: add target_microblaze Pierrick Bouvier
@ 2026-08-31 7:16 ` Philippe Mathieu-Daudé
2026-08-31 15:01 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 7:16 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 29/8/26 00:58, Pierrick Bouvier wrote:
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> include/qemu/target-info.h | 7 +++++++
> target-info.c | 6 ++++++
> 2 files changed, 13 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 41/47] target-info: add target_microblaze
2026-08-31 7:16 ` Philippe Mathieu-Daudé
@ 2026-08-31 15:01 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 15:01 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 31/8/26 09:16, Philippe Mathieu-Daudé wrote:
> On 29/8/26 00:58, Pierrick Bouvier wrote:
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
>> ---
>> include/qemu/target-info.h | 7 +++++++
>> target-info.c | 6 ++++++
>> 2 files changed, 13 insertions(+)
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
>
Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 42/47] hw/microblaze: filter microblaze machines
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (39 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 41/47] target-info: add target_microblaze Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 7:17 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 43/47] target/microblaze/cpu: filter microblaze cpu Pierrick Bouvier
` (5 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
This ensures other base architecture than microblaze don't see these
machines.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/microblaze/petalogix_ml605_mmu.c | 3 ++-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 1 +
hw/microblaze/xlnx-zynqmp-pmu.c | 3 ++-
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 240f5a31aa5..28180804afe 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -220,4 +220,5 @@ static void petalogix_ml605_machine_init(MachineClass *mc)
mc->init = petalogix_ml605_init;
}
-DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init, NULL)
+DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init,
+ target_microblaze)
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index c5f64319009..9e584104db9 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -190,6 +190,7 @@ static const TypeInfo petalogix_s3adsp1800_machine_types[] = {
.parent = TYPE_MACHINE,
.class_init = petalogix_s3adsp1800_machine_class_init,
.instance_size = sizeof(S3Adsp1800MachineState),
+ .is_available = target_microblaze,
},
};
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 59d34f5846e..fe82acb965b 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -185,4 +185,5 @@ static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc)
mc->init = xlnx_zynqmp_pmu_init;
}
-DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init, NULL)
+DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init,
+ target_microblaze)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 42/47] hw/microblaze: filter microblaze machines
2026-08-28 22:58 ` [PATCH 42/47] hw/microblaze: filter microblaze machines Pierrick Bouvier
@ 2026-08-31 7:17 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-08-31 7:17 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: anjo, Daniel Henrique Barboza, Peter Maydell, Paolo Bonzini,
Richard Henderson, Daniel P. Berrangé
On 29/8/26 00:58, Pierrick Bouvier wrote:
> This ensures other base architecture than microblaze don't see these
> machines.
>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
> ---
> hw/microblaze/petalogix_ml605_mmu.c | 3 ++-
> hw/microblaze/petalogix_s3adsp1800_mmu.c | 1 +
> hw/microblaze/xlnx-zynqmp-pmu.c | 3 ++-
> 3 files changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PATCH 43/47] target/microblaze/cpu: filter microblaze cpu
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (40 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 42/47] hw/microblaze: filter microblaze machines Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-31 7:17 ` Philippe Mathieu-Daudé
2026-08-28 22:58 ` [PATCH 44/47] hw: filter arm devices Pierrick Bouvier
` (4 subsequent siblings)
46 siblings, 1 reply; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
This ensures this cpu is not visible for other targets.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
target/microblaze/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 389a5124b12..4038325efbe 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -494,6 +494,7 @@ static const TypeInfo mb_cpu_type_info = {
.instance_init = mb_cpu_initfn,
.class_size = sizeof(MicroBlazeCPUClass),
.class_init = mb_cpu_class_init,
+ .is_available = target_microblaze,
};
static void mb_cpu_register_types(void)
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 44/47] hw: filter arm devices
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (41 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 43/47] target/microblaze/cpu: filter microblaze cpu Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:58 ` [PATCH 45/47] target-info: add target_config_cxl Pierrick Bouvier
` (3 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/pci-host/aspeed_pcie.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/pci-host/aspeed_pcie.c b/hw/pci-host/aspeed_pcie.c
index b46eb74234b..6a9afd9403b 100644
--- a/hw/pci-host/aspeed_pcie.c
+++ b/hw/pci-host/aspeed_pcie.c
@@ -936,6 +936,7 @@ static const TypeInfo aspeed_pcie_types[] = {
.parent = TYPE_PCIE_ROOT_PORT,
.instance_size = sizeof(AspeedPCIERootPortState),
.class_init = aspeed_pcie_root_port_class_init,
+ .is_available = target_base_arm,
},
{
.name = TYPE_ASPEED_PCIE_CFG,
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 45/47] target-info: add target_config_cxl
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (42 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 44/47] hw: filter arm devices Pierrick Bouvier
@ 2026-08-28 22:58 ` Pierrick Bouvier
2026-08-28 22:59 ` [PATCH 46/47] hw/pci-bridge: filter from CONFIG_CXL Pierrick Bouvier
` (2 subsequent siblings)
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:58 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
include/qemu/target-info-impl.h | 2 ++
include/qemu/target-info.h | 7 +++++++
target-info-def.c | 3 +++
target-info.c | 5 +++++
4 files changed, 17 insertions(+)
diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h
index 045799a771a..cf3c967e845 100644
--- a/include/qemu/target-info-impl.h
+++ b/include/qemu/target-info-impl.h
@@ -31,6 +31,8 @@ typedef struct TargetInfo {
/* runtime equivalent of TARGET_PAGE_BITS_VARY definition */
bool page_bits_vary;
+ /* CONFIG_CXL */
+ bool config_cxl;
/* CONFIG_DPCD */
bool config_dpcd;
/* CONFIG_MULTIPROCESS */
diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h
index e6524a8001e..38a419490b0 100644
--- a/include/qemu/target-info.h
+++ b/include/qemu/target-info.h
@@ -42,6 +42,13 @@ const char *target_cpu_type(void);
*/
bool target_big_endian(void);
+/**
+ * target_config_cxl:
+ *
+ * Returns true if target defines CONFIG_CXL.
+ */
+bool target_config_cxl(void);
+
/**
* target_config_dpcd:
*
diff --git a/target-info-def.c b/target-info-def.c
index 543278eb949..96ed0c7b998 100644
--- a/target-info-def.c
+++ b/target-info-def.c
@@ -43,6 +43,9 @@ static const TargetInfo target_info_stub = {
.page_bits_vary = false,
.page_bits_init = TARGET_PAGE_BITS,
#endif
+#ifdef CONFIG_CXL
+ .config_cxl = true,
+#endif
#ifdef CONFIG_DPCD
.config_dpcd = true,
#endif
diff --git a/target-info.c b/target-info.c
index 1124aa5f780..ba25112dd38 100644
--- a/target-info.c
+++ b/target-info.c
@@ -42,6 +42,11 @@ bool target_big_endian(void)
return target_endian_mode() == ENDIAN_MODE_BIG;
}
+bool target_config_cxl(void)
+{
+ return target_info()->config_cxl;
+}
+
bool target_config_dpcd(void)
{
return target_info()->config_dpcd;
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 46/47] hw/pci-bridge: filter from CONFIG_CXL
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (43 preceding siblings ...)
2026-08-28 22:58 ` [PATCH 45/47] target-info: add target_config_cxl Pierrick Bouvier
@ 2026-08-28 22:59 ` Pierrick Bouvier
2026-08-28 22:59 ` [PATCH 47/47] meson: add microblaze to single-binary Pierrick Bouvier
2026-08-28 23:13 ` [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:59 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
hw/pci-bridge/cxl_downstream.c | 1 +
hw/pci-bridge/cxl_root_port.c | 1 +
hw/pci-bridge/cxl_upstream.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/hw/pci-bridge/cxl_downstream.c b/hw/pci-bridge/cxl_downstream.c
index ec450d1aa09..a8aad11d4e5 100644
--- a/hw/pci-bridge/cxl_downstream.c
+++ b/hw/pci-bridge/cxl_downstream.c
@@ -252,6 +252,7 @@ static const TypeInfo cxl_dsp_info = {
.instance_size = sizeof(CXLDownstreamPort),
.parent = TYPE_PCIE_SLOT,
.class_init = cxl_dsp_class_init,
+ .is_available = target_config_cxl,
.interfaces = (const InterfaceInfo[]) {
{ INTERFACE_PCIE_DEVICE },
{ INTERFACE_CXL_DEVICE },
diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c
index e2093ac39ee..dfa2af7d86b 100644
--- a/hw/pci-bridge/cxl_root_port.c
+++ b/hw/pci-bridge/cxl_root_port.c
@@ -297,6 +297,7 @@ static const TypeInfo cxl_root_port_info = {
.parent = TYPE_PCIE_ROOT_PORT,
.instance_size = sizeof(CXLRootPort),
.class_init = cxl_root_port_class_init,
+ .is_available = target_config_cxl,
.interfaces = (const InterfaceInfo[]) {
{ INTERFACE_CXL_DEVICE },
{ }
diff --git a/hw/pci-bridge/cxl_upstream.c b/hw/pci-bridge/cxl_upstream.c
index 69773ff1638..d0398588e1b 100644
--- a/hw/pci-bridge/cxl_upstream.c
+++ b/hw/pci-bridge/cxl_upstream.c
@@ -400,6 +400,7 @@ static const TypeInfo cxl_usp_info = {
.parent = TYPE_PCIE_PORT,
.instance_size = sizeof(CXLUpstreamPort),
.class_init = cxl_upstream_class_init,
+ .is_available = target_config_cxl,
.interfaces = (const InterfaceInfo[]) {
{ INTERFACE_PCIE_DEVICE },
{ INTERFACE_CXL_DEVICE },
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PATCH 47/47] meson: add microblaze to single-binary
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (44 preceding siblings ...)
2026-08-28 22:59 ` [PATCH 46/47] hw/pci-bridge: filter from CONFIG_CXL Pierrick Bouvier
@ 2026-08-28 22:59 ` Pierrick Bouvier
2026-08-28 23:13 ` [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
46 siblings, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 22:59 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Pierrick Bouvier, Paolo Bonzini, Richard Henderson,
Daniel P. Berrangé
We still have many devices that are not yet filtered for target
microblaze, but the goal is to expose them.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
---
meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/meson.build b/meson.build
index 9cf441382d3..9b9f7271194 100644
--- a/meson.build
+++ b/meson.build
@@ -4258,6 +4258,7 @@ single_binary_available = false
single_binary_supported_targets = [
'aarch64-softmmu',
'arm-softmmu',
+ 'microblaze-softmmu',
]
emulators = {}
--
2.43.0
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-08-28 22:58 [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
` (45 preceding siblings ...)
2026-08-28 22:59 ` [PATCH 47/47] meson: add microblaze to single-binary Pierrick Bouvier
@ 2026-08-28 23:13 ` Pierrick Bouvier
2026-08-28 23:17 ` Pierrick Bouvier
2026-09-04 8:19 ` Daniel P. Berrangé
46 siblings, 2 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 23:13 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé,
Yonggang Luo
On 8/28/2026 3:58 PM, Pierrick Bouvier wrote:
> Now that we can link a single-binary with at least two targets (arm, aarch64),
> we want to make sure that we expose the same set of machines (later devices and
> cpus) than target binaries. For that, we implemented a static filtering based on
> target interfaces that each machine will implement to declare which targets have
> this machine.
>
> However, we discovered that this static filtering is not enough. Indeed, some
> machines and devices do not depend only on target, and their presence can depend
> on Kconfig or host/target combination. Thus, our static approach can't work, and
> we need something more flexible.
>
> The goal of this series is to focus on the filtering mechanism, not on the
> qemu-system binary itself, even though it's included here to give a full picture
> of what we are building.
>
> v3
> --
>
> Suggested by Richard, we simply use a callback added to TypeInfo.
> Added full example with a single binary for arm+aarch64, and then
> arm+aarch64+microblaze.
> Also, added scripts/single-binary-compare-cmdline.sh, which compares list of
> cpus, devices and machines between single-binary and original binaries.
> This is what we can use in CI to ensure we correctly tagged all QOM types.
>
After applying this series, and running
scripts/single-binary-compare-cmdline.sh, you'll see than many devices
are visible for microblaze, and should not.
microblaze+arm is a more interesting combination than riscv+arm because
riscv has a lot of devices in common with arm. On the opposite,
microblaze has a very reduced set (no virtio, no pci, etc).
I would like to focus the conversation on how to filter the remaining
types. We could maybe generate something directly from Kconfig output,
so we don't need boilerplate for each CONFIG_X entry.
I understand the discussion has shifted to what qemu-system and its cli
should look like. Even if we end up creating a new cli from scratch, we
still need to solve the filtering part (or at least express the
constraints in a way that allows to filter it).
Thus, I hope we can stay focus on this series, and find something that
work all together. All ideas are welcome!
Regards,
Pierrick
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-08-28 23:13 ` [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
@ 2026-08-28 23:17 ` Pierrick Bouvier
2026-09-04 8:19 ` Daniel P. Berrangé
1 sibling, 0 replies; 99+ messages in thread
From: Pierrick Bouvier @ 2026-08-28 23:17 UTC (permalink / raw)
To: qemu-devel
Cc: anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Daniel P. Berrangé,
Yonggang Luo
[-- Attachment #1: Type: text/plain, Size: 1648 bytes --]
On 8/28/2026 4:13 PM, Pierrick Bouvier wrote:
> On 8/28/2026 3:58 PM, Pierrick Bouvier wrote:
>> Now that we can link a single-binary with at least two targets (arm, aarch64),
>> we want to make sure that we expose the same set of machines (later devices and
>> cpus) than target binaries. For that, we implemented a static filtering based on
>> target interfaces that each machine will implement to declare which targets have
>> this machine.
>>
>> However, we discovered that this static filtering is not enough. Indeed, some
>> machines and devices do not depend only on target, and their presence can depend
>> on Kconfig or host/target combination. Thus, our static approach can't work, and
>> we need something more flexible.
>>
>> The goal of this series is to focus on the filtering mechanism, not on the
>> qemu-system binary itself, even though it's included here to give a full picture
>> of what we are building.
>>
>> v3
>> --
>>
>> Suggested by Richard, we simply use a callback added to TypeInfo.
>> Added full example with a single binary for arm+aarch64, and then
>> arm+aarch64+microblaze.
>> Also, added scripts/single-binary-compare-cmdline.sh, which compares list of
>> cpus, devices and machines between single-binary and original binaries.
>> This is what we can use in CI to ensure we correctly tagged all QOM types.
>>
>
> After applying this series, and running
> scripts/single-binary-compare-cmdline.sh, you'll see than many devices
> are visible for microblaze, and should not.
>
For reference, please find attached the list of devices that are not yet
filtered for qemu-system -target microblaze.
Regards,
Pierrick
[-- Attachment #2: devices.txt --]
[-- Type: text/plain, Size: 18824 bytes --]
ninja: Entering directory `build'
[1/113] Generating qemu-version.h with a custom command (wrapped by meson to capture output)
------------------------------------------------------------------
------------------------------------------------------------------
------------------------------------------------------------------
^[[1mdiff --git a/dev/fd/63 b/dev/fd/62^[[m
^[[1m--- a/dev/fd/63^[[m
^[[1m+++ b/dev/fd/62^[[m
^[[36m@@ -1,9 +1,40 @@^[[m
^[[32mController/Bridge/Hub devices:^[[m
^[[32mname "i82801b11-bridge", bus PCI^[[m
^[[32mname "ioh3420", bus PCI, desc "Intel IOH device id 3420 PCIE Root Port"^[[m
^[[32mname "pci-bridge", bus PCI, desc "Standard PCI Bridge"^[[m
^[[32mname "pci-bridge-seat", bus PCI, desc "Standard PCI Bridge (multiseat)"^[[m
^[[32mname "pcie-pci-bridge", bus PCI^[[m
^[[32mname "pcie-root-port", bus PCI, desc "PCI Express Root Port"^[[m
^[[32mname "pxb", bus PCI, desc "PCI Expander Bridge"^[[m
^[[32mname "pxb-cxl", bus PCI, desc "CXL Host Bridge"^[[m
^[[32mname "pxb-pcie", bus PCI, desc "PCI Express Expander Bridge"^[[m
^[[32mname "usb-host", bus usb-bus^[[m
^[[32mname "usb-hub", bus usb-bus^[[m
^[[32mname "x3130-upstream", bus PCI, desc "TI X3130 Upstream Port of PCI Express Switch"^[[m
^[[32mname "xio3130-downstream", bus PCI, desc "TI X3130 Downstream Port of PCI Express Switch"^[[m
^[[32mUSB devices:^[[m
^[[32mname "ich9-usb-ehci1", bus PCI^[[m
^[[32mname "ich9-usb-ehci2", bus PCI^[[m
^[[32mname "ich9-usb-uhci1", bus PCI^[[m
^[[32mname "ich9-usb-uhci2", bus PCI^[[m
^[[32mname "ich9-usb-uhci3", bus PCI^[[m
^[[32mname "ich9-usb-uhci4", bus PCI^[[m
^[[32mname "ich9-usb-uhci5", bus PCI^[[m
^[[32mname "ich9-usb-uhci6", bus PCI^[[m
^[[32mname "nec-usb-xhci", bus PCI^[[m
^[[32mname "pci-ohci", bus PCI, desc "Apple USB Controller"^[[m
^[[32mname "piix3-usb-uhci", bus PCI^[[m
^[[32mname "piix4-usb-uhci", bus PCI^[[m
^[[32mname "qemu-xhci", bus PCI^[[m
^[[32mname "usb-ehci", bus PCI^[[m
Storage devices:^[[m
name "160s33b", bus SSI, desc "Serial Flash"^[[m
name "25csm04", bus SSI, desc "Serial Flash"^[[m
name "320s33b", bus SSI, desc "Serial Flash"^[[m
name "640s33b", bus SSI, desc "Serial Flash"^[[m
^[[32mname "am53c974", bus PCI, desc "AMD Am53c974 PCscsi-PCI SCSI adapter"^[[m
name "at25128a-nonjedec", bus SSI, desc "Serial Flash"^[[m
name "at25256a-nonjedec", bus SSI, desc "Serial Flash"^[[m
name "at25df041a", bus SSI, desc "Serial Flash"^[[m
^[[36m@@ -16,6 +47,9 @@^[[m ^[[mname "at26df161a", bus SSI, desc "Serial Flash"^[[m
name "at26df321", bus SSI, desc "Serial Flash"^[[m
name "at26f004", bus SSI, desc "Serial Flash"^[[m
name "at45db081d", bus SSI, desc "Serial Flash"^[[m
^[[32mname "cxl-type3", bus PCI, desc "CXL Memory Device (Type 3)"^[[m
^[[32mname "dc390", bus PCI, desc "Tekram DC-390 SCSI adapter"^[[m
^[[32mname "emmc", bus sd-bus, desc "eMMC"^[[m
name "en25f32", bus SSI, desc "Serial Flash"^[[m
name "en25p32", bus SSI, desc "Serial Flash"^[[m
name "en25p64", bus SSI, desc "Serial Flash"^[[m
^[[36m@@ -23,6 +57,10 @@^[[m ^[[mname "en25q32b", bus SSI, desc "Serial Flash"^[[m
name "en25q64", bus SSI, desc "Serial Flash"^[[m
name "gd25q32", bus SSI, desc "Serial Flash"^[[m
name "gd25q64", bus SSI, desc "Serial Flash"^[[m
^[[32mname "ich9-ahci", bus PCI, alias "ahci"^[[m
^[[32mname "ide-cd", bus IDE, desc "virtual IDE CD-ROM"^[[m
^[[32mname "ide-cf", bus IDE, desc "virtual CompactFlash card"^[[m
^[[32mname "ide-hd", bus IDE, desc "virtual IDE disk"^[[m
name "is25lp016d", bus SSI, desc "Serial Flash"^[[m
name "is25lp032", bus SSI, desc "Serial Flash"^[[m
name "is25lp064", bus SSI, desc "Serial Flash"^[[m
^[[36m@@ -34,6 +72,8 @@^[[m ^[[mname "is25wp032", bus SSI, desc "Serial Flash"^[[m
name "is25wp064", bus SSI, desc "Serial Flash"^[[m
name "is25wp128", bus SSI, desc "Serial Flash"^[[m
name "is25wp256", bus SSI, desc "Serial Flash"^[[m
^[[32mname "lsi53c810", bus PCI^[[m
^[[32mname "lsi53c895a", bus PCI, alias "lsi"^[[m
name "m25p05", bus SSI, desc "Serial Flash"^[[m
name "m25p10", bus SSI, desc "Serial Flash"^[[m
name "m25p128", bus SSI, desc "Serial Flash"^[[m
^[[36m@@ -53,6 +93,9 @@^[[m ^[[mname "m25px64", bus SSI, desc "Serial Flash"^[[m
name "m45pe10", bus SSI, desc "Serial Flash"^[[m
name "m45pe16", bus SSI, desc "Serial Flash"^[[m
name "m45pe80", bus SSI, desc "Serial Flash"^[[m
^[[32mname "megasas", bus PCI, desc "LSI MegaRAID SAS 1078"^[[m
^[[32mname "megasas-gen2", bus PCI, desc "LSI MegaRAID SAS 2108"^[[m
^[[32mname "mptsas1068", bus PCI, desc "LSI SAS 1068"^[[m
name "mt25ql01g", bus SSI, desc "Serial Flash"^[[m
name "mt25ql02g", bus SSI, desc "Serial Flash"^[[m
name "mt25ql512ab", bus SSI, desc "Serial Flash"^[[m
^[[36m@@ -93,6 +136,11 @@^[[m ^[[mname "n25q512a", bus SSI, desc "Serial Flash"^[[m
name "n25q512a11", bus SSI, desc "Serial Flash"^[[m
name "n25q512a13", bus SSI, desc "Serial Flash"^[[m
name "n25q512ax3", bus SSI, desc "Serial Flash"^[[m
^[[32mname "nvdimm", desc "DIMM memory module"^[[m
^[[32mname "nvme", bus PCI, desc "Non-Volatile Memory Express"^[[m
^[[32mname "nvme-ns", bus nvme-bus, desc "Virtual NVMe namespace"^[[m
^[[32mname "nvme-subsys", desc "Virtual NVMe subsystem"^[[m
^[[32mname "pvscsi", bus PCI^[[m
name "s25fl016k", bus SSI, desc "Serial Flash"^[[m
name "s25fl064k", bus SSI, desc "Serial Flash"^[[m
name "s25fl129p0", bus SSI, desc "Serial Flash"^[[m
^[[36m@@ -112,6 +160,13 @@^[[m ^[[mname "s25sl12800", bus SSI, desc "Serial Flash"^[[m
name "s25sl12801", bus SSI, desc "Serial Flash"^[[m
name "s70fl01gs", bus SSI, desc "Serial Flash"^[[m
name "s70fs01gs", bus SSI, desc "Serial Flash"^[[m
^[[32mname "scsi-block", bus SCSI, desc "SCSI block device passthrough"^[[m
^[[32mname "scsi-cd", bus SCSI, desc "virtual SCSI CD-ROM"^[[m
^[[32mname "scsi-generic", bus SCSI, desc "pass through generic scsi device (/dev/sg*)"^[[m
^[[32mname "scsi-hd", bus SCSI, desc "virtual SCSI disk"^[[m
^[[32mname "sd-card", bus sd-bus^[[m
^[[32mname "sd-card-spi", bus sd-bus, desc "SD SPI"^[[m
^[[32mname "sdhci-pci", bus PCI^[[m
name "sst25vf016b", bus SSI, desc "Serial Flash"^[[m
name "sst25vf032b", bus SSI, desc "Serial Flash"^[[m
name "sst25vf040b", bus SSI, desc "Serial Flash"^[[m
^[[36m@@ -121,6 +176,37 @@^[[m ^[[mname "sst25wf020", bus SSI, desc "Serial Flash"^[[m
name "sst25wf040", bus SSI, desc "Serial Flash"^[[m
name "sst25wf080", bus SSI, desc "Serial Flash"^[[m
name "sst25wf512", bus SSI, desc "Serial Flash"^[[m
^[[32mname "ufs", bus PCI, desc "Universal Flash Storage"^[[m
^[[32mname "usb-bot", bus usb-bus^[[m
^[[32mname "usb-mtp", bus usb-bus, desc "USB Media Transfer Protocol device"^[[m
^[[32mname "usb-storage", bus usb-bus^[[m
^[[32mname "usb-uas", bus usb-bus^[[m
^[[32mname "vhost-scsi", bus virtio-bus^[[m
^[[32mname "vhost-scsi-pci", bus PCI^[[m
^[[32mname "vhost-scsi-pci-non-transitional", bus PCI^[[m
^[[32mname "vhost-scsi-pci-transitional", bus PCI^[[m
^[[32mname "vhost-user-blk", bus virtio-bus^[[m
^[[32mname "vhost-user-blk-pci", bus PCI^[[m
^[[32mname "vhost-user-blk-pci-non-transitional", bus PCI^[[m
^[[32mname "vhost-user-blk-pci-transitional", bus PCI^[[m
^[[32mname "vhost-user-fs-device", bus virtio-bus^[[m
^[[32mname "vhost-user-fs-pci", bus PCI^[[m
^[[32mname "vhost-user-scsi", bus virtio-bus^[[m
^[[32mname "vhost-user-scsi-pci", bus PCI^[[m
^[[32mname "vhost-user-scsi-pci-non-transitional", bus PCI^[[m
^[[32mname "vhost-user-scsi-pci-transitional", bus PCI^[[m
^[[32mname "virtio-9p-device", bus virtio-bus^[[m
^[[32mname "virtio-9p-pci", bus PCI^[[m
^[[32mname "virtio-9p-pci-non-transitional", bus PCI^[[m
^[[32mname "virtio-9p-pci-transitional", bus PCI^[[m
^[[32mname "virtio-blk-device", bus virtio-bus^[[m
^[[32mname "virtio-blk-pci", bus PCI^[[m
^[[32mname "virtio-blk-pci-non-transitional", bus PCI^[[m
^[[32mname "virtio-blk-pci-transitional", bus PCI^[[m
^[[32mname "virtio-scsi-device", bus virtio-bus^[[m
^[[32mname "virtio-scsi-pci", bus PCI^[[m
^[[32mname "virtio-scsi-pci-non-transitional", bus PCI^[[m
^[[32mname "virtio-scsi-pci-transitional", bus PCI^[[m
name "w25q01jvq", bus SSI, desc "Serial Flash"^[[m
name "w25q02jvm", bus SSI, desc "Serial Flash"^[[m
name "w25q256", bus SSI, desc "Serial Flash"^[[m
^[[36m@@ -138,8 +224,215 @@^[[m ^[[mname "w25x40", bus SSI, desc "Serial Flash"^[[m
name "w25x64", bus SSI, desc "Serial Flash"^[[m
name "w25x80", bus SSI, desc "Serial Flash"^[[m
^[[32mNetwork devices:^[[m
^[[32mname "e1000", bus PCI, alias "e1000-82540em", desc "Intel Gigabit Ethernet"^[[m
^[[32mname "e1000-82544gc", bus PCI, desc "Intel Gigabit Ethernet"^[[m
^[[32mname "e1000-82545em", bus PCI, desc "Intel Gigabit Ethernet"^[[m
^[[32mname "e1000e", bus PCI, desc "Intel 82574L GbE Controller"^[[m
^[[32mname "i82550", bus PCI, desc "Intel i82550 Ethernet"^[[m
^[[32mname "i82551", bus PCI, desc "Intel i82551 Ethernet"^[[m
^[[32mname "i82557a", bus PCI, desc "Intel i82557A Ethernet"^[[m
^[[32mname "i82557b", bus PCI, desc "Intel i82557B Ethernet"^[[m
^[[32mname "i82557c", bus PCI, desc "Intel i82557C Ethernet"^[[m
^[[32mname "i82558a", bus PCI, desc "Intel i82558A Ethernet"^[[m
^[[32mname "i82558b", bus PCI, desc "Intel i82558B Ethernet"^[[m
^[[32mname "i82559a", bus PCI, desc "Intel i82559A Ethernet"^[[m
^[[32mname "i82559b", bus PCI, desc "Intel i82559B Ethernet"^[[m
^[[32mname "i82559c", bus PCI, desc "Intel i82559C Ethernet"^[[m
^[[32mname "i82559er", bus PCI, desc "Intel i82559ER Ethernet"^[[m
^[[32mname "i82562", bus PCI, desc "Intel i82562 Ethernet"^[[m
^[[32mname "i82801", bus PCI, desc "Intel i82801 Ethernet"^[[m
^[[32mname "igb", bus PCI, desc "Intel 82576 Gigabit Ethernet Controller"^[[m
^[[32mname "ne2k_pci", bus PCI^[[m
^[[32mname "pcnet", bus PCI^[[m
^[[32mname "rocker", bus PCI, desc "Rocker Switch"^[[m
^[[32mname "rtl8139", bus PCI^[[m
^[[32mname "tulip", bus PCI^[[m
^[[32mname "usb-net", bus usb-bus^[[m
^[[32mname "virtio-net-device", bus virtio-bus^[[m
^[[32mname "virtio-net-pci", bus PCI^[[m
^[[32mname "virtio-net-pci-non-transitional", bus PCI^[[m
^[[32mname "virtio-net-pci-transitional", bus PCI^[[m
^[[32mname "vmxnet3", bus PCI, desc "VMWare Paravirtualized Ethernet v3"^[[m
^[[32mInput devices:^[[m
^[[32mname "ccid-card-emulated", bus ccid-bus, desc "emulated smartcard"^[[m
^[[32mname "ccid-card-passthru", bus ccid-bus, desc "passthrough smartcard"^[[m
^[[32mname "ipoctal232", bus IndustryPack, desc "GE IP-Octal 232 8-channel RS-232 IndustryPack"^[[m
^[[32mname "pci-serial", bus PCI^[[m
^[[32mname "pci-serial-2x", bus PCI^[[m
^[[32mname "pci-serial-4x", bus PCI^[[m
^[[32mname "tpci200", bus PCI, desc "TEWS TPCI200 IndustryPack carrier"^[[m
^[[32mname "usb-braille", bus usb-bus^[[m
^[[32mname "usb-ccid", bus usb-bus, desc "CCID Rev 1.1 smartcard reader"^[[m
^[[32mname "usb-kbd", bus usb-bus^[[m
^[[32mname "usb-mouse", bus usb-bus^[[m
^[[32mname "usb-serial", bus usb-bus^[[m
^[[32mname "usb-tablet", bus usb-bus^[[m
^[[32mname "usb-wacom-tablet", bus usb-bus, desc "QEMU PenPartner Tablet"^[[m
^[[32mname "vhost-user-gpio-device", bus virtio-bus^[[m
^[[32mname "vhost-user-gpio-pci", bus PCI^[[m
^[[32mname "vhost-user-i2c-device", bus virtio-bus^[[m
^[[32mname "vhost-user-i2c-pci", bus PCI^[[m
^[[32mname "vhost-user-input", bus virtio-bus^[[m
^[[32mname "vhost-user-input-pci", bus PCI^[[m
^[[32mname "vhost-user-rng", bus virtio-bus^[[m
^[[32mname "vhost-user-rng-pci", bus PCI^[[m
^[[32mname "vhost-user-scmi", bus virtio-bus^[[m
^[[32mname "vhost-user-scmi-pci", bus PCI^[[m
^[[32mname "vhost-user-spi-device", bus virtio-bus^[[m
^[[32mname "vhost-user-spi-pci", bus PCI^[[m
^[[32mname "vhost-user-test-device", bus virtio-bus^[[m
^[[32mname "vhost-user-test-device-pci", bus PCI^[[m
^[[32mname "virtconsole", bus virtio-serial-bus^[[m
^[[32mname "virtio-input-host-device", bus virtio-bus^[[m
^[[32mname "virtio-input-host-pci", bus PCI^[[m
^[[32mname "virtio-keyboard-device", bus virtio-bus^[[m
^[[32mname "virtio-keyboard-pci", bus PCI^[[m
^[[32mname "virtio-mouse-device", bus virtio-bus^[[m
^[[32mname "virtio-mouse-pci", bus PCI^[[m
^[[32mname "virtio-multitouch-device", bus virtio-bus^[[m
^[[32mname "virtio-multitouch-pci", bus PCI^[[m
^[[32mname "virtio-serial-device", bus virtio-bus^[[m
^[[32mname "virtio-serial-pci", bus PCI^[[m
^[[32mname "virtio-serial-pci-non-transitional", bus PCI^[[m
^[[32mname "virtio-serial-pci-transitional", bus PCI^[[m
^[[32mname "virtio-tablet-device", bus virtio-bus^[[m
^[[32mname "virtio-tablet-pci", bus PCI^[[m
^[[32mname "virtserialport", bus virtio-serial-bus^[[m
^[[32mDisplay devices:^[[m
^[[32mname "ati-vga", bus PCI^[[m
^[[32mname "bochs-display", bus PCI^[[m
^[[32mname "cirrus-vga", bus PCI, desc "Cirrus CLGD 54xx VGA"^[[m
^[[32mname "dm163", desc "DM163 8x3-channel constant current LED driver"^[[m
^[[32mname "led", desc "LED"^[[m
^[[32mname "ramfb", bus System, desc "ram framebuffer standalone device"^[[m
^[[32mname "secondary-vga", bus PCI^[[m
^[[32mname "ssd0323", bus SSI^[[m
^[[32mname "VGA", bus PCI^[[m
^[[32mname "vhost-user-gpu", bus virtio-bus^[[m
^[[32mname "vhost-user-gpu-pci", bus PCI^[[m
^[[32mname "virtio-gpu-device", bus virtio-bus^[[m
^[[32mname "virtio-gpu-gl-device", bus virtio-bus^[[m
^[[32mname "virtio-gpu-gl-pci", bus PCI^[[m
^[[32mname "virtio-gpu-pci", bus PCI^[[m
^[[32mSound devices:^[[m
^[[32mname "AC97", bus PCI, alias "ac97", desc "Intel 82801AA AC97 Audio"^[[m
^[[32mname "ES1370", bus PCI, alias "es1370", desc "ENSONIQ AudioPCI ES1370"^[[m
^[[32mname "hda-duplex", bus HDA, desc "HDA Audio Codec, duplex (line-out, line-in)"^[[m
^[[32mname "hda-micro", bus HDA, desc "HDA Audio Codec, duplex (speaker, microphone)"^[[m
^[[32mname "hda-output", bus HDA, desc "HDA Audio Codec, output-only (line-out)"^[[m
^[[32mname "ich9-intel-hda", bus PCI, desc "Intel HD Audio Controller (ich9)"^[[m
^[[32mname "intel-hda", bus PCI, desc "Intel HD Audio Controller (ich6)"^[[m
^[[32mname "usb-audio", bus usb-bus^[[m
^[[32mname "vhost-user-snd", bus virtio-bus^[[m
^[[32mname "vhost-user-snd-pci", bus PCI^[[m
^[[32mname "virtio-sound-device", bus virtio-bus^[[m
^[[32mname "virtio-sound-pci", bus PCI, desc "Virtio Sound"^[[m
Misc devices:^[[m
^[[32mname "acpi-erst", bus PCI, desc "ACPI Error Record Serialization Table (ERST) device"^[[m
^[[32mname "adc128d818", bus i2c-bus^[[m
^[[32mname "adm1266", bus i2c-bus, desc "Analog Devices ADM1266 Hot Swap controller"^[[m
^[[32mname "adm1272", bus i2c-bus, desc "Analog Devices ADM1272 Hot Swap controller"^[[m
^[[32mname "aspeed.i2c.slave", bus i2c-bus, desc "Aspeed I2C Bus Slave"^[[m
^[[32mname "at24c-eeprom", bus i2c-bus^[[m
^[[32mname "axp209_pmu", bus i2c-bus^[[m
^[[32mname "axp221_pmu", bus i2c-bus^[[m
^[[32mname "ctucan_pci", bus PCI, desc "CTU CAN PCI"^[[m
^[[32mname "dps310", bus i2c-bus^[[m
^[[32mname "ds1338", bus i2c-bus^[[m
^[[32mname "edu", bus PCI^[[m
^[[32mname "emc1413", bus i2c-bus^[[m
^[[32mname "emc1414", bus i2c-bus^[[m
name "guest-loader", desc "Guest Loader"^[[m
^[[32mname "i2c-ddc", bus i2c-bus^[[m
^[[32mname "i2c-echo", bus i2c-bus^[[m
^[[32mname "iommu-testdev", bus PCI, desc "A test device for IOMMU"^[[m
^[[32mname "isl69259", bus i2c-bus, desc "Renesas ISL69259 Digital Multiphase Voltage Regulator"^[[m
^[[32mname "isl69260", bus i2c-bus, desc "Renesas ISL69260 Digital Multiphase Voltage Regulator"^[[m
^[[32mname "ivshmem-doorbell", bus PCI, desc "Inter-VM shared memory"^[[m
^[[32mname "ivshmem-plain", bus PCI, desc "Inter-VM shared memory"^[[m
^[[32mname "kvaser_pci", bus PCI, desc "Kvaser PCICANx"^[[m
name "loader", desc "Generic Loader"^[[m
^[[32mname "lsm303dlhc_mag", bus i2c-bus^[[m
^[[32mname "m41t80", bus i2c-bus^[[m
^[[32mname "max31785", bus i2c-bus, desc "Maxim MAX31785 6-Channel Fan Controller"^[[m
^[[32mname "max34451", bus i2c-bus, desc "Maxim MAX34451 16-Channel V/I monitor"^[[m
^[[32mname "mioe3680_pci", bus PCI, desc "Mioe3680 PCICANx"^[[m
^[[32mname "mock-i3c-target", bus i3c-bus^[[m
^[[32mname "pca9535", bus i2c-bus^[[m
^[[32mname "pca9536", bus i2c-bus^[[m
^[[32mname "pca9546", bus i2c-bus, desc "Pca954x i2c-mux"^[[m
^[[32mname "pca9548", bus i2c-bus, desc "Pca954x i2c-mux"^[[m
^[[32mname "pca9552", bus i2c-bus^[[m
^[[32mname "pca9554", bus i2c-bus^[[m
^[[32mname "pca9555", bus i2c-bus^[[m
^[[32mname "pci-testdev", bus PCI, desc "PCI Test Device"^[[m
^[[32mname "pcm3680_pci", bus PCI, desc "Pcm3680i PCICANx"^[[m
^[[32mname "pvpanic-pci", bus PCI^[[m
^[[32mname "raa228000", bus i2c-bus, desc "Renesas 228000 Digital Multiphase Voltage Regulator"^[[m
^[[32mname "raa229004", bus i2c-bus, desc "Renesas 229004 Digital Multiphase Voltage Regulator"^[[m
^[[32mname "rs5c372", bus i2c-bus^[[m
^[[32mname "sii9022", bus i2c-bus^[[m
^[[32mname "ssd0303", bus i2c-bus^[[m
^[[32mname "tmp105", bus i2c-bus^[[m
^[[32mname "tmp421", bus i2c-bus^[[m
^[[32mname "tmp422", bus i2c-bus^[[m
^[[32mname "tmp423", bus i2c-bus^[[m
^[[32mname "tpm-tis-device", bus System^[[m
^[[32mname "tpm-tis-i2c", bus i2c-bus^[[m
^[[32mname "u2f-passthru", bus usb-bus, desc "QEMU U2F passthrough key"^[[m
name "uefi-vars-sysbus", bus System^[[m
name "uefi-vars-x64", bus System^[[m
^[[32mname "usb-redir", bus usb-bus^[[m
^[[32mname "vfio-pci", bus PCI, desc "VFIO-based PCI device assignment"^[[m
^[[32mname "vfio-pci-nohotplug", bus PCI, desc "VFIO-based PCI device assignment"^[[m
^[[32mname "vfio-user-pci", bus PCI, desc "VFIO over socket PCI device assignment"^[[m
^[[32mname "vhost-user-rtc", bus virtio-bus^[[m
^[[32mname "vhost-user-rtc-pci", bus PCI^[[m
^[[32mname "vhost-user-vsock-device", bus virtio-bus^[[m
^[[32mname "vhost-user-vsock-pci", bus PCI^[[m
^[[32mname "vhost-user-vsock-pci-non-transitional", bus PCI^[[m
^[[32mname "vhost-vdpa-device", bus virtio-bus, desc "VDPA-based generic device assignment"^[[m
^[[32mname "vhost-vdpa-device-pci", bus PCI^[[m
^[[32mname "vhost-vdpa-device-pci-non-transitional", bus PCI^[[m
^[[32mname "vhost-vdpa-device-pci-transitional", bus PCI^[[m
^[[32mname "vhost-vsock-device", bus virtio-bus^[[m
^[[32mname "vhost-vsock-pci", bus PCI^[[m
^[[32mname "vhost-vsock-pci-non-transitional", bus PCI^[[m
^[[32mname "virtio-balloon-device", bus virtio-bus^[[m
^[[32mname "virtio-balloon-pci", bus PCI^[[m
^[[32mname "virtio-balloon-pci-non-transitional", bus PCI^[[m
^[[32mname "virtio-balloon-pci-transitional", bus PCI^[[m
^[[32mname "virtio-crypto-device", bus virtio-bus^[[m
^[[32mname "virtio-crypto-pci", bus PCI^[[m
^[[32mname "virtio-iommu-device", bus virtio-bus^[[m
^[[32mname "virtio-iommu-pci", bus PCI^[[m
^[[32mname "virtio-mem", bus virtio-bus^[[m
^[[32mname "virtio-mem-pci", bus PCI^[[m
^[[32mname "virtio-rng-device", bus virtio-bus^[[m
^[[32mname "virtio-rng-pci", bus PCI^[[m
^[[32mname "virtio-rng-pci-non-transitional", bus PCI^[[m
^[[32mname "virtio-rng-pci-transitional", bus PCI^[[m
^[[32mname "virtio-rtc-device", bus virtio-bus^[[m
^[[32mname "virtio-rtc-pci", bus PCI^[[m
^[[32mname "vmcoreinfo"^[[m
^[[32mname "wm8750", bus i2c-bus^[[m
^[[32mWatchdog devices:^[[m
^[[32mname "i6300esb", bus PCI, desc "Intel 6300ESB"^[[m
^[[32mname "sbsa-gwdt", bus System, desc "SBSA-compliant generic watchdog device"^[[m
^[[32mUncategorized devices:^[[m
^[[32mname "arm-smmuv3", bus System^[[m
^[[32mname "aspeed-otp"^[[m
^[[32mname "cfam", bus fsi.bus, desc "FSI Slave"^[[m
^[[32mname "cxl-switch-mailbox-cci", bus PCI, desc "CXL Switch Mailbox CCI"^[[m
^[[32mname "fsi.master", bus opb, desc "FSI Master"^[[m
^[[32mname "fsi.scratchpad", bus fsi.lbus^[[m
^[[32mname "fsi.slave", bus fsi.bus, desc "FSI Slave"^[[m
^[[32mname "pc-dimm", desc "DIMM memory module"^[[m
^[[32mname "ufs-lu", bus ufs-bus, desc "Virtual UFS logical unit"^[[m
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-08-28 23:13 ` [PATCH 00/47] single-binary: implement dynamic filtering for QOM types Pierrick Bouvier
2026-08-28 23:17 ` Pierrick Bouvier
@ 2026-09-04 8:19 ` Daniel P. Berrangé
2026-09-04 8:58 ` Yonggang Luo
1 sibling, 1 reply; 99+ messages in thread
From: Daniel P. Berrangé @ 2026-09-04 8:19 UTC (permalink / raw)
To: Pierrick Bouvier
Cc: qemu-devel, anjo, Daniel Henrique Barboza, philmd, Peter Maydell,
Paolo Bonzini, Richard Henderson, Yonggang Luo
On Fri, Aug 28, 2026 at 04:13:32PM -0700, Pierrick Bouvier wrote:
> On 8/28/2026 3:58 PM, Pierrick Bouvier wrote:
> > Now that we can link a single-binary with at least two targets (arm, aarch64),
> > we want to make sure that we expose the same set of machines (later devices and
> > cpus) than target binaries. For that, we implemented a static filtering based on
> > target interfaces that each machine will implement to declare which targets have
> > this machine.
> >
> > However, we discovered that this static filtering is not enough. Indeed, some
> > machines and devices do not depend only on target, and their presence can depend
> > on Kconfig or host/target combination. Thus, our static approach can't work, and
> > we need something more flexible.
> >
> > The goal of this series is to focus on the filtering mechanism, not on the
> > qemu-system binary itself, even though it's included here to give a full picture
> > of what we are building.
> >
> > v3
> > --
> >
> > Suggested by Richard, we simply use a callback added to TypeInfo.
> > Added full example with a single binary for arm+aarch64, and then
> > arm+aarch64+microblaze.
> > Also, added scripts/single-binary-compare-cmdline.sh, which compares list of
> > cpus, devices and machines between single-binary and original binaries.
> > This is what we can use in CI to ensure we correctly tagged all QOM types.
> >
>
> After applying this series, and running
> scripts/single-binary-compare-cmdline.sh, you'll see than many devices
> are visible for microblaze, and should not.
>
> microblaze+arm is a more interesting combination than riscv+arm because
> riscv has a lot of devices in common with arm. On the opposite,
> microblaze has a very reduced set (no virtio, no pci, etc).
>
> I would like to focus the conversation on how to filter the remaining
> types. We could maybe generate something directly from Kconfig output,
> so we don't need boilerplate for each CONFIG_X entry.
I'm still not clear on why we need to filter the devices at all for
a new "qemu-system" binary ?
Looking at the device delta listed in your other mail, a large number
of those are PCI based. The microblaze machine types don't expose a
PCI controller, so those PCI devices are redundant / won't be used
with microblaze machines, which is why existing qemu-system-microblaze
doesn't link to those devices.
The same is true of many of the arm machines too though. Only a subset
of arm machines have PCI, but the qemu-system-arm binary still includes
and lists all these PCI devices. Users simply can't create a PCI device
for the arm machines that lack a PCI controller, or they'll receive an
error.
Why doesn't this approach extend into the future qemu-system binary ?
List everything, and if the user tries to add a device that's not
compatible with a machine, then it will simply result in an error.
It seems like much less work overall to do no filtering at all, than
trying to do per-target filtering which is the wrong granularity to
begin with, since the device usability contraints come from the
machine rather than the target.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 8:19 ` Daniel P. Berrangé
@ 2026-09-04 8:58 ` Yonggang Luo
2026-09-04 9:13 ` Peter Maydell
2026-09-04 9:45 ` Daniel P. Berrangé
0 siblings, 2 replies; 99+ messages in thread
From: Yonggang Luo @ 2026-09-04 8:58 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: Pierrick Bouvier, qemu-devel, anjo, Daniel Henrique Barboza,
philmd, Peter Maydell, Paolo Bonzini, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 4742 bytes --]
On Fri, Sep 4, 2026 at 4:19 PM Daniel P. Berrangé <berrange@redhat.com>
wrote:
>
> On Fri, Aug 28, 2026 at 04:13:32PM -0700, Pierrick Bouvier wrote:
> > On 8/28/2026 3:58 PM, Pierrick Bouvier wrote:
> > > Now that we can link a single-binary with at least two targets (arm,
aarch64),
> > > we want to make sure that we expose the same set of machines (later
devices and
> > > cpus) than target binaries. For that, we implemented a static
filtering based on
> > > target interfaces that each machine will implement to declare which
targets have
> > > this machine.
> > >
> > > However, we discovered that this static filtering is not enough.
Indeed, some
> > > machines and devices do not depend only on target, and their presence
can depend
> > > on Kconfig or host/target combination. Thus, our static approach
can't work, and
> > > we need something more flexible.
> > >
> > > The goal of this series is to focus on the filtering mechanism, not
on the
> > > qemu-system binary itself, even though it's included here to give a
full picture
> > > of what we are building.
> > >
> > > v3
> > > --
> > >
> > > Suggested by Richard, we simply use a callback added to TypeInfo.
> > > Added full example with a single binary for arm+aarch64, and then
> > > arm+aarch64+microblaze.
> > > Also, added scripts/single-binary-compare-cmdline.sh, which compares
list of
> > > cpus, devices and machines between single-binary and original
binaries.
> > > This is what we can use in CI to ensure we correctly tagged all QOM
types.
> > >
> >
> > After applying this series, and running
> > scripts/single-binary-compare-cmdline.sh, you'll see than many devices
> > are visible for microblaze, and should not.
> >
> > microblaze+arm is a more interesting combination than riscv+arm because
> > riscv has a lot of devices in common with arm. On the opposite,
> > microblaze has a very reduced set (no virtio, no pci, etc).
> >
> > I would like to focus the conversation on how to filter the remaining
> > types. We could maybe generate something directly from Kconfig output,
> > so we don't need boilerplate for each CONFIG_X entry.
>
> I'm still not clear on why we need to filter the devices at all for
> a new "qemu-system" binary ?
>
> Looking at the device delta listed in your other mail, a large number
> of those are PCI based. The microblaze machine types don't expose a
> PCI controller, so those PCI devices are redundant / won't be used
> with microblaze machines, which is why existing qemu-system-microblaze
> doesn't link to those devices.
>
> The same is true of many of the arm machines too though. Only a subset
> of arm machines have PCI, but the qemu-system-arm binary still includes
> and lists all these PCI devices. Users simply can't create a PCI device
> for the arm machines that lack a PCI controller, or they'll receive an
> error.
>
> Why doesn't this approach extend into the future qemu-system binary ?
> List everything, and if the user tries to add a device that's not
> compatible with a machine, then it will simply result in an error.
Device filtering would be complicated, I guess, as there is so much
CONFIG_* for devices. Another approach is to just place devices under an
meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be
listed(memory consumption will also be reduced when it's not needed).
But machine listings still need the filtering, considering virt is present
for many different arches(riscv/arm/i686). so machine listing is still a
thing.
The current is_avaible works fine for machines.
Pierrick is already pending the device filtering work, so I guess it's fine
now, we are just filtering the machines according to
https://lore.kernel.org/qemu-devel/20260901202043.26532-1-pierrick.bouvier@oss.qualcomm.com/
?
I also add patches based on this, so that we can list machines for
different arches(riscv/arm/i686) properly for qemu-system, as I add a
TargetInfo parameter to is_available callback.
The patches is at
https://lore.kernel.org/qemu-devel/20260903205018.975-1-luoyonggang@gmail.com/
>
> It seems like much less work overall to do no filtering at all, than
> trying to do per-target filtering which is the wrong granularity to
> begin with, since the device usability contraints come from the
> machine rather than the target.
>
> With regards,
> Daniel
> --
> |: https://berrange.com ~~ https://hachyderm.io/@berrange :|
> |: https://libvirt.org ~~ https://entangle-photo.org :|
> |: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
>
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
[-- Attachment #2: Type: text/html, Size: 5949 bytes --]
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 8:58 ` Yonggang Luo
@ 2026-09-04 9:13 ` Peter Maydell
2026-09-04 9:34 ` Yonggang Luo
` (2 more replies)
2026-09-04 9:45 ` Daniel P. Berrangé
1 sibling, 3 replies; 99+ messages in thread
From: Peter Maydell @ 2026-09-04 9:13 UTC (permalink / raw)
To: luoyonggang
Cc: Daniel P. Berrangé, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
On Fri, 4 Sept 2026 at 09:58, Yonggang Luo <luoyonggang@gmail.com> wrote:
> On Fri, Sep 4, 2026 at 4:19 PM Daniel P. Berrangé <berrange@redhat.com> wrote:
> > I'm still not clear on why we need to filter the devices at all for
> > a new "qemu-system" binary ?
> >
> > Looking at the device delta listed in your other mail, a large number
> > of those are PCI based. The microblaze machine types don't expose a
> > PCI controller, so those PCI devices are redundant / won't be used
> > with microblaze machines, which is why existing qemu-system-microblaze
> > doesn't link to those devices.
> >
> > The same is true of many of the arm machines too though. Only a subset
> > of arm machines have PCI, but the qemu-system-arm binary still includes
> > and lists all these PCI devices. Users simply can't create a PCI device
> > for the arm machines that lack a PCI controller, or they'll receive an
> > error.
> >
> > Why doesn't this approach extend into the future qemu-system binary ?
> > List everything, and if the user tries to add a device that's not
> > compatible with a machine, then it will simply result in an error.
>
> Device filtering would be complicated, I guess, as there is so much CONFIG_* for devices. Another approach is to just place devices under an meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be listed(memory consumption will also be reduced when it's not needed).
>
> But machine listings still need the filtering, considering virt is present for many different arches(riscv/arm/i686). so machine listing is still a thing.
I was wondering if maybe one way to approach that is some
"disambiguation" syntax on the machine name; so one could write
"-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
disambiguate when just "-machine virt" would be ambiguous; but if
there's only one machine of that name then just "-machine foo" would
work. That extends nicely to truly heterogenous machine names:
"-machine my-mixed-machine" wouldn't need the user to explicitly
give it a -target option or otherwise say that it includes aarch64
and microblaze CPUs. (We'd probably need to put something in to
prevent future machine name clashes across targets, so that the
only clashes are our existing legacy ones.)
This rests on the assumption that the only thing we need to
disambiguate is machine names, i.e. there aren't multiple
targets with user-facing (i.e. not easily renameable) device
names that are shared.
-- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:13 ` Peter Maydell
@ 2026-09-04 9:34 ` Yonggang Luo
2026-09-04 9:41 ` Peter Maydell
2026-09-04 9:55 ` Daniel P. Berrangé
2026-09-04 11:01 ` Markus Armbruster
2 siblings, 1 reply; 99+ messages in thread
From: Yonggang Luo @ 2026-09-04 9:34 UTC (permalink / raw)
To: Peter Maydell
Cc: Daniel P. Berrangé, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 2198 bytes --]
> I was wondering if maybe one way to approach that is some
> "disambiguation" syntax on the machine name; so one could write
> "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
That's the Proposal B: target only in -M or argv[0] (alternative)
Do not add -target. The target is always embedded in the machine
argument, or inferred from argv[0].
- qemu-system-aarch64 -M virt: single-target from argv[0].
- qemu-system -M arm:virt: single-target from -M.
- qemu-system -M virt: error (heterogeneous not supported yet).
There is no global option that selects TargetInfo before -M.
Early option parsing still has to read -M (and argv[0]) before
machines initialize, the same as proposal A reads -target.
qemu-system -M help
qemu-system -M virt # error: heterogeneous not supported
qemu-system -M arm:virt ...
qemu-system -M aarch64:virt,gic-version=3 ...
qemu-system-riscv64 -M virt ...
at:
https://lore.kernel.org/qemu-devel/CAE2XoE_-ewv3iC_MZ2sM1eKG=CUKM7MZa-ppJV0Vk1rE1h+19w@mail.gmail.com/
> disambiguate when just "-machine virt" would be ambiguous; but if
> there's only one machine of that name then just "-machine foo" would
> work. That extends nicely to truly heterogeneous machine names:
> "-machine my-mixed-machine" wouldn't need the user to explicitly
> give it a -target option or otherwise say that it includes aarch64
Seems this direction is fine, May I post experiment patches with this
direction?
The machine-filtering is still needed. and when the target is not specified
by machine parameter. The default TargetInfo will be target
SYS_EMU_TARGET_NONE. And it means emulating heterogeneous machines.
> and microblaze CPUs. (We'd probably need to put something in to
> prevent future machine name clashes across targets, so that the
> only clashes are our existing legacy ones.)
>
> This rests on the assumption that the only thing we need to
> disambiguate is machine names, i.e. there aren't multiple
> targets with user-facing (i.e. not easily renameable) device
> names that are shared.
>
> -- PMM
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
[-- Attachment #2: Type: text/html, Size: 3035 bytes --]
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:34 ` Yonggang Luo
@ 2026-09-04 9:41 ` Peter Maydell
2026-09-04 13:02 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 99+ messages in thread
From: Peter Maydell @ 2026-09-04 9:41 UTC (permalink / raw)
To: luoyonggang
Cc: Daniel P. Berrangé, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
On Fri, 4 Sept 2026 at 10:34, Yonggang Luo <luoyonggang@gmail.com> wrote:
>
>
> > I was wondering if maybe one way to approach that is some
> > "disambiguation" syntax on the machine name; so one could write
> > "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
>
> That's the Proposal B: target only in -M or argv[0] (alternative)
> Do not add -target. The target is always embedded in the machine
> argument, or inferred from argv[0].
>
> - qemu-system-aarch64 -M virt: single-target from argv[0].
> - qemu-system -M arm:virt: single-target from -M.
> - qemu-system -M virt: error (heterogeneous not supported yet).
>
> There is no global option that selects TargetInfo before -M.
> Early option parsing still has to read -M (and argv[0]) before
> machines initialize, the same as proposal A reads -target.
>
> qemu-system -M help
> qemu-system -M virt # error: heterogeneous not supported
This should be an error because it's ambiguous (and ideally
the error could include listing the possible candidates, like
"Did you mean 'riscv64:virt' or 'aarch64:virt' or 'arm:virt' ?"),
not because of anything to do with heterogenous machines. For
instance there's no reason
qemu-system -M vexpress-a9
couldn't work without a "arm:" disambiguator, as there's only one
"vexpress-a9" machine across all our target archs.
> qemu-system -M arm:virt ...
> qemu-system -M aarch64:virt,gic-version=3 ...
> qemu-system-riscv64 -M virt ...
>
> at:
> https://lore.kernel.org/qemu-devel/CAE2XoE_-ewv3iC_MZ2sM1eKG=CUKM7MZa-ppJV0Vk1rE1h+19w@mail.gmail.com/
>
>
> > disambiguate when just "-machine virt" would be ambiguous; but if
> > there's only one machine of that name then just "-machine foo" would
> > work. That extends nicely to truly heterogeneous machine names:
> > "-machine my-mixed-machine" wouldn't need the user to explicitly
> > give it a -target option or otherwise say that it includes aarch64
>
>
> Seems this direction is fine, May I post experiment patches with this direction?
> The machine-filtering is still needed. and when the target is not specified by machine parameter. The default TargetInfo will be target
> SYS_EMU_TARGET_NONE. And it means emulating heterogeneous machines.
I think we could also let the default (no target specified) work
for non-heterogenous machines, as noted above.
-- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:41 ` Peter Maydell
@ 2026-09-04 13:02 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-09-04 13:02 UTC (permalink / raw)
To: Peter Maydell, luoyonggang
Cc: Daniel P. Berrangé, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, Paolo Bonzini, Richard Henderson
On 4/9/26 11:41, Peter Maydell wrote:
> On Fri, 4 Sept 2026 at 10:34, Yonggang Luo <luoyonggang@gmail.com> wrote:
>>
>>
>>> I was wondering if maybe one way to approach that is some
>>> "disambiguation" syntax on the machine name; so one could write
>>> "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
>>
>> That's the Proposal B: target only in -M or argv[0] (alternative)
>> Do not add -target. The target is always embedded in the machine
>> argument, or inferred from argv[0].
>>
>> - qemu-system-aarch64 -M virt: single-target from argv[0].
>> - qemu-system -M arm:virt: single-target from -M.
>> - qemu-system -M virt: error (heterogeneous not supported yet).
>>
>> There is no global option that selects TargetInfo before -M.
>> Early option parsing still has to read -M (and argv[0]) before
>> machines initialize, the same as proposal A reads -target.
>>
>> qemu-system -M help
>> qemu-system -M virt # error: heterogeneous not supported
>
> This should be an error because it's ambiguous (and ideally
> the error could include listing the possible candidates, like
> "Did you mean 'riscv64:virt' or 'aarch64:virt' or 'arm:virt' ?"),
> not because of anything to do with heterogenous machines. For
> instance there's no reason
> qemu-system -M vexpress-a9
> couldn't work without a "arm:" disambiguator, as there's only one
> "vexpress-a9" machine across all our target archs.
>
>> qemu-system -M arm:virt ...
>> qemu-system -M aarch64:virt,gic-version=3 ...
I don't understand why we are discussing the CLI options and machine
names in qemu-system when nobody has a clue what qemu-system is for.
The overall discussion gives the impression qemu-system will be
helpful toward heterogenous emulation, but this is the opposite,
it hinder our work. We have identified many core problems in
QEMU APIs and planned to fixed them when needed (because too many
issues) and only expose heterogeneous-able working machines.
The current approach try to expose everything with core APIs
totally broken. If we go this way -- which I don't object at
all -- I don't plan to look at the issues reported, for my own
mental health.
>> qemu-system-riscv64 -M virt ...
>>
>> at:
>> https://lore.kernel.org/qemu-devel/CAE2XoE_-ewv3iC_MZ2sM1eKG=CUKM7MZa-ppJV0Vk1rE1h+19w@mail.gmail.com/
>>
>>
>>> disambiguate when just "-machine virt" would be ambiguous; but if
>>> there's only one machine of that name then just "-machine foo" would
>>> work. That extends nicely to truly heterogeneous machine names:
>>> "-machine my-mixed-machine" wouldn't need the user to explicitly
>>> give it a -target option or otherwise say that it includes aarch64
>>
>>
>> Seems this direction is fine, May I post experiment patches with this direction?
>> The machine-filtering is still needed. and when the target is not specified by machine parameter. The default TargetInfo will be target
>> SYS_EMU_TARGET_NONE. And it means emulating heterogeneous machines.
>
> I think we could also let the default (no target specified) work
> for non-heterogenous machines, as noted above.
>
> -- PMM
>
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:13 ` Peter Maydell
2026-09-04 9:34 ` Yonggang Luo
@ 2026-09-04 9:55 ` Daniel P. Berrangé
2026-09-04 10:04 ` Yonggang Luo
` (2 more replies)
2026-09-04 11:01 ` Markus Armbruster
2 siblings, 3 replies; 99+ messages in thread
From: Daniel P. Berrangé @ 2026-09-04 9:55 UTC (permalink / raw)
To: Peter Maydell
Cc: luoyonggang, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
On Fri, Sep 04, 2026 at 10:13:04AM +0100, Peter Maydell wrote:
> On Fri, 4 Sept 2026 at 09:58, Yonggang Luo <luoyonggang@gmail.com> wrote:
> > On Fri, Sep 4, 2026 at 4:19 PM Daniel P. Berrangé <berrange@redhat.com> wrote:
> > > I'm still not clear on why we need to filter the devices at all for
> > > a new "qemu-system" binary ?
> > >
> > > Looking at the device delta listed in your other mail, a large number
> > > of those are PCI based. The microblaze machine types don't expose a
> > > PCI controller, so those PCI devices are redundant / won't be used
> > > with microblaze machines, which is why existing qemu-system-microblaze
> > > doesn't link to those devices.
> > >
> > > The same is true of many of the arm machines too though. Only a subset
> > > of arm machines have PCI, but the qemu-system-arm binary still includes
> > > and lists all these PCI devices. Users simply can't create a PCI device
> > > for the arm machines that lack a PCI controller, or they'll receive an
> > > error.
> > >
> > > Why doesn't this approach extend into the future qemu-system binary ?
> > > List everything, and if the user tries to add a device that's not
> > > compatible with a machine, then it will simply result in an error.
> >
> > Device filtering would be complicated, I guess, as there is so much CONFIG_* for devices. Another approach is to just place devices under an meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be listed(memory consumption will also be reduced when it's not needed).
> >
> > But machine listings still need the filtering, considering virt is present for many different arches(riscv/arm/i686). so machine listing is still a thing.
>
> I was wondering if maybe one way to approach that is some
> "disambiguation" syntax on the machine name; so one could write
> "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
> disambiguate when just "-machine virt" would be ambiguous; but if
> there's only one machine of that name then just "-machine foo" would
> work.
Currently the QOM type name is directly derived from the machine
type name, just with a "-machine" suffix attached. So if the
machine name is not unique, then neither is the QOM type name.
At the very least we need the QOM type name to be unique. We
could de-couple the two to make this work though, which does
not seem too hard.
> That extends nicely to truly heterogenous machine names:
> "-machine my-mixed-machine" wouldn't need the user to explicitly
> give it a -target option or otherwise say that it includes aarch64
> and microblaze CPUs. (We'd probably need to put something in to
> prevent future machine name clashes across targets, so that the
> only clashes are our existing legacy ones.)
We don't have many examples of clashing machine names. Is there
any beyond just the 'virt' boards ? Now that we know we want
globally unique names, this feels easy enough to spot during
review.
> This rests on the assumption that the only thing we need to
> disambiguate is machine names, i.e. there aren't multiple
> targets with user-facing (i.e. not easily renameable) device
> names that are shared.
IMHO it is best if our goal is to ensure type names are unique
throughout the codebase, so hopefully we don't have clashing
device names.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:55 ` Daniel P. Berrangé
@ 2026-09-04 10:04 ` Yonggang Luo
2026-09-04 10:11 ` Daniel P. Berrangé
2026-09-04 10:23 ` Peter Maydell
2026-09-04 11:19 ` Markus Armbruster
2 siblings, 1 reply; 99+ messages in thread
From: Yonggang Luo @ 2026-09-04 10:04 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: Peter Maydell, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 5644 bytes --]
On Fri, Sep 4, 2026 at 5:55 PM Daniel P. Berrangé <berrange@redhat.com>
wrote:
>
> On Fri, Sep 04, 2026 at 10:13:04AM +0100, Peter Maydell wrote:
> > On Fri, 4 Sept 2026 at 09:58, Yonggang Luo <luoyonggang@gmail.com>
wrote:
> > > On Fri, Sep 4, 2026 at 4:19 PM Daniel P. Berrangé <berrange@redhat.com>
wrote:
> > > > I'm still not clear on why we need to filter the devices at all for
> > > > a new "qemu-system" binary ?
> > > >
> > > > Looking at the device delta listed in your other mail, a large
number
> > > > of those are PCI based. The microblaze machine types don't expose a
> > > > PCI controller, so those PCI devices are redundant / won't be used
> > > > with microblaze machines, which is why existing
qemu-system-microblaze
> > > > doesn't link to those devices.
> > > >
> > > > The same is true of many of the arm machines too though. Only a
subset
> > > > of arm machines have PCI, but the qemu-system-arm binary still
includes
> > > > and lists all these PCI devices. Users simply can't create a PCI
device
> > > > for the arm machines that lack a PCI controller, or they'll receive
an
> > > > error.
> > > >
> > > > Why doesn't this approach extend into the future qemu-system binary
?
> > > > List everything, and if the user tries to add a device that's not
> > > > compatible with a machine, then it will simply result in an error.
> > >
> > > Device filtering would be complicated, I guess, as there is so much
CONFIG_* for devices. Another approach is to just place devices under an
meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be
listed(memory consumption will also be reduced when it's not needed).
> > >
> > > But machine listings still need the filtering, considering virt is
present for many different arches(riscv/arm/i686). so machine listing is
still a thing.
> >
> > I was wondering if maybe one way to approach that is some
> > "disambiguation" syntax on the machine name; so one could write
> > "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
> > disambiguate when just "-machine virt" would be ambiguous; but if
> > there's only one machine of that name then just "-machine foo" would
> > work.
>
> Currently the QOM type name is directly derived from the machine
> type name, just with a "-machine" suffix attached. So if the
> machine name is not unique, then neither is the QOM type name.
>
> At the very least we need the QOM type name to be unique. We
> could de-couple the two to make this work though, which does
> not seem too hard.
I have did that, for example:
hw/riscv/virt.c | 3 ++-
include/hw/riscv/virt.h | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index dd396410178..5e57f9443c2 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1739,6 +1739,7 @@ static void virt_machine_class_init(ObjectClass *oc,
const void *data)
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
mc->desc = "RISC-V VirtIO board";
+ machine_class_set_name(mc, "virt");
mc->init = virt_machine_init;
mc->max_cpus = VIRT_CPUS_MAX;
mc->default_cpu_type = TYPE_RISCV_CPU_BASE;
@@ -1802,7 +1803,7 @@ static void virt_machine_class_init(ObjectClass *oc,
const void *data)
}
static const TypeInfo virt_machine_typeinfo = {
- .name = MACHINE_TYPE_NAME("virt"),
+ .name = TYPE_RISCV_VIRT_MACHINE,
.parent = TYPE_MACHINE,
.class_init = virt_machine_class_init,
.instance_init = virt_machine_instance_init,
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 7c862b0da25..9f96dd98c6a 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -30,7 +30,7 @@
#define VIRT_SOCKETS_MAX_BITS 2
#define VIRT_SOCKETS_MAX (1 << VIRT_SOCKETS_MAX_BITS)
-#define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
+#define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("riscv-virt")
typedef struct RISCVVirtState RISCVVirtState;
DECLARE_INSTANCE_CHECKER(RISCVVirtState, RISCV_VIRT_MACHINE,
TYPE_RISCV_VIRT_MACHINE)
Maybe we have a better way for it?
For device conflict, that needs to be detected after the qemu-system is
present.
>
> > That extends nicely to truly heterogenous machine names:
> > "-machine my-mixed-machine" wouldn't need the user to explicitly
> > give it a -target option or otherwise say that it includes aarch64
> > and microblaze CPUs. (We'd probably need to put something in to
> > prevent future machine name clashes across targets, so that the
> > only clashes are our existing legacy ones.)
>
> We don't have many examples of clashing machine names. Is there
> any beyond just the 'virt' boards ? Now that we know we want
> globally unique names, this feels easy enough to spot during
> review.
>
> > This rests on the assumption that the only thing we need to
> > disambiguate is machine names, i.e. there aren't multiple
> > targets with user-facing (i.e. not easily renameable) device
> > names that are shared.
>
> IMHO it is best if our goal is to ensure type names are unique
> throughout the codebase, so hopefully we don't have clashing
> device names.
>
> With regards,
> Daniel
> --
> |: https://berrange.com ~~ https://hachyderm.io/@berrange :|
> |: https://libvirt.org ~~ https://entangle-photo.org :|
> |: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
>
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
[-- Attachment #2: Type: text/html, Size: 7372 bytes --]
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 10:04 ` Yonggang Luo
@ 2026-09-04 10:11 ` Daniel P. Berrangé
2026-09-04 13:08 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 99+ messages in thread
From: Daniel P. Berrangé @ 2026-09-04 10:11 UTC (permalink / raw)
To: Yonggang Luo
Cc: Peter Maydell, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
On Fri, Sep 04, 2026 at 06:04:24PM +0800, Yonggang Luo wrote:
> On Fri, Sep 4, 2026 at 5:55 PM Daniel P. Berrangé <berrange@redhat.com>
> wrote:
> >
> > On Fri, Sep 04, 2026 at 10:13:04AM +0100, Peter Maydell wrote:
> > > On Fri, 4 Sept 2026 at 09:58, Yonggang Luo <luoyonggang@gmail.com>
> wrote:
> > > > On Fri, Sep 4, 2026 at 4:19 PM Daniel P. Berrangé <berrange@redhat.com>
> wrote:
> > > > > I'm still not clear on why we need to filter the devices at all for
> > > > > a new "qemu-system" binary ?
> > > > >
> > > > > Looking at the device delta listed in your other mail, a large
> number
> > > > > of those are PCI based. The microblaze machine types don't expose a
> > > > > PCI controller, so those PCI devices are redundant / won't be used
> > > > > with microblaze machines, which is why existing
> qemu-system-microblaze
> > > > > doesn't link to those devices.
> > > > >
> > > > > The same is true of many of the arm machines too though. Only a
> subset
> > > > > of arm machines have PCI, but the qemu-system-arm binary still
> includes
> > > > > and lists all these PCI devices. Users simply can't create a PCI
> device
> > > > > for the arm machines that lack a PCI controller, or they'll receive
> an
> > > > > error.
> > > > >
> > > > > Why doesn't this approach extend into the future qemu-system binary
> ?
> > > > > List everything, and if the user tries to add a device that's not
> > > > > compatible with a machine, then it will simply result in an error.
> > > >
> > > > Device filtering would be complicated, I guess, as there is so much
> CONFIG_* for devices. Another approach is to just place devices under an
> meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be
> listed(memory consumption will also be reduced when it's not needed).
> > > >
> > > > But machine listings still need the filtering, considering virt is
> present for many different arches(riscv/arm/i686). so machine listing is
> still a thing.
> > >
> > > I was wondering if maybe one way to approach that is some
> > > "disambiguation" syntax on the machine name; so one could write
> > > "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
> > > disambiguate when just "-machine virt" would be ambiguous; but if
> > > there's only one machine of that name then just "-machine foo" would
> > > work.
> >
> > Currently the QOM type name is directly derived from the machine
> > type name, just with a "-machine" suffix attached. So if the
> > machine name is not unique, then neither is the QOM type name.
> >
> > At the very least we need the QOM type name to be unique. We
> > could de-couple the two to make this work though, which does
> > not seem too hard.
>
> I have did that, for example:
> hw/riscv/virt.c | 3 ++-
> include/hw/riscv/virt.h | 2 +-
> 2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index dd396410178..5e57f9443c2 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -1739,6 +1739,7 @@ static void virt_machine_class_init(ObjectClass *oc,
> const void *data)
> HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
>
> mc->desc = "RISC-V VirtIO board";
> + machine_class_set_name(mc, "virt");
> mc->init = virt_machine_init;
> mc->max_cpus = VIRT_CPUS_MAX;
> mc->default_cpu_type = TYPE_RISCV_CPU_BASE;
> @@ -1802,7 +1803,7 @@ static void virt_machine_class_init(ObjectClass *oc,
> const void *data)
> }
>
> static const TypeInfo virt_machine_typeinfo = {
> - .name = MACHINE_TYPE_NAME("virt"),
> + .name = TYPE_RISCV_VIRT_MACHINE,
> .parent = TYPE_MACHINE,
> .class_init = virt_machine_class_init,
> .instance_init = virt_machine_instance_init,
> diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
> index 7c862b0da25..9f96dd98c6a 100644
> --- a/include/hw/riscv/virt.h
> +++ b/include/hw/riscv/virt.h
> @@ -30,7 +30,7 @@
> #define VIRT_SOCKETS_MAX_BITS 2
> #define VIRT_SOCKETS_MAX (1 << VIRT_SOCKETS_MAX_BITS)
>
> -#define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
> +#define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("riscv-virt")
> typedef struct RISCVVirtState RISCVVirtState;
> DECLARE_INSTANCE_CHECKER(RISCVVirtState, RISCV_VIRT_MACHINE,
> TYPE_RISCV_VIRT_MACHINE)
>
>
> Maybe we have a better way for it?
>
> For device conflict, that needs to be detected after the qemu-system is
> present.
Our existing qom-test should already be validate that in fact, if we
run them against the qemu-system binary, aas it'll start
'qemu-system -machine none' and list all QOM types & properties,
at least for the targets & associated devices that we have converted
to work with 'qemu-system'. Best coverage would require all targets
to be converted but we don't have to get there straightaway.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 10:11 ` Daniel P. Berrangé
@ 2026-09-04 13:08 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-09-04 13:08 UTC (permalink / raw)
To: Daniel P. Berrangé, Yonggang Luo
Cc: Peter Maydell, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, Paolo Bonzini, Richard Henderson,
Alex Bennée, Markus Armbruster, Mark Cave-Ayland
On 4/9/26 12:11, Daniel P. Berrangé wrote:
> On Fri, Sep 04, 2026 at 06:04:24PM +0800, Yonggang Luo wrote:
>> On Fri, Sep 4, 2026 at 5:55 PM Daniel P. Berrangé <berrange@redhat.com>
>> wrote:
>>>
>>> On Fri, Sep 04, 2026 at 10:13:04AM +0100, Peter Maydell wrote:
>>>> On Fri, 4 Sept 2026 at 09:58, Yonggang Luo <luoyonggang@gmail.com>
>> wrote:
>>>>> On Fri, Sep 4, 2026 at 4:19 PM Daniel P. Berrangé <berrange@redhat.com>
>> wrote:
>>>>>> I'm still not clear on why we need to filter the devices at all for
>>>>>> a new "qemu-system" binary ?
>>>>>>
>>>>>> Looking at the device delta listed in your other mail, a large
>> number
>>>>>> of those are PCI based. The microblaze machine types don't expose a
>>>>>> PCI controller, so those PCI devices are redundant / won't be used
>>>>>> with microblaze machines, which is why existing
>> qemu-system-microblaze
>>>>>> doesn't link to those devices.
>>>>>>
>>>>>> The same is true of many of the arm machines too though. Only a
>> subset
>>>>>> of arm machines have PCI, but the qemu-system-arm binary still
>> includes
>>>>>> and lists all these PCI devices. Users simply can't create a PCI
>> device
>>>>>> for the arm machines that lack a PCI controller, or they'll receive
>> an
>>>>>> error.
>>>>>>
>>>>>> Why doesn't this approach extend into the future qemu-system binary
>> ?
>>>>>> List everything, and if the user tries to add a device that's not
>>>>>> compatible with a machine, then it will simply result in an error.
>>>>>
>>>>> Device filtering would be complicated, I guess, as there is so much
>> CONFIG_* for devices. Another approach is to just place devices under an
>> meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be
>> listed(memory consumption will also be reduced when it's not needed).
>>>>>
>>>>> But machine listings still need the filtering, considering virt is
>> present for many different arches(riscv/arm/i686). so machine listing is
>> still a thing.
>>>>
>>>> I was wondering if maybe one way to approach that is some
>>>> "disambiguation" syntax on the machine name; so one could write
>>>> "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
>>>> disambiguate when just "-machine virt" would be ambiguous; but if
>>>> there's only one machine of that name then just "-machine foo" would
>>>> work.
>>>
>>> Currently the QOM type name is directly derived from the machine
>>> type name, just with a "-machine" suffix attached. So if the
>>> machine name is not unique, then neither is the QOM type name.
>>>
>>> At the very least we need the QOM type name to be unique. We
>>> could de-couple the two to make this work though, which does
>>> not seem too hard.
>>
>> I have did that, for example:
>> hw/riscv/virt.c | 3 ++-
>> include/hw/riscv/virt.h | 2 +-
>> 2 files changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
>> index dd396410178..5e57f9443c2 100644
>> --- a/hw/riscv/virt.c
>> +++ b/hw/riscv/virt.c
>> @@ -1739,6 +1739,7 @@ static void virt_machine_class_init(ObjectClass *oc,
>> const void *data)
>> HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
>>
>> mc->desc = "RISC-V VirtIO board";
>> + machine_class_set_name(mc, "virt");
>> mc->init = virt_machine_init;
>> mc->max_cpus = VIRT_CPUS_MAX;
>> mc->default_cpu_type = TYPE_RISCV_CPU_BASE;
>> @@ -1802,7 +1803,7 @@ static void virt_machine_class_init(ObjectClass *oc,
>> const void *data)
>> }
>>
>> static const TypeInfo virt_machine_typeinfo = {
>> - .name = MACHINE_TYPE_NAME("virt"),
>> + .name = TYPE_RISCV_VIRT_MACHINE,
>> .parent = TYPE_MACHINE,
>> .class_init = virt_machine_class_init,
>> .instance_init = virt_machine_instance_init,
>> diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
>> index 7c862b0da25..9f96dd98c6a 100644
>> --- a/include/hw/riscv/virt.h
>> +++ b/include/hw/riscv/virt.h
>> @@ -30,7 +30,7 @@
>> #define VIRT_SOCKETS_MAX_BITS 2
>> #define VIRT_SOCKETS_MAX (1 << VIRT_SOCKETS_MAX_BITS)
>>
>> -#define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
>> +#define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("riscv-virt")
>> typedef struct RISCVVirtState RISCVVirtState;
>> DECLARE_INSTANCE_CHECKER(RISCVVirtState, RISCV_VIRT_MACHINE,
>> TYPE_RISCV_VIRT_MACHINE)
>>
>>
>> Maybe we have a better way for it?
>>
>> For device conflict, that needs to be detected after the qemu-system is
>> present.
>
> Our existing qom-test should already be validate that in fact, if we
> run them against the qemu-system binary, aas it'll start
> 'qemu-system -machine none' and list all QOM types & properties,
> at least for the targets & associated devices that we have converted
> to work with 'qemu-system'. Best coverage would require all targets
> to be converted but we don't have to get there straightaway.
I feel the whole series discussion derailed. Can we start a new design
thread to clarify what people want? Apparently we don't refer to the
same understanding of what "qemu-system" binary is or aim for.
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:55 ` Daniel P. Berrangé
2026-09-04 10:04 ` Yonggang Luo
@ 2026-09-04 10:23 ` Peter Maydell
2026-09-04 10:33 ` Daniel P. Berrangé
2026-09-04 11:19 ` Markus Armbruster
2 siblings, 1 reply; 99+ messages in thread
From: Peter Maydell @ 2026-09-04 10:23 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: luoyonggang, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
On Fri, 4 Sept 2026 at 10:55, Daniel P. Berrangé <berrange@redhat.com> wrote:
>
> On Fri, Sep 04, 2026 at 10:13:04AM +0100, Peter Maydell wrote:
> > That extends nicely to truly heterogenous machine names:
> > "-machine my-mixed-machine" wouldn't need the user to explicitly
> > give it a -target option or otherwise say that it includes aarch64
> > and microblaze CPUs. (We'd probably need to put something in to
> > prevent future machine name clashes across targets, so that the
> > only clashes are our existing legacy ones.)
>
> We don't have many examples of clashing machine names. Is there
> any beyond just the 'virt' boards ? Now that we know we want
> globally unique names, this feels easy enough to spot during
> review.
Yeah; but if it's easy to have it automatically detected during
"make check" then that's more reliable than catching it by
eye in code review, especially as most target-architecture
reviewers are probably not very familiar with machine names used
by other architectures.
> > This rests on the assumption that the only thing we need to
> > disambiguate is machine names, i.e. there aren't multiple
> > targets with user-facing (i.e. not easily renameable) device
> > names that are shared.
>
> IMHO it is best if our goal is to ensure type names are unique
> throughout the codebase, so hopefully we don't have clashing
> device names.
Yes, that's certainly what I'd hope we have; but if you told
me "actually it turns out that architectures foo and bar
both have a simple interrupt controller they named 'intc'"
I wouldn't be super surprised :-)
-- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 10:23 ` Peter Maydell
@ 2026-09-04 10:33 ` Daniel P. Berrangé
0 siblings, 0 replies; 99+ messages in thread
From: Daniel P. Berrangé @ 2026-09-04 10:33 UTC (permalink / raw)
To: Peter Maydell
Cc: luoyonggang, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
On Fri, Sep 04, 2026 at 11:23:12AM +0100, Peter Maydell wrote:
> On Fri, 4 Sept 2026 at 10:55, Daniel P. Berrangé <berrange@redhat.com> wrote:
> >
> > On Fri, Sep 04, 2026 at 10:13:04AM +0100, Peter Maydell wrote:
> > > That extends nicely to truly heterogenous machine names:
> > > "-machine my-mixed-machine" wouldn't need the user to explicitly
> > > give it a -target option or otherwise say that it includes aarch64
> > > and microblaze CPUs. (We'd probably need to put something in to
> > > prevent future machine name clashes across targets, so that the
> > > only clashes are our existing legacy ones.)
> >
> > We don't have many examples of clashing machine names. Is there
> > any beyond just the 'virt' boards ? Now that we know we want
> > globally unique names, this feels easy enough to spot during
> > review.
>
> Yeah; but if it's easy to have it automatically detected during
> "make check" then that's more reliable than catching it by
> eye in code review, especially as most target-architecture
> reviewers are probably not very familiar with machine names used
> by other architectures.
>
> > > This rests on the assumption that the only thing we need to
> > > disambiguate is machine names, i.e. there aren't multiple
> > > targets with user-facing (i.e. not easily renameable) device
> > > names that are shared.
> >
> > IMHO it is best if our goal is to ensure type names are unique
> > throughout the codebase, so hopefully we don't have clashing
> > device names.
>
> Yes, that's certainly what I'd hope we have; but if you told
> me "actually it turns out that architectures foo and bar
> both have a simple interrupt controller they named 'intc'"
> I wouldn't be super surprised :-)
With a bit of grepping for TypeInfo declarations and TYPE_ constants
I found on possible clash in "openprom" which is defined separately
for sparc sun4m and sparc64 sun4u machines. Possibly those ought to
be using some common parent, but since they're built-in devices we
can likely just rename them to be unique.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:55 ` Daniel P. Berrangé
2026-09-04 10:04 ` Yonggang Luo
2026-09-04 10:23 ` Peter Maydell
@ 2026-09-04 11:19 ` Markus Armbruster
2026-09-04 11:27 ` Daniel P. Berrangé
2 siblings, 1 reply; 99+ messages in thread
From: Markus Armbruster @ 2026-09-04 11:19 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: Peter Maydell, luoyonggang, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
Daniel P. Berrangé <berrange@redhat.com> writes:
> Currently the QOM type name is directly derived from the machine
> type name, just with a "-machine" suffix attached. So if the
> machine name is not unique, then neither is the QOM type name.
>
> At the very least we need the QOM type name to be unique. We
> could de-couple the two to make this work though, which does
> not seem too hard.
[...]
> We don't have many examples of clashing machine names. Is there
> any beyond just the 'virt' boards ? Now that we know we want
> globally unique names, this feels easy enough to spot during
> review.
I checked -machine help for all qemu-system-T, and it seems to be just
"none", "virt" and "virt-VERSION", not counting duplicates between
architecture variants such as aarch64 and arm, x86_64 and i386, and so
forth.
>> This rests on the assumption that the only thing we need to
>> disambiguate is machine names, i.e. there aren't multiple
>> targets with user-facing (i.e. not easily renameable) device
>> names that are shared.
>
> IMHO it is best if our goal is to ensure type names are unique
> throughout the codebase, so hopefully we don't have clashing
> device names.
Yes.
Quick glance at type_new():
if (type_table_lookup(info->name) != NULL) {
fprintf(stderr, "Registering `%s' which already exists\n", info->name);
abort();
}
If we have duplicate type names, they won't survive being linked
together in a single binary.
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 11:19 ` Markus Armbruster
@ 2026-09-04 11:27 ` Daniel P. Berrangé
2026-09-04 11:55 ` Markus Armbruster
0 siblings, 1 reply; 99+ messages in thread
From: Daniel P. Berrangé @ 2026-09-04 11:27 UTC (permalink / raw)
To: Markus Armbruster
Cc: Peter Maydell, luoyonggang, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
On Fri, Sep 04, 2026 at 01:19:19PM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé <berrange@redhat.com> writes:
>
> > Currently the QOM type name is directly derived from the machine
> > type name, just with a "-machine" suffix attached. So if the
> > machine name is not unique, then neither is the QOM type name.
> >
> > At the very least we need the QOM type name to be unique. We
> > could de-couple the two to make this work though, which does
> > not seem too hard.
>
> [...]
>
> > We don't have many examples of clashing machine names. Is there
> > any beyond just the 'virt' boards ? Now that we know we want
> > globally unique names, this feels easy enough to spot during
> > review.
>
> I checked -machine help for all qemu-system-T, and it seems to be just
> "none", "virt" and "virt-VERSION", not counting duplicates between
> architecture variants such as aarch64 and arm, x86_64 and i386, and so
> forth.
>
> >> This rests on the assumption that the only thing we need to
> >> disambiguate is machine names, i.e. there aren't multiple
> >> targets with user-facing (i.e. not easily renameable) device
> >> names that are shared.
> >
> > IMHO it is best if our goal is to ensure type names are unique
> > throughout the codebase, so hopefully we don't have clashing
> > device names.
>
> Yes.
>
> Quick glance at type_new():
>
> if (type_table_lookup(info->name) != NULL) {
> fprintf(stderr, "Registering `%s' which already exists\n", info->name);
> abort();
> }
>
> If we have duplicate type names, they won't survive being linked
> together in a single binary.
If we want perfect testing coverage, then the main constraint here
is how quickly we get to a point where 'qemu-system' can build with
all targets. I don't that's a show stopper though, as the uniqueness
only becomes a real problem as we enable each new target in the single
binary. We don't appear to have many examples of existing clashes to
suggest it is a major problem to solve any sooner.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 11:27 ` Daniel P. Berrangé
@ 2026-09-04 11:55 ` Markus Armbruster
2026-09-04 13:05 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 99+ messages in thread
From: Markus Armbruster @ 2026-09-04 11:55 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: Markus Armbruster, Peter Maydell, luoyonggang, Pierrick Bouvier,
qemu-devel, anjo, Daniel Henrique Barboza, philmd, Paolo Bonzini,
Richard Henderson
Daniel P. Berrangé <berrange@redhat.com> writes:
> On Fri, Sep 04, 2026 at 01:19:19PM +0200, Markus Armbruster wrote:
>> Daniel P. Berrangé <berrange@redhat.com> writes:
[...]
>> > IMHO it is best if our goal is to ensure type names are unique
>> > throughout the codebase, so hopefully we don't have clashing
>> > device names.
>>
>> Yes.
>>
>> Quick glance at type_new():
>>
>> if (type_table_lookup(info->name) != NULL) {
>> fprintf(stderr, "Registering `%s' which already exists\n", info->name);
>> abort();
>> }
>>
>> If we have duplicate type names, they won't survive being linked
>> together in a single binary.
>
> If we want perfect testing coverage, then the main constraint here
> is how quickly we get to a point where 'qemu-system' can build with
> all targets. I don't that's a show stopper though, as the uniqueness
> only becomes a real problem as we enable each new target in the single
> binary. We don't appear to have many examples of existing clashes to
> suggest it is a major problem to solve any sooner.
Agree!
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 11:55 ` Markus Armbruster
@ 2026-09-04 13:05 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-09-04 13:05 UTC (permalink / raw)
To: Markus Armbruster, Daniel P. Berrangé
Cc: Peter Maydell, luoyonggang, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, Paolo Bonzini, Richard Henderson
On 4/9/26 13:55, Markus Armbruster wrote:
> Daniel P. Berrangé <berrange@redhat.com> writes:
>
>> On Fri, Sep 04, 2026 at 01:19:19PM +0200, Markus Armbruster wrote:
>>> Daniel P. Berrangé <berrange@redhat.com> writes:
>
> [...]
>
>>>> IMHO it is best if our goal is to ensure type names are unique
>>>> throughout the codebase, so hopefully we don't have clashing
>>>> device names.
>>>
>>> Yes.
>>>
>>> Quick glance at type_new():
>>>
>>> if (type_table_lookup(info->name) != NULL) {
>>> fprintf(stderr, "Registering `%s' which already exists\n", info->name);
>>> abort();
>>> }
>>>
>>> If we have duplicate type names, they won't survive being linked
>>> together in a single binary.
>>
>> If we want perfect testing coverage, then the main constraint here
>> is how quickly we get to a point where 'qemu-system' can build with
>> all targets. I don't that's a show stopper though, as the uniqueness
>> only becomes a real problem as we enable each new target in the single
>> binary. We don't appear to have many examples of existing clashes to
>> suggest it is a major problem to solve any sooner.
The only thing I see useful for a 'qemu-system' binary is to report
"sorry must be run with -target foo" then either have a script for
each qemu-system-foo which call 'qemu-system -target foo' or use
symlink and parse argv. No need to alter the test suite at all.
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:13 ` Peter Maydell
2026-09-04 9:34 ` Yonggang Luo
2026-09-04 9:55 ` Daniel P. Berrangé
@ 2026-09-04 11:01 ` Markus Armbruster
2026-09-04 11:06 ` Daniel P. Berrangé
2 siblings, 1 reply; 99+ messages in thread
From: Markus Armbruster @ 2026-09-04 11:01 UTC (permalink / raw)
To: Peter Maydell
Cc: luoyonggang, Daniel P. Berrangé, Pierrick Bouvier,
qemu-devel, anjo, Daniel Henrique Barboza, philmd, Paolo Bonzini,
Richard Henderson
Peter Maydell <peter.maydell@linaro.org> writes:
> I was wondering if maybe one way to approach that is some
> "disambiguation" syntax on the machine name; so one could write
> "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
> disambiguate when just "-machine virt" would be ambiguous; but if
> there's only one machine of that name then just "-machine foo" would
> work. That extends nicely to truly heterogenous machine names:
> "-machine my-mixed-machine" wouldn't need the user to explicitly
> give it a -target option or otherwise say that it includes aarch64
> and microblaze CPUs. (We'd probably need to put something in to
> prevent future machine name clashes across targets, so that the
> only clashes are our existing legacy ones.)
Do we need new syntax?
Rename the clashing machine types, keeping the old name as alias. When
getting a machine by name, require the name to be unambiguous.
> This rests on the assumption that the only thing we need to
> disambiguate is machine names, i.e. there aren't multiple
> targets with user-facing (i.e. not easily renameable) device
> names that are shared.
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 11:01 ` Markus Armbruster
@ 2026-09-04 11:06 ` Daniel P. Berrangé
0 siblings, 0 replies; 99+ messages in thread
From: Daniel P. Berrangé @ 2026-09-04 11:06 UTC (permalink / raw)
To: Markus Armbruster
Cc: Peter Maydell, luoyonggang, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Paolo Bonzini, Richard Henderson
On Fri, Sep 04, 2026 at 01:01:03PM +0200, Markus Armbruster wrote:
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > I was wondering if maybe one way to approach that is some
> > "disambiguation" syntax on the machine name; so one could write
> > "-machine aarch64:virt" vs "-machine riscv64:virt" (or whatever) to
> > disambiguate when just "-machine virt" would be ambiguous; but if
> > there's only one machine of that name then just "-machine foo" would
> > work. That extends nicely to truly heterogenous machine names:
> > "-machine my-mixed-machine" wouldn't need the user to explicitly
> > give it a -target option or otherwise say that it includes aarch64
> > and microblaze CPUs. (We'd probably need to put something in to
> > prevent future machine name clashes across targets, so that the
> > only clashes are our existing legacy ones.)
>
> Do we need new syntax?
>
> Rename the clashing machine types, keeping the old name as alias. When
> getting a machine by name, require the name to be unambiguous.
This probably requires us to support more than 1 alias per machine.
Specifically with aarch64 we have:
virt QEMU 11.2 ARM Virtual Machine (alias of virt-11.2)
so we need to rename "virt-11.2" but have already used its "alias"
feature for "virt", which would also need renaming
ie we would need
arm-virt-11.2
with aliases
virt-11.2
arm-virt
virt
So is it better to extend the alias feature, or have the new -machine
syntax ?
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 8:58 ` Yonggang Luo
2026-09-04 9:13 ` Peter Maydell
@ 2026-09-04 9:45 ` Daniel P. Berrangé
2026-09-04 11:25 ` Markus Armbruster
1 sibling, 1 reply; 99+ messages in thread
From: Daniel P. Berrangé @ 2026-09-04 9:45 UTC (permalink / raw)
To: Yonggang Luo
Cc: Pierrick Bouvier, qemu-devel, anjo, Daniel Henrique Barboza,
philmd, Peter Maydell, Paolo Bonzini, Richard Henderson
On Fri, Sep 04, 2026 at 04:58:10PM +0800, Yonggang Luo wrote:
> On Fri, Sep 4, 2026 at 4:19 PM Daniel P. Berrangé <berrange@redhat.com>
> wrote:
> >
> > On Fri, Aug 28, 2026 at 04:13:32PM -0700, Pierrick Bouvier wrote:
> > > On 8/28/2026 3:58 PM, Pierrick Bouvier wrote:
> > > > Now that we can link a single-binary with at least two targets (arm,
> aarch64),
> > > > we want to make sure that we expose the same set of machines (later
> devices and
> > > > cpus) than target binaries. For that, we implemented a static
> filtering based on
> > > > target interfaces that each machine will implement to declare which
> targets have
> > > > this machine.
> > > >
> > > > However, we discovered that this static filtering is not enough.
> Indeed, some
> > > > machines and devices do not depend only on target, and their presence
> can depend
> > > > on Kconfig or host/target combination. Thus, our static approach
> can't work, and
> > > > we need something more flexible.
> > > >
> > > > The goal of this series is to focus on the filtering mechanism, not
> on the
> > > > qemu-system binary itself, even though it's included here to give a
> full picture
> > > > of what we are building.
> > > >
> > > > v3
> > > > --
> > > >
> > > > Suggested by Richard, we simply use a callback added to TypeInfo.
> > > > Added full example with a single binary for arm+aarch64, and then
> > > > arm+aarch64+microblaze.
> > > > Also, added scripts/single-binary-compare-cmdline.sh, which compares
> list of
> > > > cpus, devices and machines between single-binary and original
> binaries.
> > > > This is what we can use in CI to ensure we correctly tagged all QOM
> types.
> > > >
> > >
> > > After applying this series, and running
> > > scripts/single-binary-compare-cmdline.sh, you'll see than many devices
> > > are visible for microblaze, and should not.
> > >
> > > microblaze+arm is a more interesting combination than riscv+arm because
> > > riscv has a lot of devices in common with arm. On the opposite,
> > > microblaze has a very reduced set (no virtio, no pci, etc).
> > >
> > > I would like to focus the conversation on how to filter the remaining
> > > types. We could maybe generate something directly from Kconfig output,
> > > so we don't need boilerplate for each CONFIG_X entry.
> >
> > I'm still not clear on why we need to filter the devices at all for
> > a new "qemu-system" binary ?
> >
> > Looking at the device delta listed in your other mail, a large number
> > of those are PCI based. The microblaze machine types don't expose a
> > PCI controller, so those PCI devices are redundant / won't be used
> > with microblaze machines, which is why existing qemu-system-microblaze
> > doesn't link to those devices.
> >
> > The same is true of many of the arm machines too though. Only a subset
> > of arm machines have PCI, but the qemu-system-arm binary still includes
> > and lists all these PCI devices. Users simply can't create a PCI device
> > for the arm machines that lack a PCI controller, or they'll receive an
> > error.
> >
> > Why doesn't this approach extend into the future qemu-system binary ?
> > List everything, and if the user tries to add a device that's not
> > compatible with a machine, then it will simply result in an error.
>
> Device filtering would be complicated, I guess, as there is so much
> CONFIG_* for devices. Another approach is to just place devices under an
> meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be
> listed(memory consumption will also be reduced when it's not needed).
While modules are important for reducing memory consumption, I don't think
they need to be a blocker - making more things into modules can be done
in the backaround as & when people want to work on it.
> But machine listings still need the filtering, considering virt is present
> for many different arches(riscv/arm/i686). so machine listing is still a
> thing.
We still need the ability to query all machines present in the binary
and what targets they can be used with, for the purposes of introspection,
which the filtering doesn't allow for AFAICT. Renaming the clashing
machine names looks inescapable for the new qemu-system binary.
> The current is_avaible works fine for machines.
> Pierrick is already pending the device filtering work, so I guess it's fine
> now, we are just filtering the machines according to
> https://lore.kernel.org/qemu-devel/20260901202043.26532-1-pierrick.bouvier@oss.qualcomm.com/
> ?
>
> I also add patches based on this, so that we can list machines for
> different arches(riscv/arm/i686) properly for qemu-system, as I add a
> TargetInfo parameter to is_available callback.
> The patches is at
> https://lore.kernel.org/qemu-devel/20260903205018.975-1-luoyonggang@gmail.com/
For listing machines I'd expect to see the "MachineInfo" QAPI type
gain a "targets" parameter. eg something like this:
diff --git a/qapi/machine.json b/qapi/machine.json
index 2d63c1bac3..a614baa03a 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -195,6 +195,7 @@
# @compat-props: The machine type's compatibility properties. Only
# present when `query-machines` argument @compat-props is true.
# (since 9.1)
+# @targets: list of targets that can run this machine (since 11.2)
#
# Features:
#
@@ -207,6 +208,7 @@
'*is-default': 'bool', 'cpu-max': 'int',
'hotpluggable-cpus': 'bool', 'numa-mem-supported': 'bool',
'deprecated': 'bool', '*default-cpu-type': 'str',
+ 'targets': ['SysEmuTarget'],
'*default-ram-id': 'str', 'acpi': 'bool',
'*compat-props': { 'type': ['CompatProperty'],
'features': ['unstable'] } } }
which can be populated from the machine class
diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c
index 543dd3201b..4852be25ca 100644
--- a/hw/core/machine-qmp-cmds.c
+++ b/hw/core/machine-qmp-cmds.c
@@ -104,6 +104,8 @@ MachineInfoList *qmp_query_machines(bool has_compat_props, bool compat_props,
MachineClass *mc = el->data;
const char *default_cpu_type = machine_class_default_cpu_type(mc);
MachineInfo *info;
+ SysEmuTargetList **tgts;
+ int n;
info = g_malloc0(sizeof(*info));
if (mc->is_default) {
@@ -120,6 +122,11 @@ MachineInfoList *qmp_query_machines(bool has_compat_props, bool compat_props,
info->hotpluggable_cpus = mc->has_hotpluggable_cpus;
info->numa_mem_supported = mc->numa_mem_supported;
info->deprecated = !!mc->deprecation_reason;
+
+ tgts = &(info->targets);
+ for (n = 0; mc->targets && mc->targets[n] != SYS_EMU_TARGET__MAX; n++) {
+ QAPI_LIST_APPEND(tgts, mc->targets[n]);
+ }
info->acpi = !!object_class_property_find(OBJECT_CLASS(mc), "acpi");
if (default_cpu_type) {
info->default_cpu_type = g_strdup(default_cpu_type);
diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index a436d48c8e..436eb9fe84 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -322,6 +322,8 @@ struct MachineClass {
SMPCompatProps smp_props;
const char *default_ram_id;
+ SysEmuTarget *targets;
+
HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
DeviceState *dev);
bool (*hotplug_allowed)(MachineState *state, DeviceState *dev,
This MachineInfo QAPI type is how to report other key information
about the machine classes.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 9:45 ` Daniel P. Berrangé
@ 2026-09-04 11:25 ` Markus Armbruster
2026-09-04 11:36 ` Daniel P. Berrangé
0 siblings, 1 reply; 99+ messages in thread
From: Markus Armbruster @ 2026-09-04 11:25 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: Yonggang Luo, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Peter Maydell, Paolo Bonzini,
Richard Henderson
Daniel P. Berrangé <berrange@redhat.com> writes:
> On Fri, Sep 04, 2026 at 04:58:10PM +0800, Yonggang Luo wrote:
>> Device filtering would be complicated, I guess, as there is so much
>> CONFIG_* for devices. Another approach is to just place devices under an
>> meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be
>> listed(memory consumption will also be reduced when it's not needed).
>
> While modules are important for reducing memory consumption, I don't think
> they need to be a blocker - making more things into modules can be done
> in the backaround as & when people want to work on it.
I fear modules need serious work to before we can use them more widely.
I described issues in
Subject: Dynamic & heterogeneous machines, initial configuration: problems
Date: Wed, 31 Jan 2024 21:14:21 +0100
Message-ID: <87o7d1i7ky.fsf@pond.sub.org>
https://lore.kernel.org/qemu-devel/87o7d1i7ky.fsf@pond.sub.org/
Copy of relevant part:
= Problem 3: Loadable modules =
QOM wasn't designed for loadable modules. Support for them was grafted
on, and there are serious deficiencies.
Building a loadable module results in a DSO. Additionally, module
meta-data necessary to load it is compiled into the executables that can
load modules. Actually loading a module can fail, e.g. when the module
was not deployed.
Loadable modules are designed to be transparent, i.e. users don't need
to know whether a module is compiled in or loadable.
QOM types don't exist until the module is initialized. Compiled-in
modules are initialized early in startup. Loadable modules are
initialized on load.
QMP command qom-list-types returns all QOM types. To be able to find
them all, it needs to load all modules. Modules that cannot be found
(or have dependencies that cannot be found) are silently ignored. Any
other loading errors are reported to stderr with error_report_err(),
which is inappropriate. In either case, the types provided by the
unloadable modules are not returned by the command.
We have two functions to look up an object class by name:
object_class_by_name() and module_object_class_by_name(). The latter
attempts to load a module when the type doesn't exist. Again, modules
that cannot be found are silently ignored, and other loading errors are
reported with error_report_err(), which is inappropriate in certain
contexts.
When to use which of the two functions is unclear. Existing usage may
well be wrong.
The QOM functions to create objects in-place (object_initialize(), ...)
or on the heap (object_new(), ...) cannot fail. This is just fine in
QOM's original design. It is not fine when a loadable module fails to
load. Since the functions can't fail, they exit(1) then.
This means things like a hot plugging a device provided by a loadable
module can crash a VM immediately.
Attempting to load all modules beforehand with qom-list-types does not
protect against this: we try to load again, fail again, and exit(1).
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PATCH 00/47] single-binary: implement dynamic filtering for QOM types
2026-09-04 11:25 ` Markus Armbruster
@ 2026-09-04 11:36 ` Daniel P. Berrangé
0 siblings, 0 replies; 99+ messages in thread
From: Daniel P. Berrangé @ 2026-09-04 11:36 UTC (permalink / raw)
To: Markus Armbruster
Cc: Yonggang Luo, Pierrick Bouvier, qemu-devel, anjo,
Daniel Henrique Barboza, philmd, Peter Maydell, Paolo Bonzini,
Richard Henderson
On Fri, Sep 04, 2026 at 01:25:23PM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé <berrange@redhat.com> writes:
>
> > On Fri, Sep 04, 2026 at 04:58:10PM +0800, Yonggang Luo wrote:
> >> Device filtering would be complicated, I guess, as there is so much
> >> CONFIG_* for devices. Another approach is to just place devices under an
> >> meson "enable_modules " (in *.so/*.dll/*.dylib), so it won't be
> >> listed(memory consumption will also be reduced when it's not needed).
> >
> > While modules are important for reducing memory consumption, I don't think
> > they need to be a blocker - making more things into modules can be done
> > in the backaround as & when people want to work on it.
>
> I fear modules need serious work to before we can use them more widely.
> I described issues in
>
> Subject: Dynamic & heterogeneous machines, initial configuration: problems
> Date: Wed, 31 Jan 2024 21:14:21 +0100
> Message-ID: <87o7d1i7ky.fsf@pond.sub.org>
> https://lore.kernel.org/qemu-devel/87o7d1i7ky.fsf@pond.sub.org/
>
> Copy of relevant part:
>
> = Problem 3: Loadable modules =
>
> QOM wasn't designed for loadable modules. Support for them was grafted
> on, and there are serious deficiencies.
>
> Building a loadable module results in a DSO. Additionally, module
> meta-data necessary to load it is compiled into the executables that can
> load modules. Actually loading a module can fail, e.g. when the module
> was not deployed.
>
> Loadable modules are designed to be transparent, i.e. users don't need
> to know whether a module is compiled in or loadable.
>
> QOM types don't exist until the module is initialized. Compiled-in
> modules are initialized early in startup. Loadable modules are
> initialized on load.
>
> QMP command qom-list-types returns all QOM types. To be able to find
> them all, it needs to load all modules. Modules that cannot be found
> (or have dependencies that cannot be found) are silently ignored. Any
> other loading errors are reported to stderr with error_report_err(),
> which is inappropriate. In either case, the types provided by the
> unloadable modules are not returned by the command.
>
> We have two functions to look up an object class by name:
> object_class_by_name() and module_object_class_by_name(). The latter
> attempts to load a module when the type doesn't exist. Again, modules
> that cannot be found are silently ignored, and other loading errors are
> reported with error_report_err(), which is inappropriate in certain
> contexts.
>
> When to use which of the two functions is unclear. Existing usage may
> well be wrong.
>
> The QOM functions to create objects in-place (object_initialize(), ...)
> or on the heap (object_new(), ...) cannot fail. This is just fine in
> QOM's original design. It is not fine when a loadable module fails to
> load. Since the functions can't fail, they exit(1) then.
>
> This means things like a hot plugging a device provided by a loadable
> module can crash a VM immediately.
The object_new() side effect is unpleasant, but we're not all that
far away from avoiding the crash on device hotplug AFAICT.
qdev_device_add_from_qdict() will call qdev_get_device_class() and
if that returns NULL will gracefully return the error to the client.
qdev_get_device_class() will call module_object_class_by_name()
which triggers module loading and can return NULL if loading
fails. Unfortnuately it throws away the error message, and
qdev_get_device_class() doesn't appear to handle NULL correctly
in all scenarios. It is not that far away from being able to
handle module load failures correctly though AFAICS.
The unpleasant bit is that we would need to audit other QMP entry
points that can trigger module loading, and ensure they all trigger
module loading prior to object_new(), and perhaps most importantly
have a way to test this in functional tests. Without the latter
we'll surely bit-rot this subtle edgecase.
With regards,
Daniel
--
|: https://berrange.com ~~ https://hachyderm.io/@berrange :|
|: https://libvirt.org ~~ https://entangle-photo.org :|
|: https://pixelfed.art/berrange ~~ https://fstop138.berrange.com :|
^ permalink raw reply [flat|nested] 99+ messages in thread