From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Paul Louvel <paul.louvel@bootlin.com>
Cc: Borislav Petkov <bp@alien8.de>, Tony Luck <tony.luck@intel.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-edac@vger.kernel.org, devicetree@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Herve Codina <herve.codina@bootlin.com>
Subject: Re: [PATCH v3 3/3] ARM: dts: renesas: r9a06g032: add EDAC node
Date: Fri, 25 Sep 2026 14:19:05 +0200 [thread overview]
Message-ID: <arZmuSwTUFPXxMxp@shikoro> (raw)
In-Reply-To: <20260924-paul-v7-3-rc1-edac-v3-3-bd8054a5b180@bootlin.com>
On Thu, Sep 24, 2026 at 04:12:49PM +0200, Paul Louvel wrote:
> Add EDAC node to the SoC base device tree file.
>
> Signed-off-by: Paul Louvel (Schneider Electric) <paul.louvel@bootlin.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
prev parent reply other threads:[~2026-09-25 12:19 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 14:12 [PATCH v3 0/3] Add Renesas RZ/N1x EDAC driver Paul Louvel
2026-09-24 14:12 ` [PATCH v3 1/3] dt-bindings: edac: cdns,ddr-edac: add Cadence DDR EDAC binding Paul Louvel
2026-09-25 12:30 ` Wolfram Sang
2026-09-25 12:50 ` Miquel Raynal
2026-09-25 12:57 ` Geert Uytterhoeven
2026-09-25 13:14 ` Miquel Raynal
2026-09-24 14:12 ` [PATCH v3 2/3] EDAC/cadence: Add Cadence DDR EDAC driver Paul Louvel
2026-09-24 14:25 ` sashiko-bot
2026-09-25 12:18 ` Wolfram Sang
2026-09-28 7:41 ` Paul Louvel
2026-09-25 12:02 ` Wolfram Sang
2026-09-28 7:32 ` Paul Louvel
2026-09-24 14:12 ` [PATCH v3 3/3] ARM: dts: renesas: r9a06g032: add EDAC node Paul Louvel
2026-09-25 12:19 ` Wolfram Sang [this message]
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