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From: Vinod Koul <vkoul@kernel.org>
To: Michal Wilczynski <m.wilczynski@samsung.com>
Cc: "Neil Armstrong" <neil.armstrong@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Andrzej Hajda" <andrzej.hajda@intel.com>,
	"Robert Foss" <rfoss@kernel.org>,
	"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
	"Jonas Karlman" <jonas@kwiboo.se>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Lee Jones" <lee@kernel.org>,
	"Andy Yan" <andy.yan@rock-chips.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	"Hal Feng" <hal.feng@starfivetech.com>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Dominique Belhachemi" <db@domibel.de>,
	"Brian Masney" <bmasney+clk@redhat.com>,
	"Jerome Brunet" <jbrunet+clk@baylibre.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	mfd@lists.linux.dev, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	linux-riscv@lists.infradead.org,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	"Maud Spierings" <maud_spierings@murena.io>,
	"Graham Markall" <hello@big-grey.co.uk>,
	"Icenowy Zheng" <zhengxingda@iscas.ac.cn>,
	"Chaoyi Chen" <chaoyi.chen@rock-chips.com>,
	"Joshua Peisach" <jpeisach@ubuntu.com>,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>
Subject: Re: [PATCH v4 16/20] phy: Add common Innosilicon HDMI PHY helpers
Date: Sat, 3 Oct 2026 16:22:18 +0200	[thread overview]
Message-ID: <asEPmpQTwXYADwTk@parshuram> (raw)
In-Reply-To: <20260915-jh7110-clean-send-v4-16-f0e4fd6f2cc8@samsung.com>

On 15-09-26, 17:32, Michal Wilczynski wrote:
> The Innosilicon HDMI PHY IP is used by several SoCs. They differ in
> where the PHY register block sits in the register space and in which
> pixel clocks they support, but the pre-PLL programming sequence and the
> layout of its registers are the same.
> 
> Add a small library holding that shared part: the pre-PLL configuration
> table format, a lookup, clk_ops determine_rate and recalc_rate helpers,
> and the pre-PLL register programming. Callers pass a regmap, a register
> offset for the PHY block, and their own pixel clock table.
> 
> No driver uses it yet; the users are converted separately.

Is there anything in phy patches here that has dependency with rest? If
not consider splitting it up...

> +static u8 inno_read(const struct inno_hdmi_phy_pre_pll *pll, unsigned int reg)
> +{
> +	unsigned int val;
> +	int ret;
> +
> +	ret = regmap_read(pll->regmap, inno_reg(pll, reg), &val);
> +	if (ret)
> +		return 0;
> +
> +	return val;

why not just return regmap_read()

There is no logic here, nothing. This is really not ideal.
Also why add a wrapper and not use regmap directly?

> +/**
> + * inno_hdmi_phy_pre_pll_determine_rate - clk_ops.determine_rate helper
> + * @pll: pre-PLL instance
> + * @req: rate request, updated with the rate the PHY would produce
> + *
> + * The PHY can only generate the pixel clocks described by its table, so a
> + * request that does not appear there is rejected rather than rounded.
> + *
> + * Return: 0 on success, -EINVAL if the rate is not supported.
> + */
> +int inno_hdmi_phy_pre_pll_determine_rate(const struct inno_hdmi_phy_pre_pll *pll,
> +					 struct clk_rate_request *req)
> +{
> +	const struct inno_hdmi_phy_pre_pll_config *cfg;
> +	unsigned long rate = rounddown(req->rate, 1000);
> +
> +	for (cfg = pll->table; cfg->pixclock != 0; cfg++) {

Is there a chance of null/garbage if we reach end of table? You dont
know the size of table, and incrementing pointer without bounds does not
look good to me.


-- 
~Vinod

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org>
To: Michal Wilczynski <m.wilczynski@samsung.com>
Cc: "Neil Armstrong" <neil.armstrong@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Andrzej Hajda" <andrzej.hajda@intel.com>,
	"Robert Foss" <rfoss@kernel.org>,
	"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
	"Jonas Karlman" <jonas@kwiboo.se>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Lee Jones" <lee@kernel.org>,
	"Andy Yan" <andy.yan@rock-chips.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	"Hal Feng" <hal.feng@starfivetech.com>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Dominique Belhachemi" <db@domibel.de>,
	"Brian Masney" <bmasney+clk@redhat.com>,
	"Jerome Brunet" <jbrunet+clk@baylibre.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	mfd@lists.linux.dev, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	linux-riscv@lists.infradead.org,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	"Maud Spierings" <maud_spierings@murena.io>,
	"Graham Markall" <hello@big-grey.co.uk>,
	"Icenowy Zheng" <zhengxingda@iscas.ac.cn>,
	"Chaoyi Chen" <chaoyi.chen@rock-chips.com>,
	"Joshua Peisach" <jpeisach@ubuntu.com>,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>
Subject: Re: [PATCH v4 16/20] phy: Add common Innosilicon HDMI PHY helpers
Date: Sat, 3 Oct 2026 16:22:18 +0200	[thread overview]
Message-ID: <asEPmpQTwXYADwTk@parshuram> (raw)
In-Reply-To: <20260915-jh7110-clean-send-v4-16-f0e4fd6f2cc8@samsung.com>

On 15-09-26, 17:32, Michal Wilczynski wrote:
> The Innosilicon HDMI PHY IP is used by several SoCs. They differ in
> where the PHY register block sits in the register space and in which
> pixel clocks they support, but the pre-PLL programming sequence and the
> layout of its registers are the same.
> 
> Add a small library holding that shared part: the pre-PLL configuration
> table format, a lookup, clk_ops determine_rate and recalc_rate helpers,
> and the pre-PLL register programming. Callers pass a regmap, a register
> offset for the PHY block, and their own pixel clock table.
> 
> No driver uses it yet; the users are converted separately.

Is there anything in phy patches here that has dependency with rest? If
not consider splitting it up...

> +static u8 inno_read(const struct inno_hdmi_phy_pre_pll *pll, unsigned int reg)
> +{
> +	unsigned int val;
> +	int ret;
> +
> +	ret = regmap_read(pll->regmap, inno_reg(pll, reg), &val);
> +	if (ret)
> +		return 0;
> +
> +	return val;

why not just return regmap_read()

There is no logic here, nothing. This is really not ideal.
Also why add a wrapper and not use regmap directly?

> +/**
> + * inno_hdmi_phy_pre_pll_determine_rate - clk_ops.determine_rate helper
> + * @pll: pre-PLL instance
> + * @req: rate request, updated with the rate the PHY would produce
> + *
> + * The PHY can only generate the pixel clocks described by its table, so a
> + * request that does not appear there is rejected rather than rounded.
> + *
> + * Return: 0 on success, -EINVAL if the rate is not supported.
> + */
> +int inno_hdmi_phy_pre_pll_determine_rate(const struct inno_hdmi_phy_pre_pll *pll,
> +					 struct clk_rate_request *req)
> +{
> +	const struct inno_hdmi_phy_pre_pll_config *cfg;
> +	unsigned long rate = rounddown(req->rate, 1000);
> +
> +	for (cfg = pll->table; cfg->pixclock != 0; cfg++) {

Is there a chance of null/garbage if we reach end of table? You dont
know the size of table, and incrementing pointer without bounds does not
look good to me.


-- 
~Vinod

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org>
To: Michal Wilczynski <m.wilczynski@samsung.com>
Cc: "Neil Armstrong" <neil.armstrong@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Andrzej Hajda" <andrzej.hajda@intel.com>,
	"Robert Foss" <rfoss@kernel.org>,
	"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
	"Jonas Karlman" <jonas@kwiboo.se>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Lee Jones" <lee@kernel.org>,
	"Andy Yan" <andy.yan@rock-chips.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	"Hal Feng" <hal.feng@starfivetech.com>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Dominique Belhachemi" <db@domibel.de>,
	"Brian Masney" <bmasney+clk@redhat.com>,
	"Jerome Brunet" <jbrunet+clk@baylibre.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	mfd@lists.linux.dev, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	linux-riscv@lists.infradead.org,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	"Maud Spierings" <maud_spierings@murena.io>,
	"Graham Markall" <hello@big-grey.co.uk>,
	"Icenowy Zheng" <zhengxingda@iscas.ac.cn>,
	"Chaoyi Chen" <chaoyi.chen@rock-chips.com>,
	"Joshua Peisach" <jpeisach@ubuntu.com>,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>
Subject: Re: [PATCH v4 16/20] phy: Add common Innosilicon HDMI PHY helpers
Date: Sat, 3 Oct 2026 16:22:18 +0200	[thread overview]
Message-ID: <asEPmpQTwXYADwTk@parshuram> (raw)
In-Reply-To: <20260915-jh7110-clean-send-v4-16-f0e4fd6f2cc8@samsung.com>

On 15-09-26, 17:32, Michal Wilczynski wrote:
> The Innosilicon HDMI PHY IP is used by several SoCs. They differ in
> where the PHY register block sits in the register space and in which
> pixel clocks they support, but the pre-PLL programming sequence and the
> layout of its registers are the same.
> 
> Add a small library holding that shared part: the pre-PLL configuration
> table format, a lookup, clk_ops determine_rate and recalc_rate helpers,
> and the pre-PLL register programming. Callers pass a regmap, a register
> offset for the PHY block, and their own pixel clock table.
> 
> No driver uses it yet; the users are converted separately.

Is there anything in phy patches here that has dependency with rest? If
not consider splitting it up...

> +static u8 inno_read(const struct inno_hdmi_phy_pre_pll *pll, unsigned int reg)
> +{
> +	unsigned int val;
> +	int ret;
> +
> +	ret = regmap_read(pll->regmap, inno_reg(pll, reg), &val);
> +	if (ret)
> +		return 0;
> +
> +	return val;

why not just return regmap_read()

There is no logic here, nothing. This is really not ideal.
Also why add a wrapper and not use regmap directly?

> +/**
> + * inno_hdmi_phy_pre_pll_determine_rate - clk_ops.determine_rate helper
> + * @pll: pre-PLL instance
> + * @req: rate request, updated with the rate the PHY would produce
> + *
> + * The PHY can only generate the pixel clocks described by its table, so a
> + * request that does not appear there is rejected rather than rounded.
> + *
> + * Return: 0 on success, -EINVAL if the rate is not supported.
> + */
> +int inno_hdmi_phy_pre_pll_determine_rate(const struct inno_hdmi_phy_pre_pll *pll,
> +					 struct clk_rate_request *req)
> +{
> +	const struct inno_hdmi_phy_pre_pll_config *cfg;
> +	unsigned long rate = rounddown(req->rate, 1000);
> +
> +	for (cfg = pll->table; cfg->pixclock != 0; cfg++) {

Is there a chance of null/garbage if we reach end of table? You dont
know the size of table, and incrementing pointer without bounds does not
look good to me.


-- 
~Vinod

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org>
To: Michal Wilczynski <m.wilczynski@samsung.com>
Cc: "Neil Armstrong" <neil.armstrong@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Andrzej Hajda" <andrzej.hajda@intel.com>,
	"Robert Foss" <rfoss@kernel.org>,
	"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
	"Jonas Karlman" <jonas@kwiboo.se>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Lee Jones" <lee@kernel.org>,
	"Andy Yan" <andy.yan@rock-chips.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	"Hal Feng" <hal.feng@starfivetech.com>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Dominique Belhachemi" <db@domibel.de>,
	"Brian Masney" <bmasney+clk@redhat.com>,
	"Jerome Brunet" <jbrunet+clk@baylibre.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	mfd@lists.linux.dev, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	linux-riscv@lists.infradead.org,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	"Maud Spierings" <maud_spierings@murena.io>,
	"Graham Markall" <hello@big-grey.co.uk>,
	"Icenowy Zheng" <zhengxingda@iscas.ac.cn>,
	"Chaoyi Chen" <chaoyi.chen@rock-chips.com>,
	"Joshua Peisach" <jpeisach@ubuntu.com>,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>
Subject: Re: [PATCH v4 16/20] phy: Add common Innosilicon HDMI PHY helpers
Date: Sat, 3 Oct 2026 16:22:18 +0200	[thread overview]
Message-ID: <asEPmpQTwXYADwTk@parshuram> (raw)
In-Reply-To: <20260915-jh7110-clean-send-v4-16-f0e4fd6f2cc8@samsung.com>

On 15-09-26, 17:32, Michal Wilczynski wrote:
> The Innosilicon HDMI PHY IP is used by several SoCs. They differ in
> where the PHY register block sits in the register space and in which
> pixel clocks they support, but the pre-PLL programming sequence and the
> layout of its registers are the same.
> 
> Add a small library holding that shared part: the pre-PLL configuration
> table format, a lookup, clk_ops determine_rate and recalc_rate helpers,
> and the pre-PLL register programming. Callers pass a regmap, a register
> offset for the PHY block, and their own pixel clock table.
> 
> No driver uses it yet; the users are converted separately.

Is there anything in phy patches here that has dependency with rest? If
not consider splitting it up...

> +static u8 inno_read(const struct inno_hdmi_phy_pre_pll *pll, unsigned int reg)
> +{
> +	unsigned int val;
> +	int ret;
> +
> +	ret = regmap_read(pll->regmap, inno_reg(pll, reg), &val);
> +	if (ret)
> +		return 0;
> +
> +	return val;

why not just return regmap_read()

There is no logic here, nothing. This is really not ideal.
Also why add a wrapper and not use regmap directly?

> +/**
> + * inno_hdmi_phy_pre_pll_determine_rate - clk_ops.determine_rate helper
> + * @pll: pre-PLL instance
> + * @req: rate request, updated with the rate the PHY would produce
> + *
> + * The PHY can only generate the pixel clocks described by its table, so a
> + * request that does not appear there is rejected rather than rounded.
> + *
> + * Return: 0 on success, -EINVAL if the rate is not supported.
> + */
> +int inno_hdmi_phy_pre_pll_determine_rate(const struct inno_hdmi_phy_pre_pll *pll,
> +					 struct clk_rate_request *req)
> +{
> +	const struct inno_hdmi_phy_pre_pll_config *cfg;
> +	unsigned long rate = rounddown(req->rate, 1000);
> +
> +	for (cfg = pll->table; cfg->pixclock != 0; cfg++) {

Is there a chance of null/garbage if we reach end of table? You dont
know the size of table, and incrementing pointer without bounds does not
look good to me.


-- 
~Vinod

  parent reply	other threads:[~2026-10-03 14:22 UTC|newest]

Thread overview: 262+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20260915153213eucas1p148f013af239a334fc78cdc249c0f8a61@eucas1p1.samsung.com>
2026-09-15 15:32 ` [PATCH v4 00/20] drm: starfive: jh7110: Enable display subsystem Michal Wilczynski
2026-09-15 15:32   ` Michal Wilczynski
2026-09-15 15:32   ` Michal Wilczynski
2026-09-15 15:32   ` Michal Wilczynski
2026-09-15 15:32   ` [PATCH v4 01/20] dt-bindings: phy: Add starfive,jh7110-inno-hdmi-phy Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:35     ` sashiko-bot
2026-09-15 15:35       ` sashiko-bot
2026-09-17  6:51     ` Krzysztof Kozlowski
2026-09-17  6:51       ` Krzysztof Kozlowski
2026-09-17  6:51       ` Krzysztof Kozlowski
2026-09-17  6:51       ` Krzysztof Kozlowski
2026-09-18  0:34       ` Joshua Peisach
2026-09-18  0:34         ` Joshua Peisach
2026-09-18  0:34         ` Joshua Peisach
2026-09-18  0:34         ` Joshua Peisach
2026-09-18  6:16         ` Krzysztof Kozlowski
2026-09-18  6:16           ` Krzysztof Kozlowski
2026-09-18  6:16           ` Krzysztof Kozlowski
2026-09-18  6:16           ` Krzysztof Kozlowski
2026-09-18  6:21           ` Icenowy Zheng
2026-09-18  6:21             ` Icenowy Zheng
2026-09-18  6:21             ` Icenowy Zheng
2026-09-18  6:21             ` Icenowy Zheng
2026-09-18  6:41             ` Krzysztof Kozlowski
2026-09-18  6:41               ` Krzysztof Kozlowski
2026-09-18  6:41               ` Krzysztof Kozlowski
2026-09-18  6:41               ` Krzysztof Kozlowski
2026-09-25 21:27           ` Michal Wilczynski
2026-09-25 21:27             ` Michal Wilczynski
2026-09-25 21:27             ` Michal Wilczynski
2026-09-25 21:27             ` Michal Wilczynski
2026-09-25 21:05       ` Michal Wilczynski
2026-09-25 21:05         ` Michal Wilczynski
2026-09-25 21:05         ` Michal Wilczynski
2026-09-25 21:05         ` Michal Wilczynski
2026-09-30 11:01         ` Krzysztof Kozlowski
2026-09-30 11:01           ` Krzysztof Kozlowski
2026-09-30 11:01           ` Krzysztof Kozlowski
2026-09-30 11:01           ` Krzysztof Kozlowski
2026-10-03 15:36           ` Michal Wilczynski
2026-10-03 15:36             ` Michal Wilczynski
2026-10-03 15:36             ` Michal Wilczynski
2026-10-03 15:36             ` Michal Wilczynski
2026-10-03 20:45             ` Krzysztof Kozlowski
2026-10-03 20:45               ` Krzysztof Kozlowski
2026-10-03 20:45               ` Krzysztof Kozlowski
2026-10-03 20:45               ` Krzysztof Kozlowski
2026-10-03 22:35               ` Michal Wilczynski
2026-10-03 22:35                 ` Michal Wilczynski
2026-10-03 22:35                 ` Michal Wilczynski
2026-10-03 22:35                 ` Michal Wilczynski
2026-10-04  7:15                 ` Krzysztof Kozlowski
2026-10-04  7:15                   ` Krzysztof Kozlowski
2026-10-04  7:15                   ` Krzysztof Kozlowski
2026-10-04  7:15                   ` Krzysztof Kozlowski
2026-10-10 12:23                   ` Michal Wilczynski
2026-10-10 12:23                     ` Michal Wilczynski
2026-10-10 12:23                     ` Michal Wilczynski
2026-10-10 12:23                     ` Michal Wilczynski
2026-10-05  7:27                 ` Icenowy Zheng
2026-10-05  7:27                   ` Icenowy Zheng
2026-10-05  7:27                   ` Icenowy Zheng
2026-10-05  7:27                   ` Icenowy Zheng
2026-09-15 15:32   ` [PATCH v4 02/20] dt-bindings: display: bridge: Add starfive,jh7110-inno-hdmi-controller Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:35     ` sashiko-bot
2026-09-15 15:35       ` sashiko-bot
2026-09-15 15:32   ` [PATCH v4 03/20] dt-bindings: mfd: Add starfive,jh7110-hdmi-subsystem Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:42     ` sashiko-bot
2026-09-15 15:42       ` sashiko-bot
2026-09-17  6:54     ` Krzysztof Kozlowski
2026-09-17  6:54       ` Krzysztof Kozlowski
2026-09-17  6:54       ` Krzysztof Kozlowski
2026-09-17  6:54       ` Krzysztof Kozlowski
2026-09-28 18:34       ` Michal Wilczynski
2026-09-28 18:34         ` Michal Wilczynski
2026-09-28 18:34         ` Michal Wilczynski
2026-09-28 18:34         ` Michal Wilczynski
2026-09-15 15:32   ` [PATCH v4 04/20] dt-bindings: soc: starfive: Add starfive,jh7110-vout-syscon Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:35     ` sashiko-bot
2026-09-15 15:35       ` sashiko-bot
2026-09-17  6:55     ` Krzysztof Kozlowski
2026-09-17  6:55       ` Krzysztof Kozlowski
2026-09-17  6:55       ` Krzysztof Kozlowski
2026-09-17  6:55       ` Krzysztof Kozlowski
2026-09-15 15:32   ` [PATCH v4 05/20] dt-bindings: display: verisilicon: Add starfive,jh7110-dc8200 Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:35     ` sashiko-bot
2026-09-15 15:35       ` sashiko-bot
2026-09-18  5:58     ` Icenowy Zheng
2026-09-18  5:58       ` Icenowy Zheng
2026-09-18  5:58       ` Icenowy Zheng
2026-09-18  5:58       ` Icenowy Zheng
2026-09-27 15:26       ` Michal Wilczynski
2026-09-27 15:26         ` Michal Wilczynski
2026-09-27 15:26         ` Michal Wilczynski
2026-09-27 15:26         ` Michal Wilczynski
2026-09-15 15:32   ` [PATCH v4 06/20] dt-bindings: soc: starfive: Add starfive,jh7110-vout-subsystem Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:35     ` sashiko-bot
2026-09-15 15:35       ` sashiko-bot
2026-09-24 15:30     ` Rob Herring (Arm)
2026-09-24 15:30       ` Rob Herring (Arm)
2026-09-24 15:30       ` Rob Herring (Arm)
2026-09-24 15:30       ` Rob Herring (Arm)
2026-09-15 15:32   ` [PATCH v4 07/20] drm/bridge: inno-hdmi: Split probe out of bind Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:44     ` sashiko-bot
2026-09-15 15:44       ` sashiko-bot
2026-09-15 15:32   ` [PATCH v4 08/20] drm/bridge: inno-hdmi: Allow the register map to come from a parent Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:42     ` sashiko-bot
2026-09-15 15:42       ` sashiko-bot
2026-09-15 15:32   ` [PATCH v4 09/20] drm/bridge: inno-hdmi: Add .disable platform operation Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:43     ` sashiko-bot
2026-09-15 15:43       ` sashiko-bot
2026-09-15 15:32   ` [PATCH v4 10/20] drm/bridge: inno-hdmi: Add .mode_valid " Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:37     ` sashiko-bot
2026-09-15 15:37       ` sashiko-bot
2026-09-15 15:32   ` [PATCH v4 11/20] drm/bridge: inno-hdmi: Make the PHY configuration table optional Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:40     ` sashiko-bot
2026-09-15 15:40       ` sashiko-bot
2026-09-15 15:32   ` [PATCH v4 12/20] soc: starfive: Add jh7110-hdmi-subsystem driver Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:44     ` sashiko-bot
2026-09-15 15:44       ` sashiko-bot
2026-09-29 15:04     ` Icenowy Zheng
2026-09-29 15:04       ` Icenowy Zheng
2026-09-29 15:04       ` Icenowy Zheng
2026-09-29 15:04       ` Icenowy Zheng
2026-09-15 15:32   ` [PATCH v4 13/20] soc: starfive: Add jh7110-vout-subsystem driver Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:42     ` sashiko-bot
2026-09-15 15:42       ` sashiko-bot
2026-09-29 15:04     ` Icenowy Zheng
2026-09-29 15:04       ` Icenowy Zheng
2026-09-29 15:04       ` Icenowy Zheng
2026-09-29 15:04       ` Icenowy Zheng
2026-09-15 15:32   ` [PATCH v4 14/20] clk: starfive: jh7110-vout: Allow pixel clock rate propagation Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:38     ` sashiko-bot
2026-09-15 15:38       ` sashiko-bot
2026-09-15 15:32   ` [PATCH v4 15/20] drm/bridge: starfive: Add JH7110 HDMI controller driver Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:42     ` sashiko-bot
2026-09-15 15:42       ` sashiko-bot
2026-09-29 15:03     ` Icenowy Zheng
2026-09-29 15:03       ` Icenowy Zheng
2026-09-29 15:03       ` Icenowy Zheng
2026-09-29 15:03       ` Icenowy Zheng
2026-09-15 15:32   ` [PATCH v4 16/20] phy: Add common Innosilicon HDMI PHY helpers Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:42     ` sashiko-bot
2026-09-15 15:42       ` sashiko-bot
2026-10-03 14:22     ` Vinod Koul [this message]
2026-10-03 14:22       ` Vinod Koul
2026-10-03 14:22       ` Vinod Koul
2026-10-03 14:22       ` Vinod Koul
2026-09-15 15:32   ` [PATCH v4 17/20] phy: rockchip: inno-hdmi: Use the common Innosilicon " Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:44     ` sashiko-bot
2026-09-15 15:44       ` sashiko-bot
2026-09-15 15:32   ` [PATCH v4 18/20] phy: starfive: Add jh7110-inno-hdmi-phy driver Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:46     ` sashiko-bot
2026-09-15 15:46       ` sashiko-bot
2026-09-26  3:31     ` Dominique Belhachemi
2026-09-26  3:31       ` Dominique Belhachemi
2026-09-26  3:31       ` Dominique Belhachemi
2026-09-26  3:31       ` Dominique Belhachemi
2026-09-27 12:05       ` Michal Wilczynski
2026-09-27 12:05         ` Michal Wilczynski
2026-09-27 12:05         ` Michal Wilczynski
2026-09-27 12:05         ` Michal Wilczynski
2026-09-15 15:32   ` [PATCH v4 19/20] riscv: dts: starfive: jh7110: Update DT for display subsystem Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:49     ` sashiko-bot
2026-09-15 15:49       ` sashiko-bot
2026-09-29 15:06     ` Icenowy Zheng
2026-09-29 15:06       ` Icenowy Zheng
2026-09-29 15:06       ` Icenowy Zheng
2026-09-29 15:06       ` Icenowy Zheng
2026-09-15 15:32   ` [PATCH v4 20/20] MAINTAINERS: Add StarFive JH7110 display subsystem entry Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-15 15:32     ` Michal Wilczynski
2026-09-16  0:45   ` [PATCH v4 00/20] drm: starfive: jh7110: Enable display subsystem Joshua Peisach
2026-09-16  0:45     ` Joshua Peisach
2026-09-16  0:45     ` Joshua Peisach
2026-09-16  0:45     ` Joshua Peisach
2026-09-17 17:22     ` Michal Wilczynski
2026-09-17 17:22       ` Michal Wilczynski
2026-09-17 17:22       ` Michal Wilczynski
2026-09-17 17:22       ` Michal Wilczynski
2026-09-18 15:32       ` Joshua Peisach
2026-09-18 15:32         ` Joshua Peisach
2026-09-18 15:32         ` Joshua Peisach
2026-09-18 15:32         ` Joshua Peisach
2026-09-27 12:24         ` Michal Wilczynski
2026-09-27 12:24           ` Michal Wilczynski
2026-09-27 12:24           ` Michal Wilczynski
2026-09-27 12:24           ` Michal Wilczynski
2026-09-20  6:09   ` Byron Stanoszek
2026-09-20  6:09     ` Byron Stanoszek
2026-09-20  6:09     ` Byron Stanoszek
2026-09-20  6:09     ` Byron Stanoszek
2026-09-20  7:35     ` Icenowy Zheng
2026-09-20  7:35       ` Icenowy Zheng
2026-09-20  7:35       ` Icenowy Zheng
2026-09-20  7:35       ` Icenowy Zheng
2026-09-25 20:09       ` Michal Wilczynski
2026-09-25 20:09         ` Michal Wilczynski
2026-09-25 20:09         ` Michal Wilczynski
2026-09-25 20:09         ` Michal Wilczynski
2026-09-25 13:55   ` (subset) " Brian Masney
2026-09-25 13:55     ` Brian Masney
2026-09-25 13:55     ` Brian Masney
2026-09-25 13:55     ` Brian Masney

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