From: Drew Fustini <fustini@kernel.org>
To: Sunil V L <sunilvl@oss.qualcomm.com>
Cc: "Adrien Ricciardi" <aricciardi@baylibre.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Atish Patra" <atish.patra@linux.dev>,
"Babu Moger" <babu.moger@amd.com>,
"Ben Horgan" <ben.horgan@arm.com>,
"Borislav Petkov" <bp@alien8.de>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"Dave Martin" <Dave.Martin@arm.com>,
"Fenghua Yu" <fenghuay@nvidia.com>,
"Gong Shuai" <gong.shuai@sanechips.com.cn>,
"Gong Shuai" <gsh517@gmail.com>,
guo.wenjia23@zte.com.cn, "James Morse" <james.morse@arm.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
liu.qingtao2@zte.com.cn,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <pjw@kernel.org>,
"Peter Newman" <peternewman@google.com>,
"Radim Krčmář" <rkrcmar@ventanamicro.com>,
"Reinette Chatre" <reinette.chatre@intel.com>,
"Rob Herring" <robh@kernel.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Sebastian Andrzej Siewior" <bigeasy@linutronix.de>,
"Clark Williams" <clrkwllms@kernel.org>,
"Steven Rostedt" <rostedt@goodmis.org>,
"Tony Luck" <tony.luck@intel.com>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Ved Shanbhogue" <ved@rivosinc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Zhanpeng Zhang" <zhangzhanpeng.jasper@bytedance.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
x86@kernel.org, devicetree@vger.kernel.org,
linux-rt-devel@lists.linux.dev, linux-doc@vger.kernel.org
Subject: Re: [PATCH v9 2/5] riscv_cbqri: resctrl: Add cache allocation via capacity block mask
Date: Sat, 17 Oct 2026 13:56:51 -0700 [thread overview]
Message-ID: <atPhE6rF0Uz93qF2@thelio> (raw)
In-Reply-To: <CAB19ukEkAOMnPpi2jVFz68GZ_7cwYmNtrBkxnfEJtFcPb7PJ5Q@mail.gmail.com>
On Mon, Oct 12, 2026 at 10:23:57PM +0530, Sunil V L wrote:
> On Sat, Oct 3, 2026 at 12:45 PM Drew Fustini <fustini@kernel.org> wrote:
> >
> > Wire CBQRI capacity controllers into resctrl as RDT_RESOURCE_L2 and
> > RDT_RESOURCE_L3 schemata.
> >
> > resctrl exposes a single capacity mask per resource, so when more than
> > one capacity controller backs a cache level they must report the same
> > number of capacity blocks. The same holds for the other capabilities
> > resctrl exposes once per resource. A level whose controllers disagree
> > is left unexposed. Other levels are unaffected.
> >
> > The set of controllers backing each level is fixed when resctrl is set
> > up at late_initcall. Control domains are created in the cpuhp online
> > callback and keyed on the onlining CPU's cache id from cacheinfo, so a
> > CPU that is offline at probe time still joins its domain once it comes
> > online, provided a controller for its cache is in that set. A CPU whose
> > cache has no controller is left out of that level and a warning is
> > logged once. A domain is published on the ctrl_domains RCU list only
> > after it is fully initialized and brought online, and removed from the
> > list before it is taken offline, following the documented safe
> > traversal rules.
> >
> > Assisted-by: LLM
> > Tested-by: Chen Pei <cp0613@linux.alibaba.com>
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > MAINTAINERS | 2 +
> > arch/riscv/include/asm/resctrl.h | 147 +++++++
> > drivers/resctrl/Kconfig | 4 +
> > drivers/resctrl/Makefile | 1 +
> > drivers/resctrl/cbqri_resctrl.c | 831 +++++++++++++++++++++++++++++++++++++++
> > 5 files changed, 985 insertions(+)
[..]
> > diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c
> > new file mode 100644
> > index 000000000000..f10a24761b25
> > --- /dev/null
> > +++ b/drivers/resctrl/cbqri_resctrl.c
[..]
> > +static int cbqri_resctrl_setup(void)
> > +{
> > + int rid;
> > + int err;
> > +
> > + for (rid = 0; rid < RDT_NUM_RESOURCES; rid++)
> > + cbqri_resctrl_resources[rid].resctrl_res.rid = rid;
> > +
> Why can't cbqri_resctrl_control_init directly use
> cbqri_resctrl_resources? I feel this initialization is redundant.
This is similar to what x86 and arm mpam also do since it is important
before any resctrl code is called. for_each_rdt_resource() will get
stuck in a loop if the rid values are not initialized. In contrast,
cbqri_resctrl_control_init() only handles the resources for which
cbqri_resctrl_pick_caches() found a controller.
The initialization could be moved into cbqri_resctrl_control_init()
before any early return paths but it does introduce the possibility that
rid initialization could be missed if cbqri_resctrl_control_init() is
ever refactored. Given that, I'm inclined to keep the current structure.
Thanks,
Drew
WARNING: multiple messages have this Message-ID (diff)
From: Drew Fustini <fustini@kernel.org>
To: Sunil V L <sunilvl@oss.qualcomm.com>
Cc: "Adrien Ricciardi" <aricciardi@baylibre.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Atish Patra" <atish.patra@linux.dev>,
"Babu Moger" <babu.moger@amd.com>,
"Ben Horgan" <ben.horgan@arm.com>,
"Borislav Petkov" <bp@alien8.de>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"Dave Martin" <Dave.Martin@arm.com>,
"Fenghua Yu" <fenghuay@nvidia.com>,
"Gong Shuai" <gong.shuai@sanechips.com.cn>,
"Gong Shuai" <gsh517@gmail.com>,
guo.wenjia23@zte.com.cn, "James Morse" <james.morse@arm.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
liu.qingtao2@zte.com.cn,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <pjw@kernel.org>,
"Peter Newman" <peternewman@google.com>,
"Radim Krčmář" <rkrcmar@ventanamicro.com>,
"Reinette Chatre" <reinette.chatre@intel.com>,
"Rob Herring" <robh@kernel.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Sebastian Andrzej Siewior" <bigeasy@linutronix.de>,
"Clark Williams" <clrkwllms@kernel.org>,
"Steven Rostedt" <rostedt@goodmis.org>,
"Tony Luck" <tony.luck@intel.com>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Ved Shanbhogue" <ved@rivosinc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Zhanpeng Zhang" <zhangzhanpeng.jasper@bytedance.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
x86@kernel.org, devicetree@vger.kernel.org,
linux-rt-devel@lists.linux.dev, linux-doc@vger.kernel.org
Subject: Re: [PATCH v9 2/5] riscv_cbqri: resctrl: Add cache allocation via capacity block mask
Date: Sat, 17 Oct 2026 13:56:51 -0700 [thread overview]
Message-ID: <atPhE6rF0Uz93qF2@thelio> (raw)
In-Reply-To: <CAB19ukEkAOMnPpi2jVFz68GZ_7cwYmNtrBkxnfEJtFcPb7PJ5Q@mail.gmail.com>
On Mon, Oct 12, 2026 at 10:23:57PM +0530, Sunil V L wrote:
> On Sat, Oct 3, 2026 at 12:45 PM Drew Fustini <fustini@kernel.org> wrote:
> >
> > Wire CBQRI capacity controllers into resctrl as RDT_RESOURCE_L2 and
> > RDT_RESOURCE_L3 schemata.
> >
> > resctrl exposes a single capacity mask per resource, so when more than
> > one capacity controller backs a cache level they must report the same
> > number of capacity blocks. The same holds for the other capabilities
> > resctrl exposes once per resource. A level whose controllers disagree
> > is left unexposed. Other levels are unaffected.
> >
> > The set of controllers backing each level is fixed when resctrl is set
> > up at late_initcall. Control domains are created in the cpuhp online
> > callback and keyed on the onlining CPU's cache id from cacheinfo, so a
> > CPU that is offline at probe time still joins its domain once it comes
> > online, provided a controller for its cache is in that set. A CPU whose
> > cache has no controller is left out of that level and a warning is
> > logged once. A domain is published on the ctrl_domains RCU list only
> > after it is fully initialized and brought online, and removed from the
> > list before it is taken offline, following the documented safe
> > traversal rules.
> >
> > Assisted-by: LLM
> > Tested-by: Chen Pei <cp0613@linux.alibaba.com>
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > MAINTAINERS | 2 +
> > arch/riscv/include/asm/resctrl.h | 147 +++++++
> > drivers/resctrl/Kconfig | 4 +
> > drivers/resctrl/Makefile | 1 +
> > drivers/resctrl/cbqri_resctrl.c | 831 +++++++++++++++++++++++++++++++++++++++
> > 5 files changed, 985 insertions(+)
[..]
> > diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c
> > new file mode 100644
> > index 000000000000..f10a24761b25
> > --- /dev/null
> > +++ b/drivers/resctrl/cbqri_resctrl.c
[..]
> > +static int cbqri_resctrl_setup(void)
> > +{
> > + int rid;
> > + int err;
> > +
> > + for (rid = 0; rid < RDT_NUM_RESOURCES; rid++)
> > + cbqri_resctrl_resources[rid].resctrl_res.rid = rid;
> > +
> Why can't cbqri_resctrl_control_init directly use
> cbqri_resctrl_resources? I feel this initialization is redundant.
This is similar to what x86 and arm mpam also do since it is important
before any resctrl code is called. for_each_rdt_resource() will get
stuck in a loop if the rid values are not initialized. In contrast,
cbqri_resctrl_control_init() only handles the resources for which
cbqri_resctrl_pick_caches() found a controller.
The initialization could be moved into cbqri_resctrl_control_init()
before any early return paths but it does introduce the possibility that
rid initialization could be missed if cbqri_resctrl_control_init() is
ever refactored. Given that, I'm inclined to keep the current structure.
Thanks,
Drew
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next prev parent reply other threads:[~2026-10-17 20:56 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-03 7:12 [PATCH v9 0/5] riscv: Add initial CBQRI resctrl support Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-03 7:12 ` [PATCH v9 1/5] riscv_cbqri: Add capacity controller probe and allocation device ops Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-12 16:12 ` Sunil V L
2026-10-12 16:12 ` Sunil V L
2026-10-16 0:06 ` Drew Fustini
2026-10-16 0:06 ` Drew Fustini
2026-10-03 7:12 ` [PATCH v9 2/5] riscv_cbqri: resctrl: Add cache allocation via capacity block mask Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-12 16:53 ` Sunil V L
2026-10-12 16:53 ` Sunil V L
2026-10-17 20:56 ` Drew Fustini [this message]
2026-10-17 20:56 ` Drew Fustini
2026-10-20 18:37 ` Reinette Chatre
2026-10-20 18:37 ` Reinette Chatre
2026-10-20 20:07 ` Drew Fustini
2026-10-20 20:07 ` Drew Fustini
2026-10-03 7:12 ` [PATCH v9 3/5] riscv_cbqri: Make RESCTRL_FS available on RISC-V Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-12 16:57 ` Sunil V L
2026-10-12 16:57 ` Sunil V L
2026-10-03 7:12 ` [PATCH v9 4/5] dt-bindings: riscv: Add binding for CBQRI controllers Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-03 7:19 ` sashiko-bot
2026-10-03 7:53 ` Drew Fustini
2026-10-03 23:05 ` Conor Dooley
2026-10-03 23:05 ` Conor Dooley
2026-10-05 5:41 ` Drew Fustini
2026-10-05 5:41 ` Drew Fustini
2026-10-03 7:12 ` [PATCH v9 5/5] riscv_cbqri: Add CBQRI capacity allocation platform driver Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-12 17:03 ` Sunil V L
2026-10-12 17:03 ` Sunil V L
2026-10-18 6:24 ` Drew Fustini
2026-10-18 6:24 ` Drew Fustini
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