From: Drew Fustini <fustini@kernel.org>
To: Sunil V L <sunilvl@oss.qualcomm.com>
Cc: "Adrien Ricciardi" <aricciardi@baylibre.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Atish Patra" <atish.patra@linux.dev>,
"Babu Moger" <babu.moger@amd.com>,
"Ben Horgan" <ben.horgan@arm.com>,
"Borislav Petkov" <bp@alien8.de>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"Dave Martin" <Dave.Martin@arm.com>,
"Fenghua Yu" <fenghuay@nvidia.com>,
"Gong Shuai" <gong.shuai@sanechips.com.cn>,
"Gong Shuai" <gsh517@gmail.com>,
guo.wenjia23@zte.com.cn, "James Morse" <james.morse@arm.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
liu.qingtao2@zte.com.cn,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <pjw@kernel.org>,
"Peter Newman" <peternewman@google.com>,
"Radim Krčmář" <rkrcmar@ventanamicro.com>,
"Reinette Chatre" <reinette.chatre@intel.com>,
"Rob Herring" <robh@kernel.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Sebastian Andrzej Siewior" <bigeasy@linutronix.de>,
"Clark Williams" <clrkwllms@kernel.org>,
"Steven Rostedt" <rostedt@goodmis.org>,
"Tony Luck" <tony.luck@intel.com>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Ved Shanbhogue" <ved@rivosinc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Zhanpeng Zhang" <zhangzhanpeng.jasper@bytedance.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
x86@kernel.org, devicetree@vger.kernel.org,
linux-rt-devel@lists.linux.dev, linux-doc@vger.kernel.org
Subject: Re: [PATCH v9 5/5] riscv_cbqri: Add CBQRI capacity allocation platform driver
Date: Sat, 17 Oct 2026 23:24:19 -0700 [thread overview]
Message-ID: <atRmE5lKNxmskzTm@thelio> (raw)
In-Reply-To: <CAB19ukEMKp7iFHrTPawNj2dwf1n0D9VDBC2ycBPdCRbkGYN2eg@mail.gmail.com>
On Mon, Oct 12, 2026 at 10:33:21PM +0530, Sunil V L wrote:
> On Sat, Oct 3, 2026 at 12:45 PM Drew Fustini <fustini@kernel.org> wrote:
> >
> > Add a platform driver for CBQRI capacity controllers described in
> > device tree with the riscv,cbqri-capacity-controller compatible.
> >
> > The controller node points at the cache it governs with a
> > riscv,cbqri-cache phandle. The driver looks that cache up in cacheinfo
> > and uses its cache id as the resctrl domain id, so the binding does not
> > need to carry a CPU mask. The controller is then handed to the CBQRI
> > core, which probes its capabilities and decides whether to expose it
> > through resctrl.
> >
> > Nothing is vendor-specific and reg is the CBQRI register block itself,
> > so any SoC that describes a CBQRI capacity controller in device tree can
> > use the driver unchanged.
> >
> > Assisted-by: LLM
> > Tested-by: Chen Pei <cp0613@linux.alibaba.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > MAINTAINERS | 1 +
> > drivers/resctrl/Kconfig | 15 +++++
> > drivers/resctrl/Makefile | 1 +
> > drivers/resctrl/cbqri_capacity.c | 127 +++++++++++++++++++++++++++++++++++++++
> > 4 files changed, 144 insertions(+)
[..]
> > diff --git a/drivers/resctrl/cbqri_capacity.c b/drivers/resctrl/cbqri_capacity.c
> > new file mode 100644
> > index 000000000000..0670a676bdb1
> > --- /dev/null
> > +++ b/drivers/resctrl/cbqri_capacity.c
[..]
> > +static int cbqri_capacity_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct cbqri_controller_info info = {};
> > + struct device_node *cache_np;
> > + struct resource *res;
> > + u32 rcid_count, cache_level;
> > + int cache_id, cpu, ret;
> > +
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + if (!res)
> > + return -EINVAL;
> > +
> Unless I am missing something, I think you can simplify the code by
> using devm_platform_ioremap_resource().
Yes, I'll switch to devm_platform_get_and_ioremap_resource().
[..]
> > +
> > + info.type = CBQRI_CONTROLLER_TYPE_CAPACITY;
> > + info.addr = res->start;
> > + info.size = resource_size(res);
> > + info.rcid_count = rcid_count;
> > + info.cache_id = cache_id;
> > +
> > + ret = riscv_cbqri_register_cc_dt(&info, cache_level);
> >
> As I mentioned in the comment for another patch, this function doesn't
> need to have "_dt" in its name.
Good point, I'll drop it.
Thanks,
Drew
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WARNING: multiple messages have this Message-ID (diff)
From: Drew Fustini <fustini@kernel.org>
To: Sunil V L <sunilvl@oss.qualcomm.com>
Cc: "Adrien Ricciardi" <aricciardi@baylibre.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Atish Patra" <atish.patra@linux.dev>,
"Babu Moger" <babu.moger@amd.com>,
"Ben Horgan" <ben.horgan@arm.com>,
"Borislav Petkov" <bp@alien8.de>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"Dave Martin" <Dave.Martin@arm.com>,
"Fenghua Yu" <fenghuay@nvidia.com>,
"Gong Shuai" <gong.shuai@sanechips.com.cn>,
"Gong Shuai" <gsh517@gmail.com>,
guo.wenjia23@zte.com.cn, "James Morse" <james.morse@arm.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
liu.qingtao2@zte.com.cn,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <pjw@kernel.org>,
"Peter Newman" <peternewman@google.com>,
"Radim Krčmář" <rkrcmar@ventanamicro.com>,
"Reinette Chatre" <reinette.chatre@intel.com>,
"Rob Herring" <robh@kernel.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Sebastian Andrzej Siewior" <bigeasy@linutronix.de>,
"Clark Williams" <clrkwllms@kernel.org>,
"Steven Rostedt" <rostedt@goodmis.org>,
"Tony Luck" <tony.luck@intel.com>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Ved Shanbhogue" <ved@rivosinc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Zhanpeng Zhang" <zhangzhanpeng.jasper@bytedance.com>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
x86@kernel.org, devicetree@vger.kernel.org,
linux-rt-devel@lists.linux.dev, linux-doc@vger.kernel.org
Subject: Re: [PATCH v9 5/5] riscv_cbqri: Add CBQRI capacity allocation platform driver
Date: Sat, 17 Oct 2026 23:24:19 -0700 [thread overview]
Message-ID: <atRmE5lKNxmskzTm@thelio> (raw)
In-Reply-To: <CAB19ukEMKp7iFHrTPawNj2dwf1n0D9VDBC2ycBPdCRbkGYN2eg@mail.gmail.com>
On Mon, Oct 12, 2026 at 10:33:21PM +0530, Sunil V L wrote:
> On Sat, Oct 3, 2026 at 12:45 PM Drew Fustini <fustini@kernel.org> wrote:
> >
> > Add a platform driver for CBQRI capacity controllers described in
> > device tree with the riscv,cbqri-capacity-controller compatible.
> >
> > The controller node points at the cache it governs with a
> > riscv,cbqri-cache phandle. The driver looks that cache up in cacheinfo
> > and uses its cache id as the resctrl domain id, so the binding does not
> > need to carry a CPU mask. The controller is then handed to the CBQRI
> > core, which probes its capabilities and decides whether to expose it
> > through resctrl.
> >
> > Nothing is vendor-specific and reg is the CBQRI register block itself,
> > so any SoC that describes a CBQRI capacity controller in device tree can
> > use the driver unchanged.
> >
> > Assisted-by: LLM
> > Tested-by: Chen Pei <cp0613@linux.alibaba.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > MAINTAINERS | 1 +
> > drivers/resctrl/Kconfig | 15 +++++
> > drivers/resctrl/Makefile | 1 +
> > drivers/resctrl/cbqri_capacity.c | 127 +++++++++++++++++++++++++++++++++++++++
> > 4 files changed, 144 insertions(+)
[..]
> > diff --git a/drivers/resctrl/cbqri_capacity.c b/drivers/resctrl/cbqri_capacity.c
> > new file mode 100644
> > index 000000000000..0670a676bdb1
> > --- /dev/null
> > +++ b/drivers/resctrl/cbqri_capacity.c
[..]
> > +static int cbqri_capacity_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct cbqri_controller_info info = {};
> > + struct device_node *cache_np;
> > + struct resource *res;
> > + u32 rcid_count, cache_level;
> > + int cache_id, cpu, ret;
> > +
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + if (!res)
> > + return -EINVAL;
> > +
> Unless I am missing something, I think you can simplify the code by
> using devm_platform_ioremap_resource().
Yes, I'll switch to devm_platform_get_and_ioremap_resource().
[..]
> > +
> > + info.type = CBQRI_CONTROLLER_TYPE_CAPACITY;
> > + info.addr = res->start;
> > + info.size = resource_size(res);
> > + info.rcid_count = rcid_count;
> > + info.cache_id = cache_id;
> > +
> > + ret = riscv_cbqri_register_cc_dt(&info, cache_level);
> >
> As I mentioned in the comment for another patch, this function doesn't
> need to have "_dt" in its name.
Good point, I'll drop it.
Thanks,
Drew
next prev parent reply other threads:[~2026-10-18 6:24 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-03 7:12 [PATCH v9 0/5] riscv: Add initial CBQRI resctrl support Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-03 7:12 ` [PATCH v9 1/5] riscv_cbqri: Add capacity controller probe and allocation device ops Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-12 16:12 ` Sunil V L
2026-10-12 16:12 ` Sunil V L
2026-10-16 0:06 ` Drew Fustini
2026-10-16 0:06 ` Drew Fustini
2026-10-03 7:12 ` [PATCH v9 2/5] riscv_cbqri: resctrl: Add cache allocation via capacity block mask Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-12 16:53 ` Sunil V L
2026-10-12 16:53 ` Sunil V L
2026-10-17 20:56 ` Drew Fustini
2026-10-17 20:56 ` Drew Fustini
2026-10-20 18:37 ` Reinette Chatre
2026-10-20 18:37 ` Reinette Chatre
2026-10-20 20:07 ` Drew Fustini
2026-10-20 20:07 ` Drew Fustini
2026-10-03 7:12 ` [PATCH v9 3/5] riscv_cbqri: Make RESCTRL_FS available on RISC-V Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-12 16:57 ` Sunil V L
2026-10-12 16:57 ` Sunil V L
2026-10-03 7:12 ` [PATCH v9 4/5] dt-bindings: riscv: Add binding for CBQRI controllers Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-03 7:19 ` sashiko-bot
2026-10-03 7:53 ` Drew Fustini
2026-10-03 23:05 ` Conor Dooley
2026-10-03 23:05 ` Conor Dooley
2026-10-05 5:41 ` Drew Fustini
2026-10-05 5:41 ` Drew Fustini
2026-10-03 7:12 ` [PATCH v9 5/5] riscv_cbqri: Add CBQRI capacity allocation platform driver Drew Fustini
2026-10-03 7:12 ` Drew Fustini
2026-10-12 17:03 ` Sunil V L
2026-10-12 17:03 ` Sunil V L
2026-10-18 6:24 ` Drew Fustini [this message]
2026-10-18 6:24 ` Drew Fustini
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