All of lore.kernel.org
 help / color / mirror / Atom feed
From: Anton Johansson via qemu development <qemu-devel@nongnu.org>
To: Brian Cain <brian.cain@oss.qualcomm.com>
Cc: qemu-devel@nongnu.org, "Laurent Vivier" <lvivier@redhat.com>,
	"Helge Deller" <deller@gmx.de>,
	"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>,
	"Fabiano Rosas" <farosas@suse.de>,
	"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
	"Alessandro Di Federico" <ale@rev.ng>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Laurent Vivier" <laurent@vivier.eu>
Subject: Re: [PATCH 12/14] hw/hexagon: add subsystem-base property
Date: Tue, 20 Oct 2026 16:53:49 +0200	[thread overview]
Message-ID: <atdwwL2ohpFU2Gpr@hive.localdomain> (raw)
In-Reply-To: <20261019055245.1457795-13-brian.cain@oss.qualcomm.com>

On 19/10/26, Brian Cain wrote:
> Let the hexagon-sim-style machines their QDSP6 subsystem, and with it the
> l2vic and QTimer.
> 
> The config table's subsystem base is updated to align with the chosen
> address.
> 
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---
>  MAINTAINERS                       |  1 +
>  include/hw/hexagon/hexagon.h      |  4 ++
>  hw/hexagon/hexagon_dsp.c          | 62 +++++++++++++++++++++++-
>  tests/qtest/hexagon-config-test.c | 78 +++++++++++++++++++++++++++++++
>  tests/qtest/meson.build           |  3 +-
>  5 files changed, 146 insertions(+), 2 deletions(-)
>  create mode 100644 tests/qtest/hexagon-config-test.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 04df9db77dc..f1fbc971fed 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1386,6 +1386,7 @@ F: include/hw/misc/qcom-qdsp6ss-clk.h
>  F: configs/devices/hexagon-softmmu/default.mak
>  F: docs/system/hexagon/
>  F: tests/functional/hexagon/
> +F: tests/qtest/hexagon-config-test.c
>  F: tests/qtest/qcom-dsp-test.c
>  F: docs/devel/hexagon-sys.rst
>  
> diff --git a/include/hw/hexagon/hexagon.h b/include/hw/hexagon/hexagon.h
> index 7d15a9e1eb0..32acc2aa26b 100644
> --- a/include/hw/hexagon/hexagon.h
> +++ b/include/hw/hexagon/hexagon.h
> @@ -44,6 +44,10 @@ typedef enum {
>  
>  #define HEXAGON_CFGSPACE_ENTRIES (128)
>  
> +/* Offsets of q6ss cfg peripherals from the subsystem base. */
> +#define HEXAGON_L2VIC_OFFSET  0x10000
> +#define HEXAGON_QTIMER_OFFSET 0x21000
> +
>  union hexagon_config_table {
>      struct {
>          /* Base address of L2TCM space */
> diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c
> index 9f6f34ef9be..1f92a8adccf 100644
> --- a/hw/hexagon/hexagon_dsp.c
> +++ b/hw/hexagon/hexagon_dsp.c
> @@ -17,6 +17,7 @@
>  #include "hw/hexagon/hex-subsys.h"
>  #include "hw/core/loader.h"
>  #include "qapi/error.h"
> +#include "qapi/visitor.h"
>  #include "qemu/error-report.h"
>  #include "qemu/log.h"
>  #include "elf.h"
> @@ -35,6 +36,7 @@
>  #include "machine_cfg_v81qa_1.h.inc"
>  
>  #define TYPE_HEXAGON_DSP_MACHINE "hexagon-dsp-machine"
> +#define HEXAGON_DSP_SUBSYSTEM_BASE 0xfc900000
>  OBJECT_DECLARE_SIMPLE_TYPE(HexagonDspMachineState, HEXAGON_DSP_MACHINE)
>  
>  struct HexagonDspMachineState {
> @@ -42,6 +44,8 @@ struct HexagonDspMachineState {
>  
>      hwaddr isdb_secure_flag;
>      hwaddr isdb_trusted_flag;
> +    uint32_t subsystem_base;
> +    struct hexagon_machine_config config;
>  };
>  
>  static HexagonDspMachineState *current_dms;
> @@ -107,6 +111,50 @@ static void do_cpu_reset(void *opaque)
>      cpu_reset(cs);
>  }
>  
> +static void hexagon_sim_get_subsystem_base(Object *obj, Visitor *v,
> +                                           const char *name, void *opaque,
> +                                           Error **errp)
> +{
> +    HexagonDspMachineState *dms = HEXAGON_DSP_MACHINE(obj);
> +    uint32_t value = dms->subsystem_base;
> +
> +    visit_type_uint32(v, name, &value, errp);
> +}
> +
> +static void hexagon_sim_set_subsystem_base(Object *obj, Visitor *v,
> +                                           const char *name, void *opaque,
> +                                           Error **errp)
> +{
> +    HexagonDspMachineState *dms = HEXAGON_DSP_MACHINE(obj);
> +    uint32_t value;
> +
> +    if (!visit_type_uint32(v, name, &value, errp)) {
> +        return;
> +    }
> +    if (!value || !QEMU_IS_ALIGNED(value, 64 * KiB)) {
> +        error_setg(errp, "subsystem-base must be nonzero and 64 KiB aligned");
> +        return;
> +    }
> +
> +    dms->subsystem_base = value;
> +}
> +
> +static void add_dsp_properties(ObjectClass *oc)
> +{
> +    object_class_property_add(oc, "subsystem-base", "uint32",
> +                              hexagon_sim_get_subsystem_base,
> +                              hexagon_sim_set_subsystem_base, NULL, NULL);
> +    object_class_property_set_description(oc, "subsystem-base",
> +                                          "Simulator subsystem base address");
> +}
> +
> +static void hexagon_dsp_init(Object *obj)
> +{
> +    HexagonDspMachineState *dms = HEXAGON_DSP_MACHINE(obj);
> +
> +    dms->subsystem_base = HEXAGON_DSP_SUBSYSTEM_BASE;
> +}
> +
>  static void hexagon_common_init(MachineState *machine, Rev_t rev,
>                                  const struct hexagon_machine_config *m_cfg)
>  {
> @@ -121,7 +169,13 @@ static void hexagon_common_init(MachineState *machine, Rev_t rev,
>  
>      machine->enable_graphics = 0;
>  
> -    hex_subsys_create(hms, m_cfg, rev);
> +    dms->config = *m_cfg;
> +    dms->config.csr_base = dms->subsystem_base;
> +    dms->config.l2vic_base = dms->subsystem_base + HEXAGON_L2VIC_OFFSET;
> +    dms->config.qtmr_region = dms->subsystem_base + HEXAGON_QTIMER_OFFSET;

Since the only requirement on `subsystem_base` is that it's non-zero and
64 KiB aligned, this addition can overflow with e.g.
`subsystem-base=0xffff0000`, adding an upper-bounds check to the set
function could be nice to avoid any footguns in the future.


> +    dms->config.cfgtable.subsystem_base = dms->subsystem_base >> 16;
> +
> +    hex_subsys_create(hms, &dms->config, rev);
>  
>      g_autofree HexagonCPU **cpus = g_new(HexagonCPU *, machine->smp.cpus);
>  
> @@ -183,6 +237,7 @@ static void v66g_1024_init(ObjectClass *oc, const void *data)
>      mc->is_default = true;
>      mc->default_cpu_type = TYPE_HEXAGON_CPU_V66;
>      mc->default_cpus = 4;
> +    add_dsp_properties(oc);
>  }

-- 
Anton Johansson
rev.ng Labs Srl.


  parent reply	other threads:[~2026-10-20 14:48 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-19  5:52 [PATCH 00/14] Hexagon: Add real SoC-style machines Brian Cain
2026-10-19  5:52 ` [PATCH 01/14] Hexagon: add v85 CPU model Brian Cain
2026-10-19 22:32   ` Anton Johansson via qemu development
2026-10-19 23:58     ` Brian Cain
2026-10-19  5:52 ` [PATCH 02/14] hw/hexagon: let a machine place its DDR Brian Cain
2026-10-19 21:40   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 03/14] hw/hexagon: introduce hex-board abstraction Brian Cain
2026-10-19 21:42   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 04/14] hw/hexagon: convert virt board to hex-board Brian Cain
2026-10-19 21:40   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 05/14] hw/misc: add the QDSP6SS PLL, RCG Brian Cain
2026-10-19 21:51   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 06/14] hw/hexagon: add the QCS6490 CDSP machine Brian Cain
2026-10-19 22:15   ` Pierrick Bouvier
2026-10-20 11:28   ` Anton Johansson via qemu development
2026-10-19  5:52 ` [PATCH 07/14] hw/hexagon: add the SA8775P " Brian Cain
2026-10-19 22:15   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 08/14] hw/hexagon: add the SC8480XP NSP0 machine Brian Cain
2026-10-19 22:15   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 09/14] hw/hexagon: add the SA8797P " Brian Cain
2026-10-19 22:15   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 10/14] hw/hexagon: add the SM8975 NSP machine Brian Cain
2026-10-19 22:15   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 11/14] hw/hexagon: add v79NA1 machine Brian Cain
2026-10-19 22:16   ` Pierrick Bouvier
2026-10-19  5:52 ` [PATCH 12/14] hw/hexagon: add subsystem-base property Brian Cain
2026-10-19 22:16   ` Pierrick Bouvier
2026-10-20 14:53   ` Anton Johansson via qemu development [this message]
2026-10-19  5:52 ` [PATCH 13/14] target/hexagon: fix the allocframe framekey Brian Cain
2026-10-19  5:52 ` [PATCH 14/14] tests/functional/hexagon: boot DSP firmware Brian Cain
2026-10-19 13:47   ` Philippe Mathieu-Daudé
2026-10-19 13:51     ` Brian Cain
2026-10-19 15:22       ` Brian Cain
2026-10-19 21:50     ` Pierrick Bouvier
2026-10-19 22:03       ` Brian Cain

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=atdwwL2ohpFU2Gpr@hive.localdomain \
    --to=qemu-devel@nongnu.org \
    --cc=ale@rev.ng \
    --cc=anjo@rev.ng \
    --cc=brian.cain@oss.qualcomm.com \
    --cc=deller@gmx.de \
    --cc=farosas@suse.de \
    --cc=laurent@vivier.eu \
    --cc=lvivier@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=philmd@oss.qualcomm.com \
    --cc=pierrick.bouvier@oss.qualcomm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.