[PATCH 0/4] arm: google: Add initial support for Google Tensor G5

[PATCH 0/4] arm: google: Add initial support for Google Tensor G5

[Kuan-Wei Chiu]

This series adds initial architecture and board support for the Google
Tensor G5 SoC, referred to in code as LGA, and the Pixel 10 series
boards based on it.

U-Boot is built to run as the BL33 payload. This initial port sets up
the MMU mapping and DRAM bounds, disables the APC watchdog left running
by earlier boot stages, and enables the serial console.

The device trees for LGA are queued in the Samsung and Google SoC tree
for Linux v7.4 [1] and have not yet been synced into dts/upstream, so
cherry-picking those commits locally is required to build this series
until the next dts/upstream subtree update.

Tested on real silicon:

U-Boot 2026.10-00821-g86c1a8698ac2 (Oct 14 2026 - 21:47:47 +0000)

Model: Frankel
DRAM:  2 GiB
ERROR: reserving fdt memory region failed (addr=be000000 size=1000000 flags=2): -17
Core:  7 devices, 7 uclasses, devicetree: separate
MMC:   
Loading Environment from nowhere...
Loading Environment from nowhere... OK
In:    serial@db62000
Out:   serial@db62000
Err:   serial@db62000
=> 

[1] https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git/log/?h=for-v7.4/google-lga

---
This series only brings the board up to an interactive serial shell. I
plan to follow up with at least UFS driver support in future series to
make U-Boot practically useful on these devices.

Kuan-Wei Chiu (4):
  arm: Add Google Tensor SoC architecture support
  board: google: Add Google Tensor G5 board support
  arm: dts: lga: Enable console UART in U-Boot
  configs: google: Add lga default configuration

 MAINTAINERS                  | 10 ++++++
 arch/arm/Kconfig             | 21 ++++++++++++
 arch/arm/dts/lga-u-boot.dtsi |  9 +++++
 arch/arm/mach-google/Kconfig | 18 ++++++++++
 board/google/lga/Kconfig     | 14 ++++++++
 board/google/lga/MAINTAINERS |  6 ++++
 board/google/lga/Makefile    |  3 ++
 board/google/lga/lga.c       | 65 ++++++++++++++++++++++++++++++++++++
 configs/google_lga_defconfig | 10 ++++++
 include/configs/lga.h        |  9 +++++
 10 files changed, 165 insertions(+)
 create mode 100644 arch/arm/dts/lga-u-boot.dtsi
 create mode 100644 arch/arm/mach-google/Kconfig
 create mode 100644 board/google/lga/Kconfig
 create mode 100644 board/google/lga/MAINTAINERS
 create mode 100644 board/google/lga/Makefile
 create mode 100644 board/google/lga/lga.c
 create mode 100644 configs/google_lga_defconfig
 create mode 100644 include/configs/lga.h

-- 
2.56.0.212.g129ede20d9-goog

[PATCH 1/4] arm: Add Google Tensor SoC architecture support

[Kuan-Wei Chiu]

The first four Google Tensor SoCs were offshoots of Samsung Exynos
SoCs. Starting with the Google Tensor G5 SoC in Pixel 10 phones,
Google Tensor SoCs are of Google's own design. Add ARCH_GOOGLE and
the mach-google directory to support this SoC family.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
---
 MAINTAINERS                  |  6 ++++++
 arch/arm/Kconfig             | 21 +++++++++++++++++++++
 arch/arm/mach-google/Kconfig |  7 +++++++
 3 files changed, 34 insertions(+)
 create mode 100644 arch/arm/mach-google/Kconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index 28d090d3c36..36b4c7f0246 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -356,6 +356,12 @@ F:	arch/arm/cpu/arm1136/mx*/
 F:	arch/arm/cpu/arm926ejs/mx*/
 F:	arch/arm/include/asm/arch-mx*/
 
+ARM GOOGLE TENSOR SOC SUPPORT
+M:	Kuan-Wei Chiu <visitorckw@gmail.com>
+S:	Maintained
+F:	arch/arm/mach-google/
+K:	[gG]oogle.?[tT]ensor
+
 ARM HISILICON
 M:	Peter Griffin <peter.griffin@linaro.org>
 M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3e9f3b51031..e49438fde41 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -2252,6 +2252,25 @@ config ARCH_GXP
 	select OF_CONTROL
 	imply CMD_DM
 
+config ARCH_GOOGLE
+	bool "Google-Designed SoC family"
+	select ARM64
+	select DM
+	select DM_SERIAL
+	select OF_CONTROL
+	select OF_UPSTREAM
+	select POSITION_INDEPENDENT
+	select SYSRESET
+	select SYSRESET_PSCI
+	select SYS_NS16550
+	select SYS_NS16550_MEM32
+	imply CMD_DM
+	help
+	  This enables support for Google Tensor SoCs starting at the
+	  Google Tensor G5 (Laguna) found in Pixel 10 and later phones.
+	  Tensor G1 to G4 are offshoots of the Exynos family and are
+	  enabled via ARCH_EXYNOS.
+
 endchoice
 
 config SUPPORT_PASSING_ATAGS
@@ -2356,6 +2375,8 @@ source "arch/arm/mach-davinci/Kconfig"
 
 source "arch/arm/mach-exynos/Kconfig"
 
+source "arch/arm/mach-google/Kconfig"
+
 source "arch/arm/mach-hpe/gxp/Kconfig"
 
 source "arch/arm/mach-highbank/Kconfig"
diff --git a/arch/arm/mach-google/Kconfig b/arch/arm/mach-google/Kconfig
new file mode 100644
index 00000000000..a9e605ebb82
--- /dev/null
+++ b/arch/arm/mach-google/Kconfig
@@ -0,0 +1,7 @@
+
+if ARCH_GOOGLE
+
+config SYS_VENDOR
+	default "google"
+
+endif
-- 
2.56.0.212.g129ede20d9-goog

Re: [PATCH 1/4] arm: Add Google Tensor SoC architecture support

[Simon Glass]

Hi Kuan-Wei,

On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:
> arm: Add Google Tensor SoC architecture support
>
> The first four Google Tensor SoCs were offshoots of Samsung Exynos
> SoCs. Starting with the Google Tensor G5 SoC in Pixel 10 phones,
> Google Tensor SoCs are of Google's own design. Add ARCH_GOOGLE and
> the mach-google directory to support this SoC family.
>
> Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
>
>  MAINTAINERS                  |  6 ++++++
>  arch/arm/Kconfig             | 21 +++++++++++++++++++++
>  arch/arm/mach-google/Kconfig |  7 +++++++
>  3 files changed, 34 insertions(+)

> diff --git a/arch/arm/mach-google/Kconfig b/arch/arm/mach-google/Kconfig
> new file mode 100644
> index 00000000000..a9e605ebb82
> --- /dev/null
> +++ b/arch/arm/mach-google/Kconfig
> @@ -0,0 +1,7 @@
> +
> +if ARCH_GOOGLE

The SPDX header is missing, and patch 2/4 adds it to a file this patch
created. Please can you add '# SPDX-License-Identifier:
GPL-2.0-or-later' as the first line here, and drop the leading blank
line, so the file is correct from the start.

> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> @@ -2252,6 +2252,25 @@ config ARCH_GXP
> +config ARCH_GOOGLE
> +	bool "Google-Designed SoC family"

"Google-designed SoC family" would be more usual. It is also worth
considering "Google Tensor SoC family" since that is the name used
everywhere else in the series and in the help text.

> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> @@ -2252,6 +2252,25 @@ config ARCH_GXP
> +	select OF_UPSTREAM
> +	select POSITION_INDEPENDENT

Just to check, is POSITION_INDEPENDENT actually required, or just a
convenience given the BL33 load address ? Forcing it on means
downstream boards cannot opt out. If it is only needed for the current
defconfig, 'imply' would be a better fit than 'select'.

Regards,
Simon

Re: [PATCH 1/4] arm: Add Google Tensor SoC architecture support

[Kuan-Wei Chiu]

Hi Simon,

On Mon, Oct 19, 2026 at 06:27:33AM -0700, Simon Glass wrote:
> Hi Kuan-Wei,
> 
> On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:
> > arm: Add Google Tensor SoC architecture support
> >
> > The first four Google Tensor SoCs were offshoots of Samsung Exynos
> > SoCs. Starting with the Google Tensor G5 SoC in Pixel 10 phones,
> > Google Tensor SoCs are of Google's own design. Add ARCH_GOOGLE and
> > the mach-google directory to support this SoC family.
> >
> > Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
> >
> >  MAINTAINERS                  |  6 ++++++
> >  arch/arm/Kconfig             | 21 +++++++++++++++++++++
> >  arch/arm/mach-google/Kconfig |  7 +++++++
> >  3 files changed, 34 insertions(+)
> 
> > diff --git a/arch/arm/mach-google/Kconfig b/arch/arm/mach-google/Kconfig
> > new file mode 100644
> > index 00000000000..a9e605ebb82
> > --- /dev/null
> > +++ b/arch/arm/mach-google/Kconfig
> > @@ -0,0 +1,7 @@
> > +
> > +if ARCH_GOOGLE
> 
> The SPDX header is missing, and patch 2/4 adds it to a file this patch
> created. Please can you add '# SPDX-License-Identifier:
> GPL-2.0-or-later' as the first line here, and drop the leading blank
> line, so the file is correct from the start.

Ack. Will add.

> 
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > @@ -2252,6 +2252,25 @@ config ARCH_GXP
> > +config ARCH_GOOGLE
> > +	bool "Google-Designed SoC family"
> 
> "Google-designed SoC family" would be more usual. It is also worth
> considering "Google Tensor SoC family" since that is the name used
> everywhere else in the series and in the help text.

This prompt and the help text below were taken from the Kconfig in the
upstream Linux kernel to keep them consistent. It uses Google-designed
rather than Google Tensor because Tensor G1 to G4 are also branded as
Google Tensor SoCs, but they are supported under ARCH_EXYNOS.

> 
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > @@ -2252,6 +2252,25 @@ config ARCH_GXP
> > +	select OF_UPSTREAM
> > +	select POSITION_INDEPENDENT
> 
> Just to check, is POSITION_INDEPENDENT actually required, or just a
> convenience given the BL33 load address ? Forcing it on means
> downstream boards cannot opt out. If it is only needed for the current
> defconfig, 'imply' would be a better fit than 'select'.
> 
I'll change it to imply in v2.

Regards,
Kuan-Wei

Re: [PATCH 1/4] arm: Add Google Tensor SoC architecture support

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 2705 bytes --]

On Wed, Oct 21, 2026 at 05:15:32PM +0800, Kuan-Wei Chiu wrote:
> Hi Simon,
> 
> On Mon, Oct 19, 2026 at 06:27:33AM -0700, Simon Glass wrote:
> > Hi Kuan-Wei,
> > 
> > On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:
> > > arm: Add Google Tensor SoC architecture support
> > >
> > > The first four Google Tensor SoCs were offshoots of Samsung Exynos
> > > SoCs. Starting with the Google Tensor G5 SoC in Pixel 10 phones,
> > > Google Tensor SoCs are of Google's own design. Add ARCH_GOOGLE and
> > > the mach-google directory to support this SoC family.
> > >
> > > Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
> > >
> > >  MAINTAINERS                  |  6 ++++++
> > >  arch/arm/Kconfig             | 21 +++++++++++++++++++++
> > >  arch/arm/mach-google/Kconfig |  7 +++++++
> > >  3 files changed, 34 insertions(+)
> > 
> > > diff --git a/arch/arm/mach-google/Kconfig b/arch/arm/mach-google/Kconfig
> > > new file mode 100644
> > > index 00000000000..a9e605ebb82
> > > --- /dev/null
> > > +++ b/arch/arm/mach-google/Kconfig
> > > @@ -0,0 +1,7 @@
> > > +
> > > +if ARCH_GOOGLE
> > 
> > The SPDX header is missing, and patch 2/4 adds it to a file this patch
> > created. Please can you add '# SPDX-License-Identifier:
> > GPL-2.0-or-later' as the first line here, and drop the leading blank
> > line, so the file is correct from the start.
> 
> Ack. Will add.
> 
> > 
> > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > > @@ -2252,6 +2252,25 @@ config ARCH_GXP
> > > +config ARCH_GOOGLE
> > > +	bool "Google-Designed SoC family"
> > 
> > "Google-designed SoC family" would be more usual. It is also worth
> > considering "Google Tensor SoC family" since that is the name used
> > everywhere else in the series and in the help text.
> 
> This prompt and the help text below were taken from the Kconfig in the
> upstream Linux kernel to keep them consistent. It uses Google-designed
> rather than Google Tensor because Tensor G1 to G4 are also branded as
> Google Tensor SoCs, but they are supported under ARCH_EXYNOS.
> 
> > 
> > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > > @@ -2252,6 +2252,25 @@ config ARCH_GXP
> > > +	select OF_UPSTREAM
> > > +	select POSITION_INDEPENDENT
> > 
> > Just to check, is POSITION_INDEPENDENT actually required, or just a
> > convenience given the BL33 load address ? Forcing it on means
> > downstream boards cannot opt out. If it is only needed for the current
> > defconfig, 'imply' would be a better fit than 'select'.
> 
> I'll change it to imply in v2.

Don't change it unless there's some reason you'd ever want to be
hard-coding the address.

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 2/4] board: google: Add Google Tensor G5 board support

[Kuan-Wei Chiu]

Add initial board support for Google Tensor G5 SoC boards. U-Boot
runs as BL33 loaded at 0xbe000000. Configure the MMU map, DRAM
bounds, and disable the APC watchdog left running by earlier
bootloader stages.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
---
 MAINTAINERS                  |  2 ++
 arch/arm/mach-google/Kconfig | 11 ++++++
 board/google/lga/Kconfig     | 14 ++++++++
 board/google/lga/MAINTAINERS |  5 +++
 board/google/lga/Makefile    |  3 ++
 board/google/lga/lga.c       | 65 ++++++++++++++++++++++++++++++++++++
 include/configs/lga.h        |  9 +++++
 7 files changed, 109 insertions(+)
 create mode 100644 board/google/lga/Kconfig
 create mode 100644 board/google/lga/MAINTAINERS
 create mode 100644 board/google/lga/Makefile
 create mode 100644 board/google/lga/lga.c
 create mode 100644 include/configs/lga.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 36b4c7f0246..2d8ffe7887a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -360,6 +360,8 @@ ARM GOOGLE TENSOR SOC SUPPORT
 M:	Kuan-Wei Chiu <visitorckw@gmail.com>
 S:	Maintained
 F:	arch/arm/mach-google/
+F:	board/google/lga/
+F:	include/configs/lga.h
 K:	[gG]oogle.?[tT]ensor
 
 ARM HISILICON
diff --git a/arch/arm/mach-google/Kconfig b/arch/arm/mach-google/Kconfig
index a9e605ebb82..f6a5c9c43f2 100644
--- a/arch/arm/mach-google/Kconfig
+++ b/arch/arm/mach-google/Kconfig
@@ -1,7 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 if ARCH_GOOGLE
 
 config SYS_VENDOR
 	default "google"
 
+config TARGET_GOOGLE_LGA
+	bool "Google Tensor G5 (LGA)"
+	default y
+	help
+	  Support for Google Tensor G5 (Laguna) SoC and boards based on it,
+	  including Frankel (Pixel 10), Blazer (Pixel 10 Pro), and Mustang
+	  (Pixel 10 Pro XL).
+
+source "board/google/lga/Kconfig"
+
 endif
diff --git a/board/google/lga/Kconfig b/board/google/lga/Kconfig
new file mode 100644
index 00000000000..22bb233f140
--- /dev/null
+++ b/board/google/lga/Kconfig
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+if TARGET_GOOGLE_LGA
+
+config SYS_BOARD
+	default "lga"
+
+config SYS_SOC
+	default "lga"
+
+config SYS_CONFIG_NAME
+	default "lga"
+
+endif
diff --git a/board/google/lga/MAINTAINERS b/board/google/lga/MAINTAINERS
new file mode 100644
index 00000000000..1dd03afab42
--- /dev/null
+++ b/board/google/lga/MAINTAINERS
@@ -0,0 +1,5 @@
+GOOGLE TENSOR G5 (LGA) BOARD
+M:	Kuan-Wei Chiu <visitorckw@gmail.com>
+S:	Maintained
+F:	board/google/lga/
+F:	include/configs/lga.h
diff --git a/board/google/lga/Makefile b/board/google/lga/Makefile
new file mode 100644
index 00000000000..4343e05c78f
--- /dev/null
+++ b/board/google/lga/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+obj-y += lga.o
diff --git a/board/google/lga/lga.c b/board/google/lga/lga.c
new file mode 100644
index 00000000000..e495d34ce0b
--- /dev/null
+++ b/board/google/lga/lga.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2026 Google LLC
+ */
+
+#include <init.h>
+#include <asm/armv8/mmu.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define LGA_WDT1_BASE		0x200c5000
+#define LGA_WDT_CONTROL		0x08
+#define LGA_WDT_CONTROL_ENABLE	BIT(0)
+#define LGA_WDT_KEY		0x10
+#define LGA_WDT_KEY_UNLOCK	0x00c0ffee
+
+#define LGA_SDRAM_BASE		0x80000000UL
+#define LGA_SDRAM_SIZE		0x80000000UL
+#define LGA_BL33_RAM_TOP	0xc0000000UL
+
+static struct mm_region lga_mem_map[] = {
+	{
+		.virt = 0x00000000UL,
+		.phys = 0x00000000UL,
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+	}, {
+		.virt = LGA_SDRAM_BASE,
+		.phys = LGA_SDRAM_BASE,
+		.size = LGA_SDRAM_SIZE,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE,
+	}, {
+		0,
+	}
+};
+
+struct mm_region *mem_map = lga_mem_map;
+
+int dram_init(void)
+{
+	gd->ram_base = LGA_SDRAM_BASE;
+	gd->ram_size = LGA_SDRAM_SIZE;
+
+	return 0;
+}
+
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
+{
+	return LGA_BL33_RAM_TOP;
+}
+
+int board_init(void)
+{
+	writel(LGA_WDT_KEY_UNLOCK, LGA_WDT1_BASE + LGA_WDT_KEY);
+	clrbits_le32(LGA_WDT1_BASE + LGA_WDT_CONTROL, LGA_WDT_CONTROL_ENABLE);
+	writel(0, LGA_WDT1_BASE + LGA_WDT_KEY);
+
+	return 0;
+}
diff --git a/include/configs/lga.h b/include/configs/lga.h
new file mode 100644
index 00000000000..c770c5837f4
--- /dev/null
+++ b/include/configs/lga.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright 2026 Google LLC
+ */
+
+#ifndef __CONFIG_LGA_H
+#define __CONFIG_LGA_H
+
+#endif /* __CONFIG_LGA_H */
-- 
2.56.0.212.g129ede20d9-goog

Re: [PATCH 2/4] board: google: Add Google Tensor G5 board support

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 884 bytes --]

On Fri, Oct 16, 2026 at 04:02:14AM +0000, Kuan-Wei Chiu wrote:
> Add initial board support for Google Tensor G5 SoC boards. U-Boot
> runs as BL33 loaded at 0xbe000000. Configure the MMU map, DRAM
> bounds, and disable the APC watchdog left running by earlier
> bootloader stages.
> 
> Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
[snip]
> diff --git a/include/configs/lga.h b/include/configs/lga.h
> new file mode 100644
> index 00000000000..c770c5837f4
> --- /dev/null
> +++ b/include/configs/lga.h
> @@ -0,0 +1,9 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * Copyright 2026 Google LLC
> + */
> +
> +#ifndef __CONFIG_LGA_H
> +#define __CONFIG_LGA_H
> +
> +#endif /* __CONFIG_LGA_H */

Does this get populated later? I *thought* we had done the required
changes so that a board can avoid having an empty config.h file.

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH 2/4] board: google: Add Google Tensor G5 board support

[Kuan-Wei Chiu]

On Fri, Oct 16, 2026 at 01:21:28PM -0600, Tom Rini wrote:
> On Fri, Oct 16, 2026 at 04:02:14AM +0000, Kuan-Wei Chiu wrote:
> > Add initial board support for Google Tensor G5 SoC boards. U-Boot
> > runs as BL33 loaded at 0xbe000000. Configure the MMU map, DRAM
> > bounds, and disable the APC watchdog left running by earlier
> > bootloader stages.
> > 
> > Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
> [snip]
> > diff --git a/include/configs/lga.h b/include/configs/lga.h
> > new file mode 100644
> > index 00000000000..c770c5837f4
> > --- /dev/null
> > +++ b/include/configs/lga.h
> > @@ -0,0 +1,9 @@
> > +/* SPDX-License-Identifier: GPL-2.0-or-later */
> > +/*
> > + * Copyright 2026 Google LLC
> > + */
> > +
> > +#ifndef __CONFIG_LGA_H
> > +#define __CONFIG_LGA_H
> > +
> > +#endif /* __CONFIG_LGA_H */
> 
> Does this get populated later? I *thought* we had done the required
> changes so that a board can avoid having an empty config.h file.

Ah, yes.
I'll drop SYS_CONFIG_NAME and remove lga.h in v2.
Thanks.

Regards,
Kuan-Wei

Re: [PATCH 2/4] board: google: Add Google Tensor G5 board support

[Simon Glass]

Hi Kuan-Wei,

On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:
> board: google: Add Google Tensor G5 board support
>
> Add initial board support for Google Tensor G5 SoC boards. U-Boot
> runs as BL33 loaded at 0xbe000000. Configure the MMU map, DRAM
> bounds, and disable the APC watchdog left running by earlier
> bootloader stages.
>
> Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
>
>  MAINTAINERS                  |  2 ++
>  arch/arm/mach-google/Kconfig | 11 ++++++++
>  board/google/lga/Kconfig     | 14 ++++++++++
>  board/google/lga/MAINTAINERS |  5 ++++
>  board/google/lga/Makefile    |  3 ++
>  board/google/lga/lga.c       | 65 ++++++++++++++++++++++++++++++++++++++++++++
>  include/configs/lga.h        |  9 ++++++
>  7 files changed, 109 insertions(+)

> U-Boot 2026.10-00821-g86c1a8698ac2 (Oct 14 2026 - 21:47:47 +0000)

>
> Model: Frankel
> DRAM:  2 GiB
> ERROR: reserving fdt memory region failed (addr=be000000 size=1000000 flags=2): -17

Just to check, is this -EEXIST because the DT already carries a
reserved-memory entry covering the BL33 load region, or something
U-Boot adds itself twice ? Worth tracking down before the series lands
rather than leaving a visible ERROR on every boot.

> diff --git a/board/google/lga/lga.c b/board/google/lga/lga.c
> @@ -0,0 +1,65 @@
> +#define LGA_SDRAM_BASE		0x80000000UL
> +#define LGA_SDRAM_SIZE		0x80000000UL
> +#define LGA_BL33_RAM_TOP	0xc0000000UL

The Kconfig help text lists Frankel, Blazer and Mustang, which ship
with different DRAM sizes (Pixel 10 Pro / Pro XL have well over 2
GiB). Hard-coding 2 GiB means those variants will only ever see the
first bank and the mem_map will not cover the rest. Please can you
pick the base/size up from the device tree
(fdtdec_setup_mem_size_base() or similar) so the same board directory
works for all three.

> diff --git a/board/google/lga/lga.c b/board/google/lga/lga.c
> @@ -0,0 +1,65 @@
> +int board_init(void)
> +{
> +	writel(LGA_WDT_KEY_UNLOCK, LGA_WDT1_BASE + LGA_WDT_KEY);
> +	clrbits_le32(LGA_WDT1_BASE + LGA_WDT_CONTROL, LGA_WDT_CONTROL_ENABLE);
> +	writel(0, LGA_WDT1_BASE + LGA_WDT_KEY);
> +
> +	return 0;
> +}

The APC watchdog is a SoC-level block, so this would sit more
naturally under arch/arm/mach-google/ and be shared by any future lga
board. What do you think?

Regards,
Simon

[PATCH 3/4] arm: dts: lga: Enable console UART in U-Boot

[Kuan-Wei Chiu]

The upstream lga.dtsi leaves lsion_cli16_uart disabled by default.
Add lga-u-boot.dtsi to enable the serial console for U-Boot.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
---
 MAINTAINERS                  | 1 +
 arch/arm/dts/lga-u-boot.dtsi | 9 +++++++++
 2 files changed, 10 insertions(+)
 create mode 100644 arch/arm/dts/lga-u-boot.dtsi

diff --git a/MAINTAINERS b/MAINTAINERS
index 2d8ffe7887a..7546eeb3f9e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -359,6 +359,7 @@ F:	arch/arm/include/asm/arch-mx*/
 ARM GOOGLE TENSOR SOC SUPPORT
 M:	Kuan-Wei Chiu <visitorckw@gmail.com>
 S:	Maintained
+F:	arch/arm/dts/lga-u-boot.dtsi
 F:	arch/arm/mach-google/
 F:	board/google/lga/
 F:	include/configs/lga.h
diff --git a/arch/arm/dts/lga-u-boot.dtsi b/arch/arm/dts/lga-u-boot.dtsi
new file mode 100644
index 00000000000..d9f36fc2c54
--- /dev/null
+++ b/arch/arm/dts/lga-u-boot.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright 2026 Google LLC
+ */
+
+&lsion_cli16_uart {
+	bootph-all;
+	status = "okay";
+};
-- 
2.56.0.212.g129ede20d9-goog

Re: [PATCH 3/4] arm: dts: lga: Enable console UART in U-Boot

[Simon Glass]

On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:
> arm: dts: lga: Enable console UART in U-Boot
>
> The upstream lga.dtsi leaves lsion_cli16_uart disabled by default.
> Add lga-u-boot.dtsi to enable the serial console for U-Boot.
>
> Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
>
>  MAINTAINERS                  | 1 +
>  arch/arm/dts/lga-u-boot.dtsi | 9 +++++++++
>  2 files changed, 10 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[PATCH 4/4] configs: google: Add lga default configuration

[Kuan-Wei Chiu]

Add google_lga_defconfig for Google Tensor G5 boards, using
google/lga-frankel as the default device tree.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
---
 MAINTAINERS                  |  1 +
 board/google/lga/MAINTAINERS |  1 +
 configs/google_lga_defconfig | 10 ++++++++++
 3 files changed, 12 insertions(+)
 create mode 100644 configs/google_lga_defconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index 7546eeb3f9e..cccc40c89c6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -362,6 +362,7 @@ S:	Maintained
 F:	arch/arm/dts/lga-u-boot.dtsi
 F:	arch/arm/mach-google/
 F:	board/google/lga/
+F:	configs/google_lga_defconfig
 F:	include/configs/lga.h
 K:	[gG]oogle.?[tT]ensor
 
diff --git a/board/google/lga/MAINTAINERS b/board/google/lga/MAINTAINERS
index 1dd03afab42..801b1fe6109 100644
--- a/board/google/lga/MAINTAINERS
+++ b/board/google/lga/MAINTAINERS
@@ -3,3 +3,4 @@ M:	Kuan-Wei Chiu <visitorckw@gmail.com>
 S:	Maintained
 F:	board/google/lga/
 F:	include/configs/lga.h
+F:	configs/google_lga_defconfig
diff --git a/configs/google_lga_defconfig b/configs/google_lga_defconfig
new file mode 100644
index 00000000000..f30c89fa279
--- /dev/null
+++ b/configs/google_lga_defconfig
@@ -0,0 +1,10 @@
+CONFIG_ARM=y
+CONFIG_ARCH_GOOGLE=y
+CONFIG_TEXT_BASE=0xbe000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="google/lga-frankel"
+CONFIG_SYS_LOAD_ADDR=0xbe000000
+# CONFIG_EFI_LOADER is not set
+CONFIG_BOOTDELAY=-1
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_NO_NET=y
-- 
2.56.0.212.g129ede20d9-goog

Re: [PATCH 4/4] configs: google: Add lga default configuration

[Simon Glass]

On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:
> configs: google: Add lga default configuration
>
> Add google_lga_defconfig for Google Tensor G5 boards, using
> google/lga-frankel as the default device tree.
>
> Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
>
>  MAINTAINERS                  |  1 +
>  board/google/lga/MAINTAINERS |  1 +
>  configs/google_lga_defconfig | 10 ++++++++++
>  3 files changed, 12 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

Re: [PATCH 0/4] arm: google: Add initial support for Google Tensor G5

[Simon Glass]

Hi Kuan-Wei,

On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:

> This series adds initial architecture and board support for the Google
> Tensor G5 SoC, referred to in code as LGA, and the Pixel 10 series
> boards based on it.

Thanks for sending this.

Please can you add a doc/board/google/lga.rst (linked from
doc/board/google/index.rst) covering how to build this, the BL33 load
address, the DT prerequisite below, and what currently works.

> The device trees for LGA are queued in the Samsung and Google SoC tree
> for Linux v7.4 [1] and have not yet been synced into dts/upstream, so
> cherry-picking those commits locally is required to build this series
> until the next dts/upstream subtree update.

One thing I'd like to check before this series goes in.. as it stands
google_lga_defconfig cannot be built from a clean tree, which breaks
bisection and CI. It would be worth holding the defconfig patch (and
perhaps the -u-boot.dtsi) until the dts/upstream subtree has picked up
lga, so the series lands atomically. What do you think?

Regards,
Simon

Re: [PATCH 0/4] arm: google: Add initial support for Google Tensor G5

[Kuan-Wei Chiu]

Hi Simon,

On Mon, Oct 19, 2026 at 06:27:31AM -0700, Simon Glass wrote:
> Hi Kuan-Wei,
> 
> On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:
> 
> > This series adds initial architecture and board support for the Google
> > Tensor G5 SoC, referred to in code as LGA, and the Pixel 10 series
> > boards based on it.
> 
> Thanks for sending this.
> 
> Please can you add a doc/board/google/lga.rst (linked from
> doc/board/google/index.rst) covering how to build this, the BL33 load
> address, the DT prerequisite below, and what currently works.

Ah, I always forget to add doc in my first version.
I'll add the doc in v2.

> 
> > The device trees for LGA are queued in the Samsung and Google SoC tree
> > for Linux v7.4 [1] and have not yet been synced into dts/upstream, so
> > cherry-picking those commits locally is required to build this series
> > until the next dts/upstream subtree update.
> 
> One thing I'd like to check before this series goes in.. as it stands
> google_lga_defconfig cannot be built from a clean tree, which breaks
> bisection and CI. It would be worth holding the defconfig patch (and
> perhaps the -u-boot.dtsi) until the dts/upstream subtree has picked up
> lga, so the series lands atomically. What do you think?
> 
I'm not sure what the usual process is in U-Boot for this situation. I
originally expected the maintainers to wait until the device tree is
synced into dts/upstream before applying the series. Do you mean that
in v2 I should only send the first two patches, and resend the last two
patches after the device tree sync?

Regards,
Kuan-Wei

Re: [PATCH 0/4] arm: google: Add initial support for Google Tensor G5

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 2158 bytes --]

On Wed, Oct 21, 2026 at 05:11:51PM +0800, Kuan-Wei Chiu wrote:
> Hi Simon,
> 
> On Mon, Oct 19, 2026 at 06:27:31AM -0700, Simon Glass wrote:
> > Hi Kuan-Wei,
> > 
> > On 2026-10-16T04:02:12, Kuan-Wei Chiu <visitorckw@gmail.com> wrote:
> > 
> > > This series adds initial architecture and board support for the Google
> > > Tensor G5 SoC, referred to in code as LGA, and the Pixel 10 series
> > > boards based on it.
> > 
> > Thanks for sending this.
> > 
> > Please can you add a doc/board/google/lga.rst (linked from
> > doc/board/google/index.rst) covering how to build this, the BL33 load
> > address, the DT prerequisite below, and what currently works.
> 
> Ah, I always forget to add doc in my first version.
> I'll add the doc in v2.
> 
> > 
> > > The device trees for LGA are queued in the Samsung and Google SoC tree
> > > for Linux v7.4 [1] and have not yet been synced into dts/upstream, so
> > > cherry-picking those commits locally is required to build this series
> > > until the next dts/upstream subtree update.
> > 
> > One thing I'd like to check before this series goes in.. as it stands
> > google_lga_defconfig cannot be built from a clean tree, which breaks
> > bisection and CI. It would be worth holding the defconfig patch (and
> > perhaps the -u-boot.dtsi) until the dts/upstream subtree has picked up
> > lga, so the series lands atomically. What do you think?
> > 
> I'm not sure what the usual process is in U-Boot for this situation. I
> originally expected the maintainers to wait until the device tree is
> synced into dts/upstream before applying the series. Do you mean that
> in v2 I should only send the first two patches, and resend the last two
> patches after the device tree sync?

You can wait to post v2 until we can get the dts patches via
devicetree-rebasingi and a v7.x-dts tag, or you can cherry-pick them and
include that in the series, once they exist in some -rc
https://docs.u-boot-project.org/en/latest/develop/devicetree/control.html#resyncing-with-devicetree-rebasing

I expect Simon missed the cover letter where you explained your
expectations.

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]