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From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Yury Norov (NVIDIA)" <yury.norov@gmail.com>,
	"Nicolas Frattaroli" <nicolas.frattaroli@collabora.com>,
	"Alexey Charkov" <alchark@flipper.net>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	kernel@collabora.com
Subject: Re: [PATCH v8 7/9] PCI: dw-rockchip: Add pme_turn_off support
Date: Thu, 5 Nov 2026 12:38:28 +0100	[thread overview]
Message-ID: <auxpGArMuCJmdn-S@venus> (raw)
In-Reply-To: <f047dcbe-efa2-4c60-8436-6d001c936467@rock-chips.com>


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Hi,

On Thu, Nov 05, 2026 at 08:51:14AM +0800, Shawn Lin wrote:
> [...]
> > +static void rockchip_pcie_pme_turn_off(struct dw_pcie_rp *pp)
> > +{
> > +	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> > +	struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
> > +	struct device *dev = rockchip->pci.dev;
> > +	u32 status;
> > +	int ret;
> > +
> > +	/* 1. Broadcast PME_Turn_Off Message, bit 4 self-clear once done */
> > +	rockchip_pcie_writel_apb(rockchip, PME_TURN_OFF, PCIE_CLIENT_MSG_GEN);
> > +	ret = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_MSG_GEN,
> > +				 status, !(status & BIT(4)), PCIE_PME_TO_L2_TIMEOUT_US / 10,
> > +				 PCIE_PME_TO_L2_TIMEOUT_US);
> > +	if (ret) {
> > +		dev_warn(dev, "Failed to send PME_Turn_Off\n");
> > +		return;
> > +	}
> > +
> > +	/* 2. Wait for PME_TO_Ack, bit 9 will be set once received */
> > +	ret = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_INTR_STATUS_MSG_RX,
> > +				 status, status & BIT(9), PCIE_PME_TO_L2_TIMEOUT_US / 10,
> > +				 PCIE_PME_TO_L2_TIMEOUT_US);
> > +	if (ret) {
> > +		dev_warn(dev, "Failed to receive PME_TO_Ack\n");
> > +		return;
> > +	}
> > +
> > +	/* 3. Clear PME_TO_Ack and Wait for ready to enter L23 message */
> > +	rockchip_pcie_writel_apb(rockchip, PME_TO_ACK, PCIE_CLIENT_INTR_STATUS_MSG_RX);
> > +	ret = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_POWER_CON,
> > +				 status, status & PME_READY_ENTER_L23,
> > +				 PCIE_PME_TO_L2_TIMEOUT_US / 10,
> > +				 PCIE_PME_TO_L2_TIMEOUT_US);
> > +	if (ret)
> > +		dev_err(dev, "Failed to get ready to enter L23 message\n");
> > +}
> 
> This is a question for the DWC core: should we change
> dw_pcie_host_ops::pme_turn_off() to return a value instead of silently
> ignoring a failure?
> 
> Looking at pcie-designware-host.c, we have:
> 
> if (pci->pp.ops->pme_turn_off) {
>     pci->pp.ops->pme_turn_off(&pci->pp);
> } else {
>     ret = dw_pcie_pme_turn_off(pci);
>     if (ret)
>         return ret;
> }
> 
> The handling feels asymmetric. If ->pme_turn_off fails, shouldn't we abort
> dw_pcie_suspend_noirq as well?

That sounds sensible to me. I had a look and apart from Rockchip,
Layescape can run into an error. Most platforms cannot produce any
errors in that function, which explains why this was void to begin
with.

> Other than that, this patch looks good to me in current shape,
> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>

Thanks, taken over for v9.

> We can further discuss the callback's return value issue on top.

Agreed. This will touch all the glue drivers to add a return 0. I
think its better to do that in a separate series.

Greetings,

-- Sebastian

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WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Yury Norov (NVIDIA)" <yury.norov@gmail.com>,
	"Nicolas Frattaroli" <nicolas.frattaroli@collabora.com>,
	"Alexey Charkov" <alchark@flipper.net>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	kernel@collabora.com
Subject: Re: [PATCH v8 7/9] PCI: dw-rockchip: Add pme_turn_off support
Date: Thu, 5 Nov 2026 12:38:28 +0100	[thread overview]
Message-ID: <auxpGArMuCJmdn-S@venus> (raw)
In-Reply-To: <f047dcbe-efa2-4c60-8436-6d001c936467@rock-chips.com>

[-- Attachment #1: Type: text/plain, Size: 2715 bytes --]

Hi,

On Thu, Nov 05, 2026 at 08:51:14AM +0800, Shawn Lin wrote:
> [...]
> > +static void rockchip_pcie_pme_turn_off(struct dw_pcie_rp *pp)
> > +{
> > +	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> > +	struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
> > +	struct device *dev = rockchip->pci.dev;
> > +	u32 status;
> > +	int ret;
> > +
> > +	/* 1. Broadcast PME_Turn_Off Message, bit 4 self-clear once done */
> > +	rockchip_pcie_writel_apb(rockchip, PME_TURN_OFF, PCIE_CLIENT_MSG_GEN);
> > +	ret = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_MSG_GEN,
> > +				 status, !(status & BIT(4)), PCIE_PME_TO_L2_TIMEOUT_US / 10,
> > +				 PCIE_PME_TO_L2_TIMEOUT_US);
> > +	if (ret) {
> > +		dev_warn(dev, "Failed to send PME_Turn_Off\n");
> > +		return;
> > +	}
> > +
> > +	/* 2. Wait for PME_TO_Ack, bit 9 will be set once received */
> > +	ret = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_INTR_STATUS_MSG_RX,
> > +				 status, status & BIT(9), PCIE_PME_TO_L2_TIMEOUT_US / 10,
> > +				 PCIE_PME_TO_L2_TIMEOUT_US);
> > +	if (ret) {
> > +		dev_warn(dev, "Failed to receive PME_TO_Ack\n");
> > +		return;
> > +	}
> > +
> > +	/* 3. Clear PME_TO_Ack and Wait for ready to enter L23 message */
> > +	rockchip_pcie_writel_apb(rockchip, PME_TO_ACK, PCIE_CLIENT_INTR_STATUS_MSG_RX);
> > +	ret = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_POWER_CON,
> > +				 status, status & PME_READY_ENTER_L23,
> > +				 PCIE_PME_TO_L2_TIMEOUT_US / 10,
> > +				 PCIE_PME_TO_L2_TIMEOUT_US);
> > +	if (ret)
> > +		dev_err(dev, "Failed to get ready to enter L23 message\n");
> > +}
> 
> This is a question for the DWC core: should we change
> dw_pcie_host_ops::pme_turn_off() to return a value instead of silently
> ignoring a failure?
> 
> Looking at pcie-designware-host.c, we have:
> 
> if (pci->pp.ops->pme_turn_off) {
>     pci->pp.ops->pme_turn_off(&pci->pp);
> } else {
>     ret = dw_pcie_pme_turn_off(pci);
>     if (ret)
>         return ret;
> }
> 
> The handling feels asymmetric. If ->pme_turn_off fails, shouldn't we abort
> dw_pcie_suspend_noirq as well?

That sounds sensible to me. I had a look and apart from Rockchip,
Layescape can run into an error. Most platforms cannot produce any
errors in that function, which explains why this was void to begin
with.

> Other than that, this patch looks good to me in current shape,
> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>

Thanks, taken over for v9.

> We can further discuss the callback's return value issue on top.

Agreed. This will touch all the glue drivers to add a return 0. I
think its better to do that in a separate series.

Greetings,

-- Sebastian

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  reply	other threads:[~2026-11-05 11:39 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-04 23:47 [PATCH v8 0/9] PCI: dw-rockchip: add system suspend support Sebastian Reichel
2026-11-04 23:47 ` Sebastian Reichel
2026-11-04 23:47 ` [PATCH v8 1/9] PCI: dw-rockchip: Fix LTSSM set functions Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-04 23:53   ` sashiko-bot
2026-11-04 23:47 ` [PATCH v8 2/9] PCI: dw-rockchip: Restore vpcie3v3 regulator handle Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-04 23:54   ` sashiko-bot
2026-11-04 23:47 ` [PATCH v8 3/9] PCI: dw-rockchip: Move devm_phy_get out of phy_init Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-04 23:55   ` sashiko-bot
2026-11-04 23:47 ` [PATCH v8 4/9] PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-04 23:55   ` sashiko-bot
2026-11-04 23:47 ` [PATCH v8 5/9] PCI: dw-rockchip: Add helper function for controller mode Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-04 23:54   ` sashiko-bot
2026-11-04 23:47 ` [PATCH v8 6/9] PCI: dw-rockchip: Add helper function for DDL indicator Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-04 23:54   ` sashiko-bot
2026-11-04 23:47 ` [PATCH v8 7/9] PCI: dw-rockchip: Add pme_turn_off support Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-04 23:56   ` sashiko-bot
2026-11-05  0:51   ` Shawn Lin
2026-11-05  0:51     ` Shawn Lin
2026-11-05 11:38     ` Sebastian Reichel [this message]
2026-11-05 11:38       ` Sebastian Reichel
2026-11-04 23:47 ` [PATCH v8 8/9] PCI: dw-rockchip: Set broken L1SS resume flag Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-04 23:55   ` sashiko-bot
2026-11-04 23:47 ` [PATCH v8 9/9] PCI: dw-rockchip: Add system PM support Sebastian Reichel
2026-11-04 23:47   ` Sebastian Reichel
2026-11-05  3:08 ` [PATCH v8 0/9] PCI: dw-rockchip: add system suspend support Igor Velkov
2026-11-05  3:08   ` Igor Velkov

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