Re: [PATCH v6 04/14] meson, target/arm/mshv: Enable arm64 build & add initial MSHV support

["Doru Blânzeanu" <dblanzeanu@linux.microsoft.com>]

On Thu, Oct 01, 2026 at 10:52:49AM +0000, Aastha Rawat wrote:
> Enable the build of the MSHV accelerator for arm64 in the Meson build
> system. Introduce initial files and stub implementations to support MSHV
> for the ARM target.
> 
> Signed-off-by: Aastha Rawat <aastharawat@linux.microsoft.com>
> ---
>  accel/mshv/mshv-all.c       | 10 ++++--
>  hw/i386/mshv/clock.c        |  2 +-
>  include/system/mshv.h       |  2 +-
>  meson.build                 |  8 ++---
>  target/arm/meson.build      |  1 +
>  target/arm/mshv/meson.build |  7 ++++
>  target/arm/mshv/mshv-all.c  | 81 +++++++++++++++++++++++++++++++++++++++++++++
>  7 files changed, 103 insertions(+), 8 deletions(-)
> 
> diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c
> index efe19a3914..f3f1825b0b 100644
> --- a/accel/mshv/mshv-all.c
> +++ b/accel/mshv/mshv-all.c
> @@ -142,8 +142,10 @@ static int create_partition(int mshv_fd, int *vm_fd)
>  {
>      int ret;
>      uint64_t pt_flags, host_proc_features;
> -    union hv_partition_processor_xsave_features disabled_xsave_features;
>      union hv_partition_processor_features disabled_partition_features = {0};
> +#if defined(__x86_64__)
> +    union hv_partition_processor_xsave_features disabled_xsave_features;
> +#endif
>  
>      struct mshv_create_partition_v2 args = {0};
>  
> @@ -155,7 +157,8 @@ static int create_partition(int mshv_fd, int *vm_fd)
>                 (1ULL << MSHV_PT_BIT_GPA_SUPER_PAGES) |
>                 (1ULL << MSHV_PT_BIT_CPU_AND_XSAVE_FEATURES);
>  
> -    /* enable all */
> +#if defined(__x86_64__)
> +    /* enable all xsave features (0 = enabled) */
>      disabled_xsave_features.as_uint64 = 0;
>      /*
>       * AMX TILE XSAVE state (XTILE_DATA) is 8KB, which exceeds the
> @@ -165,6 +168,7 @@ static int create_partition(int mshv_fd, int *vm_fd)
>      disabled_xsave_features.amx_bf16_support = 1;
>      disabled_xsave_features.amx_int8_support = 1;
>      disabled_xsave_features.amx_fp16_support = 1;
> +#endif
>  
>      /*
>       * query host for supported processor features and disable unsupported
> @@ -196,7 +200,9 @@ static int create_partition(int mshv_fd, int *vm_fd)
>      /* populate args structure */
>      args.pt_flags = pt_flags;
>      args.pt_isolation = MSHV_PT_ISOLATION_NONE;
> +#if defined(__x86_64__)
>      args.pt_disabled_xsave = disabled_xsave_features.as_uint64;
> +#endif
>      args.pt_num_cpu_fbanks = MSHV_NUM_CPU_FEATURES_BANKS;
>  
>      ret = ioctl(mshv_fd, MSHV_CREATE_PARTITION, &args);
> diff --git a/hw/i386/mshv/clock.c b/hw/i386/mshv/clock.c
> index 02c586503a..b7db382752 100644
> --- a/hw/i386/mshv/clock.c
> +++ b/hw/i386/mshv/clock.c
> @@ -182,7 +182,7 @@ static const VMStateDescription vmstate_mshv_clock = {
>      },
>  };
>  
> -void mshv_clock_init(void)
> +void mshv_arch_clock_init(void)
>  {
>      vmstate_register(NULL, 0, &vmstate_mshv_clock, &mshv_clock);
>      qemu_add_vm_change_state_handler(mshv_clock_vm_state_change, &mshv_clock);
> diff --git a/include/system/mshv.h b/include/system/mshv.h
> index f98ddff9b5..114f065db5 100644
> --- a/include/system/mshv.h
> +++ b/include/system/mshv.h
> @@ -58,7 +58,7 @@ DECLARE_INSTANCE_CHECKER(MshvState, MSHV_STATE,
>  extern MshvState *mshv_state;
>  

This renames the `mshv_clock_init`, but the place where it is called is not
changed in this commit, which leads to a compilation issue on the x86 arch.

>  /* clock (partition reference time) */
> -void mshv_clock_init(void);
> +void mshv_arch_clock_init(void);
>  
>  /* interrupt */
>  int mshv_request_interrupt(MshvState *mshv_state, uint32_t interrupt_type, uint32_t vector,
> diff --git a/meson.build b/meson.build
> index cae1591cd2..6a90a394a2 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -304,7 +304,8 @@ if cpu == 'aarch64'
>    accelerator_targets += {
>      'CONFIG_HVF': ['aarch64-softmmu'],
>      'CONFIG_NITRO': ['aarch64-softmmu'],
> -    'CONFIG_WHPX': ['aarch64-softmmu']
> +    'CONFIG_WHPX': ['aarch64-softmmu'],
> +    'CONFIG_MSHV': ['aarch64-softmmu'],
>    }
>  elif cpu == 'x86_64'
>    accelerator_targets += {
> @@ -884,10 +885,9 @@ if get_option('kvm').allowed() and host_os == 'linux'
>  endif
>  
>  if get_option('mshv').allowed() and host_os == 'linux'
> -  if get_option('mshv').enabled() and host_machine.cpu() != 'x86_64'
> -    error('mshv accelerator requires x64_64 host')
> +  if host_machine.cpu() in [ 'x86_64', 'aarch64' ]
> +    accelerators += 'CONFIG_MSHV'
>    endif
> -  accelerators += 'CONFIG_MSHV'
>  endif
>  
>  if get_option('whpx').allowed() and host_os == 'windows'
> diff --git a/target/arm/meson.build b/target/arm/meson.build
> index 0369f96b4c..1ac2cef26b 100644
> --- a/target/arm/meson.build
> +++ b/target/arm/meson.build
> @@ -63,6 +63,7 @@ arm_common_system_ss.add(files(
>  
>  subdir('hvf')
>  subdir('whpx')
> +subdir('mshv')
>  
>  if 'CONFIG_TCG' in config_all_accel
>     subdir('tcg')
> diff --git a/target/arm/mshv/meson.build b/target/arm/mshv/meson.build
> new file mode 100644
> index 0000000000..169643691e
> --- /dev/null
> +++ b/target/arm/mshv/meson.build
> @@ -0,0 +1,7 @@
> +arm_mshv_ss = ss.source_set()
> +
> +arm_mshv_ss.add(files(
> +  'mshv-all.c',
> +))
> +
> +arm_system_ss.add_all(when: 'CONFIG_MSHV', if_true: arm_mshv_ss)
> diff --git a/target/arm/mshv/mshv-all.c b/target/arm/mshv/mshv-all.c
> new file mode 100644
> index 0000000000..00c54f5d66
> --- /dev/null
> +++ b/target/arm/mshv/mshv-all.c
> @@ -0,0 +1,81 @@
> +/*
> + * QEMU MSHV support
> + *
> + * Copyright Microsoft, Corp. 2026
> + *
> + * Authors: Aastha Rawat          <aastharawat@linux.microsoft.com>
> + *          Anirudh Rayabharam    <anirudh@anirudhrb.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "hw/arm/virt.h"
> +#include "system/mshv.h"
> +#include "system/mshv_int.h"
> +
> +static int load_regs(CPUState *cpu)
> +{
> +    return 0;
> +}
> +
> +static int store_regs(const CPUState *cpu)
> +{
> +    return 0;
> +}
> +
> +int mshv_arch_load_vcpu_state(CPUState *cpu)
> +{
> +    return load_regs(cpu);
> +}
> +
> +int mshv_arch_store_vcpu_state(const CPUState *cpu)
> +{
> +    return store_regs(cpu);
> +}
> +
> +int mshv_run_vcpu(int vm_fd, CPUState *cpu, hv_message *msg, MshvVmExit *exit)
> +{
> +    return 0;
> +}
> +
> +void mshv_arch_init_vcpu(CPUState *cpu)
> +{
> +
> +}
> +
> +void mshv_arch_destroy_vcpu(CPUState *cpu)
> +{
> +
> +}
> +
> +int mshv_arch_accel_init(AccelState *as, MachineState *ms, int mshv_fd)
> +{
> +    return 0;
> +}
> +
> +void mshv_arch_amend_proc_features(
> +    union hv_partition_synthetic_processor_features *features)
> +{
> +    /*
> +     * TLB-flush hypercalls are an x86 enlightenment. ARM guests use
> +     * broadcast TLBI instructions instead.
> +     */
> +    features->tb_flush_hypercalls = 0;
> +}
> +
> +void mshv_arch_disable_partition_proc_features(
> +    union hv_partition_processor_features *disabled_features)
> +{
> +    /* No processor features to disable on ARM */
> +}
> +
> +int mshv_arch_post_init_vm(int vm_fd)
> +{
> +    return 0;
> +}
> +
> +int mshv_arch_migration_init(MshvState *s)
> +{
> +    return 0;
> +}
> 
> -- 
> 2.45.4