From: Marc Zyngier <maz@kernel.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>,
kernel-team@android.com, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 01/11] KVM: arm64: Don't adjust PC on SError during SMC trap
Date: Mon, 26 Oct 2020 14:08:35 +0000 [thread overview]
Message-ID: <b85f3ed6b97944055eda7f4bfeae8abc@kernel.org> (raw)
In-Reply-To: <20201026135308.GC12454@C02TD0UTHF1T.local>
On 2020-10-26 13:53, Mark Rutland wrote:
> On Mon, Oct 26, 2020 at 01:34:40PM +0000, Marc Zyngier wrote:
>> On SMC trap, the prefered return address is set to that of the SMC
>> instruction itself. It is thus wrong to tyr and roll it back when
>
> Typo: s/tyr/try/
>
>> an SError occurs while trapping on SMC. It is still necessary on
>> HVC though, as HVC doesn't cause a trap, and sets ELR to returning
>> *after* the HVC.
>>
>> It also became apparent that the is 16bit encoding for an AArch32
>
> I guess s/that the is/that there is no/ ?
Something along these lines, yes! ;-)
>
>> HVC instruction, meaning that the displacement is always 4 bytes,
>> no matter what the ISA is. Take this opportunity to simplify it.
>>
>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>
> Assuming that there is no 16-bit HVC:
It is actually impossible to have a 16bit encoding for HVC, as
it always convey a 16bit immediate, and you need some space
to encode the instruction itself!
>
> Acked-by: Mark Rutland <mark.rutland@arm.com>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>,
kernel-team@android.com, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 01/11] KVM: arm64: Don't adjust PC on SError during SMC trap
Date: Mon, 26 Oct 2020 14:08:35 +0000 [thread overview]
Message-ID: <b85f3ed6b97944055eda7f4bfeae8abc@kernel.org> (raw)
In-Reply-To: <20201026135308.GC12454@C02TD0UTHF1T.local>
On 2020-10-26 13:53, Mark Rutland wrote:
> On Mon, Oct 26, 2020 at 01:34:40PM +0000, Marc Zyngier wrote:
>> On SMC trap, the prefered return address is set to that of the SMC
>> instruction itself. It is thus wrong to tyr and roll it back when
>
> Typo: s/tyr/try/
>
>> an SError occurs while trapping on SMC. It is still necessary on
>> HVC though, as HVC doesn't cause a trap, and sets ELR to returning
>> *after* the HVC.
>>
>> It also became apparent that the is 16bit encoding for an AArch32
>
> I guess s/that the is/that there is no/ ?
Something along these lines, yes! ;-)
>
>> HVC instruction, meaning that the displacement is always 4 bytes,
>> no matter what the ISA is. Take this opportunity to simplify it.
>>
>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>
> Assuming that there is no 16-bit HVC:
It is actually impossible to have a 16bit encoding for HVC, as
it always convey a 16bit immediate, and you need some space
to encode the instruction itself!
>
> Acked-by: Mark Rutland <mark.rutland@arm.com>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
kernel-team@android.com, Will Deacon <will@kernel.org>
Subject: Re: [PATCH 01/11] KVM: arm64: Don't adjust PC on SError during SMC trap
Date: Mon, 26 Oct 2020 14:08:35 +0000 [thread overview]
Message-ID: <b85f3ed6b97944055eda7f4bfeae8abc@kernel.org> (raw)
In-Reply-To: <20201026135308.GC12454@C02TD0UTHF1T.local>
On 2020-10-26 13:53, Mark Rutland wrote:
> On Mon, Oct 26, 2020 at 01:34:40PM +0000, Marc Zyngier wrote:
>> On SMC trap, the prefered return address is set to that of the SMC
>> instruction itself. It is thus wrong to tyr and roll it back when
>
> Typo: s/tyr/try/
>
>> an SError occurs while trapping on SMC. It is still necessary on
>> HVC though, as HVC doesn't cause a trap, and sets ELR to returning
>> *after* the HVC.
>>
>> It also became apparent that the is 16bit encoding for an AArch32
>
> I guess s/that the is/that there is no/ ?
Something along these lines, yes! ;-)
>
>> HVC instruction, meaning that the displacement is always 4 bytes,
>> no matter what the ISA is. Take this opportunity to simplify it.
>>
>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>
> Assuming that there is no 16-bit HVC:
It is actually impossible to have a 16bit encoding for HVC, as
it always convey a 16bit immediate, and you need some space
to encode the instruction itself!
>
> Acked-by: Mark Rutland <mark.rutland@arm.com>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2020-10-26 14:08 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 13:34 [PATCH 00/11] KVM: arm64: Move PC/ELR/SPSR/PSTATE updatess to EL2 Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 01/11] KVM: arm64: Don't adjust PC on SError during SMC trap Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:53 ` Mark Rutland
2020-10-26 13:53 ` Mark Rutland
2020-10-26 13:53 ` Mark Rutland
2020-10-26 14:08 ` Marc Zyngier [this message]
2020-10-26 14:08 ` Marc Zyngier
2020-10-26 14:08 ` Marc Zyngier
2020-10-26 14:22 ` Mark Rutland
2020-10-26 14:22 ` Mark Rutland
2020-10-26 14:22 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 02/11] KVM: arm64: Move kvm_vcpu_trap_il_is32bit into kvm_skip_instr32() Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:55 ` Mark Rutland
2020-10-26 13:55 ` Mark Rutland
2020-10-26 13:55 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 03/11] KVM: arm64: Make kvm_skip_instr() and co private to HYP Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:04 ` Mark Rutland
2020-10-26 14:04 ` Mark Rutland
2020-10-26 14:04 ` Mark Rutland
2020-10-27 16:17 ` Marc Zyngier
2020-10-27 16:17 ` Marc Zyngier
2020-10-27 16:17 ` Marc Zyngier
2020-10-27 10:55 ` Suzuki K Poulose
2020-10-27 10:55 ` Suzuki K Poulose
2020-10-27 10:55 ` Suzuki K Poulose
2020-10-27 11:08 ` Marc Zyngier
2020-10-27 11:08 ` Marc Zyngier
2020-10-27 11:08 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 04/11] KVM: arm64: Move PC rollback on SError " Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:06 ` Mark Rutland
2020-10-26 14:06 ` Mark Rutland
2020-10-26 14:06 ` Mark Rutland
2020-10-27 14:56 ` James Morse
2020-10-27 14:56 ` James Morse
2020-10-27 14:56 ` James Morse
2020-10-27 14:59 ` Marc Zyngier
2020-10-27 14:59 ` Marc Zyngier
2020-10-27 14:59 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 05/11] KVM: arm64: Move VHE direct sysreg accessors into kvm_host.h Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:07 ` Mark Rutland
2020-10-26 14:07 ` Mark Rutland
2020-10-26 14:07 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 06/11] KVM: arm64: Add basic hooks for injecting exceptions from EL2 Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 07/11] KVM: arm64: Inject AArch64 exceptions from HYP Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:22 ` Mark Rutland
2020-10-26 14:22 ` Mark Rutland
2020-10-26 14:22 ` Mark Rutland
2020-10-27 16:21 ` Marc Zyngier
2020-10-27 16:21 ` Marc Zyngier
2020-10-27 16:21 ` Marc Zyngier
2020-10-27 17:41 ` James Morse
2020-10-27 17:41 ` James Morse
2020-10-27 17:41 ` James Morse
2020-10-27 18:49 ` Marc Zyngier
2020-10-27 18:49 ` Marc Zyngier
2020-10-27 18:49 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 08/11] KVM: arm64: Inject AArch32 " Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:26 ` Mark Rutland
2020-10-26 14:26 ` Mark Rutland
2020-10-26 14:26 ` Mark Rutland
2020-10-27 17:41 ` James Morse
2020-10-27 17:41 ` James Morse
2020-10-27 17:41 ` James Morse
2020-10-27 19:21 ` Marc Zyngier
2020-10-27 19:21 ` Marc Zyngier
2020-10-27 19:21 ` Marc Zyngier
2020-10-28 19:20 ` James Morse
2020-10-28 19:20 ` James Morse
2020-10-28 19:20 ` James Morse
2020-10-28 20:24 ` Marc Zyngier
2020-10-28 20:24 ` Marc Zyngier
2020-10-28 20:24 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 09/11] KVM: arm64: Remove SPSR manipulation primitives Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:30 ` Mark Rutland
2020-10-26 14:30 ` Mark Rutland
2020-10-26 14:30 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 10/11] KVM: arm64: Consolidate exception injection Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 11/11] KVM: arm64: Get rid of the AArch32 register mapping code Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
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