From: Marc Zyngier <maz@kernel.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>,
kernel-team@android.com, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 07/11] KVM: arm64: Inject AArch64 exceptions from HYP
Date: Tue, 27 Oct 2020 16:21:36 +0000 [thread overview]
Message-ID: <e38ae1cbc11ea00920067b886e1898d5@kernel.org> (raw)
In-Reply-To: <20201026142201.GH12454@C02TD0UTHF1T.local>
On 2020-10-26 14:22, Mark Rutland wrote:
> On Mon, Oct 26, 2020 at 01:34:46PM +0000, Marc Zyngier wrote:
>> Move the AArch64 exception injection code from EL1 to HYP, leaving
>> only the ESR_EL1 updates to EL1. In order to come with the differences
>> between VHE and nVHE, two set of system register accessors are
>> provided.
>>
>> SPSR, ELR, PC and PSTATE are now completely handled in the hypervisor.
>>
>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>
>> void kvm_inject_exception(struct kvm_vcpu *vcpu)
>> {
>> + switch (vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
>> + case KVM_ARM64_EXCEPT_AA64_EL1_SYNC:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_sync);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_IRQ:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_irq);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_FIQ:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_fiq);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_SERR:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_serror);
>> + break;
>> + default:
>> + /* EL2 are unimplemented until we get NV. One day. */
>> + break;
>> + }
>> }
>
> Huh, we're going to allow EL1 to inject IRQ/FIQ/SERROR *exceptions*
> directly, rather than pending those via HCR_EL2.{VI,VF,VSE}? We never
> used to have code to do that.
True, and I feel like I got carried away while thinking of NV.
Though James had some "interesting" use case [1] lately...
> If we're going to support that we'll need to check against the DAIF
> bits
> to make sure we don't inject an exception that can't be architecturally
> taken.
Nah, forget it. Unless we really need to implement something like James'
idea, I'd rather drop this altogether.
> I guess we'll tighten that up along with the synchronous exception
> checks, but given those three cases aren't needed today it might be
> worth removing them from the switch for now and/or adding a comment to
> that effect.
Agreed.
M.
[1] https://lore.kernel.org/r/20201023165108.15061-1-james.morse@arm.com
--
Jazz is not dead. It just smells funny...
_______________________________________________
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kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>,
kernel-team@android.com, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 07/11] KVM: arm64: Inject AArch64 exceptions from HYP
Date: Tue, 27 Oct 2020 16:21:36 +0000 [thread overview]
Message-ID: <e38ae1cbc11ea00920067b886e1898d5@kernel.org> (raw)
In-Reply-To: <20201026142201.GH12454@C02TD0UTHF1T.local>
On 2020-10-26 14:22, Mark Rutland wrote:
> On Mon, Oct 26, 2020 at 01:34:46PM +0000, Marc Zyngier wrote:
>> Move the AArch64 exception injection code from EL1 to HYP, leaving
>> only the ESR_EL1 updates to EL1. In order to come with the differences
>> between VHE and nVHE, two set of system register accessors are
>> provided.
>>
>> SPSR, ELR, PC and PSTATE are now completely handled in the hypervisor.
>>
>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>
>> void kvm_inject_exception(struct kvm_vcpu *vcpu)
>> {
>> + switch (vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
>> + case KVM_ARM64_EXCEPT_AA64_EL1_SYNC:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_sync);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_IRQ:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_irq);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_FIQ:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_fiq);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_SERR:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_serror);
>> + break;
>> + default:
>> + /* EL2 are unimplemented until we get NV. One day. */
>> + break;
>> + }
>> }
>
> Huh, we're going to allow EL1 to inject IRQ/FIQ/SERROR *exceptions*
> directly, rather than pending those via HCR_EL2.{VI,VF,VSE}? We never
> used to have code to do that.
True, and I feel like I got carried away while thinking of NV.
Though James had some "interesting" use case [1] lately...
> If we're going to support that we'll need to check against the DAIF
> bits
> to make sure we don't inject an exception that can't be architecturally
> taken.
Nah, forget it. Unless we really need to implement something like James'
idea, I'd rather drop this altogether.
> I guess we'll tighten that up along with the synchronous exception
> checks, but given those three cases aren't needed today it might be
> worth removing them from the switch for now and/or adding a comment to
> that effect.
Agreed.
M.
[1] https://lore.kernel.org/r/20201023165108.15061-1-james.morse@arm.com
--
Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
kernel-team@android.com, Will Deacon <will@kernel.org>
Subject: Re: [PATCH 07/11] KVM: arm64: Inject AArch64 exceptions from HYP
Date: Tue, 27 Oct 2020 16:21:36 +0000 [thread overview]
Message-ID: <e38ae1cbc11ea00920067b886e1898d5@kernel.org> (raw)
In-Reply-To: <20201026142201.GH12454@C02TD0UTHF1T.local>
On 2020-10-26 14:22, Mark Rutland wrote:
> On Mon, Oct 26, 2020 at 01:34:46PM +0000, Marc Zyngier wrote:
>> Move the AArch64 exception injection code from EL1 to HYP, leaving
>> only the ESR_EL1 updates to EL1. In order to come with the differences
>> between VHE and nVHE, two set of system register accessors are
>> provided.
>>
>> SPSR, ELR, PC and PSTATE are now completely handled in the hypervisor.
>>
>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>
>> void kvm_inject_exception(struct kvm_vcpu *vcpu)
>> {
>> + switch (vcpu->arch.flags & KVM_ARM64_EXCEPT_MASK) {
>> + case KVM_ARM64_EXCEPT_AA64_EL1_SYNC:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_sync);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_IRQ:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_irq);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_FIQ:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_fiq);
>> + break;
>> + case KVM_ARM64_EXCEPT_AA64_EL1_SERR:
>> + enter_exception64(vcpu, PSR_MODE_EL1h, except_type_serror);
>> + break;
>> + default:
>> + /* EL2 are unimplemented until we get NV. One day. */
>> + break;
>> + }
>> }
>
> Huh, we're going to allow EL1 to inject IRQ/FIQ/SERROR *exceptions*
> directly, rather than pending those via HCR_EL2.{VI,VF,VSE}? We never
> used to have code to do that.
True, and I feel like I got carried away while thinking of NV.
Though James had some "interesting" use case [1] lately...
> If we're going to support that we'll need to check against the DAIF
> bits
> to make sure we don't inject an exception that can't be architecturally
> taken.
Nah, forget it. Unless we really need to implement something like James'
idea, I'd rather drop this altogether.
> I guess we'll tighten that up along with the synchronous exception
> checks, but given those three cases aren't needed today it might be
> worth removing them from the switch for now and/or adding a comment to
> that effect.
Agreed.
M.
[1] https://lore.kernel.org/r/20201023165108.15061-1-james.morse@arm.com
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2020-10-27 16:21 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 13:34 [PATCH 00/11] KVM: arm64: Move PC/ELR/SPSR/PSTATE updatess to EL2 Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 01/11] KVM: arm64: Don't adjust PC on SError during SMC trap Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:53 ` Mark Rutland
2020-10-26 13:53 ` Mark Rutland
2020-10-26 13:53 ` Mark Rutland
2020-10-26 14:08 ` Marc Zyngier
2020-10-26 14:08 ` Marc Zyngier
2020-10-26 14:08 ` Marc Zyngier
2020-10-26 14:22 ` Mark Rutland
2020-10-26 14:22 ` Mark Rutland
2020-10-26 14:22 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 02/11] KVM: arm64: Move kvm_vcpu_trap_il_is32bit into kvm_skip_instr32() Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:55 ` Mark Rutland
2020-10-26 13:55 ` Mark Rutland
2020-10-26 13:55 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 03/11] KVM: arm64: Make kvm_skip_instr() and co private to HYP Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:04 ` Mark Rutland
2020-10-26 14:04 ` Mark Rutland
2020-10-26 14:04 ` Mark Rutland
2020-10-27 16:17 ` Marc Zyngier
2020-10-27 16:17 ` Marc Zyngier
2020-10-27 16:17 ` Marc Zyngier
2020-10-27 10:55 ` Suzuki K Poulose
2020-10-27 10:55 ` Suzuki K Poulose
2020-10-27 10:55 ` Suzuki K Poulose
2020-10-27 11:08 ` Marc Zyngier
2020-10-27 11:08 ` Marc Zyngier
2020-10-27 11:08 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 04/11] KVM: arm64: Move PC rollback on SError " Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:06 ` Mark Rutland
2020-10-26 14:06 ` Mark Rutland
2020-10-26 14:06 ` Mark Rutland
2020-10-27 14:56 ` James Morse
2020-10-27 14:56 ` James Morse
2020-10-27 14:56 ` James Morse
2020-10-27 14:59 ` Marc Zyngier
2020-10-27 14:59 ` Marc Zyngier
2020-10-27 14:59 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 05/11] KVM: arm64: Move VHE direct sysreg accessors into kvm_host.h Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:07 ` Mark Rutland
2020-10-26 14:07 ` Mark Rutland
2020-10-26 14:07 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 06/11] KVM: arm64: Add basic hooks for injecting exceptions from EL2 Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 07/11] KVM: arm64: Inject AArch64 exceptions from HYP Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:22 ` Mark Rutland
2020-10-26 14:22 ` Mark Rutland
2020-10-26 14:22 ` Mark Rutland
2020-10-27 16:21 ` Marc Zyngier [this message]
2020-10-27 16:21 ` Marc Zyngier
2020-10-27 16:21 ` Marc Zyngier
2020-10-27 17:41 ` James Morse
2020-10-27 17:41 ` James Morse
2020-10-27 17:41 ` James Morse
2020-10-27 18:49 ` Marc Zyngier
2020-10-27 18:49 ` Marc Zyngier
2020-10-27 18:49 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 08/11] KVM: arm64: Inject AArch32 " Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:26 ` Mark Rutland
2020-10-26 14:26 ` Mark Rutland
2020-10-26 14:26 ` Mark Rutland
2020-10-27 17:41 ` James Morse
2020-10-27 17:41 ` James Morse
2020-10-27 17:41 ` James Morse
2020-10-27 19:21 ` Marc Zyngier
2020-10-27 19:21 ` Marc Zyngier
2020-10-27 19:21 ` Marc Zyngier
2020-10-28 19:20 ` James Morse
2020-10-28 19:20 ` James Morse
2020-10-28 19:20 ` James Morse
2020-10-28 20:24 ` Marc Zyngier
2020-10-28 20:24 ` Marc Zyngier
2020-10-28 20:24 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 09/11] KVM: arm64: Remove SPSR manipulation primitives Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 14:30 ` Mark Rutland
2020-10-26 14:30 ` Mark Rutland
2020-10-26 14:30 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 10/11] KVM: arm64: Consolidate exception injection Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 11/11] KVM: arm64: Get rid of the AArch32 register mapping code Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
2020-10-26 13:34 ` Marc Zyngier
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