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* [PATCH 0/3] Misc amdgpu cleanups
@ 2026-10-20 13:27 Tvrtko Ursulin
  2026-10-20 13:27 ` [PATCH 1/3] drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA instances Tvrtko Ursulin
                   ` (2 more replies)
  0 siblings, 3 replies; 7+ messages in thread
From: Tvrtko Ursulin @ 2026-10-20 13:27 UTC (permalink / raw)
  To: amd-gfx
  Cc: kernel-dev, Tvrtko Ursulin, Pierre-Eric Pelloux-Prayer,
	Felix Kuehling, Christian König, Alex Deucher,
	Timur Kristóf

A few tiny cleanups I found while working on something else. No functional
changes were intended.

Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: Felix Kuehling <felix.kuehling@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Timur Kristóf <timur.kristof@gmail.com>

Tvrtko Ursulin (3):
  drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA
    instances
  drm/amdgpu: Size the vm_pte_scheds array by maximum number of SDMA
    instances
  drm/amdgpu: Simplify amdgpu_ring_init

 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 12 +++++-------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h  |  3 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h   |  2 +-
 3 files changed, 8 insertions(+), 9 deletions(-)

-- 
2.56.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 1/3] drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA instances
  2026-10-20 13:27 [PATCH 0/3] Misc amdgpu cleanups Tvrtko Ursulin
@ 2026-10-20 13:27 ` Tvrtko Ursulin
  2026-10-20 13:37   ` Christian König
  2026-10-20 13:27 ` [PATCH 2/3] drm/amdgpu: Size the vm_pte_scheds " Tvrtko Ursulin
  2026-10-20 13:27 ` [PATCH 3/3] drm/amdgpu: Simplify amdgpu_ring_init Tvrtko Ursulin
  2 siblings, 1 reply; 7+ messages in thread
From: Tvrtko Ursulin @ 2026-10-20 13:27 UTC (permalink / raw)
  To: amd-gfx
  Cc: kernel-dev, Tvrtko Ursulin, Pierre-Eric Pelloux-Prayer,
	Felix Kuehling, Christian König, Alex Deucher,
	Timur Kristóf

The array is populated from a loop capped by adev->sdma.num_instances so
it makes sense to size it using AMDGPU_MAX_SDMA_INSTANCES and save some
memory.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: Felix Kuehling <felix.kuehling@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index adb6cfae5052..9856a2fc2d08 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -30,6 +30,7 @@
 #include "amdgpu_vram_mgr.h"
 #include "amdgpu_hmm.h"
 #include "amdgpu_gmc.h"
+#include "amdgpu_sdma_types.h"
 
 #define AMDGPU_PL_GDS		(TTM_PL_PRIV + 0)
 #define AMDGPU_PL_GWS		(TTM_PL_PRIV + 1)
@@ -89,7 +90,7 @@ struct amdgpu_mman {
 
 	/* buffer handling */
 	const struct amdgpu_buffer_funcs	*buffer_funcs;
-	struct drm_gpu_scheduler		*buffer_funcs_scheds[AMDGPU_MAX_RINGS];
+	struct drm_gpu_scheduler		*buffer_funcs_scheds[AMDGPU_MAX_SDMA_INSTANCES];
 	u32					num_buffer_funcs_scheds;
 	bool					buffer_funcs_enabled;
 
-- 
2.56.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 2/3] drm/amdgpu: Size the vm_pte_scheds array by maximum number of SDMA instances
  2026-10-20 13:27 [PATCH 0/3] Misc amdgpu cleanups Tvrtko Ursulin
  2026-10-20 13:27 ` [PATCH 1/3] drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA instances Tvrtko Ursulin
@ 2026-10-20 13:27 ` Tvrtko Ursulin
  2026-10-20 13:47   ` Christian König
  2026-10-20 13:27 ` [PATCH 3/3] drm/amdgpu: Simplify amdgpu_ring_init Tvrtko Ursulin
  2 siblings, 1 reply; 7+ messages in thread
From: Tvrtko Ursulin @ 2026-10-20 13:27 UTC (permalink / raw)
  To: amd-gfx
  Cc: kernel-dev, Tvrtko Ursulin, Pierre-Eric Pelloux-Prayer,
	Felix Kuehling, Christian König, Alex Deucher,
	Timur Kristóf

The array is populated from a loop capped by adev->sdma.num_instances so
it makes sense to size it using AMDGPU_MAX_SDMA_INSTANCES and save some
memory.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: Felix Kuehling <felix.kuehling@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index b8aa45db1d84..98c48c45ce61 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -395,7 +395,7 @@ struct amdgpu_vm_manager {
 	u64					vram_base_offset;
 	/* vm pte handling */
 	const struct amdgpu_vm_pte_funcs	*vm_pte_funcs;
-	struct drm_gpu_scheduler		*vm_pte_scheds[AMDGPU_MAX_RINGS];
+	struct drm_gpu_scheduler		*vm_pte_scheds[AMDGPU_MAX_SDMA_INSTANCES];
 	unsigned				vm_pte_num_scheds;
 	struct amdgpu_ring			*page_fault;
 
-- 
2.56.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 3/3] drm/amdgpu: Simplify amdgpu_ring_init
  2026-10-20 13:27 [PATCH 0/3] Misc amdgpu cleanups Tvrtko Ursulin
  2026-10-20 13:27 ` [PATCH 1/3] drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA instances Tvrtko Ursulin
  2026-10-20 13:27 ` [PATCH 2/3] drm/amdgpu: Size the vm_pte_scheds " Tvrtko Ursulin
@ 2026-10-20 13:27 ` Tvrtko Ursulin
  2026-10-20 13:55   ` Christian König
  2 siblings, 1 reply; 7+ messages in thread
From: Tvrtko Ursulin @ 2026-10-20 13:27 UTC (permalink / raw)
  To: amd-gfx
  Cc: kernel-dev, Tvrtko Ursulin, Alex Deucher, Christian König,
	Timur Kristóf

(Too) many times I grepped the codebase trying to figure out who sets
adev->gpu_sched[hw_ip][hw_prio].num_scheds and this time I decided to make
this greppable by avoding the fun pointer games.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 227734541316..7b67e8cecca2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -213,11 +213,9 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
 		     unsigned int irq_type, unsigned int hw_prio,
 		     atomic_t *sched_score)
 {
-	int r;
 	int sched_hw_submission = amdgpu_sched_hw_submission;
-	u32 *num_sched;
-	u32 hw_ip;
 	unsigned int max_ibs_dw;
+	int r;
 
 	/* Set the hw submission limit higher for KIQ because
 	 * it's used for a number of gfx/compute tasks by both
@@ -359,10 +357,10 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
 	ring->vmid_wait = dma_fence_get_stub();
 
 	if (!ring->no_scheduler && ring->funcs->type < AMDGPU_HW_IP_NUM) {
-		hw_ip = ring->funcs->type;
-		num_sched = &adev->gpu_sched[hw_ip][hw_prio].num_scheds;
-		adev->gpu_sched[hw_ip][hw_prio].sched[(*num_sched)++] =
-			&ring->sched;
+		struct amdgpu_sched *gpu_sched =
+			&adev->gpu_sched[ring->funcs->type][hw_prio];
+
+		gpu_sched->sched[gpu_sched->num_scheds++] = &ring->sched;
 	}
 
 	return 0;
-- 
2.56.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH 1/3] drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA instances
  2026-10-20 13:27 ` [PATCH 1/3] drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA instances Tvrtko Ursulin
@ 2026-10-20 13:37   ` Christian König
  0 siblings, 0 replies; 7+ messages in thread
From: Christian König @ 2026-10-20 13:37 UTC (permalink / raw)
  To: Tvrtko Ursulin, amd-gfx
  Cc: kernel-dev, Pierre-Eric Pelloux-Prayer, Felix Kuehling,
	Alex Deucher, Timur Kristóf

On 10/20/26 15:27, Tvrtko Ursulin wrote:
> The array is populated from a loop capped by adev->sdma.num_instances so
> it makes sense to size it using AMDGPU_MAX_SDMA_INSTANCES and save some
> memory.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
> Cc: Felix Kuehling <felix.kuehling@amd.com>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index adb6cfae5052..9856a2fc2d08 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -30,6 +30,7 @@
>  #include "amdgpu_vram_mgr.h"
>  #include "amdgpu_hmm.h"
>  #include "amdgpu_gmc.h"
> +#include "amdgpu_sdma_types.h"
>  
>  #define AMDGPU_PL_GDS		(TTM_PL_PRIV + 0)
>  #define AMDGPU_PL_GWS		(TTM_PL_PRIV + 1)
> @@ -89,7 +90,7 @@ struct amdgpu_mman {
>  
>  	/* buffer handling */
>  	const struct amdgpu_buffer_funcs	*buffer_funcs;
> -	struct drm_gpu_scheduler		*buffer_funcs_scheds[AMDGPU_MAX_RINGS];
> +	struct drm_gpu_scheduler		*buffer_funcs_scheds[AMDGPU_MAX_SDMA_INSTANCES];
>  	u32					num_buffer_funcs_scheds;
>  	bool					buffer_funcs_enabled;
>  


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 2/3] drm/amdgpu: Size the vm_pte_scheds array by maximum number of SDMA instances
  2026-10-20 13:27 ` [PATCH 2/3] drm/amdgpu: Size the vm_pte_scheds " Tvrtko Ursulin
@ 2026-10-20 13:47   ` Christian König
  0 siblings, 0 replies; 7+ messages in thread
From: Christian König @ 2026-10-20 13:47 UTC (permalink / raw)
  To: Tvrtko Ursulin, amd-gfx
  Cc: kernel-dev, Pierre-Eric Pelloux-Prayer, Felix Kuehling,
	Alex Deucher, Timur Kristóf

On 10/20/26 15:27, Tvrtko Ursulin wrote:
> The array is populated from a loop capped by adev->sdma.num_instances so
> it makes sense to size it using AMDGPU_MAX_SDMA_INSTANCES and save some
> memory.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
> Cc: Felix Kuehling <felix.kuehling@amd.com>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index b8aa45db1d84..98c48c45ce61 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -395,7 +395,7 @@ struct amdgpu_vm_manager {
>  	u64					vram_base_offset;
>  	/* vm pte handling */
>  	const struct amdgpu_vm_pte_funcs	*vm_pte_funcs;
> -	struct drm_gpu_scheduler		*vm_pte_scheds[AMDGPU_MAX_RINGS];
> +	struct drm_gpu_scheduler		*vm_pte_scheds[AMDGPU_MAX_SDMA_INSTANCES];
>  	unsigned				vm_pte_num_scheds;
>  	struct amdgpu_ring			*page_fault;
>  


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 3/3] drm/amdgpu: Simplify amdgpu_ring_init
  2026-10-20 13:27 ` [PATCH 3/3] drm/amdgpu: Simplify amdgpu_ring_init Tvrtko Ursulin
@ 2026-10-20 13:55   ` Christian König
  0 siblings, 0 replies; 7+ messages in thread
From: Christian König @ 2026-10-20 13:55 UTC (permalink / raw)
  To: Tvrtko Ursulin, amd-gfx; +Cc: kernel-dev, Alex Deucher, Timur Kristóf

On 10/20/26 15:27, Tvrtko Ursulin wrote:
> (Too) many times I grepped the codebase trying to figure out who sets
> adev->gpu_sched[hw_ip][hw_prio].num_scheds and this time I decided to make
> this greppable by avoding the fun pointer games.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 12 +++++-------
>  1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> index 227734541316..7b67e8cecca2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> @@ -213,11 +213,9 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
>  		     unsigned int irq_type, unsigned int hw_prio,
>  		     atomic_t *sched_score)
>  {
> -	int r;
>  	int sched_hw_submission = amdgpu_sched_hw_submission;
> -	u32 *num_sched;
> -	u32 hw_ip;
>  	unsigned int max_ibs_dw;
> +	int r;
>  
>  	/* Set the hw submission limit higher for KIQ because
>  	 * it's used for a number of gfx/compute tasks by both
> @@ -359,10 +357,10 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
>  	ring->vmid_wait = dma_fence_get_stub();
>  
>  	if (!ring->no_scheduler && ring->funcs->type < AMDGPU_HW_IP_NUM) {
> -		hw_ip = ring->funcs->type;
> -		num_sched = &adev->gpu_sched[hw_ip][hw_prio].num_scheds;
> -		adev->gpu_sched[hw_ip][hw_prio].sched[(*num_sched)++] =
> -			&ring->sched;
> +		struct amdgpu_sched *gpu_sched =
> +			&adev->gpu_sched[ring->funcs->type][hw_prio];
> +
> +		gpu_sched->sched[gpu_sched->num_scheds++] = &ring->sched;
>  	}
>  
>  	return 0;


^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2026-10-20 13:55 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-20 13:27 [PATCH 0/3] Misc amdgpu cleanups Tvrtko Ursulin
2026-10-20 13:27 ` [PATCH 1/3] drm/amdgpu: Size the buffer_funcs array by maximum number of SDMA instances Tvrtko Ursulin
2026-10-20 13:37   ` Christian König
2026-10-20 13:27 ` [PATCH 2/3] drm/amdgpu: Size the vm_pte_scheds " Tvrtko Ursulin
2026-10-20 13:47   ` Christian König
2026-10-20 13:27 ` [PATCH 3/3] drm/amdgpu: Simplify amdgpu_ring_init Tvrtko Ursulin
2026-10-20 13:55   ` Christian König

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