All of lore.kernel.org
 help / color / mirror / Atom feed
From: Atish Patra <atish.patra@linux.dev>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <anup@brainfault.org>,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 01/13] RISC-V: KVM: Fix the size parameter check in SBI SFENCE calls
Date: Thu, 5 Jun 2025 17:00:35 -0700	[thread overview]
Message-ID: <cc2caf0b-7c2f-4793-9510-0dd6c391088a@linux.dev> (raw)
In-Reply-To: <20250605061458.196003-2-apatel@ventanamicro.com>


On 6/4/25 11:14 PM, Anup Patel wrote:
> As-per the SBI specification, an SBI remote fence operation applies
> to the entire address space if either:
> 1) start_addr and size are both 0
> 2) size is equal to 2^XLEN-1
>
>  From the above, only #1 is checked by SBI SFENCE calls so fix the
> size parameter check in SBI SFENCE calls to cover #2 as well.
>
> Fixes: 13acfec2dbcc ("RISC-V: KVM: Add remote HFENCE functions based on VCPU requests")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>   arch/riscv/kvm/vcpu_sbi_replace.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c
> index 5fbf3f94f1e8..9752d2ffff68 100644
> --- a/arch/riscv/kvm/vcpu_sbi_replace.c
> +++ b/arch/riscv/kvm/vcpu_sbi_replace.c
> @@ -103,7 +103,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run
>   		kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_FENCE_I_SENT);
>   		break;
>   	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
> -		if (cp->a2 == 0 && cp->a3 == 0)
> +		if ((cp->a2 == 0 && cp->a3 == 0) || cp->a3 == -1UL)
>   			kvm_riscv_hfence_vvma_all(vcpu->kvm, hbase, hmask);
>   		else
>   			kvm_riscv_hfence_vvma_gva(vcpu->kvm, hbase, hmask,
> @@ -111,7 +111,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run
>   		kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_HFENCE_VVMA_SENT);
>   		break;
>   	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
> -		if (cp->a2 == 0 && cp->a3 == 0)
> +		if ((cp->a2 == 0 && cp->a3 == 0) || cp->a3 == -1UL)
>   			kvm_riscv_hfence_vvma_asid_all(vcpu->kvm,
>   						       hbase, hmask, cp->a4);
>   		else


Thanks for the fix.
Reviewed-by: Atish Patra <atishp@rivosinc.com>


-- 
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atish.patra@linux.dev>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <anup@brainfault.org>,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 01/13] RISC-V: KVM: Fix the size parameter check in SBI SFENCE calls
Date: Thu, 5 Jun 2025 17:00:35 -0700	[thread overview]
Message-ID: <cc2caf0b-7c2f-4793-9510-0dd6c391088a@linux.dev> (raw)
In-Reply-To: <20250605061458.196003-2-apatel@ventanamicro.com>


On 6/4/25 11:14 PM, Anup Patel wrote:
> As-per the SBI specification, an SBI remote fence operation applies
> to the entire address space if either:
> 1) start_addr and size are both 0
> 2) size is equal to 2^XLEN-1
>
>  From the above, only #1 is checked by SBI SFENCE calls so fix the
> size parameter check in SBI SFENCE calls to cover #2 as well.
>
> Fixes: 13acfec2dbcc ("RISC-V: KVM: Add remote HFENCE functions based on VCPU requests")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>   arch/riscv/kvm/vcpu_sbi_replace.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c
> index 5fbf3f94f1e8..9752d2ffff68 100644
> --- a/arch/riscv/kvm/vcpu_sbi_replace.c
> +++ b/arch/riscv/kvm/vcpu_sbi_replace.c
> @@ -103,7 +103,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run
>   		kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_FENCE_I_SENT);
>   		break;
>   	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
> -		if (cp->a2 == 0 && cp->a3 == 0)
> +		if ((cp->a2 == 0 && cp->a3 == 0) || cp->a3 == -1UL)
>   			kvm_riscv_hfence_vvma_all(vcpu->kvm, hbase, hmask);
>   		else
>   			kvm_riscv_hfence_vvma_gva(vcpu->kvm, hbase, hmask,
> @@ -111,7 +111,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run
>   		kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_HFENCE_VVMA_SENT);
>   		break;
>   	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
> -		if (cp->a2 == 0 && cp->a3 == 0)
> +		if ((cp->a2 == 0 && cp->a3 == 0) || cp->a3 == -1UL)
>   			kvm_riscv_hfence_vvma_asid_all(vcpu->kvm,
>   						       hbase, hmask, cp->a4);
>   		else


Thanks for the fix.
Reviewed-by: Atish Patra <atishp@rivosinc.com>


WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atish.patra@linux.dev>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <anup@brainfault.org>,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 01/13] RISC-V: KVM: Fix the size parameter check in SBI SFENCE calls
Date: Thu, 5 Jun 2025 17:00:35 -0700	[thread overview]
Message-ID: <cc2caf0b-7c2f-4793-9510-0dd6c391088a@linux.dev> (raw)
In-Reply-To: <20250605061458.196003-2-apatel@ventanamicro.com>


On 6/4/25 11:14 PM, Anup Patel wrote:
> As-per the SBI specification, an SBI remote fence operation applies
> to the entire address space if either:
> 1) start_addr and size are both 0
> 2) size is equal to 2^XLEN-1
>
>  From the above, only #1 is checked by SBI SFENCE calls so fix the
> size parameter check in SBI SFENCE calls to cover #2 as well.
>
> Fixes: 13acfec2dbcc ("RISC-V: KVM: Add remote HFENCE functions based on VCPU requests")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>   arch/riscv/kvm/vcpu_sbi_replace.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c b/arch/riscv/kvm/vcpu_sbi_replace.c
> index 5fbf3f94f1e8..9752d2ffff68 100644
> --- a/arch/riscv/kvm/vcpu_sbi_replace.c
> +++ b/arch/riscv/kvm/vcpu_sbi_replace.c
> @@ -103,7 +103,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run
>   		kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_FENCE_I_SENT);
>   		break;
>   	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
> -		if (cp->a2 == 0 && cp->a3 == 0)
> +		if ((cp->a2 == 0 && cp->a3 == 0) || cp->a3 == -1UL)
>   			kvm_riscv_hfence_vvma_all(vcpu->kvm, hbase, hmask);
>   		else
>   			kvm_riscv_hfence_vvma_gva(vcpu->kvm, hbase, hmask,
> @@ -111,7 +111,7 @@ static int kvm_sbi_ext_rfence_handler(struct kvm_vcpu *vcpu, struct kvm_run *run
>   		kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_HFENCE_VVMA_SENT);
>   		break;
>   	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
> -		if (cp->a2 == 0 && cp->a3 == 0)
> +		if ((cp->a2 == 0 && cp->a3 == 0) || cp->a3 == -1UL)
>   			kvm_riscv_hfence_vvma_asid_all(vcpu->kvm,
>   						       hbase, hmask, cp->a4);
>   		else


Thanks for the fix.
Reviewed-by: Atish Patra <atishp@rivosinc.com>


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-06-06  0:00 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-05  6:14 [PATCH 00/13] MMU related improvements for KVM RISC-V Anup Patel
2025-06-05  6:14 ` Anup Patel
2025-06-05  6:14 ` Anup Patel
2025-06-05  6:14 ` [PATCH 01/13] RISC-V: KVM: Fix the size parameter check in SBI SFENCE calls Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-06  0:00   ` Atish Patra [this message]
2025-06-06  0:00     ` Atish Patra
2025-06-06  0:00     ` Atish Patra
2025-06-09  4:43   ` Anup Patel
2025-06-09  4:43     ` Anup Patel
2025-06-09  4:43     ` Anup Patel
2025-06-05  6:14 ` [PATCH 02/13] RISC-V: KVM: Don't treat SBI HFENCE calls as NOPs Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-06  0:11   ` Atish Patra
2025-06-06  0:11     ` Atish Patra
2025-06-06  0:11     ` Atish Patra
2025-06-09  4:43   ` Anup Patel
2025-06-09  4:43     ` Anup Patel
2025-06-09  4:43     ` Anup Patel
2025-06-05  6:14 ` [PATCH 03/13] RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-06  0:16   ` Atish Patra
2025-06-06  0:16     ` Atish Patra
2025-06-06  0:16     ` Atish Patra
2025-06-09  5:01     ` Anup Patel
2025-06-09  5:01       ` Anup Patel
2025-06-09  5:01       ` Anup Patel
2025-06-05  6:14 ` [PATCH 04/13] RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init() Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-06  0:52   ` Atish Patra
2025-06-06  0:52     ` Atish Patra
2025-06-06  0:52     ` Atish Patra
2025-06-06  4:14   ` Nutty Liu
2025-06-06  4:14     ` Nutty Liu
2025-06-06  4:14     ` Nutty Liu
2025-06-05  6:14 ` [PATCH 05/13] RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize() Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-06  1:21   ` Atish Patra
2025-06-06  1:21     ` Atish Patra
2025-06-06  1:21     ` Atish Patra
2025-06-06  4:25   ` Nutty Liu
2025-06-06  4:25     ` Nutty Liu
2025-06-06  4:25     ` Nutty Liu
2025-06-05  6:14 ` [PATCH 06/13] RISC-V: KVM: Replace KVM_REQ_HFENCE_GVMA_VMID_ALL with KVM_REQ_TLB_FLUSH Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-06  1:24   ` Atish Patra
2025-06-06  1:24     ` Atish Patra
2025-06-06  1:24     ` Atish Patra
2025-06-05  6:14 ` [PATCH 07/13] RISC-V: KVM: Don't flush TLB in gstage_set_pte() when PTE is unchanged Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14 ` [PATCH 08/13] RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range() Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14 ` [PATCH 09/13] RISC-V: KVM: Factor-out MMU related declarations into separate headers Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14 ` [PATCH 10/13] RISC-V: KVM: Introduce struct kvm_gstage_mapping Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14 ` [PATCH 11/13] RISC-V: KVM: Add vmid field to struct kvm_riscv_hfence Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14 ` [PATCH 12/13] RISC-V: KVM: Factor-out g-stage page table management Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14 ` [PATCH 13/13] RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs Anup Patel
2025-06-05  6:14   ` Anup Patel
2025-06-05  6:14   ` Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=cc2caf0b-7c2f-4793-9510-0dd6c391088a@linux.dev \
    --to=atish.patra@linux.dev \
    --cc=ajones@ventanamicro.com \
    --cc=alex@ghiti.fr \
    --cc=anup@brainfault.org \
    --cc=apatel@ventanamicro.com \
    --cc=kvm-riscv@lists.infradead.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.