Re: [RFC] Optimize swab operations on mips_r2 cpu

[Franck <vagabon.xyz@gmail.com>]

2006/1/26, Kevin D. Kissell <kevink@mips.com>:
> > > Franck wrote:
> > > > Let's say that the 4KSC has "wsbh" instruction which is part of
> > > > MIPS32R2 instructrion set (I haven't checked it). The question is how
> > > > the 4KSC would use the SWAB optimizations since it doesn't define
> > > > CONFIG_CPU_MIPS32_R2  ? The 4KSC might not be the only one case...
> > >
> > > The 4KSc happens not to have the MIPS32R2 WSBH (is that pronounced
> > > "wasabi"? ;o) instruction, but it does have the MIPS32R2 ROTR, because
> > > it's part of the SmartMIPS ASE.  Our options here include:
> > >
> > > * Say "to heck with it" and deny the 4KSc use of the ROTR, and stay
> > >    with a "#ifdef CONFIG_CPU_MIPS32R2" conditional.
> > >
> > > * Define CONFIG_CPU_MIPS4KSC as an additional oddball CPU flag, and
> > >    make it "#if defined(CONFIG_CPU_MIPS32R2) || defined(CONFIG_CPU_MIPS4KSC)
> > >
> > > * Have an ASE-support flag, CONFIG_CPU_SMARTMIPS, which would cover both
> > >    the 4KSc and 4KSd.  In that case code using ROTR could be conditional on
> > >    #if defined(CPU_CONFIG_MIPS32R2) || defined(CONFIG_CPU_SMARTMIPS).
> > >
> > > I personally think that the third option is the cleanest and most conceptually
> > > correct, but I'm not the guy operationally responsible for maintaining
> > > that code.
> >
> > I think we will have to use second _and_ third options. I can't find
> > out an example, but since 4KSC has some MIPS32_R2 instructions it will
> > need to use some specific MIPS32_R2 code sometimes.
>
> You don't understand. There is nothing in the 4KSc that is not in the SmartMIPS ASE.
> The 4KSc implements MIPS32+SmartMIPS.  The 4KSd implementes MIPS32R2+SmartMIPS.
> You're getting confused because some elements of SmartMIPS made it into MIPS32R2.
> If we have a CONFIG_CPU_SMARTMIPS flag, there would be no need for a
> CONFIG_CPU_MIPS4KSC flag.
>

I think I was confused by your previous description of 4KSC:

"""
the 4KSc is a superset of MIPS32 which includes some, but not all
MIPS32R2 features (plus other stuff),
"""

I understood it like:
        The 4KSC implements MIPS32 + SmartMIPS + a_part_of(MIPS32R2)
But now you're saying:
        The 4KSC implements MIPS32 + SmartMIPS

I didn't understand that a_part_of(MIPS32R2) elements were part of the
SmartMIPS extension....

Thanks
--
               Franck