From: qi1.zhang@intel.com
To: qemu-devel@nongnu.org
Cc: qi1.zhang@intel.com, ehabkost@redhat.com, mst@redhat.com,
pbonzini@redhat.com, yadong.qi@intel.com, rth@twiddle.net
Subject: [PATCH v2 0/2] TM field check failed
Date: Tue, 19 Nov 2019 20:27:00 +0800 [thread overview]
Message-ID: <cover.1570503331.git.qi1.zhang@intel.com> (raw)
From: "Zhang, Qi" <qi1.zhang@intel.com>
spilt the reserved fields arrays and remove TM field from reserved
bits
Changelog V1:
add descriptons
Changelog V2:
refine
Zhang, Qi (2):
intel_iommu: split the resevred fields arrays into two ones
intel_iommu: TM field should not be in reserved bits
hw/i386/intel_iommu.c | 35 ++++++++++++++++++++--------------
hw/i386/intel_iommu_internal.h | 17 +++++++++++++----
2 files changed, 34 insertions(+), 18 deletions(-)
--
2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: qi1.zhang@intel.com
To: qemu-devel@nongnu.org
Cc: qi1.zhang@intel.com, ehabkost@redhat.com, mst@redhat.com,
pbonzini@redhat.com, yadong.qi@intel.com, rth@twiddle.net
Subject: [PATCH v2 0/2] TM field check failed
Date: Tue, 19 Nov 2019 20:28:12 +0800 [thread overview]
Message-ID: <cover.1570503331.git.qi1.zhang@intel.com> (raw)
Message-ID: <20191119122812.9hlC261o-Ez2N6dNaJS8Q--9GuAC2Kr7KFuJ7Iqc__s@z> (raw)
From: "Zhang, Qi" <qi1.zhang@intel.com>
spilt the reserved fields arrays and remove TM field from reserved
bits
Changelog V1:
add descriptons
Changelog V2:
refine
Zhang, Qi (2):
intel_iommu: split the resevred fields arrays into two ones
intel_iommu: TM field should not be in reserved bits
hw/i386/intel_iommu.c | 35 ++++++++++++++++++++--------------
hw/i386/intel_iommu_internal.h | 17 +++++++++++++----
2 files changed, 34 insertions(+), 18 deletions(-)
--
2.20.1
next reply other threads:[~2019-11-19 4:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-19 12:27 qi1.zhang [this message]
2019-11-19 12:28 ` [PATCH v2 0/2] TM field check failed qi1.zhang
2019-11-19 11:05 ` Michael S. Tsirkin
2019-11-19 16:21 ` Peter Xu
2019-11-19 16:39 ` Michael S. Tsirkin
2019-11-19 17:01 ` Peter Xu
2019-11-19 12:27 ` [PATCH 1/2] intel_iommu: split the resevred fields arrays into two ones qi1.zhang
2019-11-19 12:28 ` [PATCH v2 " qi1.zhang
2019-11-19 16:06 ` Peter Xu
2019-11-22 8:10 ` Qi, Yadong
2019-11-19 12:27 ` [PATCH 2/2] intel_iommu: TM field should not be in reserved bits qi1.zhang
2019-11-19 12:27 ` qi1.zhang
2019-11-19 12:28 ` [PATCH v2 " qi1.zhang
2019-11-19 11:06 ` Michael S. Tsirkin
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