[PATCH 1/2] drm/i915: split page flip queueing into per-chipset functions

[PATCH 1/2] drm/i915: split page flip queueing into per-chipset functions

[Jesse Barnes]

This makes things a little clearer and prevents us from running old code
on a new chipset that may not be supported.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_drv.h      |    3 +
 drivers/gpu/drm/i915/intel_display.c |  196 ++++++++++++++++++++++++---------
 2 files changed, 145 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f63ee16..eddabf6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -211,6 +211,9 @@ struct drm_i915_display_funcs {
 	void (*fdi_link_train)(struct drm_crtc *crtc);
 	void (*init_clock_gating)(struct drm_device *dev);
 	void (*init_pch_clock_gating)(struct drm_device *dev);
+	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
+			  struct drm_framebuffer *fb,
+			  struct drm_i915_gem_object *obj);
 	/* clock updates for mode set */
 	/* cursor updates */
 	/* render clock increase/decrease */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 81a9059..06748f3a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6262,6 +6262,123 @@ void intel_prepare_page_flip(struct drm_device *dev, int plane)
 	spin_unlock_irqrestore(&dev->event_lock, flags);
 }
 
+static int intel_gen2_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	unsigned long offset;
+	int ret;
+
+	/* Offset into the new buffer for cases of shared fbs between CRTCs */
+	offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
+
+	ret = BEGIN_LP_RING(4);
+	if (ret)
+		goto out;
+
+	OUT_RING(MI_DISPLAY_FLIP |
+		 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+	OUT_RING(fb->pitch);
+	OUT_RING(obj->gtt_offset + offset);
+	OUT_RING(MI_NOOP);
+	ADVANCE_LP_RING();
+out:
+	return ret;
+}
+
+static int intel_gen3_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	unsigned long offset;
+	int ret;
+
+	/* Offset into the new buffer for cases of shared fbs between CRTCs */
+	offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
+
+	ret = BEGIN_LP_RING(4);
+	if (ret)
+		goto out;
+
+	OUT_RING(MI_DISPLAY_FLIP_I915 |
+		 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+	OUT_RING(fb->pitch);
+	OUT_RING(obj->gtt_offset + offset);
+	OUT_RING(MI_NOOP);
+
+	ADVANCE_LP_RING();
+out:
+	return ret;
+}
+
+static int intel_gen4_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	uint32_t pf, pipesrc;
+	int ret;
+
+	ret = BEGIN_LP_RING(4);
+	if (ret)
+		goto out;
+
+	/* i965+ uses the linear or tiled offsets from the
+	 * Display Registers (which do not change across a page-flip)
+	 * so we need only reprogram the base address.
+	 */
+	OUT_RING(MI_DISPLAY_FLIP |
+		 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+	OUT_RING(fb->pitch);
+	OUT_RING(obj->gtt_offset | obj->tiling_mode);
+
+	/* XXX Enabling the panel-fitter across page-flip is so far
+	 * untested on non-native modes, so ignore it for now.
+	 * pf = I915_READ(pipe == 0 ? PFA_CTL_1 : PFB_CTL_1) & PF_ENABLE;
+	 */
+	pf = 0;
+	pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
+	OUT_RING(pf | pipesrc);
+	ADVANCE_LP_RING();
+out:
+	return ret;
+}
+
+static int intel_gen6_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	uint32_t pf, pipesrc;
+	int ret;
+
+	ret = BEGIN_LP_RING(4);
+	if (ret)
+		goto out;
+
+	OUT_RING(MI_DISPLAY_FLIP |
+		 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+	OUT_RING(fb->pitch | obj->tiling_mode);
+	OUT_RING(obj->gtt_offset);
+
+	pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE;
+	pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
+	OUT_RING(pf | pipesrc);
+	ADVANCE_LP_RING();
+out:
+	return ret;
+}
+
 static int intel_crtc_page_flip(struct drm_crtc *crtc,
 				struct drm_framebuffer *fb,
 				struct drm_pending_vblank_event *event)
@@ -6273,8 +6390,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	struct intel_unpin_work *work;
 	unsigned long flags, offset;
-	int pipe = intel_crtc->pipe;
-	u32 pf, pipesrc;
 	int ret;
 
 	work = kzalloc(sizeof *work, GFP_KERNEL);
@@ -6343,7 +6458,12 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 	/* Offset into the new buffer for cases of shared fbs between CRTCs */
 	offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
 
-	ret = BEGIN_LP_RING(4);
+	if (!dev_priv->display.queue_flip) {
+		ret = -ENODEV;
+		goto cleanup_objs;
+	}
+
+	ret = dev_priv->display.queue_flip(dev, crtc, fb, obj);
 	if (ret)
 		goto cleanup_objs;
 
@@ -6352,57 +6472,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 	 */
 	atomic_add(1 << intel_crtc->plane, &work->old_fb_obj->pending_flip);
 
-	switch (INTEL_INFO(dev)->gen) {
-	case 2:
-		OUT_RING(MI_DISPLAY_FLIP |
-			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-		OUT_RING(fb->pitch);
-		OUT_RING(obj->gtt_offset + offset);
-		OUT_RING(MI_NOOP);
-		break;
-
-	case 3:
-		OUT_RING(MI_DISPLAY_FLIP_I915 |
-			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-		OUT_RING(fb->pitch);
-		OUT_RING(obj->gtt_offset + offset);
-		OUT_RING(MI_NOOP);
-		break;
-
-	case 4:
-	case 5:
-		/* i965+ uses the linear or tiled offsets from the
-		 * Display Registers (which do not change across a page-flip)
-		 * so we need only reprogram the base address.
-		 */
-		OUT_RING(MI_DISPLAY_FLIP |
-			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-		OUT_RING(fb->pitch);
-		OUT_RING(obj->gtt_offset | obj->tiling_mode);
-
-		/* XXX Enabling the panel-fitter across page-flip is so far
-		 * untested on non-native modes, so ignore it for now.
-		 * pf = I915_READ(pipe == 0 ? PFA_CTL_1 : PFB_CTL_1) & PF_ENABLE;
-		 */
-		pf = 0;
-		pipesrc = I915_READ(PIPESRC(pipe)) & 0x0fff0fff;
-		OUT_RING(pf | pipesrc);
-		break;
-
-	case 6:
-	case 7:
-		OUT_RING(MI_DISPLAY_FLIP |
-			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-		OUT_RING(fb->pitch | obj->tiling_mode);
-		OUT_RING(obj->gtt_offset);
-
-		pf = I915_READ(PF_CTL(pipe)) & PF_ENABLE;
-		pipesrc = I915_READ(PIPESRC(pipe)) & 0x0fff0fff;
-		OUT_RING(pf | pipesrc);
-		break;
-	}
-	ADVANCE_LP_RING();
-
 	mutex_unlock(&dev->struct_mutex);
 
 	trace_i915_flip_request(intel_crtc->plane, obj);
@@ -7657,6 +7726,25 @@ static void intel_init_display(struct drm_device *dev)
 		else
 			dev_priv->display.get_fifo_size = i830_get_fifo_size;
 	}
+
+	switch (INTEL_INFO(dev)->gen) {
+	case 2:
+		dev_priv->display.queue_flip = intel_gen2_queue_flip;
+		break;
+
+	case 3:
+		dev_priv->display.queue_flip = intel_gen3_queue_flip;
+		break;
+
+	case 4:
+	case 5:
+		dev_priv->display.queue_flip = intel_gen4_queue_flip;
+		break;
+
+	case 6:
+		dev_priv->display.queue_flip = intel_gen6_queue_flip;
+		break;
+	}
 }
 
 /*
-- 
1.7.4.1

[PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Jesse Barnes]

Use the blit ring for submitting flips since the render ring doesn't
generate flip complete interrupts.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
 1 files changed, 25 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 06748f3a..3d095de 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6379,6 +6379,28 @@ out:
 	return ret;
 }
 
+static int intel_gen7_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	int ret;
+
+	ret = intel_ring_begin(&dev_priv->ring[BCS], 4);
+	if (ret)
+		goto out;
+
+	intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17));
+	intel_ring_emit(&dev_priv->ring[BCS], (fb->pitch | obj->tiling_mode));
+	intel_ring_emit(&dev_priv->ring[BCS], (obj->gtt_offset));
+	intel_ring_emit(&dev_priv->ring[BCS], (MI_NOOP));
+	intel_ring_advance(&dev_priv->ring[BCS]);
+out:
+	return ret;
+}
+
 static int intel_crtc_page_flip(struct drm_crtc *crtc,
 				struct drm_framebuffer *fb,
 				struct drm_pending_vblank_event *event)
@@ -7744,6 +7766,9 @@ static void intel_init_display(struct drm_device *dev)
 	case 6:
 		dev_priv->display.queue_flip = intel_gen6_queue_flip;
 		break;
+	case 7:
+		dev_priv->display.queue_flip = intel_gen7_queue_flip;
+		break;
 	}
 }
 
-- 
1.7.4.1

Re: [PATCH 1/2] drm/i915: split page flip queueing into per-chipset functions

[Chris Wilson]

On Tue, 14 Jun 2011 11:13:07 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> @@ -6343,7 +6458,12 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>  	/* Offset into the new buffer for cases of shared fbs between CRTCs */
>  	offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
>  
> -	ret = BEGIN_LP_RING(4);
> +	if (!dev_priv->display.queue_flip) {
> +		ret = -ENODEV;
> +		goto cleanup_objs;
> +	}
> +
> +	ret = dev_priv->display.queue_flip(dev, crtc, fb, obj);

Neil Brown would recommend that we use a default queue_flip that returns
-ENODEV which both removes lines of code from this complicated routine
and optimises the common case. I agree with him. :)
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Chris Wilson]

On Tue, 14 Jun 2011 11:13:08 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Use the blit ring for submitting flips since the render ring doesn't
> generate flip complete interrupts.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
>  1 files changed, 25 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 06748f3a..3d095de 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6379,6 +6379,28 @@ out:
>  	return ret;
>  }
>  
> +static int intel_gen7_queue_flip(struct drm_device *dev,
> +				 struct drm_crtc *crtc,
> +				 struct drm_framebuffer *fb,
> +				 struct drm_i915_gem_object *obj)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
> +	int ret;
> +
> +	ret = intel_ring_begin(&dev_priv->ring[BCS], 4);
> +	if (ret)
> +		goto out;
> +
> +	intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17));
What's the magic number? 80 column limit?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

[PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Jesse Barnes]

Use the blit ring for submitting flips since the render ring doesn't
generate flip complete interrupts.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0fb0b0c..d40fcd0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6379,6 +6379,29 @@ out:
 	return ret;
 }
 
+static int intel_gen7_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
+	int ret;
+
+	ret = intel_ring_begin(ring, 4);
+	if (ret)
+		goto out;
+
+	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
+	intel_ring_emit(ring, (fb->pitch | obj->tiling_mode));
+	intel_ring_emit(ring, (obj->gtt_offset));
+	intel_ring_emit(ring, (MI_NOOP));
+	intel_ring_advance(ring);
+out:
+	return ret;
+}
+
 static int intel_default_queue_flip(struct drm_device *dev,
 				    struct drm_crtc *crtc,
 				    struct drm_framebuffer *fb,
@@ -7750,6 +7773,9 @@ static void intel_init_display(struct drm_device *dev)
 	case 6:
 		dev_priv->display.queue_flip = intel_gen6_queue_flip;
 		break;
+	case 7:
+		dev_priv->display.queue_flip = intel_gen7_queue_flip;
+		break;
 	}
 }
 
-- 
1.7.4.1

Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Jesse Barnes]

On Tue, 14 Jun 2011 19:22:33 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:

> On Tue, 14 Jun 2011 11:13:08 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > Use the blit ring for submitting flips since the render ring doesn't
> > generate flip complete interrupts.
> > 
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
> >  1 files changed, 25 insertions(+), 0 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 06748f3a..3d095de 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -6379,6 +6379,28 @@ out:
> >  	return ret;
> >  }
> >  
> > +static int intel_gen7_queue_flip(struct drm_device *dev,
> > +				 struct drm_crtc *crtc,
> > +				 struct drm_framebuffer *fb,
> > +				 struct drm_i915_gem_object *obj)
> > +{
> > +	struct drm_i915_private *dev_priv = dev->dev_private;
> > +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
> > +	int ret;
> > +
> > +	ret = intel_ring_begin(&dev_priv->ring[BCS], 4);
> > +	if (ret)
> > +		goto out;
> > +
> > +	intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17));
> What's the magic number? 80 column limit?
> -Chris

All good points.  See the updated patches.

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Jesse Barnes]

On Tue, 14 Jun 2011 12:34:54 -0700
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> Use the blit ring for submitting flips since the render ring doesn't
> generate flip complete interrupts.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   26 ++++++++++++++++++++++++++
>  1 files changed, 26 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0fb0b0c..d40fcd0 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6379,6 +6379,29 @@ out:
>  	return ret;
>  }
>  
> +static int intel_gen7_queue_flip(struct drm_device *dev,
> +				 struct drm_crtc *crtc,
> +				 struct drm_framebuffer *fb,
> +				 struct drm_i915_gem_object *obj)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> +	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
> +	int ret;
> +
> +	ret = intel_ring_begin(ring, 4);
> +	if (ret)
> +		goto out;
> +
> +	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
> +	intel_ring_emit(ring, (fb->pitch | obj->tiling_mode));
> +	intel_ring_emit(ring, (obj->gtt_offset));
> +	intel_ring_emit(ring, (MI_NOOP));
> +	intel_ring_advance(ring);
> +out:
> +	return ret;
> +}

Oh and suggestions on how to track the BO properly through the BLT ring
appreciated...  I think that's the last missing piece.

-- 
Jesse Barnes, Intel Open Source Technology Center

[PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Jesse Barnes]

Use the blit ring for submitting flips since the render ring doesn't
generate flip complete interrupts.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |   30 ++++++++++++++++++++++++++++++
 1 files changed, 30 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 37e74e9..e842ed9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6412,6 +6412,33 @@ out:
 	return ret;
 }
 
+static int intel_gen7_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
+	int ret;
+
+	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
+	if (ret)
+		goto out;
+
+	ret = intel_ring_begin(ring, 4);
+	if (ret)
+		goto out;
+
+	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
+	intel_ring_emit(ring, (fb->pitch | obj->tiling_mode));
+	intel_ring_emit(ring, (obj->gtt_offset));
+	intel_ring_emit(ring, (MI_NOOP));
+	intel_ring_advance(ring);
+out:
+	return ret;
+}
+
 static int intel_default_queue_flip(struct drm_device *dev,
 				    struct drm_crtc *crtc,
 				    struct drm_framebuffer *fb,
@@ -7759,6 +7786,9 @@ static void intel_init_display(struct drm_device *dev)
 	case 6:
 		dev_priv->display.queue_flip = intel_gen6_queue_flip;
 		break;
+	case 7:
+		dev_priv->display.queue_flip = intel_gen7_queue_flip;
+		break;
 	}
 }
 
-- 
1.7.4.1

Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Ben Widawsky]

On Thu, Jun 16, 2011 at 09:19:14AM -0700, Jesse Barnes wrote:
> Use the blit ring for submitting flips since the render ring doesn't
> generate flip complete interrupts.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   30 ++++++++++++++++++++++++++++++
>  1 files changed, 30 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 37e74e9..e842ed9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6412,6 +6412,33 @@ out:
>  	return ret;
>  }
>  
> +static int intel_gen7_queue_flip(struct drm_device *dev,
> +				 struct drm_crtc *crtc,
> +				 struct drm_framebuffer *fb,
> +				 struct drm_i915_gem_object *obj)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Could you put the bit about why you chose the blitter ring here.
> +	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];


Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Jesse Barnes]

On Thu, 16 Jun 2011 11:54:50 -0700
Ben Widawsky <ben@bwidawsk.net> wrote:

> On Thu, Jun 16, 2011 at 09:19:14AM -0700, Jesse Barnes wrote:
> > Use the blit ring for submitting flips since the render ring doesn't
> > generate flip complete interrupts.
> > 
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c |   30 ++++++++++++++++++++++++++++++
> >  1 files changed, 30 insertions(+), 0 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 37e74e9..e842ed9 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -6412,6 +6412,33 @@ out:
> >  	return ret;
> >  }
> >  
> > +static int intel_gen7_queue_flip(struct drm_device *dev,
> > +				 struct drm_crtc *crtc,
> > +				 struct drm_framebuffer *fb,
> > +				 struct drm_i915_gem_object *obj)
> > +{
> > +	struct drm_i915_private *dev_priv = dev->dev_private;
> > +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> Could you put the bit about why you chose the blitter ring here.
> > +	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];

Oh yeah, good call.  Will update with comments.

-- 
Jesse Barnes, Intel Open Source Technology Center

Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Jesse Barnes]

Updated with comment.

-- 
Jesse Barnes, Intel Open Source Technology Center

>From 41bdb7457beb023faa0d465f483ab793ba8896e1 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Tue, 14 Jun 2011 11:08:03 -0700
Subject: [PATCH] drm/i915: add Ivy Bridge page flip support

Use the blit ring for submitting flips since the render ring doesn't
generate flip complete interrupts.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |   36 ++++++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 37e74e9..9446f4e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6412,6 +6412,39 @@ out:
 	return ret;
 }
 
+/*
+ * On gen7 we currently use the blit ring because (in early silicon at least)
+ * the render ring doesn't give us interrpts for page flip completion, which
+ * means clients will hang after the first flip is queued.  Fortunately the
+ * blit ring generates interrupts properly, so use it instead.
+ */
+static int intel_gen7_queue_flip(struct drm_device *dev,
+				 struct drm_crtc *crtc,
+				 struct drm_framebuffer *fb,
+				 struct drm_i915_gem_object *obj)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
+	int ret;
+
+	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
+	if (ret)
+		goto out;
+
+	ret = intel_ring_begin(ring, 4);
+	if (ret)
+		goto out;
+
+	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
+	intel_ring_emit(ring, (fb->pitch | obj->tiling_mode));
+	intel_ring_emit(ring, (obj->gtt_offset));
+	intel_ring_emit(ring, (MI_NOOP));
+	intel_ring_advance(ring);
+out:
+	return ret;
+}
+
 static int intel_default_queue_flip(struct drm_device *dev,
 				    struct drm_crtc *crtc,
 				    struct drm_framebuffer *fb,
@@ -7759,6 +7792,9 @@ static void intel_init_display(struct drm_device *dev)
 	case 6:
 		dev_priv->display.queue_flip = intel_gen6_queue_flip;
 		break;
+	case 7:
+		dev_priv->display.queue_flip = intel_gen7_queue_flip;
+		break;
 	}
 }
 
-- 
1.7.4.1

Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Paul Menzel]

[-- Attachment #1.1: Type: text/plain, Size: 1359 bytes --]

Am Donnerstag, den 16.06.2011, 12:18 -0700 schrieb Jesse Barnes:
> Updated with comment.
> 
> -- 
> Jesse Barnes, Intel Open Source Technology Center
> 
> >From 41bdb7457beb023faa0d465f483ab793ba8896e1 Mon Sep 17 00:00:00 2001
> From: Jesse Barnes <jbarnes@virtuousgeek.org>
> Date: Tue, 14 Jun 2011 11:08:03 -0700
> Subject: [PATCH] drm/i915: add Ivy Bridge page flip support
> 
> Use the blit ring for submitting flips since the render ring doesn't
> generate flip complete interrupts.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   36 ++++++++++++++++++++++++++++++++++
>  1 files changed, 36 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 37e74e9..9446f4e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6412,6 +6412,39 @@ out:
>  	return ret;
>  }
>  
> +/*
> + * On gen7 we currently use the blit ring because (in early silicon at least)
> + * the render ring doesn't give us interrpts for page flip completion, which

inter*u*pts

> + * means clients will hang after the first flip is queued.  Fortunately the
> + * blit ring generates interrupts properly, so use it instead.
> + */

[…]


Thanks,

Paul

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