From: Kevin Cernekee <cernekee@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH 2/3] MIPS: Allow UserLocal on MIPS_R1 processors
Date: Wed, 8 Sep 2010 16:02:14 -0700 [thread overview]
Message-ID: <d57a8d9cc346a9235a93e528beac4c40@localhost> (raw)
In-Reply-To: <064bb0722da5d8c271c2bd9fe0a521cc@localhost>
Some MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate
programs that make extensive use of thread-local storage. Therefore,
setting up the HWRENA register should not depend on cpu_has_mips_r2.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
arch/mips/kernel/traps.c | 13 +++++++------
1 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 03ec001..ec6cbd2 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1469,6 +1469,7 @@ void __cpuinit per_cpu_trap_init(void)
{
unsigned int cpu = smp_processor_id();
unsigned int status_set = ST0_CU0;
+ unsigned int hwrena = cpu_hwrena_impl_bits;
#ifdef CONFIG_MIPS_MT_SMTC
int secondaryTC = 0;
int bootTC = (cpu == 0);
@@ -1501,14 +1502,14 @@ void __cpuinit per_cpu_trap_init(void)
change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
status_set);
- if (cpu_has_mips_r2) {
- unsigned int enable = 0x0000000f | cpu_hwrena_impl_bits;
+ if (cpu_has_mips_r2)
+ hwrena |= 0x0000000f;
- if (!noulri && cpu_has_userlocal)
- enable |= (1 << 29);
+ if (!noulri && cpu_has_userlocal)
+ hwrena |= (1 << 29);
- write_c0_hwrena(enable);
- }
+ if (hwrena)
+ write_c0_hwrena(hwrena);
#ifdef CONFIG_MIPS_MT_SMTC
if (!secondaryTC) {
--
1.7.0.4
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Cernekee <cernekee@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: [PATCH 2/3] MIPS: Allow UserLocal on MIPS_R1 processors
Date: Wed, 8 Sep 2010 16:02:14 -0700 [thread overview]
Message-ID: <d57a8d9cc346a9235a93e528beac4c40@localhost> (raw)
Message-ID: <20100908230214.q10bznnT9nfF5sMUERpr4JZ6o7kWCZ-idXKpe0N-exw@z> (raw)
In-Reply-To: <064bb0722da5d8c271c2bd9fe0a521cc@localhost>
Some MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate
programs that make extensive use of thread-local storage. Therefore,
setting up the HWRENA register should not depend on cpu_has_mips_r2.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
arch/mips/kernel/traps.c | 13 +++++++------
1 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 03ec001..ec6cbd2 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1469,6 +1469,7 @@ void __cpuinit per_cpu_trap_init(void)
{
unsigned int cpu = smp_processor_id();
unsigned int status_set = ST0_CU0;
+ unsigned int hwrena = cpu_hwrena_impl_bits;
#ifdef CONFIG_MIPS_MT_SMTC
int secondaryTC = 0;
int bootTC = (cpu == 0);
@@ -1501,14 +1502,14 @@ void __cpuinit per_cpu_trap_init(void)
change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
status_set);
- if (cpu_has_mips_r2) {
- unsigned int enable = 0x0000000f | cpu_hwrena_impl_bits;
+ if (cpu_has_mips_r2)
+ hwrena |= 0x0000000f;
- if (!noulri && cpu_has_userlocal)
- enable |= (1 << 29);
+ if (!noulri && cpu_has_userlocal)
+ hwrena |= (1 << 29);
- write_c0_hwrena(enable);
- }
+ if (hwrena)
+ write_c0_hwrena(hwrena);
#ifdef CONFIG_MIPS_MT_SMTC
if (!secondaryTC) {
--
1.7.0.4
next prev parent reply other threads:[~2010-09-08 23:12 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-08 23:02 [PATCH v2 1/3] MIPS: HIGHMEM DMA on noncoherent MIPS32 processors Kevin Cernekee
2010-09-08 23:02 ` Kevin Cernekee
2010-09-08 23:02 ` Kevin Cernekee [this message]
2010-09-08 23:02 ` [PATCH 2/3] MIPS: Allow UserLocal on MIPS_R1 processors Kevin Cernekee
2010-09-09 9:53 ` Ralf Baechle
2010-09-08 23:02 ` [PATCH 3/3] MIPS: DMA: Add plat_extra_sync_for_cpu() Kevin Cernekee
2010-09-08 23:02 ` Kevin Cernekee
2010-09-09 9:34 ` Sergei Shtylyov
2010-09-09 12:39 ` Kevin Cernekee
2011-05-19 13:30 ` Ralf Baechle
2010-09-09 17:10 ` David Daney
2010-09-09 17:34 ` Thomas Bogendoerfer
2010-09-09 18:35 ` Kevin Cernekee
2010-09-09 18:58 ` David Daney
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