Re: [PATCH v1 13/17] xen/riscv: add unprivileged guest memory read helper

[Oleksii Kurochko <oleksii.kurochko@gmail.com>]

On 8/18/26 10:17 AM, Jan Beulich wrote:
> On 17.08.2026 17:36, Oleksii Kurochko wrote:
>> On 8/12/26 5:30 PM, Jan Beulich wrote:
>>> On 20.07.2026 18:02, Oleksii Kurochko wrote:
>>>> Introduce riscv_vcpu_unpriv_read() to allow Xen to safely read guest memory
>>>> using HLV/HLVX instructions while reliably capturing trap context.
>>>
>>> Both for the title and the function name: How does "unprivileged" matter here?
>>
>> Unprivileged because HLV/HLVX reads guest memory as if it were accessed
>> from a less-privileged (guest) context, rather than by the hypervisor in
>> HS mode.
>>
>> I think I am okay generally to drop "unpriv..." from the function name.
>>
>>> The same functions would be use for reading Dom0's memory, wouldn't they?
>>
>> Yes, I don't see any issue to let this function to read DomO's memory
>> too. But Dom0 could be counted as "unprivileged" too as it is executed
>> in VS-mode which is less-privileged then HS-mode.
> 
> Well, you need to properly distinguish the different cases of "unprivileged"
> when writing titles / descriptions. The way you put it in your reply above
> ("less-privileged (guest)") is sufficiently unambiguous, but what you have
> in the title ("unprivileged guest") clearly is a synonym for "DomU".
> 
> In the end, as you confirm, "guest" alone is all that's needed here to know
> what is being talked about. (That said: We often distinguish "guest" and
> "domain", with the former meaning DomU but the latter meaning all domains,
> including Dom0 and service domains. Yet for the purpose here I think "guest"
> is good to use, not matter that all kinds of domains are meant.)

I will use then guest.

> 
>>>> +    if ( read_insn )
>>>> +    {
>>>> +        asm volatile ( "\n"
>>>> +            "1:\n"
>>>> +            "   hlvx.hu %[val], (%[addr])\n"
>>>> +            ASM_EXTABLE_TRAP_INFO(1b, 3f, %[ti])
>>>> +            "   andi %[tmp], %[val], 3\n"
>>>> +            "   addi %[tmp], %[tmp], -3\n"
>>>> +            "   bne %[tmp], zero, 3f\n"
>>>> +            "   addi %[addr], %[addr], 2\n"
>>>> +            "\n"
>>>> +            "2:\n"
>>>> +            "   hlvx.hu %[tmp], (%[addr])\n"
>>>> +            ASM_EXTABLE_TRAP_INFO(2b, 3f, %[ti])
>>>> +            "   sll %[tmp], %[tmp], 16\n"
>>>> +            "   add %[val], %[val], %[tmp]\n"
>>>> +            "3:\n"
>>>> +        : [val] "=&r" (val), [tmp] "=&r" (tmp), [addr] "+&r" (guest_addr)
>>>> +        : [ti] "r" (trap) : "memory" );
>>>
>>> You want to tell the compiler that *trap is written. Instead I don't see
>>> why a memory clobber would be needed: You access a different address space,
>>> i.e. nothing the compiler can make any assumptions about.
>>
>> memory clobber tells the compiler that the assembly code performs memory
>> reads or writes to items other than those listed in the input and output
>> operands and so I don't tell here that *trap will be changed.
>>
>> Why this understanding is wrong?
> 
> You can (ab)use "memory" for that purpose, but why would you when you can
> properly express the operand? All that achieves is the compiler possibly
> having to emit less efficient code.

Then I will use the option mentioned ...

> 
>> Alternative, I think, could be:
>>           : [val] "+r" (val), "+m" (*trap)
>>           : [addr] "r" (guest_addr), [ti] "r" (trap) );
>> And then memory clobber could be dropped.

... here.

Probably I have to return '[addr] "r" (guest_addr)' to output and use 
+&r constraint.

>>
>>
>>
>>>
>>> You also need to take precautions for not returning an uninitialized "val".
>>> I think the variable wants initializing (perhaps to ~0) and "+r" wants
>>> using as constraint. (Afaik & isn't necessary to use together with +.)
>>
>> I agree with '+' if we will initialize val with some value.
>>
>> Regarding, '&' my understanding is that I have to use it always when
> 
> When what exactly? If an operand is both input and output, how could the
> compiler re-use the (generally) register for any further purpose? '&'
> indicates to the compiler that it may not use the register used for an
> output to hold some input's value, as that value may be lost by the time
> the input is actually consumed.

But what is written in the gcc doc:

& - Means (in a particular alternative) that this operand is an 
earlyclobber operand, which is written before the instruction is 
finished using the input operands.

What sounds like if an operand (val) in our case is written before the 
instruction which using the input operands (and after the write 
instuction which writes val there are instructions which are using input 
operands) it is needed to have &.

t1:  hlvx.hu %[val], (%[addr])   W:val R:addr + can trap -> read register ti

t2:  andi    %[tmp], %[val], 3   W:tmp   R:val
t3:  addi    %[tmp], %[tmp], -3
t4:  bnez    %[tmp], 3f
t5:  addi    %[addr], %[addr], 2 W:addr  R:addr
t6:  hlvx.hu %[tmp], (%[addr])   W:tmp   R:addr + can trap -> read 
register ti

t7:  slli    %[tmp], %[tmp], 16
t8:  or      %[val], %[val], %[tmp] W:val

So val is written on t1 before t6 where addr and ti still alive.

The similar is for [addr] "+&r" (guest_addr):

addr is written on t5 and input ti is alive till t6. So if allocator 
will allocate the same register for addr and ti then addi %[addr], 
%[addr], 2 will break a pointer and handler will get something wrong.

Am I missing something?

If I am still wrong then in both cases should be just "+r"?

~ Oleksii