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From: Roger Quadros <rogerq@kernel.org>
To: Siddharth Vadapalli <s-vadapalli@ti.com>,
	nm@ti.com, vigneshr@ti.com, afd@ti.com, kristo@kernel.org,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, u-kumar1@ti.com,
	danishanwar@ti.com, srk@ti.com
Subject: Re: [PATCH v3 4/7] arm64: dts: ti: k3-serdes: Add Serdes1 lane-muxing macros for J722S
Date: Tue, 28 May 2024 15:19:30 +0300	[thread overview]
Message-ID: <def2fd41-371a-4b2a-925d-81b149aaae01@kernel.org> (raw)
In-Reply-To: <20240524090514.152727-5-s-vadapalli@ti.com>



On 24/05/2024 12:05, Siddharth Vadapalli wrote:
> The Serdes1 instance of the Serdes on J722S SoC is a single lane Serdes
> that is muxed across PCIe and CPSW. Define the lane-muxing macros to be
> used as the idle state values.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> Current patch is v1. No changelog.
> 
>  arch/arm64/boot/dts/ti/k3-serdes.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-serdes.h b/arch/arm64/boot/dts/ti/k3-serdes.h
> index e6a036a4e70b..ef3606068140 100644
> --- a/arch/arm64/boot/dts/ti/k3-serdes.h
> +++ b/arch/arm64/boot/dts/ti/k3-serdes.h
> @@ -206,4 +206,7 @@
>  #define J722S_SERDES0_LANE0_USB			0x0
>  #define J722S_SERDES0_LANE0_QSGMII_LANE2	0x1
>  
> +#define J722S_SERDES1_LANE0_PCIE0_LANE0		0x0
> +#define J722S_SERDES1_LANE0_QSGMII_LANE1	0x1
> +

Maybe this one patch can deal with both USB and PCIE0 additions to this file
and could be moved earlier in the series.

>  #endif /* DTS_ARM64_TI_K3_SERDES_H */

-- 
cheers,
-roger

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@kernel.org>
To: Siddharth Vadapalli <s-vadapalli@ti.com>,
	nm@ti.com, vigneshr@ti.com, afd@ti.com, kristo@kernel.org,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, u-kumar1@ti.com,
	danishanwar@ti.com, srk@ti.com
Subject: Re: [PATCH v3 4/7] arm64: dts: ti: k3-serdes: Add Serdes1 lane-muxing macros for J722S
Date: Tue, 28 May 2024 15:19:30 +0300	[thread overview]
Message-ID: <def2fd41-371a-4b2a-925d-81b149aaae01@kernel.org> (raw)
In-Reply-To: <20240524090514.152727-5-s-vadapalli@ti.com>



On 24/05/2024 12:05, Siddharth Vadapalli wrote:
> The Serdes1 instance of the Serdes on J722S SoC is a single lane Serdes
> that is muxed across PCIe and CPSW. Define the lane-muxing macros to be
> used as the idle state values.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> Current patch is v1. No changelog.
> 
>  arch/arm64/boot/dts/ti/k3-serdes.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-serdes.h b/arch/arm64/boot/dts/ti/k3-serdes.h
> index e6a036a4e70b..ef3606068140 100644
> --- a/arch/arm64/boot/dts/ti/k3-serdes.h
> +++ b/arch/arm64/boot/dts/ti/k3-serdes.h
> @@ -206,4 +206,7 @@
>  #define J722S_SERDES0_LANE0_USB			0x0
>  #define J722S_SERDES0_LANE0_QSGMII_LANE2	0x1
>  
> +#define J722S_SERDES1_LANE0_PCIE0_LANE0		0x0
> +#define J722S_SERDES1_LANE0_QSGMII_LANE1	0x1
> +

Maybe this one patch can deal with both USB and PCIE0 additions to this file
and could be moved earlier in the series.

>  #endif /* DTS_ARM64_TI_K3_SERDES_H */

-- 
cheers,
-roger

  reply	other threads:[~2024-05-28 12:19 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-24  9:05 [PATCH v3 0/7] Add PCIe and USB device-tree support for J722S Siddharth Vadapalli
2024-05-24  9:05 ` Siddharth Vadapalli
2024-05-24  9:05 ` [PATCH v3 1/7] arm64: dts: ti: k3-j722s-main: Add support for SERDES0 Siddharth Vadapalli
2024-05-24  9:05   ` Siddharth Vadapalli
2024-05-28 12:09   ` Roger Quadros
2024-05-28 12:09     ` Roger Quadros
2024-05-28 12:30     ` Siddharth Vadapalli
2024-05-28 12:30       ` Siddharth Vadapalli
2024-05-24  9:05 ` [PATCH v3 2/7] arm64: dts: ti: k3-j722s-main: Redefine USB1 node description Siddharth Vadapalli
2024-05-24  9:05   ` Siddharth Vadapalli
2024-05-28 12:15   ` Roger Quadros
2024-05-28 12:15     ` Roger Quadros
2024-05-28 12:37     ` Siddharth Vadapalli
2024-05-28 12:37       ` Siddharth Vadapalli
2024-05-24  9:05 ` [PATCH v3 3/7] arm64: dts: ti: k3-j722s-evm: Update USB0 and USB1 Siddharth Vadapalli
2024-05-24  9:05   ` Siddharth Vadapalli
2024-05-28 12:18   ` Roger Quadros
2024-05-28 12:18     ` Roger Quadros
2024-05-28 12:40     ` Siddharth Vadapalli
2024-05-28 12:40       ` Siddharth Vadapalli
2024-05-24  9:05 ` [PATCH v3 4/7] arm64: dts: ti: k3-serdes: Add Serdes1 lane-muxing macros for J722S Siddharth Vadapalli
2024-05-24  9:05   ` Siddharth Vadapalli
2024-05-28 12:19   ` Roger Quadros [this message]
2024-05-28 12:19     ` Roger Quadros
2024-05-28 12:40     ` Siddharth Vadapalli
2024-05-28 12:40       ` Siddharth Vadapalli
2024-05-24  9:05 ` [PATCH v3 5/7] arm64: dts: ti: k3-j722s: Add lane mux for Serdes1 Siddharth Vadapalli
2024-05-24  9:05   ` Siddharth Vadapalli
2024-05-28 12:23   ` Roger Quadros
2024-05-28 12:23     ` Roger Quadros
2024-05-28 12:42     ` Siddharth Vadapalli
2024-05-28 12:42       ` Siddharth Vadapalli
2024-05-24  9:05 ` [PATCH v3 6/7] arm64: dts: ti: k3-j722s-main: Add WIZ1 and Serdes1 nodes Siddharth Vadapalli
2024-05-24  9:05   ` Siddharth Vadapalli
2024-05-28 12:24   ` Roger Quadros
2024-05-28 12:24     ` Roger Quadros
2024-05-28 12:43     ` Siddharth Vadapalli
2024-05-28 12:43       ` Siddharth Vadapalli
2024-05-24  9:05 ` [PATCH v3 7/7] arm64: dts: ti: k3-j722s: Add support for PCIe0 Siddharth Vadapalli
2024-05-24  9:05   ` Siddharth Vadapalli
2024-05-28 12:26   ` Roger Quadros
2024-05-28 12:26     ` Roger Quadros
2024-05-28 12:44     ` Siddharth Vadapalli
2024-05-28 12:44       ` Siddharth Vadapalli

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