All of lore.kernel.org
 help / color / mirror / Atom feed
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"nathan@kernel.org" <nathan@kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"daniel@ffwll.ch" <daniel@ffwll.ch>,
	"CK Hu (胡俊光)" <ck.hu@mediatek.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"clang-built-linux@googlegroups.com"
	<clang-built-linux@googlegroups.com>,
	"ndesaulniers@google.com" <ndesaulniers@google.com>
Subject: Re: [PATCH v29 1/7] dt-bindings: mediatek: add ethdr definition for mt8195
Date: Thu, 16 Mar 2023 10:53:45 +0100	[thread overview]
Message-ID: <e5ceec9e-d51b-2aeb-1db7-b79b151bd44c@collabora.com> (raw)
In-Reply-To: <b04eb48e-c9aa-0404-33ec-bef623b8282f@linaro.org>

Il 16/03/23 07:31, Krzysztof Kozlowski ha scritto:
> On 16/03/2023 07:19, Nancy Lin (林欣螢) wrote:
>> On Wed, 2023-03-15 at 08:16 +0100, Krzysztof Kozlowski wrote:
>>> On 15/03/2023 04:45, Nancy Lin (林欣螢) wrote:
>>>

..snip..

>>>>
>>>>
>>>> [1].
>>>> Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.e
>>>> xamp
>>>> le.dtb
>>>> /proj/mtk19347/cros/src/third_party/kernel/v5.10/Documentation/devi
>>>> cetr
>>>> ee/bindings/display/mediatek/mediatek,ethdr.example.dtb:
>>>> hdr-engine@1c114000: mediatek,gce-client-reg:0: [4294967295, 7,
>>>> 16384,
>>>> 4096, 4294967295, 7, 20480, 4096, 4294967295, 7, 28672, 4096,
>>>> 4294967295, 7, 36864, 4096, 4294967295, 7, 40960, 4096, 4294967295,
>>>> 7,
>>>> 45056, 4096, 4294967295, 7, 49152, 4096] is too long
>>>>          From schema:
>>>
>>> This looks like known issue with phandles with variable number of
>>> arguments. Either we add it to the exceptions or just define it in
>>> reduced way like in other cases - only maxItems: 1 without describing
>>> items.
>>>

...

>>
>> But I have several items for this vendor property in the binding
>> example.
> 
> Do you? I thought you have one phandle?
> 
>> Can I remove maxItems? Change the mediatek,gce-client-reg as [1].
>>
>> [1]
>>    mediatek,gce-client-reg:
>>      $ref: /schemas/types.yaml#/definitions/phandle-array
>>      description: The register of display function block to be set by
>> gce.
>>        There are 4 arguments in this property, gce node, subsys id,
>> offset and
>>        register size. The subsys id is defined in the gce header of each
>> chips
>>        include/dt-bindings/gce/<chip>-gce.h, mapping to the register of
>> display
>>        function block.
> 
> No, this needs some constraints.

Hello Krzysztof, Nancy,

Since this series has reached v29, can we please reach an agreement on the bindings
to use here, so that we can get this finally upstreamed?

I will put some examples to try to get this issue resolved.

### Example 1: Constrain the number of GCE entries to *seven* array elements (7x4!)

   mediatek,gce-client-reg:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     maxItems: 1
     description: The register of display function block to be set by gce.
       There are 4 arguments in this property, gce node, subsys id, offset and
       register size. The subsys id is defined in the gce header of each chips
       include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
       function block.
     items:
       minItems: 28
       maxItems: 28
       items:                     <----- this block doesn't seem to get checked :\
         - description: phandle of GCE
         - description: GCE subsys id
         - description: register offset
         - description: register size


### Example 2: Don't care about constraining the number of arguments

   mediatek,gce-client-reg:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     maxItems: 1
     description: The register of display function block to be set by gce.
       There are 4 arguments in this property, gce node, subsys id, offset and
       register size. The subsys id is defined in the gce header of each chips
       include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
       function block.


Regards,
Angelo


WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"nathan@kernel.org" <nathan@kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"daniel@ffwll.ch" <daniel@ffwll.ch>,
	"CK Hu (胡俊光)" <ck.hu@mediatek.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"clang-built-linux@googlegroups.com"
	<clang-built-linux@googlegroups.com>,
	"ndesaulniers@google.com" <ndesaulniers@google.com>
Subject: Re: [PATCH v29 1/7] dt-bindings: mediatek: add ethdr definition for mt8195
Date: Thu, 16 Mar 2023 10:53:45 +0100	[thread overview]
Message-ID: <e5ceec9e-d51b-2aeb-1db7-b79b151bd44c@collabora.com> (raw)
In-Reply-To: <b04eb48e-c9aa-0404-33ec-bef623b8282f@linaro.org>

Il 16/03/23 07:31, Krzysztof Kozlowski ha scritto:
> On 16/03/2023 07:19, Nancy Lin (林欣螢) wrote:
>> On Wed, 2023-03-15 at 08:16 +0100, Krzysztof Kozlowski wrote:
>>> On 15/03/2023 04:45, Nancy Lin (林欣螢) wrote:
>>>

..snip..

>>>>
>>>>
>>>> [1].
>>>> Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.e
>>>> xamp
>>>> le.dtb
>>>> /proj/mtk19347/cros/src/third_party/kernel/v5.10/Documentation/devi
>>>> cetr
>>>> ee/bindings/display/mediatek/mediatek,ethdr.example.dtb:
>>>> hdr-engine@1c114000: mediatek,gce-client-reg:0: [4294967295, 7,
>>>> 16384,
>>>> 4096, 4294967295, 7, 20480, 4096, 4294967295, 7, 28672, 4096,
>>>> 4294967295, 7, 36864, 4096, 4294967295, 7, 40960, 4096, 4294967295,
>>>> 7,
>>>> 45056, 4096, 4294967295, 7, 49152, 4096] is too long
>>>>          From schema:
>>>
>>> This looks like known issue with phandles with variable number of
>>> arguments. Either we add it to the exceptions or just define it in
>>> reduced way like in other cases - only maxItems: 1 without describing
>>> items.
>>>

...

>>
>> But I have several items for this vendor property in the binding
>> example.
> 
> Do you? I thought you have one phandle?
> 
>> Can I remove maxItems? Change the mediatek,gce-client-reg as [1].
>>
>> [1]
>>    mediatek,gce-client-reg:
>>      $ref: /schemas/types.yaml#/definitions/phandle-array
>>      description: The register of display function block to be set by
>> gce.
>>        There are 4 arguments in this property, gce node, subsys id,
>> offset and
>>        register size. The subsys id is defined in the gce header of each
>> chips
>>        include/dt-bindings/gce/<chip>-gce.h, mapping to the register of
>> display
>>        function block.
> 
> No, this needs some constraints.

Hello Krzysztof, Nancy,

Since this series has reached v29, can we please reach an agreement on the bindings
to use here, so that we can get this finally upstreamed?

I will put some examples to try to get this issue resolved.

### Example 1: Constrain the number of GCE entries to *seven* array elements (7x4!)

   mediatek,gce-client-reg:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     maxItems: 1
     description: The register of display function block to be set by gce.
       There are 4 arguments in this property, gce node, subsys id, offset and
       register size. The subsys id is defined in the gce header of each chips
       include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
       function block.
     items:
       minItems: 28
       maxItems: 28
       items:                     <----- this block doesn't seem to get checked :\
         - description: phandle of GCE
         - description: GCE subsys id
         - description: register offset
         - description: register size


### Example 2: Don't care about constraining the number of arguments

   mediatek,gce-client-reg:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     maxItems: 1
     description: The register of display function block to be set by gce.
       There are 4 arguments in this property, gce node, subsys id, offset and
       register size. The subsys id is defined in the gce header of each chips
       include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
       function block.


Regards,
Angelo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"ndesaulniers@google.com" <ndesaulniers@google.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"nathan@kernel.org" <nathan@kernel.org>,
	"clang-built-linux@googlegroups.com"
	<clang-built-linux@googlegroups.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v29 1/7] dt-bindings: mediatek: add ethdr definition for mt8195
Date: Thu, 16 Mar 2023 10:53:45 +0100	[thread overview]
Message-ID: <e5ceec9e-d51b-2aeb-1db7-b79b151bd44c@collabora.com> (raw)
In-Reply-To: <b04eb48e-c9aa-0404-33ec-bef623b8282f@linaro.org>

Il 16/03/23 07:31, Krzysztof Kozlowski ha scritto:
> On 16/03/2023 07:19, Nancy Lin (林欣螢) wrote:
>> On Wed, 2023-03-15 at 08:16 +0100, Krzysztof Kozlowski wrote:
>>> On 15/03/2023 04:45, Nancy Lin (林欣螢) wrote:
>>>

..snip..

>>>>
>>>>
>>>> [1].
>>>> Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.e
>>>> xamp
>>>> le.dtb
>>>> /proj/mtk19347/cros/src/third_party/kernel/v5.10/Documentation/devi
>>>> cetr
>>>> ee/bindings/display/mediatek/mediatek,ethdr.example.dtb:
>>>> hdr-engine@1c114000: mediatek,gce-client-reg:0: [4294967295, 7,
>>>> 16384,
>>>> 4096, 4294967295, 7, 20480, 4096, 4294967295, 7, 28672, 4096,
>>>> 4294967295, 7, 36864, 4096, 4294967295, 7, 40960, 4096, 4294967295,
>>>> 7,
>>>> 45056, 4096, 4294967295, 7, 49152, 4096] is too long
>>>>          From schema:
>>>
>>> This looks like known issue with phandles with variable number of
>>> arguments. Either we add it to the exceptions or just define it in
>>> reduced way like in other cases - only maxItems: 1 without describing
>>> items.
>>>

...

>>
>> But I have several items for this vendor property in the binding
>> example.
> 
> Do you? I thought you have one phandle?
> 
>> Can I remove maxItems? Change the mediatek,gce-client-reg as [1].
>>
>> [1]
>>    mediatek,gce-client-reg:
>>      $ref: /schemas/types.yaml#/definitions/phandle-array
>>      description: The register of display function block to be set by
>> gce.
>>        There are 4 arguments in this property, gce node, subsys id,
>> offset and
>>        register size. The subsys id is defined in the gce header of each
>> chips
>>        include/dt-bindings/gce/<chip>-gce.h, mapping to the register of
>> display
>>        function block.
> 
> No, this needs some constraints.

Hello Krzysztof, Nancy,

Since this series has reached v29, can we please reach an agreement on the bindings
to use here, so that we can get this finally upstreamed?

I will put some examples to try to get this issue resolved.

### Example 1: Constrain the number of GCE entries to *seven* array elements (7x4!)

   mediatek,gce-client-reg:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     maxItems: 1
     description: The register of display function block to be set by gce.
       There are 4 arguments in this property, gce node, subsys id, offset and
       register size. The subsys id is defined in the gce header of each chips
       include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
       function block.
     items:
       minItems: 28
       maxItems: 28
       items:                     <----- this block doesn't seem to get checked :\
         - description: phandle of GCE
         - description: GCE subsys id
         - description: register offset
         - description: register size


### Example 2: Don't care about constraining the number of arguments

   mediatek,gce-client-reg:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     maxItems: 1
     description: The register of display function block to be set by gce.
       There are 4 arguments in this property, gce node, subsys id, offset and
       register size. The subsys id is defined in the gce header of each chips
       include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
       function block.


Regards,
Angelo

  reply	other threads:[~2023-03-16  9:54 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-27  8:10 [PATCH v29 0/7] Add MediaTek SoC DRM (vdosys1) support for mt8195 Nancy.Lin
2022-12-27  8:10 ` Nancy.Lin
2022-12-27  8:10 ` Nancy.Lin
2022-12-27  8:10 ` [PATCH v29 1/7] dt-bindings: mediatek: add ethdr definition " Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2023-03-15  3:45   ` Nancy Lin (林欣螢)
2023-03-15  3:45     ` Nancy Lin (林欣螢)
2023-03-15  3:45     ` Nancy Lin (林欣螢)
2023-03-15  7:16     ` Krzysztof Kozlowski
2023-03-15  7:16       ` Krzysztof Kozlowski
2023-03-15  7:16       ` Krzysztof Kozlowski
2023-03-16  6:19       ` Nancy Lin (林欣螢)
2023-03-16  6:19         ` Nancy Lin (林欣螢)
2023-03-16  6:19         ` Nancy Lin (林欣螢)
2023-03-16  6:31         ` Krzysztof Kozlowski
2023-03-16  6:31           ` Krzysztof Kozlowski
2023-03-16  6:31           ` Krzysztof Kozlowski
2023-03-16  9:53           ` AngeloGioacchino Del Regno [this message]
2023-03-16  9:53             ` AngeloGioacchino Del Regno
2023-03-16  9:53             ` AngeloGioacchino Del Regno
2023-03-16 11:36             ` Krzysztof Kozlowski
2023-03-16 11:36               ` Krzysztof Kozlowski
2023-03-16 11:36               ` Krzysztof Kozlowski
2023-03-17  7:55               ` Nancy Lin (林欣螢)
2023-03-17  7:55                 ` Nancy Lin (林欣螢)
2023-03-17  7:55                 ` Nancy Lin (林欣螢)
2023-03-17  9:03                 ` Krzysztof Kozlowski
2023-03-17  9:03                   ` Krzysztof Kozlowski
2023-03-17  9:03                   ` Krzysztof Kozlowski
2023-03-17  9:37                   ` AngeloGioacchino Del Regno
2023-03-17  9:37                     ` AngeloGioacchino Del Regno
2023-03-17  9:37                     ` AngeloGioacchino Del Regno
2023-03-17  9:52                     ` Nancy Lin (林欣螢)
2023-03-17  9:52                       ` Nancy Lin (林欣螢)
2023-03-17  9:52                       ` Nancy Lin (林欣螢)
2023-03-17  9:58                       ` AngeloGioacchino Del Regno
2023-03-17  9:58                         ` AngeloGioacchino Del Regno
2023-03-17  9:58                         ` AngeloGioacchino Del Regno
2023-03-21  5:33                         ` Nancy Lin (林欣螢)
2023-03-21  5:33                           ` Nancy Lin (林欣螢)
2023-03-21  5:33                           ` Nancy Lin (林欣螢)
2023-03-21  9:54                           ` AngeloGioacchino Del Regno
2023-03-21  9:54                             ` AngeloGioacchino Del Regno
2023-03-21  9:54                             ` AngeloGioacchino Del Regno
2022-12-27  8:10 ` [PATCH v29 2/7] drm/mediatek: add ETHDR support for MT8195 Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10 ` [PATCH v29 3/7] drm/mediatek: add ovl_adaptor " Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2023-02-17 16:47   ` Guillaume Ranquet
2023-02-17 16:47     ` Guillaume Ranquet
2023-02-17 16:47     ` Guillaume Ranquet
2022-12-27  8:10 ` [PATCH v29 4/7] drm/mediatek: add dma dev get function Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2023-02-17 16:51   ` Guillaume Ranquet
2023-02-17 16:51     ` Guillaume Ranquet
2023-02-17 16:51     ` Guillaume Ranquet
2022-12-27  8:10 ` [PATCH v29 5/7] drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10 ` [PATCH v29 6/7] drm/mediatek: add drm ovl_adaptor sub driver for MT8195 Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10 ` [PATCH v29 7/7] drm/mediatek: add mediatek-drm of vdosys1 support " Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2022-12-27  8:10   ` Nancy.Lin
2023-02-02  9:38 ` [PATCH v29 0/7] Add MediaTek SoC DRM (vdosys1) support for mt8195 AngeloGioacchino Del Regno
2023-02-02  9:38   ` AngeloGioacchino Del Regno
2023-02-02  9:38   ` AngeloGioacchino Del Regno

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e5ceec9e-d51b-2aeb-1db7-b79b151bd44c@collabora.com \
    --to=angelogioacchino.delregno@collabora.com \
    --cc=Nancy.Lin@mediatek.com \
    --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
    --cc=Singo.Chang@mediatek.com \
    --cc=chunkuang.hu@kernel.org \
    --cc=ck.hu@mediatek.com \
    --cc=clang-built-linux@googlegroups.com \
    --cc=daniel@ffwll.ch \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=nathan@kernel.org \
    --cc=ndesaulniers@google.com \
    --cc=p.zabel@pengutronix.de \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.