* [PATCH 1/5] ARM: dts: stm32: fullfill diversity with OPP for STM32M15x SOCs
2025-05-27 13:03 [PATCH 0/5] Introduce STM32MP157F-DK2 board Amelie Delaunay
@ 2025-05-27 13:03 ` Amelie Delaunay
2025-05-27 13:12 ` Krzysztof Kozlowski
2025-05-27 13:03 ` [PATCH 2/5] ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx Amelie Delaunay
` (3 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Amelie Delaunay @ 2025-05-27 13:03 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Liam Girdwood, Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Amelie Delaunay
From: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit creates new files to manage security features and supported OPP
on STM32MP15x SOCs. On STM32MP15xY, "Y" gives information:
-Y = A means no cryp IP and no secure boot + A7-CPU@650MHz.
-Y = C means cryp IP + optee + secure boot + A7-CPU@650MHz.
-Y = D means no cryp IP and no secure boot + A7-CPU@800MHz.
-Y = F means cryp IP + optee + secure boot + A7-CPU@800MHz.
It fullfills the initial STM32MP15x SoC diversity introduced by
commit 0eda69b6c5f9 ("ARM: dts: stm32: Manage security diversity
for STM32M15x SOCs").
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp15xa.dtsi | 5 +++++
arch/arm/boot/dts/st/stm32mp15xc.dtsi | 4 +++-
arch/arm/boot/dts/st/stm32mp15xd.dtsi | 5 +++++
arch/arm/boot/dts/st/stm32mp15xf.dtsi | 20 ++++++++++++++++++++
4 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/st/stm32mp15xa.dtsi b/arch/arm/boot/dts/st/stm32mp15xa.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98
--- /dev/null
+++ b/arch/arm/boot/dts/st/stm32mp15xa.dtsi
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
diff --git a/arch/arm/boot/dts/st/stm32mp15xc.dtsi b/arch/arm/boot/dts/st/stm32mp15xc.dtsi
index 97465717f932fc223647af76e88a6182cf3c870f..4d30a2a537f15c1e145635b090de0f0222526579 100644
--- a/arch/arm/boot/dts/st/stm32mp15xc.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xc.dtsi
@@ -1,9 +1,11 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
*/
+#include "stm32mp15xa.dtsi"
+
&etzpc {
cryp1: cryp@54001000 {
compatible = "st,stm32mp1-cryp";
diff --git a/arch/arm/boot/dts/st/stm32mp15xd.dtsi b/arch/arm/boot/dts/st/stm32mp15xd.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98
--- /dev/null
+++ b/arch/arm/boot/dts/st/stm32mp15xd.dtsi
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
diff --git a/arch/arm/boot/dts/st/stm32mp15xf.dtsi b/arch/arm/boot/dts/st/stm32mp15xf.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..5f6a2952125d00d468e2e4012024f02380cfaa49
--- /dev/null
+++ b/arch/arm/boot/dts/st/stm32mp15xf.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+#include "stm32mp15xd.dtsi"
+
+/ {
+ soc {
+ cryp1: cryp@54001000 {
+ compatible = "st,stm32mp1-cryp";
+ reg = <0x54001000 0x400>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CRYP1>;
+ resets = <&rcc CRYP1_R>;
+ status = "disabled";
+ };
+ };
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 1/5] ARM: dts: stm32: fullfill diversity with OPP for STM32M15x SOCs
2025-05-27 13:03 ` [PATCH 1/5] ARM: dts: stm32: fullfill diversity with OPP for STM32M15x SOCs Amelie Delaunay
@ 2025-05-27 13:12 ` Krzysztof Kozlowski
2025-05-27 14:03 ` Amelie Delaunay
0 siblings, 1 reply; 11+ messages in thread
From: Krzysztof Kozlowski @ 2025-05-27 13:12 UTC (permalink / raw)
To: Amelie Delaunay, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Maxime Coquelin, Alexandre Torgue, Liam Girdwood, Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel
On 27/05/2025 15:03, Amelie Delaunay wrote:
> From: Alexandre Torgue <alexandre.torgue@foss.st.com>
>
> This commit creates new files to manage security features and supported OPP
> on STM32MP15x SOCs. On STM32MP15xY, "Y" gives information:
> -Y = A means no cryp IP and no secure boot + A7-CPU@650MHz.
> -Y = C means cryp IP + optee + secure boot + A7-CPU@650MHz.
> -Y = D means no cryp IP and no secure boot + A7-CPU@800MHz.
> -Y = F means cryp IP + optee + secure boot + A7-CPU@800MHz.
>
> It fullfills the initial STM32MP15x SoC diversity introduced by
> commit 0eda69b6c5f9 ("ARM: dts: stm32: Manage security diversity
> for STM32M15x SOCs").
>
> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
> ---
> arch/arm/boot/dts/st/stm32mp15xa.dtsi | 5 +++++
> arch/arm/boot/dts/st/stm32mp15xc.dtsi | 4 +++-
> arch/arm/boot/dts/st/stm32mp15xd.dtsi | 5 +++++
> arch/arm/boot/dts/st/stm32mp15xf.dtsi | 20 ++++++++++++++++++++
> 4 files changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/st/stm32mp15xa.dtsi b/arch/arm/boot/dts/st/stm32mp15xa.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98
> --- /dev/null
> +++ b/arch/arm/boot/dts/st/stm32mp15xa.dtsi
> @@ -0,0 +1,5 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
> +/*
> + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
> + * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
You create entirely empty, unused file. There is literally no benefit of
this file, no impact, just more files to handle.
> + */
> diff --git a/arch/arm/boot/dts/st/stm32mp15xc.dtsi b/arch/arm/boot/dts/st/stm32mp15xc.dtsi
> index 97465717f932fc223647af76e88a6182cf3c870f..4d30a2a537f15c1e145635b090de0f0222526579 100644
> --- a/arch/arm/boot/dts/st/stm32mp15xc.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp15xc.dtsi
> @@ -1,9 +1,11 @@
> -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
License change is not explained in commit msg and anyway should be
separate commit with acks/sobs from all copyright holders. You also need
to CC them (Cc e.g. Gatien).
> /*
> * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
> * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
> */
>
> +#include "stm32mp15xa.dtsi"
> +
> &etzpc {
> cryp1: cryp@54001000 {
> compatible = "st,stm32mp1-cryp";
> diff --git a/arch/arm/boot/dts/st/stm32mp15xd.dtsi b/arch/arm/boot/dts/st/stm32mp15xd.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98
> --- /dev/null
> +++ b/arch/arm/boot/dts/st/stm32mp15xd.dtsi
> @@ -0,0 +1,5 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
> +/*
> + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
> + * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
> + */
Same problems.
> diff --git a/arch/arm/boot/dts/st/stm32mp15xf.dtsi b/arch/arm/boot/dts/st/stm32mp15xf.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..5f6a2952125d00d468e2e4012024f02380cfaa49
> --- /dev/null
> +++ b/arch/arm/boot/dts/st/stm32mp15xf.dtsi
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
> +/*
> + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
> + * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
> + */
> +
> +#include "stm32mp15xd.dtsi"
> +
> +/ {
> + soc {
> + cryp1: cryp@54001000 {
> + compatible = "st,stm32mp1-cryp";
> + reg = <0x54001000 0x400>;
> + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&rcc CRYP1>;
> + resets = <&rcc CRYP1_R>;
> + status = "disabled";
> + };
> + };
> +};
>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 1/5] ARM: dts: stm32: fullfill diversity with OPP for STM32M15x SOCs
2025-05-27 13:12 ` Krzysztof Kozlowski
@ 2025-05-27 14:03 ` Amelie Delaunay
2025-05-27 14:08 ` Krzysztof Kozlowski
0 siblings, 1 reply; 11+ messages in thread
From: Amelie Delaunay @ 2025-05-27 14:03 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Maxime Coquelin, Alexandre Torgue, Liam Girdwood,
Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel
On 5/27/25 15:12, Krzysztof Kozlowski wrote:
> On 27/05/2025 15:03, Amelie Delaunay wrote:
>> From: Alexandre Torgue <alexandre.torgue@foss.st.com>
>>
>> This commit creates new files to manage security features and supported OPP
>> on STM32MP15x SOCs. On STM32MP15xY, "Y" gives information:
>> -Y = A means no cryp IP and no secure boot + A7-CPU@650MHz.
>> -Y = C means cryp IP + optee + secure boot + A7-CPU@650MHz.
>> -Y = D means no cryp IP and no secure boot + A7-CPU@800MHz.
>> -Y = F means cryp IP + optee + secure boot + A7-CPU@800MHz.
>>
>> It fullfills the initial STM32MP15x SoC diversity introduced by
>> commit 0eda69b6c5f9 ("ARM: dts: stm32: Manage security diversity
>> for STM32M15x SOCs").
>>
>> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
>> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
>> ---
>> arch/arm/boot/dts/st/stm32mp15xa.dtsi | 5 +++++
>> arch/arm/boot/dts/st/stm32mp15xc.dtsi | 4 +++-
>> arch/arm/boot/dts/st/stm32mp15xd.dtsi | 5 +++++
>> arch/arm/boot/dts/st/stm32mp15xf.dtsi | 20 ++++++++++++++++++++
>> 4 files changed, 33 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/st/stm32mp15xa.dtsi b/arch/arm/boot/dts/st/stm32mp15xa.dtsi
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/st/stm32mp15xa.dtsi
>> @@ -0,0 +1,5 @@
>> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
>> +/*
>> + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
>> + * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
>
> You create entirely empty, unused file. There is literally no benefit of
> this file, no impact, just more files to handle.
>
Indeed, this one is not useful and will be dropped in v2, as it won't be
populated with cpufreq/thermal updates due to fixed cpu clock frequency.
>> + */
>> diff --git a/arch/arm/boot/dts/st/stm32mp15xc.dtsi b/arch/arm/boot/dts/st/stm32mp15xc.dtsi
>> index 97465717f932fc223647af76e88a6182cf3c870f..4d30a2a537f15c1e145635b090de0f0222526579 100644
>> --- a/arch/arm/boot/dts/st/stm32mp15xc.dtsi
>> +++ b/arch/arm/boot/dts/st/stm32mp15xc.dtsi
>> @@ -1,9 +1,11 @@
>> -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
>> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
>
> License change is not explained in commit msg and anyway should be
> separate commit with acks/sobs from all copyright holders. You also need
> to CC them (Cc e.g. Gatien).
>
License change is not needed, good to know how it should have been done.
Since stm32mp15xa.dtsi will be dropped in v2, this file won't be updated
and the license won't change.
>> /*
>> * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
>> * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
>> */
>>
>> +#include "stm32mp15xa.dtsi"
>> +
>> &etzpc {
>> cryp1: cryp@54001000 {
>> compatible = "st,stm32mp1-cryp";
>> diff --git a/arch/arm/boot/dts/st/stm32mp15xd.dtsi b/arch/arm/boot/dts/st/stm32mp15xd.dtsi
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/st/stm32mp15xd.dtsi
>> @@ -0,0 +1,5 @@
>> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
>> +/*
>> + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
>> + * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
>> + */
>
> Same problems.
>
This file won't be empty, it will be populated with cpufreq/thermal
updates because STM32MP15xD and STM32MP15xF have dynamic CPU frequency
scaling.
>> diff --git a/arch/arm/boot/dts/st/stm32mp15xf.dtsi b/arch/arm/boot/dts/st/stm32mp15xf.dtsi
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..5f6a2952125d00d468e2e4012024f02380cfaa49
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/st/stm32mp15xf.dtsi
>> @@ -0,0 +1,20 @@
>> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
>> +/*
>> + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
>> + * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
>> + */
>> +
>> +#include "stm32mp15xd.dtsi"
>> +
>> +/ {
>> + soc {
>> + cryp1: cryp@54001000 {
>> + compatible = "st,stm32mp1-cryp";
>> + reg = <0x54001000 0x400>;
>> + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&rcc CRYP1>;
>> + resets = <&rcc CRYP1_R>;
>> + status = "disabled";
>> + };
>> + };
>> +};
>>
>
>
> Best regards,
> Krzysztof
Regards,
Amelie
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 1/5] ARM: dts: stm32: fullfill diversity with OPP for STM32M15x SOCs
2025-05-27 14:03 ` Amelie Delaunay
@ 2025-05-27 14:08 ` Krzysztof Kozlowski
0 siblings, 0 replies; 11+ messages in thread
From: Krzysztof Kozlowski @ 2025-05-27 14:08 UTC (permalink / raw)
To: Amelie Delaunay, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Maxime Coquelin, Alexandre Torgue, Liam Girdwood, Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel
On 27/05/2025 16:03, Amelie Delaunay wrote:
>>> cryp1: cryp@54001000 {
>>> compatible = "st,stm32mp1-cryp";
>>> diff --git a/arch/arm/boot/dts/st/stm32mp15xd.dtsi b/arch/arm/boot/dts/st/stm32mp15xd.dtsi
>>> new file mode 100644
>>> index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/st/stm32mp15xd.dtsi
>>> @@ -0,0 +1,5 @@
>>> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
>>> +/*
>>> + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
>>> + * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
>>> + */
>>
>> Same problems.
>>
>
> This file won't be empty, it will be populated with cpufreq/thermal
> updates because STM32MP15xD and STM32MP15xF have dynamic CPU frequency
> scaling.
>
The problem is that file now is empty, so it brings no benefits. Just
add the file when you have any content for it.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/5] ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
2025-05-27 13:03 [PATCH 0/5] Introduce STM32MP157F-DK2 board Amelie Delaunay
2025-05-27 13:03 ` [PATCH 1/5] ARM: dts: stm32: fullfill diversity with OPP for STM32M15x SOCs Amelie Delaunay
@ 2025-05-27 13:03 ` Amelie Delaunay
2025-05-27 13:03 ` [PATCH 3/5] dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers Amelie Delaunay
` (2 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Amelie Delaunay @ 2025-05-27 13:03 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Liam Girdwood, Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Amelie Delaunay
Adopt generic node name 'typec' for stusb1600, which is the USB Type-C
controller on stm32mp157x Discovery Kits.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
index a5511b1f0ce306feea5d8657721b078161d01a36..276ed2c9be71cc59891e9b06cb057ce4ff8a143e 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
@@ -254,7 +254,7 @@ &i2c4 {
/delete-property/dmas;
/delete-property/dma-names;
- stusb1600@28 {
+ stusb1600: typec@28 {
compatible = "st,stusb1600";
reg = <0x28>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 3/5] dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
2025-05-27 13:03 [PATCH 0/5] Introduce STM32MP157F-DK2 board Amelie Delaunay
2025-05-27 13:03 ` [PATCH 1/5] ARM: dts: stm32: fullfill diversity with OPP for STM32M15x SOCs Amelie Delaunay
2025-05-27 13:03 ` [PATCH 2/5] ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx Amelie Delaunay
@ 2025-05-27 13:03 ` Amelie Delaunay
2025-05-27 13:03 ` [PATCH 4/5] dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible Amelie Delaunay
2025-05-27 13:03 ` [PATCH 5/5] ARM: dts: stm32: add stm32mp157f-dk2 board support Amelie Delaunay
4 siblings, 0 replies; 11+ messages in thread
From: Amelie Delaunay @ 2025-05-27 13:03 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Liam Girdwood, Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Amelie Delaunay, Etienne Carriere
From: Etienne Carriere <etienne.carriere@foss.st.com>
These bindings will be used for the SCMI voltage domain.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
.../dt-bindings/regulator/st,stm32mp15-regulator.h | 32 ++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/include/dt-bindings/regulator/st,stm32mp15-regulator.h b/include/dt-bindings/regulator/st,stm32mp15-regulator.h
new file mode 100644
index 0000000000000000000000000000000000000000..8605b12b2aa7de6b14ec32bf8778ce94ecbe4bc2
--- /dev/null
+++ b/include/dt-bindings/regulator/st,stm32mp15-regulator.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
+/*
+ * Copyright (C) 2025, STMicroelectronics - All Rights Reserved
+ */
+
+#ifndef __DT_BINDINGS_REGULATOR_ST_STM32MP15_REGULATOR_H
+#define __DT_BINDINGS_REGULATOR_ST_STM32MP15_REGULATOR_H
+
+/* SCMI voltage domain identifiers */
+
+/* SOC Internal regulators */
+#define VOLTD_SCMI_REG11 0
+#define VOLTD_SCMI_REG18 1
+#define VOLTD_SCMI_USB33 2
+
+/* STPMIC1 regulators */
+#define VOLTD_SCMI_STPMIC1_BUCK1 3
+#define VOLTD_SCMI_STPMIC1_BUCK2 4
+#define VOLTD_SCMI_STPMIC1_BUCK3 5
+#define VOLTD_SCMI_STPMIC1_BUCK4 6
+#define VOLTD_SCMI_STPMIC1_LDO1 7
+#define VOLTD_SCMI_STPMIC1_LDO2 8
+#define VOLTD_SCMI_STPMIC1_LDO3 9
+#define VOLTD_SCMI_STPMIC1_LDO4 10
+#define VOLTD_SCMI_STPMIC1_LDO5 11
+#define VOLTD_SCMI_STPMIC1_LDO6 12
+#define VOLTD_SCMI_STPMIC1_VREFDDR 13
+#define VOLTD_SCMI_STPMIC1_BOOST 14
+#define VOLTD_SCMI_STPMIC1_PWR_SW1 15
+#define VOLTD_SCMI_STPMIC1_PWR_SW2 16
+
+#endif /*__DT_BINDINGS_REGULATOR_ST_STM32MP15_REGULATOR_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/5] dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
2025-05-27 13:03 [PATCH 0/5] Introduce STM32MP157F-DK2 board Amelie Delaunay
` (2 preceding siblings ...)
2025-05-27 13:03 ` [PATCH 3/5] dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers Amelie Delaunay
@ 2025-05-27 13:03 ` Amelie Delaunay
2025-05-27 13:09 ` Krzysztof Kozlowski
2025-05-27 13:03 ` [PATCH 5/5] ARM: dts: stm32: add stm32mp157f-dk2 board support Amelie Delaunay
4 siblings, 1 reply; 11+ messages in thread
From: Amelie Delaunay @ 2025-05-27 13:03 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Liam Girdwood, Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Amelie Delaunay, Himanshu Bhavani, Conor Dooley
From: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Add the "st,stm32mp157f-dk2" compatible string to the STM32 SoC
bindings. The MP157F is functionally similar to the MP157C.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
index 408532504a24d5e570c738b16de30dcf8deead6a..ad144c02eb7edf4fc2191ab0af244342dcaa59d5 100644
--- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
@@ -121,6 +121,7 @@ properties:
- st,stm32mp157a-dk1-scmi
- st,stm32mp157c-dk2
- st,stm32mp157c-dk2-scmi
+ - st,stm32mp157f-dk2
- const: st,stm32mp157
- items:
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 4/5] dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
2025-05-27 13:03 ` [PATCH 4/5] dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible Amelie Delaunay
@ 2025-05-27 13:09 ` Krzysztof Kozlowski
2025-05-27 13:17 ` Amelie Delaunay
0 siblings, 1 reply; 11+ messages in thread
From: Krzysztof Kozlowski @ 2025-05-27 13:09 UTC (permalink / raw)
To: Amelie Delaunay, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Maxime Coquelin, Alexandre Torgue, Liam Girdwood, Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Himanshu Bhavani, Conor Dooley
On 27/05/2025 15:03, Amelie Delaunay wrote:
> From: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
>
> Add the "st,stm32mp157f-dk2" compatible string to the STM32 SoC
> bindings. The MP157F is functionally similar to the MP157C.
>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
How did you get Ack on something which is v1? Cover letter does not
explain any history here.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 4/5] dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
2025-05-27 13:09 ` Krzysztof Kozlowski
@ 2025-05-27 13:17 ` Amelie Delaunay
0 siblings, 0 replies; 11+ messages in thread
From: Amelie Delaunay @ 2025-05-27 13:17 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Maxime Coquelin, Alexandre Torgue, Liam Girdwood,
Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Himanshu Bhavani, Conor Dooley
On 5/27/25 15:09, Krzysztof Kozlowski wrote:
> On 27/05/2025 15:03, Amelie Delaunay wrote:
>> From: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
>>
>> Add the "st,stm32mp157f-dk2" compatible string to the STM32 SoC
>> bindings. The MP157F is functionally similar to the MP157C.
>>
>> Acked-by: Conor Dooley <conor.dooley@microchip.com>
>
> How did you get Ack on something which is v1? Cover letter does not
> explain any history here.
Hi,
Instead of using my own patch, since Himanshu sent the same earlier than
me, I rerolled Himanshu's bindings patch from there
https://lore.kernel.org/linux-arm-kernel/20250524100319.22521-3-himanshu.bhavani@siliconsignals.io/.
I should have mention that.
Regards,
Amelie
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 5/5] ARM: dts: stm32: add stm32mp157f-dk2 board support
2025-05-27 13:03 [PATCH 0/5] Introduce STM32MP157F-DK2 board Amelie Delaunay
` (3 preceding siblings ...)
2025-05-27 13:03 ` [PATCH 4/5] dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible Amelie Delaunay
@ 2025-05-27 13:03 ` Amelie Delaunay
4 siblings, 0 replies; 11+ messages in thread
From: Amelie Delaunay @ 2025-05-27 13:03 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Liam Girdwood, Mark Brown
Cc: devicetree, linux-stm32, linux-arm-kernel, linux-kernel,
Amelie Delaunay
STM32MP157F-DK2 board embeds a STM32MP157F SoC. This SoC contains the same
level of feature than a STM32MP157C SOC but A7 clock frequency can reach
800MHz, hence the inclusion of the newly introduced stm32mp15xf.dtsi.
As for other latest STM32 MPU families, STM32MP157F-DK2 relies on OP-TEE
SCMI services for SoC clock and reset controllers resources, and for PMIC,
now under OP-TEE control. That's why stm32mp157x-dk2-scmi.dtsi is
introduced, to move all clocks, resets and regulators to SCMI-based ones.
To "disable" SCMI, just need to comment stm32mp157x-dk2-scmi.dtsi inclusion
and to replace &scmi_v3v3 with &v3v3, then to enable i2c4 and its subnodes
for PMIC support by Linux. Reconfigure usbotg for dual role with type-C
support if needed.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
arch/arm/boot/dts/st/Makefile | 1 +
arch/arm/boot/dts/st/stm32mp157f-dk2.dts | 174 +++++++++++++++++
arch/arm/boot/dts/st/stm32mp157x-dk2-scmi.dtsi | 252 +++++++++++++++++++++++++
3 files changed, 427 insertions(+)
diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile
index cc9948b9870f7f73629573149bfd342af75b07da..8e17a4a847a385b677df6f3a34e943ae4368a068 100644
--- a/arch/arm/boot/dts/st/Makefile
+++ b/arch/arm/boot/dts/st/Makefile
@@ -61,6 +61,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32mp157c-dhcom-picoitx.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-dk2-scmi.dtb \
+ stm32mp157f-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ed1-scmi.dtb \
stm32mp157c-emsbc-argon.dtb \
diff --git a/arch/arm/boot/dts/st/stm32mp157f-dk2.dts b/arch/arm/boot/dts/st/stm32mp157f-dk2.dts
new file mode 100644
index 0000000000000000000000000000000000000000..c40e22a6737df075563c93b0b460a00d5ede376c
--- /dev/null
+++ b/arch/arm/boot/dts/st/stm32mp157f-dk2.dts
@@ -0,0 +1,174 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
+ * Author: Amelie Delaunay <amelie.delaunay@foss.st.com> for STMicroelectronics.
+ */
+
+/dts-v1/;
+
+#include "stm32mp157.dtsi"
+#include "stm32mp15xf.dtsi"
+#include "stm32mp15-pinctrl.dtsi"
+#include "stm32mp15xxac-pinctrl.dtsi"
+#include "stm32mp15xx-dkx.dtsi"
+#include "stm32mp157x-dk2-scmi.dtsi"
+
+/ {
+ model = "STMicroelectronics STM32MP157F-DK2 Discovery Board";
+ compatible = "st,stm32mp157f-dk2", "st,stm32mp157";
+
+ aliases {
+ ethernet0 = ðernet0;
+ serial3 = &usart2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&cryp1 {
+ status = "okay";
+};
+
+&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ panel@0 {
+ compatible = "orisetech,otm8009a";
+ reg = <0>;
+ reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
+ power-supply = <&scmi_v3v3>;
+ status = "okay";
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+ };
+};
+
+&dsi_in {
+ remote-endpoint = <<dc_ep1_out>;
+};
+
+&dsi_out {
+ remote-endpoint = <&panel_in>;
+};
+
+&i2c1 {
+ touchscreen@38 {
+ compatible = "focaltech,ft6236";
+ reg = <0x38>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-parent = <&gpiof>;
+ touchscreen-size-x = <480>;
+ touchscreen-size-y = <800>;
+ status = "okay";
+ };
+};
+
+/* I2C4 is managed by OP-TEE */
+&i2c4 {
+ status = "disabled";
+
+ /* i2c4 subnodes, which won't be managed by Linux */
+ typec@28 {
+ status = "disabled";
+ connector {
+ status = "disabled";
+ };
+ };
+
+ stpmic@33 {
+ status = "disabled";
+ };
+};
+
+<dc {
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ltdc_ep1_out: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+};
+
+&rtc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_rsvd_pins_a>;
+
+ rtc_lsco_pins_a: rtc-lsco-0 {
+ pins = "out2_rmp";
+ function = "lsco";
+ };
+};
+
+/* Wifi */
+&sdmmc2 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc2_b4_pins_a>;
+ pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
+ non-removable;
+ cap-sdio-irq;
+ st,neg-edge;
+ bus-width = <4>;
+ vmmc-supply = <&scmi_v3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_lsco_pins_a>;
+ };
+};
+
+/* Bluetooth */
+&usart2 {
+ pinctrl-names = "default", "sleep", "idle";
+ pinctrl-0 = <&usart2_pins_c>;
+ pinctrl-1 = <&usart2_sleep_pins_c>;
+ pinctrl-2 = <&usart2_idle_pins_c>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+ vbat-supply = <&scmi_v3v3>;
+ vddio-supply = <&scmi_v3v3>;
+ };
+};
+
+/* Since I2C4 is disabled, STUSB1600 is also disabled so there is no Type-C support */
+&usbotg_hs {
+ dr_mode = "peripheral";
+ role-switch-default-mode = "peripheral";
+ /*
+ * Forcing dr_mode = "peripheral"/"role-switch-default-mode = "peripheral";
+ * will cause the pull-up on D+/D- to be raised as soon as the OTG is configured at runtime,
+ * regardless of the presence of VBUS. Notice that on self-powered devices like
+ * stm32mp157f-dk2, this isn't compliant with the USB standard. That's why usbotg_hs is kept
+ * disabled here.
+ */
+ status = "disabled";
+};
diff --git a/arch/arm/boot/dts/st/stm32mp157x-dk2-scmi.dtsi b/arch/arm/boot/dts/st/stm32mp157x-dk2-scmi.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..0c55203ae1520029abcda3bb47513815d0c4bfc1
--- /dev/null
+++ b/arch/arm/boot/dts/st/stm32mp157x-dk2-scmi.dtsi
@@ -0,0 +1,252 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
+ * Author: Amelie Delaunay <amelie.delaunay@foss.st.com> for STMicroelectronics.
+ */
+
+#include <dt-bindings/regulator/st,stm32mp15-regulator.h>
+#include "stm32mp15-scmi.dtsi"
+
+/ {
+ reserved-memory {
+ optee@de000000 {
+ reg = <0xde000000 0x2000000>;
+ no-map;
+ };
+ };
+};
+
+&adc {
+ vdd-supply = <&scmi_vdd>;
+ vdda-supply = <&scmi_vdd>;
+};
+
+&cpu0 {
+ clocks = <&scmi_clk CK_SCMI_MPU>;
+};
+
+&cpu1 {
+ clocks = <&scmi_clk CK_SCMI_MPU>;
+};
+
+&cryp1 {
+ clocks = <&scmi_clk CK_SCMI_CRYP1>;
+ resets = <&scmi_reset RST_SCMI_CRYP1>;
+};
+
+&cs42l51 {
+ VL-supply = <&scmi_v3v3>;
+ VD-supply = <&scmi_v1v8_audio>;
+ VA-supply = <&scmi_v1v8_audio>;
+ VAHP-supply = <&scmi_v1v8_audio>;
+};
+
+&dsi {
+ phy-dsi-supply = <&scmi_reg18>;
+ clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
+};
+
+&gpioz {
+ clocks = <&scmi_clk CK_SCMI_GPIOZ>;
+};
+
+&hash1 {
+ clocks = <&scmi_clk CK_SCMI_HASH1>;
+ resets = <&scmi_reset RST_SCMI_HASH1>;
+};
+
+&i2c1 {
+ hdmi-transmitter@39 {
+ iovcc-supply = <&scmi_v3v3_hdmi>;
+ cvcc12-supply = <&scmi_v1v2_hdmi>;
+ };
+};
+
+&iwdg2 {
+ clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
+};
+
+&m4_rproc {
+ /delete-property/ st,syscfg-holdboot;
+ resets = <&scmi_reset RST_SCMI_MCU>,
+ <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
+ reset-names = "mcu_rst", "hold_boot";
+};
+
+&mdma1 {
+ resets = <&scmi_reset RST_SCMI_MDMA>;
+};
+
+&optee {
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+};
+
+&pwr_regulators {
+ vdd-supply = <&scmi_vdd>;
+ vdd_3v3_usbfs-supply = <&scmi_vdd_usb>;
+ status = "disabled";
+};
+
+&rcc {
+ compatible = "st,stm32mp1-rcc-secure", "syscon";
+ clock-names = "hse", "hsi", "csi", "lse", "lsi";
+ clocks = <&scmi_clk CK_SCMI_HSE>,
+ <&scmi_clk CK_SCMI_HSI>,
+ <&scmi_clk CK_SCMI_CSI>,
+ <&scmi_clk CK_SCMI_LSE>,
+ <&scmi_clk CK_SCMI_LSI>;
+};
+
+&rng1 {
+ clocks = <&scmi_clk CK_SCMI_RNG1>;
+ resets = <&scmi_reset RST_SCMI_RNG1>;
+};
+
+&rtc {
+ clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
+};
+
+&scmi_reguls {
+ scmi_vddcore: regulator@3 {
+ reg = <VOLTD_SCMI_STPMIC1_BUCK1>;
+ regulator-name = "vddcore";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * regulator-over-current-protection;
+ * regulator-initial-mode = <0>;
+ */
+ };
+
+ scmi_vdd: regulator@5 {
+ reg = <VOLTD_SCMI_STPMIC1_BUCK3>;
+ regulator-name = "vdd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * regulator-over-current-protection;
+ * regulator-initial-mode = <0>;
+ * st,mask-reset;
+ */
+ };
+
+ scmi_v3v3: regulator@6 {
+ reg = <VOLTD_SCMI_STPMIC1_BUCK4>;
+ regulator-name = "v3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * regulator-over-current-protection;
+ * regulator-initial-mode = <0>;
+ */
+ };
+
+ scmi_v1v8_audio: regulator@7 {
+ reg = <VOLTD_SCMI_STPMIC1_LDO1>;
+ regulator-name = "v1v8_audio";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * interrupts = <IT_CURLIM_LDO1 0>;
+ */
+ };
+
+ scmi_v3v3_hdmi: regulator@8 {
+ reg = <VOLTD_SCMI_STPMIC1_LDO2>;
+ regulator-name = "v3v3_hdmi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * interrupts = <IT_CURLIM_LDO2 0>;
+ */
+ };
+
+ scmi_vdd_usb: regulator@a {
+ reg = <VOLTD_SCMI_STPMIC1_LDO4>;
+ regulator-name = "vdd_usb";
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * interrupts = <IT_CURLIM_LDO4 0>;
+ */
+ };
+
+ scmi_vdda: regulator@b {
+ reg = <VOLTD_SCMI_STPMIC1_LDO5>;
+ regulator-name = "vdda";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-boot-on;
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * interrupts = <IT_CURLIM_LDO5 0>;
+ */
+ };
+
+ scmi_v1v2_hdmi: regulator@c {
+ reg = <VOLTD_SCMI_STPMIC1_LDO6>;
+ regulator-name = "v1v2_hdmi";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * interrupts = <IT_CURLIM_LDO6 0>;
+ */
+ };
+
+ scmi_vbus_otg: regulator@f {
+ reg = <VOLTD_SCMI_STPMIC1_PWR_SW1>;
+ regulator-name = "vbus_otg";
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * interrupts = <IT_OCP_OTG 0>;
+ */
+ };
+
+ scmi_vbus_sw: regulator@10 {
+ reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>;
+ regulator-name = "vbus_sw";
+ /*
+ * Not supported by SCMI regu, handled in SCMI server
+ * interrupts = <IT_OCP_SWOUT 0>;
+ * regulator-active-discharge = <1>;
+ */
+ };
+};
+
+&sdmmc1 {
+ vmmc-supply = <&scmi_v3v3>;
+};
+
+&sdmmc3 {
+ vmmc-supply = <&scmi_v3v3>;
+};
+
+&usbh_ehci {
+ hub@1 {
+ vdd-supply = <&scmi_v3v3>;
+ };
+};
+
+&usbphyc_port0 {
+ phy-supply = <&scmi_vdd_usb>;
+};
+
+&usbphyc_port1 {
+ phy-supply = <&scmi_vdd_usb>;
+};
+
+&vrefbuf {
+ vdda-supply = <&scmi_vdd>;
+};
--
2.25.1
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