* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
@ 2018-08-20 21:04 Palmer Dabbelt
2018-08-20 22:10 ` Christoph Hellwig
2018-08-20 22:11 ` Atish Patra
0 siblings, 2 replies; 10+ messages in thread
From: Palmer Dabbelt @ 2018-08-20 21:04 UTC (permalink / raw)
To: linux-riscv
Linus' master now boots on QEMU's master, which is big step forwards. I've
gone ahead and marked the riscv-linux-4.18 branch as protected in our GitHub,
and I'd like to enforce that this branch only contains backports of patches
that have at least made it into linux-next (and ideally master), as that will
limit the difference between riscv-linux-4.18 and master as well as forcing me
to do this the right way.
I have the following branches on kernel.org/palmer/linux.git:
* fix-delete_compat, fix-noinc: Suitable for this MW, in my PR.
* review-init_halt_cleanups: I need to review these before sending them out,
but I think they're suitable for RCs.
* wip-32bit_dma: I think this branch is defunct, but I haven't gotten a chance
to give it a proper check yet. This is the patch set (from Christoph) that I
think obseletes this branch <https://lkml.org/lkml/2018/5/25/477>.
* wip-dma: I think we need the functionality here, but the code is a mess --
it's a hodge-podge of a proper patch from Christoph and some hackery of mine
that I think can be dropped now in favor of the generic support.
* wip-fespi: This needs review, but is at least well split out so that's
feasible to do now.
* wip-futex_cmpxchg: Not sure what to do with this, but at least it's small.
If it's still necessary then I'm not opposed to throwing this in as it stands
(and during an RC), but if providing an SMP implementation is as quick as it
seems to be then we should fix it correctly.
* wip-gemgxl_clock_driver: Another one that's stand-alone and therefor suitable
for review.
* wip-is25wp256d: I sent this out here <https://lkml.org/lkml/2018/8/7/256> but
don't see it in master. I just pinged it.
* wip-prci_clock: Another one that's stand-alone and therefor suitable for
review.
* wip-seccomp: This looks fine, I'll send it for review after the merge window
and target it for 4.20.
* wip-sifive_serial: Another one that's stand-alone and therefor suitable for
review. Paul is at SiFive now, so he'll be taking it over.
* wip-timer: Here's another one that's a mess. Christoph cleaned up the
driver and Atish has a better version out on the mailing list of what's left,
so my hope is that we're in decent shape for 4.20 here.
If your patches aren't on one of these branches then they're probably in my
inbox. If so then there's no reason to re-send it, but if it's not in my inbox
then please re-send your patches as I must have lost them. Assuming my list is
complete, I think we've got a decent shot to get this all fixed up and in for
4.20. It looks like the major issues are the DMA mess (which Christoph might
have mostly fixed already) and the timer mess (which Atish has a patch set out
for) -- thanks for the help!
I've just tagged my last PR for the 4.19 merge window so I should be able to
dig through my email now and sort out what's going on over the next few days.
Here's the list on patch-related mails I still have to read:
3 08/06 alistair.francis at wdc.com [PATCH 2/4] riscv/smpboot: Fix mm_grab() typo
4 08/06 alistair.francis at wdc.com [PATCH 3/4] riscv/smpboot: Add missing include
5 08/06 alistair.francis at wdc.com [PATCH 4/4] irq-riscv-plic: Update function name
6 08/06 alistair23 at gmail.com Re: [PATCH 4/4] irq-riscv-plic: Update function name
7 08/07 alankao at andestech.com [PATCH v4 0/5] riscv: Add support to no-FPU systems
8 08/07 alankao at andestech.com [PATCH v4 1/5] Extract FPU context operations from entry.S
9 08/07 alankao at andestech.com [PATCH v4 2/5] Refactor FPU code in signal setup/return procedures
10 08/07 alankao at andestech.com [PATCH v4 3/5] Cleanup ISA string setting
11 08/07 alankao at andestech.com [PATCH v4 5/5] Auto-detect whether a FPU exists
12 08/07 alankao at andestech.com [PATCH v4 4/5] Allow to disable FPU support
13 08/08 Christoph Hellwig Re: [PATCH v4 4/5] Allow to disable FPU support
14 08/08 Christoph Hellwig Re: [PATCH v4 5/5] Auto-detect whether a FPU exists
15 08/08 andrew.burgess at embecosm.com Re: [PATCH 3/5] RISC-V: Add linux target support.
18 08/09 alankao at andestech.com [PATCH v6 5/5] Auto-detect whether a FPU exists
19 08/09 Christoph Hellwig Re: [PATCH v6 5/5] Auto-detect whether a FPU exists
20 08/09 linux at roeck-us.net Re: [PATCH v2 2/2] RISC-V: Don't use a global include guard for uapi/asm/syscalls.h
21 08/09 linux at roeck-us.net [PATCH] riscv: Drop setup_initrd
22 08/10 Christoph Hellwig Re: [PATCH] riscv: Drop setup_initrd
26 08/14 Christoph Hellwig Re: [PATCH v3 1/2] RISC-V: Define sys_riscv_flush_icache when SMP=n
27 08/14 Christoph Hellwig Re: [PATCH v3 2/2] RISC-V: Don't use a global include guard for uapi/asm/syscalls.h
29 08/15 atish.patra at wdc.com [RFC PATCH 0/5] RISC-V: Improve smp functionality & support cpu hotplug
30 08/15 atish.patra at wdc.com [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
31 08/15 atish.patra at wdc.com [RFC PATCH 4/5] RISC-V: Move interrupt cause declarations to irq.h
32 08/15 atish.patra at wdc.com [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
33 08/15 atish.patra at wdc.com [RFC PATCH 5/5] RISC-V: Support cpu hotplug.
34 08/15 atish.patra at wdc.com [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
36 08/15 anup at brainfault.org Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
37 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
38 08/15 anup at brainfault.org Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
39 08/15 atish.patra at wdc.com Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
40 08/15 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
41 08/15 anup at brainfault.org Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
42 08/15 atish.patra at wdc.com Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
43 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
44 08/15 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
45 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
46 08/15 anup at brainfault.org Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
47 08/16 lkp at intel.com Re: [PATCH v4 3/3] irqchip: add a SiFive PLIC driver
50 08/16 aleksandar.markovic at rt-rk.com [Qemu-devel] [PATCH v9 55/84] elf: Add EM_NANOMIPS value as a valid one for e_machine field
52 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 0/6] Connect a PCIe host and graphics support to RISC-V
53 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 2/6] hw/riscv/virt: Increase the number of interrupts
54 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 4/6] hw/riscv/virt: Connect a VGA PCIe device
56 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe
59 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 1/6] hw/riscv/virtio: Set the soc device tree node as a simple-bus
60 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 3/6] hw/riscv/virt: Connect the gpex PCIe
61 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device
63 08/16 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
83 08/16 helgaas at kernel.org Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
84 08/16 Arnd Bergmann Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
104 08/16 kraxel at redhat.com Re: [Qemu-devel] [PATCH v3 4/6] hw/riscv/virt: Connect a VGA PCIe device
114 08/17 fweimer at redhat.com Re: [PATCH] Introduce ELF_INITFINI for all architectures
123 08/17 aleksandar.markovic at rt-rk.com [Qemu-devel] [PATCH v10 36/65] elf: Add EM_NANOMIPS value as a valid one for e_machine field
129 08/17 lorenzo.pieralisi at arm.com Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
132 08/17 Arnd Bergmann Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
136 08/17 rene at exactcode.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
137 08/17 ak at linux.intel.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
139 08/17 rene at exactcode.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
142 08/17 kilobyte at angband.pl Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
166 08/17 f4bug at amsat.org Re: [Qemu-devel] [PATCH v3 1/6] hw/riscv/virtio: Set the soc device tree node as a simple-bus
168 08/17 atish.patra at wdc.com Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
252 08/19 alex at ghiti.fr Re: [PATCH v6 00/11] hugetlb: Factorize hugetlb architecture primitives
257 08/20 alan.hayward at arm.com [PATCH 4/4] infcall-nested-structs: Test up to five fields
261 08/20 lorenzo.pieralisi at arm.com [PATCH] microblaze/PCI: Remove stale pcibios_align_resource() comment
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-08-20 21:04 Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans Palmer Dabbelt
@ 2018-08-20 22:10 ` Christoph Hellwig
2018-08-21 1:28 ` Atish Patra
2018-08-20 22:11 ` Atish Patra
1 sibling, 1 reply; 10+ messages in thread
From: Christoph Hellwig @ 2018-08-20 22:10 UTC (permalink / raw)
To: linux-riscv
On Mon, Aug 20, 2018 at 02:04:47PM -0700, Palmer Dabbelt wrote:
> * fix-delete_compat, fix-noinc: Suitable for this MW, in my PR.
The fix-noinc one still has some outstanding issues, see my comments
posted last week. fix-delete_compat looks fine.
> * review-init_halt_cleanups: I need to review these before sending them out,
>
> but I think they're suitable for RCs.
At lot of this is probably going to clash with the hotplug updates from
Atish (which I need to find some time to review).
> * wip-32bit_dma: I think this branch is defunct, but I haven't gotten a
> chance to give it a proper check yet. This is the patch set (from
> Christoph) that I think obseletes this branch
> <https://lkml.org/lkml/2018/5/25/477>.
> * wip-dma: I think we need the functionality here, but the code is a mess --
> it's a hodge-podge of a proper patch from Christoph and some hackery of mine
> that I think can be dropped now in favor of the generic support.
These two belong together. What is still missing upstream to support
the same functionality would be:
http://lists.infradead.org/pipermail/linux-riscv/2018-August/000920.html
but the conclusion of that thread seems like we'd be better off to
just add a proper dma-ranges property to the DT and not require kernel
changes.
> * wip-fespi: This needs review, but is at least well split out so that's
> feasible to do now.
>From a quick look the code looks sensible. Add proper SPDX tags and
send it off for an inclusion attempt I'd ?ay.
> * wip-futex_cmpxchg: Not sure what to do with this, but at least it's small.
> If it's still necessary then I'm not opposed to throwing this in as it
> stands (and during an RC), but if providing an SMP implementation is as
> quick as it seems to be then we should fix it correctly.
It's more of an optimization. Note that the lack of a proper
futex_cmpxchg implementation for SMP will also need to be sorted out,
without that glibc locking primitives can't be made fully race free.
> * wip-gemgxl_clock_driver: Another one that's stand-alone and therefor
> suitable for review.
Needs a good changelog and an SPXD tag, and then off to the maintainer.
> * wip-prci_clock: Another one that's stand-alone and therefor suitable for
> review.
Needs a good changelog and an SPXD tag, and then off to the maintainer.
> * wip-seccomp: This looks fine, I'll send it for review after the merge
> window and target it for 4.20.
SPDX tags need to be in the first line of the file.
bool + promt in Kconfig is rather unusal, should use the normal
form.
Otherwise looks fine to me.
> * wip-sifive_serial: Another one that's stand-alone and therefor suitable
> for review. Paul is at SiFive now, so he'll be taking it over.
> * wip-timer: Here's another one that's a mess. Christoph cleaned up the
> driver and Atish has a better version out on the mailing list of what's
> left, so my hope is that we're in decent shape for 4.20 here.
Note that we dropped the patch to support the per-hart timebase patch
from the irq series, so that will need a resubmission together with
the DT changes.
> If your patches aren't on one of these branches then they're probably in my
> inbox. If so then there's no reason to re-send it, but if it's not in my
> inbox then please re-send your patches as I must have lost them. Assuming
> my list is complete, I think we've got a decent shot to get this all fixed
> up and in for 4.20. It looks like the major issues are the DMA mess (which
> Christoph might have mostly fixed already) and the timer mess (which Atish
> has a patch set out for) -- thanks for the help!
Here is some older stuff that needs a re-review (and/or re-posting):
commit 3bf523445a4fe1cd178edc97646e2a1fcfc1f480
Author: Wesley W. Terpstra <wesley@sifive.com>
Date: Wed Mar 14 23:56:54 2018 -0700
riscv_timer: add support for sched_clock
(will need some major work to apply to the current codebase)
commit 9a6b5bc1cdf424d4ddda993d4b0121f619093429
Author: Palmer Dabbelt <palmer@sifive.com>
Date: Mon Jun 25 13:23:12 2018 -0700
Move EM_RISCV into elf-em.h
(should easily apply as-is)
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-08-20 21:04 Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans Palmer Dabbelt
2018-08-20 22:10 ` Christoph Hellwig
@ 2018-08-20 22:11 ` Atish Patra
2018-09-06 9:45 ` Palmer Dabbelt
1 sibling, 1 reply; 10+ messages in thread
From: Atish Patra @ 2018-08-20 22:11 UTC (permalink / raw)
To: linux-riscv
On 8/20/18 2:04 PM, Palmer Dabbelt wrote:
> Linus' master now boots on QEMU's master, which is big step forwards. I've
> gone ahead and marked the riscv-linux-4.18 branch as protected in our GitHub,
> and I'd like to enforce that this branch only contains backports of patches
> that have at least made it into linux-next (and ideally master), as that will
> limit the difference between riscv-linux-4.18 and master as well as forcing me
> to do this the right way.
>
> I have the following branches on kernel.org/palmer/linux.git:
>
> * fix-delete_compat, fix-noinc: Suitable for this MW, in my PR.
> * review-init_halt_cleanups: I need to review these before sending them out,
> but I think they're suitable for RCs.
> * wip-32bit_dma: I think this branch is defunct, but I haven't gotten a chance
> to give it a proper check yet. This is the patch set (from Christoph) that I
> think obseletes this branch <https://lkml.org/lkml/2018/5/25/477>.
> * wip-dma: I think we need the functionality here, but the code is a mess --
> it's a hodge-podge of a proper patch from Christoph and some hackery of mine
> that I think can be dropped now in favor of the generic support.
> * wip-fespi: This needs review, but is at least well split out so that's
> feasible to do now.
> * wip-futex_cmpxchg: Not sure what to do with this, but at least it's small.
> If it's still necessary then I'm not opposed to throwing this in as it stands
> (and during an RC), but if providing an SMP implementation is as quick as it
> seems to be then we should fix it correctly.
> * wip-gemgxl_clock_driver: Another one that's stand-alone and therefor suitable
> for review.
> * wip-is25wp256d: I sent this out here <https://lkml.org/lkml/2018/8/7/256> but
> don't see it in master. I just pinged it.
> * wip-prci_clock: Another one that's stand-alone and therefor suitable for
> review.
> * wip-seccomp: This looks fine, I'll send it for review after the merge window
> and target it for 4.20.
> * wip-sifive_serial: Another one that's stand-alone and therefor suitable for
> review. Paul is at SiFive now, so he'll be taking it over.
> * wip-timer: Here's another one that's a mess. Christoph cleaned up the
> driver and Atish has a better version out on the mailing list of what's left,
> so my hope is that we're in decent shape for 4.20 here.
>
I think gpio & pwm are required as well. I couldn't get networking up
without the GPIO driver.
https://github.com/riscv/riscv-linux/commit/7b012f300afcff77c20a4d84519f4bd2b9b17bd0
https://github.com/riscv/riscv-linux/commit/d6e84658098c6f37875a9e4b151706c6b541dc0b
Regards,
Atish
> If your patches aren't on one of these branches then they're probably in my
> inbox. If so then there's no reason to re-send it, but if it's not in my inbox
> then please re-send your patches as I must have lost them. Assuming my list is
> complete, I think we've got a decent shot to get this all fixed up and in for
> 4.20. It looks like the major issues are the DMA mess (which Christoph might
> have mostly fixed already) and the timer mess (which Atish has a patch set out
> for) -- thanks for the help!
>
> I've just tagged my last PR for the 4.19 merge window so I should be able to
> dig through my email now and sort out what's going on over the next few days.
> Here's the list on patch-related mails I still have to read:
>
> 3 08/06 alistair.francis at wdc.com [PATCH 2/4] riscv/smpboot: Fix mm_grab() typo
> 4 08/06 alistair.francis at wdc.com [PATCH 3/4] riscv/smpboot: Add missing include
> 5 08/06 alistair.francis at wdc.com [PATCH 4/4] irq-riscv-plic: Update function name
> 6 08/06 alistair23 at gmail.com Re: [PATCH 4/4] irq-riscv-plic: Update function name
> 7 08/07 alankao at andestech.com [PATCH v4 0/5] riscv: Add support to no-FPU systems
> 8 08/07 alankao at andestech.com [PATCH v4 1/5] Extract FPU context operations from entry.S
> 9 08/07 alankao at andestech.com [PATCH v4 2/5] Refactor FPU code in signal setup/return procedures
> 10 08/07 alankao at andestech.com [PATCH v4 3/5] Cleanup ISA string setting
> 11 08/07 alankao at andestech.com [PATCH v4 5/5] Auto-detect whether a FPU exists
> 12 08/07 alankao at andestech.com [PATCH v4 4/5] Allow to disable FPU support
> 13 08/08 Christoph Hellwig Re: [PATCH v4 4/5] Allow to disable FPU support
> 14 08/08 Christoph Hellwig Re: [PATCH v4 5/5] Auto-detect whether a FPU exists
> 15 08/08 andrew.burgess at embecosm.com Re: [PATCH 3/5] RISC-V: Add linux target support.
> 18 08/09 alankao at andestech.com [PATCH v6 5/5] Auto-detect whether a FPU exists
> 19 08/09 Christoph Hellwig Re: [PATCH v6 5/5] Auto-detect whether a FPU exists
> 20 08/09 linux at roeck-us.net Re: [PATCH v2 2/2] RISC-V: Don't use a global include guard for uapi/asm/syscalls.h
> 21 08/09 linux at roeck-us.net [PATCH] riscv: Drop setup_initrd
> 22 08/10 Christoph Hellwig Re: [PATCH] riscv: Drop setup_initrd
> 26 08/14 Christoph Hellwig Re: [PATCH v3 1/2] RISC-V: Define sys_riscv_flush_icache when SMP=n
> 27 08/14 Christoph Hellwig Re: [PATCH v3 2/2] RISC-V: Don't use a global include guard for uapi/asm/syscalls.h
> 29 08/15 atish.patra at wdc.com [RFC PATCH 0/5] RISC-V: Improve smp functionality & support cpu hotplug
> 30 08/15 atish.patra at wdc.com [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
> 31 08/15 atish.patra at wdc.com [RFC PATCH 4/5] RISC-V: Move interrupt cause declarations to irq.h
> 32 08/15 atish.patra at wdc.com [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
> 33 08/15 atish.patra at wdc.com [RFC PATCH 5/5] RISC-V: Support cpu hotplug.
> 34 08/15 atish.patra at wdc.com [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
> 36 08/15 anup at brainfault.org Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
> 37 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
> 38 08/15 anup at brainfault.org Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
> 39 08/15 atish.patra at wdc.com Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
> 40 08/15 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
> 41 08/15 anup at brainfault.org Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
> 42 08/15 atish.patra at wdc.com Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
> 43 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
> 44 08/15 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
> 45 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
> 46 08/15 anup at brainfault.org Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
> 47 08/16 lkp at intel.com Re: [PATCH v4 3/3] irqchip: add a SiFive PLIC driver
> 50 08/16 aleksandar.markovic at rt-rk.com [Qemu-devel] [PATCH v9 55/84] elf: Add EM_NANOMIPS value as a valid one for e_machine field
> 52 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 0/6] Connect a PCIe host and graphics support to RISC-V
> 53 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 2/6] hw/riscv/virt: Increase the number of interrupts
> 54 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 4/6] hw/riscv/virt: Connect a VGA PCIe device
> 56 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe
> 59 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 1/6] hw/riscv/virtio: Set the soc device tree node as a simple-bus
> 60 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 3/6] hw/riscv/virt: Connect the gpex PCIe
> 61 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device
> 63 08/16 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
> 83 08/16 helgaas at kernel.org Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
> 84 08/16 Arnd Bergmann Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
> 104 08/16 kraxel at redhat.com Re: [Qemu-devel] [PATCH v3 4/6] hw/riscv/virt: Connect a VGA PCIe device
> 114 08/17 fweimer at redhat.com Re: [PATCH] Introduce ELF_INITFINI for all architectures
> 123 08/17 aleksandar.markovic at rt-rk.com [Qemu-devel] [PATCH v10 36/65] elf: Add EM_NANOMIPS value as a valid one for e_machine field
> 129 08/17 lorenzo.pieralisi at arm.com Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
> 132 08/17 Arnd Bergmann Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
> 136 08/17 rene at exactcode.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
> 137 08/17 ak at linux.intel.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
> 139 08/17 rene at exactcode.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
> 142 08/17 kilobyte at angband.pl Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
> 166 08/17 f4bug at amsat.org Re: [Qemu-devel] [PATCH v3 1/6] hw/riscv/virtio: Set the soc device tree node as a simple-bus
> 168 08/17 atish.patra at wdc.com Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
> 252 08/19 alex at ghiti.fr Re: [PATCH v6 00/11] hugetlb: Factorize hugetlb architecture primitives
> 257 08/20 alan.hayward at arm.com [PATCH 4/4] infcall-nested-structs: Test up to five fields
> 261 08/20 lorenzo.pieralisi at arm.com [PATCH] microblaze/PCI: Remove stale pcibios_align_resource() comment
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-08-20 22:10 ` Christoph Hellwig
@ 2018-08-21 1:28 ` Atish Patra
0 siblings, 0 replies; 10+ messages in thread
From: Atish Patra @ 2018-08-21 1:28 UTC (permalink / raw)
To: linux-riscv
On 8/20/18 3:10 PM, Christoph Hellwig wrote:
> On Mon, Aug 20, 2018 at 02:04:47PM -0700, Palmer Dabbelt wrote:
>> * fix-delete_compat, fix-noinc: Suitable for this MW, in my PR.
>
> The fix-noinc one still has some outstanding issues, see my comments
> posted last week. fix-delete_compat looks fine.
>
>> * review-init_halt_cleanups: I need to review these before sending them out,
>>
>> but I think they're suitable for RCs.
>
> At lot of this is probably going to clash with the hotplug updates from
> Atish (which I need to find some time to review).
>
>> * wip-32bit_dma: I think this branch is defunct, but I haven't gotten a
>> chance to give it a proper check yet. This is the patch set (from
>> Christoph) that I think obseletes this branch
>> <https://lkml.org/lkml/2018/5/25/477>.
>
>> * wip-dma: I think we need the functionality here, but the code is a mess --
>> it's a hodge-podge of a proper patch from Christoph and some hackery of mine
>> that I think can be dropped now in favor of the generic support.
>
> These two belong together. What is still missing upstream to support
> the same functionality would be:
>
> http://lists.infradead.org/pipermail/linux-riscv/2018-August/000920.html
>
> but the conclusion of that thread seems like we'd be better off to
> just add a proper dma-ranges property to the DT and not require kernel
> changes.
>
>
>> * wip-fespi: This needs review, but is at least well split out so that's
>> feasible to do now.
>
> From a quick look the code looks sensible. Add proper SPDX tags and
> send it off for an inclusion attempt I'd ?ay.
>
>> * wip-futex_cmpxchg: Not sure what to do with this, but at least it's small.
>> If it's still necessary then I'm not opposed to throwing this in as it
>> stands (and during an RC), but if providing an SMP implementation is as
>> quick as it seems to be then we should fix it correctly.
>
> It's more of an optimization. Note that the lack of a proper
> futex_cmpxchg implementation for SMP will also need to be sorted out,
> without that glibc locking primitives can't be made fully race free.
>
>> * wip-gemgxl_clock_driver: Another one that's stand-alone and therefor
>> suitable for review.
>
> Needs a good changelog and an SPXD tag, and then off to the maintainer.
>
>> * wip-prci_clock: Another one that's stand-alone and therefor suitable for
>> review.
>
> Needs a good changelog and an SPXD tag, and then off to the maintainer.
>
>> * wip-seccomp: This looks fine, I'll send it for review after the merge
>> window and target it for 4.20.
>
> SPDX tags need to be in the first line of the file.
> bool + promt in Kconfig is rather unusal, should use the normal
> form.
>
> Otherwise looks fine to me.
>
>> * wip-sifive_serial: Another one that's stand-alone and therefor suitable
>> for review. Paul is at SiFive now, so he'll be taking it over.
>> * wip-timer: Here's another one that's a mess. Christoph cleaned up the
>> driver and Atish has a better version out on the mailing list of what's
>> left, so my hope is that we're in decent shape for 4.20 here.
>
> Note that we dropped the patch to support the per-hart timebase patch
> from the irq series, so that will need a resubmission together with
> the DT changes.
>
The earlier version per-cpu based timer interrupt patch was based on
HLIC. Is there any way we can still support per-cpu based timer
interrupt given that we have dropped HLIC completely?
This might be incorrect but I couldn't find any reference of a design
where timer interrupt is registered under linux IRQ framework without an
interrupt controller (i.e. timer interrupt is connected to).
Regards,
Atish
>> If your patches aren't on one of these branches then they're probably in my
>> inbox. If so then there's no reason to re-send it, but if it's not in my
>> inbox then please re-send your patches as I must have lost them. Assuming
>> my list is complete, I think we've got a decent shot to get this all fixed
>> up and in for 4.20. It looks like the major issues are the DMA mess (which
>> Christoph might have mostly fixed already) and the timer mess (which Atish
>> has a patch set out for) -- thanks for the help!
>
> Here is some older stuff that needs a re-review (and/or re-posting):
>
> commit 3bf523445a4fe1cd178edc97646e2a1fcfc1f480
> Author: Wesley W. Terpstra <wesley@sifive.com>
> Date: Wed Mar 14 23:56:54 2018 -0700
>
> riscv_timer: add support for sched_clock
>
> (will need some major work to apply to the current codebase)
>
> commit 9a6b5bc1cdf424d4ddda993d4b0121f619093429
> Author: Palmer Dabbelt <palmer@sifive.com>
> Date: Mon Jun 25 13:23:12 2018 -0700
>
> Move EM_RISCV into elf-em.h
>
> (should easily apply as-is)
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-08-20 22:11 ` Atish Patra
@ 2018-09-06 9:45 ` Palmer Dabbelt
2018-09-10 13:41 ` Christoph Hellwig
0 siblings, 1 reply; 10+ messages in thread
From: Palmer Dabbelt @ 2018-09-06 9:45 UTC (permalink / raw)
To: linux-riscv
On Mon, 20 Aug 2018 15:11:46 PDT (-0700), atish.patra at wdc.com wrote:
> On 8/20/18 2:04 PM, Palmer Dabbelt wrote:
>> Linus' master now boots on QEMU's master, which is big step forwards. I've
>> gone ahead and marked the riscv-linux-4.18 branch as protected in our GitHub,
>> and I'd like to enforce that this branch only contains backports of patches
>> that have at least made it into linux-next (and ideally master), as that will
>> limit the difference between riscv-linux-4.18 and master as well as forcing me
>> to do this the right way.
>>
>> I have the following branches on kernel.org/palmer/linux.git:
>>
>> * fix-delete_compat, fix-noinc: Suitable for this MW, in my PR.
>> * review-init_halt_cleanups: I need to review these before sending them out,
>> but I think they're suitable for RCs.
>> * wip-32bit_dma: I think this branch is defunct, but I haven't gotten a chance
>> to give it a proper check yet. This is the patch set (from Christoph) that I
>> think obseletes this branch <https://lkml.org/lkml/2018/5/25/477>.
>> * wip-dma: I think we need the functionality here, but the code is a mess --
>> it's a hodge-podge of a proper patch from Christoph and some hackery of mine
>> that I think can be dropped now in favor of the generic support.
>> * wip-fespi: This needs review, but is at least well split out so that's
>> feasible to do now.
>> * wip-futex_cmpxchg: Not sure what to do with this, but at least it's small.
>> If it's still necessary then I'm not opposed to throwing this in as it stands
>> (and during an RC), but if providing an SMP implementation is as quick as it
>> seems to be then we should fix it correctly.
>> * wip-gemgxl_clock_driver: Another one that's stand-alone and therefor suitable
>> for review.
>> * wip-is25wp256d: I sent this out here <https://lkml.org/lkml/2018/8/7/256> but
>> don't see it in master. I just pinged it.
>> * wip-prci_clock: Another one that's stand-alone and therefor suitable for
>> review.
>> * wip-seccomp: This looks fine, I'll send it for review after the merge window
>> and target it for 4.20.
>> * wip-sifive_serial: Another one that's stand-alone and therefor suitable for
>> review. Paul is at SiFive now, so he'll be taking it over.
>> * wip-timer: Here's another one that's a mess. Christoph cleaned up the
>> driver and Atish has a better version out on the mailing list of what's left,
>> so my hope is that we're in decent shape for 4.20 here.
>>
>
> I think gpio & pwm are required as well. I couldn't get networking up
> without the GPIO driver.
That makes sense: IIRC the GPIO twiddles the pins that control the Ethernet phy.
> https://github.com/riscv/riscv-linux/commit/7b012f300afcff77c20a4d84519f4bd2b9b17bd0
>
> https://github.com/riscv/riscv-linux/commit/d6e84658098c6f37875a9e4b151706c6b541dc0b
Thanks. I've grabbed both of these into WIP branches for now, they're at least
the self contained type so it should be viable to start cleaning them up,
pending time.
> Regards,
> Atish
>> If your patches aren't on one of these branches then they're probably in my
>> inbox. If so then there's no reason to re-send it, but if it's not in my inbox
>> then please re-send your patches as I must have lost them. Assuming my list is
>> complete, I think we've got a decent shot to get this all fixed up and in for
>> 4.20. It looks like the major issues are the DMA mess (which Christoph might
>> have mostly fixed already) and the timer mess (which Atish has a patch set out
>> for) -- thanks for the help!
>>
>> I've just tagged my last PR for the 4.19 merge window so I should be able to
>> dig through my email now and sort out what's going on over the next few days.
>> Here's the list on patch-related mails I still have to read:
>>
>> 3 08/06 alistair.francis at wdc.com [PATCH 2/4] riscv/smpboot: Fix mm_grab() typo
>> 4 08/06 alistair.francis at wdc.com [PATCH 3/4] riscv/smpboot: Add missing include
>> 5 08/06 alistair.francis at wdc.com [PATCH 4/4] irq-riscv-plic: Update function name
>> 6 08/06 alistair23 at gmail.com Re: [PATCH 4/4] irq-riscv-plic: Update function name
>> 7 08/07 alankao at andestech.com [PATCH v4 0/5] riscv: Add support to no-FPU systems
>> 8 08/07 alankao at andestech.com [PATCH v4 1/5] Extract FPU context operations from entry.S
>> 9 08/07 alankao at andestech.com [PATCH v4 2/5] Refactor FPU code in signal setup/return procedures
>> 10 08/07 alankao at andestech.com [PATCH v4 3/5] Cleanup ISA string setting
>> 11 08/07 alankao at andestech.com [PATCH v4 5/5] Auto-detect whether a FPU exists
>> 12 08/07 alankao at andestech.com [PATCH v4 4/5] Allow to disable FPU support
>> 13 08/08 Christoph Hellwig Re: [PATCH v4 4/5] Allow to disable FPU support
>> 14 08/08 Christoph Hellwig Re: [PATCH v4 5/5] Auto-detect whether a FPU exists
>> 15 08/08 andrew.burgess at embecosm.com Re: [PATCH 3/5] RISC-V: Add linux target support.
>> 18 08/09 alankao at andestech.com [PATCH v6 5/5] Auto-detect whether a FPU exists
>> 19 08/09 Christoph Hellwig Re: [PATCH v6 5/5] Auto-detect whether a FPU exists
>> 20 08/09 linux at roeck-us.net Re: [PATCH v2 2/2] RISC-V: Don't use a global include guard for uapi/asm/syscalls.h
>> 21 08/09 linux at roeck-us.net [PATCH] riscv: Drop setup_initrd
>> 22 08/10 Christoph Hellwig Re: [PATCH] riscv: Drop setup_initrd
>> 26 08/14 Christoph Hellwig Re: [PATCH v3 1/2] RISC-V: Define sys_riscv_flush_icache when SMP=n
>> 27 08/14 Christoph Hellwig Re: [PATCH v3 2/2] RISC-V: Don't use a global include guard for uapi/asm/syscalls.h
>> 29 08/15 atish.patra at wdc.com [RFC PATCH 0/5] RISC-V: Improve smp functionality & support cpu hotplug
>> 30 08/15 atish.patra at wdc.com [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
>> 31 08/15 atish.patra at wdc.com [RFC PATCH 4/5] RISC-V: Move interrupt cause declarations to irq.h
>> 32 08/15 atish.patra at wdc.com [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
>> 33 08/15 atish.patra at wdc.com [RFC PATCH 5/5] RISC-V: Support cpu hotplug.
>> 34 08/15 atish.patra at wdc.com [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
>> 36 08/15 anup at brainfault.org Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
>> 37 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
>> 38 08/15 anup at brainfault.org Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
>> 39 08/15 atish.patra at wdc.com Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
>> 40 08/15 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
>> 41 08/15 anup at brainfault.org Re: [RFC PATCH 1/5] RISC-V: Add logical CPU indexing for RISC-V
>> 42 08/15 atish.patra at wdc.com Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
>> 43 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
>> 44 08/15 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
>> 45 08/15 anup at brainfault.org Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
>> 46 08/15 anup at brainfault.org Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
>> 47 08/16 lkp at intel.com Re: [PATCH v4 3/3] irqchip: add a SiFive PLIC driver
>> 50 08/16 aleksandar.markovic at rt-rk.com [Qemu-devel] [PATCH v9 55/84] elf: Add EM_NANOMIPS value as a valid one for e_machine field
>> 52 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 0/6] Connect a PCIe host and graphics support to RISC-V
>> 53 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 2/6] hw/riscv/virt: Increase the number of interrupts
>> 54 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 4/6] hw/riscv/virt: Connect a VGA PCIe device
>> 56 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe
>> 59 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 1/6] hw/riscv/virtio: Set the soc device tree node as a simple-bus
>> 60 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 3/6] hw/riscv/virt: Connect the gpex PCIe
>> 61 08/16 alistair.francis at wdc.com [Qemu-devel] [PATCH v3 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device
>> 63 08/16 atish.patra at wdc.com Re: [RFC PATCH 2/5] RISC-V: Use Linux logical cpu number instead of hartid
>> 83 08/16 helgaas at kernel.org Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
>> 84 08/16 Arnd Bergmann Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
>> 104 08/16 kraxel at redhat.com Re: [Qemu-devel] [PATCH v3 4/6] hw/riscv/virt: Connect a VGA PCIe device
>> 114 08/17 fweimer at redhat.com Re: [PATCH] Introduce ELF_INITFINI for all architectures
>> 123 08/17 aleksandar.markovic at rt-rk.com [Qemu-devel] [PATCH v10 36/65] elf: Add EM_NANOMIPS value as a valid one for e_machine field
>> 129 08/17 lorenzo.pieralisi at arm.com Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
>> 132 08/17 Arnd Bergmann Re: [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device
>> 136 08/17 rene at exactcode.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
>> 137 08/17 ak at linux.intel.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
>> 139 08/17 rene at exactcode.com Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
>> 142 08/17 kilobyte at angband.pl Re: [RESEND PATCH v2 0/2] Add support for ZSTD-compressed kernel
>> 166 08/17 f4bug at amsat.org Re: [Qemu-devel] [PATCH v3 1/6] hw/riscv/virtio: Set the soc device tree node as a simple-bus
>> 168 08/17 atish.patra at wdc.com Re: [RFC PATCH 3/5] RISC-V: Add cpu_operatios structure
>> 252 08/19 alex at ghiti.fr Re: [PATCH v6 00/11] hugetlb: Factorize hugetlb architecture primitives
>> 257 08/20 alan.hayward at arm.com [PATCH 4/4] infcall-nested-structs: Test up to five fields
>> 261 08/20 lorenzo.pieralisi at arm.com [PATCH] microblaze/PCI: Remove stale pcibios_align_resource() comment
>>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-09-06 9:45 ` Palmer Dabbelt
@ 2018-09-10 13:41 ` Christoph Hellwig
2018-09-10 13:52 ` Nick Kossifidis
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Christoph Hellwig @ 2018-09-10 13:41 UTC (permalink / raw)
To: linux-riscv
On Thu, Sep 06, 2018 at 02:45:00AM -0700, Palmer Dabbelt wrote:
> > I think gpio & pwm are required as well. I couldn't get networking up
> > without the GPIO driver.
>
> That makes sense: IIRC the GPIO twiddles the pins that control the Ethernet phy.
>
> > https://github.com/riscv/riscv-linux/commit/7b012f300afcff77c20a4d84519f4bd2b9b17bd0
> >
> > https://github.com/riscv/riscv-linux/commit/d6e84658098c6f37875a9e4b151706c6b541dc0b
>
> Thanks. I've grabbed both of these into WIP branches for now, they're at
> least the self contained type so it should be viable to start cleaning them
> up, pending time.
Btw, do we have volunteers for given drivers? I think Paul is trying
to handle the serial driver. I'll try to spend some time on one or two,
and have a SiFive board now. but I won't really have time to try it
until the end of the month as I'm busy travelling and at conferences.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-09-10 13:41 ` Christoph Hellwig
@ 2018-09-10 13:52 ` Nick Kossifidis
2018-09-20 0:06 ` Palmer Dabbelt
2018-09-10 17:13 ` Atish Patra
2018-09-20 0:06 ` Palmer Dabbelt
2 siblings, 1 reply; 10+ messages in thread
From: Nick Kossifidis @ 2018-09-10 13:52 UTC (permalink / raw)
To: linux-riscv
???? 2018-09-10 16:41, Christoph Hellwig ??????:
> On Thu, Sep 06, 2018 at 02:45:00AM -0700, Palmer Dabbelt wrote:
>> > I think gpio & pwm are required as well. I couldn't get networking up
>> > without the GPIO driver.
>>
>> That makes sense: IIRC the GPIO twiddles the pins that control the
>> Ethernet phy.
>>
>> > https://github.com/riscv/riscv-linux/commit/7b012f300afcff77c20a4d84519f4bd2b9b17bd0
>> >
>> > https://github.com/riscv/riscv-linux/commit/d6e84658098c6f37875a9e4b151706c6b541dc0b
>>
>> Thanks. I've grabbed both of these into WIP branches for now, they're
>> at
>> least the self contained type so it should be viable to start cleaning
>> them
>> up, pending time.
>
> Btw, do we have volunteers for given drivers? I think Paul is trying
> to handle the serial driver. I'll try to spend some time on one or
> two,
> and have a SiFive board now. but I won't really have time to try it
> until the end of the month as I'm busy travelling and at conferences.
>
Hello all,
I recently got my hands on a SiFive board as well, and I plan to form a
team here at FORTH to start working on RISC-V kernel support etc. How
can I help ? I started reading the code under /arch/riscv to get an idea
but is there a todo list somewhere or a wiki page ? On which git tree /
branch are you working on ?
Thanks a lot for your work
Nick
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-09-10 13:41 ` Christoph Hellwig
2018-09-10 13:52 ` Nick Kossifidis
@ 2018-09-10 17:13 ` Atish Patra
2018-09-20 0:06 ` Palmer Dabbelt
2 siblings, 0 replies; 10+ messages in thread
From: Atish Patra @ 2018-09-10 17:13 UTC (permalink / raw)
To: linux-riscv
On 9/10/18 6:41 AM, Christoph Hellwig wrote:
> On Thu, Sep 06, 2018 at 02:45:00AM -0700, Palmer Dabbelt wrote:
>>> I think gpio & pwm are required as well. I couldn't get networking up
>>> without the GPIO driver.
>>
>> That makes sense: IIRC the GPIO twiddles the pins that control the Ethernet phy.
>>
>>> https://github.com/riscv/riscv-linux/commit/7b012f300afcff77c20a4d84519f4bd2b9b17bd0
>>>
>>> https://github.com/riscv/riscv-linux/commit/d6e84658098c6f37875a9e4b151706c6b541dc0b
>>
>> Thanks. I've grabbed both of these into WIP branches for now, they're at
>> least the self contained type so it should be viable to start cleaning them
>> up, pending time.
>
> Btw, do we have volunteers for given drivers? I think Paul is trying
> to handle the serial driver. I'll try to spend some time on one or two,
> and have a SiFive board now. but I won't really have time to try it
> until the end of the month as I'm busy travelling and at conferences.
>
>
I will start with GPIO & PWM drivers.
Regards,
Atish
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-09-10 13:41 ` Christoph Hellwig
2018-09-10 13:52 ` Nick Kossifidis
2018-09-10 17:13 ` Atish Patra
@ 2018-09-20 0:06 ` Palmer Dabbelt
2 siblings, 0 replies; 10+ messages in thread
From: Palmer Dabbelt @ 2018-09-20 0:06 UTC (permalink / raw)
To: linux-riscv
On Mon, 10 Sep 2018 06:41:47 PDT (-0700), Christoph Hellwig wrote:
> On Thu, Sep 06, 2018 at 02:45:00AM -0700, Palmer Dabbelt wrote:
>> > I think gpio & pwm are required as well. I couldn't get networking up
>> > without the GPIO driver.
>>
>> That makes sense: IIRC the GPIO twiddles the pins that control the Ethernet phy.
>>
>> > https://github.com/riscv/riscv-linux/commit/7b012f300afcff77c20a4d84519f4bd2b9b17bd0
>> >
>> > https://github.com/riscv/riscv-linux/commit/d6e84658098c6f37875a9e4b151706c6b541dc0b
>>
>> Thanks. I've grabbed both of these into WIP branches for now, they're at
>> least the self contained type so it should be viable to start cleaning them
>> up, pending time.
>
> Btw, do we have volunteers for given drivers? I think Paul is trying
> to handle the serial driver. I'll try to spend some time on one or two,
> and have a SiFive board now. but I won't really have time to try it
> until the end of the month as I'm busy travelling and at conferences.
Well, Paul has sort of been volunteered to do it :). I'll help out where I can
but I'm pretty hosed in terms of time, as there's too much going on right now.
Last time I talked to Paul he was working through the serial driver, but that
has a bunch of dependencies. The big thing to untagle with all the non-PCIe
drivers is the clocking stuff, as everything depends on that. Paul is building
up a test farm so we can actually test our kernel on boards, which is
particularly important for the clocking stuff as that's very hardware
dependent.
The hope is that once we can have confidence in these drivers working we can
submit them, but getting up a test rig is a big chunk of work.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans
2018-09-10 13:52 ` Nick Kossifidis
@ 2018-09-20 0:06 ` Palmer Dabbelt
0 siblings, 0 replies; 10+ messages in thread
From: Palmer Dabbelt @ 2018-09-20 0:06 UTC (permalink / raw)
To: linux-riscv
On Mon, 10 Sep 2018 06:52:24 PDT (-0700), mick at ics.forth.gr wrote:
> ???? 2018-09-10 16:41, Christoph Hellwig ??????:
>> On Thu, Sep 06, 2018 at 02:45:00AM -0700, Palmer Dabbelt wrote:
>>> > I think gpio & pwm are required as well. I couldn't get networking up
>>> > without the GPIO driver.
>>>
>>> That makes sense: IIRC the GPIO twiddles the pins that control the
>>> Ethernet phy.
>>>
>>> > https://github.com/riscv/riscv-linux/commit/7b012f300afcff77c20a4d84519f4bd2b9b17bd0
>>> >
>>> > https://github.com/riscv/riscv-linux/commit/d6e84658098c6f37875a9e4b151706c6b541dc0b
>>>
>>> Thanks. I've grabbed both of these into WIP branches for now, they're
>>> at
>>> least the self contained type so it should be viable to start cleaning
>>> them
>>> up, pending time.
>>
>> Btw, do we have volunteers for given drivers? I think Paul is trying
>> to handle the serial driver. I'll try to spend some time on one or
>> two,
>> and have a SiFive board now. but I won't really have time to try it
>> until the end of the month as I'm busy travelling and at conferences.
>>
>
> Hello all,
>
> I recently got my hands on a SiFive board as well, and I plan to form a
> team here at FORTH to start working on RISC-V kernel support etc. How
> can I help ? I started reading the code under /arch/riscv to get an idea
> but is there a todo list somewhere or a wiki page ? On which git tree /
> branch are you working on ?
The original email in this thread is the best bet:
http://lists.infradead.org/pipermail/linux-riscv/2018-August/001180.html
If there's anything you're interested in then feel free to just post to the
list. You're welcome to post very early patches to linux-riscv, just call them
something like RFC or WIP instead of PATCH so people who aren't interested can
filter them out.
If you're submitting patches, then the best bet is to work against Linus'
master. That's the only real ground truth, and I can work through any
conflicts. We have a RISC-V tree at
https://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git
but it tends to be pretty thin. There's a blog post that roughly describes how
the mess of branches work, but it's less up-to-date than my email is so if
anything conflicts then believe the email :)
https://www.sifive.com/blog/2018/02/20/all-aboard-part-10-how-to-contribute-to-the-risc-v-software-ecosystem/
Thanks for your interest! If you have any more questions then feel free to
ask.
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2018-09-20 0:06 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-08-20 21:04 Post-4.19 WIP Branch Cleanup, riscv-linux-4.18, and 4.20 plans Palmer Dabbelt
2018-08-20 22:10 ` Christoph Hellwig
2018-08-21 1:28 ` Atish Patra
2018-08-20 22:11 ` Atish Patra
2018-09-06 9:45 ` Palmer Dabbelt
2018-09-10 13:41 ` Christoph Hellwig
2018-09-10 13:52 ` Nick Kossifidis
2018-09-20 0:06 ` Palmer Dabbelt
2018-09-10 17:13 ` Atish Patra
2018-09-20 0:06 ` Palmer Dabbelt
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