From: Michael Walle <mwalle@kernel.org>
To: Jaime Liao <jaimeliao.tw@gmail.com>
Cc: linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
tudor.ambarus@linaro.org, pratyush@kernel.org,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
broonie@kernel.org, leoyu@mxic.com.tw, jaimeliao@mxic.com.tw
Subject: Re: [PATCH v8 6/9] mtd: spi-nor: add support for Macronix Octal flash MX25 series with RWW feature
Date: Thu, 01 Feb 2024 16:48:06 +0100 [thread overview]
Message-ID: <f1ef9b347b5b25491cc65a8262de7386@kernel.org> (raw)
In-Reply-To: <20240201094353.33281-7-jaimeliao.tw@gmail.com>
Hi,
> From: JaimeLiao <jaimeliao@mxic.com.tw>
>
> Adding Macronix Octal flash for Octal DTR support.
>
> The octaflash series can be divided into the following types:
>
> MX25 series : Serial NOR Flash.
> LM/UM series : Up to 250MHz clock frequency with both DTR/STR
> operation.
> LW/UW series : Support simultaneous Read-while-Write operation in
> multiple
> bank architecture. Read-while-write feature which means
> read
> data one bank while another bank is programing or
> erasing.
>
> MX25LW : 3.0V Octal I/O with Read-while-Write
> MX25UW : 1.8V Octal I/O with Read-while-Write
>
> MX25LM : 3.0V Octal I/O
> Link:
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/8729/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf
>
> MX25UM : 1.8V Octal I/O
> Link:
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/8967/MX25UM51245G,%201.8V,%20512Mb,%20v1.5.pdf
>
> Those flash have been tested on Xilinx Zynq-picozed board using
> MXIC SPI controller.
> As below are debugfs data, the SFDP table and result of mtd-utils
> tests dump.
>
> ---
What is this? There is already a "---" below.
It goes like this:
[From:]
Patch description.
Link:
Link:
Signed-off-by:
---
Test data and SFDP dump
diff --git a/drivers/mtd/spi-nor/macronix.c
b/drivers/mtd/spi-nor/macronix.c
...
-michael
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Michael Walle <mwalle@kernel.org>
To: Jaime Liao <jaimeliao.tw@gmail.com>
Cc: linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
tudor.ambarus@linaro.org, pratyush@kernel.org,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
broonie@kernel.org, leoyu@mxic.com.tw, jaimeliao@mxic.com.tw
Subject: Re: [PATCH v8 6/9] mtd: spi-nor: add support for Macronix Octal flash MX25 series with RWW feature
Date: Thu, 01 Feb 2024 16:48:06 +0100 [thread overview]
Message-ID: <f1ef9b347b5b25491cc65a8262de7386@kernel.org> (raw)
In-Reply-To: <20240201094353.33281-7-jaimeliao.tw@gmail.com>
Hi,
> From: JaimeLiao <jaimeliao@mxic.com.tw>
>
> Adding Macronix Octal flash for Octal DTR support.
>
> The octaflash series can be divided into the following types:
>
> MX25 series : Serial NOR Flash.
> LM/UM series : Up to 250MHz clock frequency with both DTR/STR
> operation.
> LW/UW series : Support simultaneous Read-while-Write operation in
> multiple
> bank architecture. Read-while-write feature which means
> read
> data one bank while another bank is programing or
> erasing.
>
> MX25LW : 3.0V Octal I/O with Read-while-Write
> MX25UW : 1.8V Octal I/O with Read-while-Write
>
> MX25LM : 3.0V Octal I/O
> Link:
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/8729/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf
>
> MX25UM : 1.8V Octal I/O
> Link:
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/8967/MX25UM51245G,%201.8V,%20512Mb,%20v1.5.pdf
>
> Those flash have been tested on Xilinx Zynq-picozed board using
> MXIC SPI controller.
> As below are debugfs data, the SFDP table and result of mtd-utils
> tests dump.
>
> ---
What is this? There is already a "---" below.
It goes like this:
[From:]
Patch description.
Link:
Link:
Signed-off-by:
---
Test data and SFDP dump
diff --git a/drivers/mtd/spi-nor/macronix.c
b/drivers/mtd/spi-nor/macronix.c
...
-michael
next prev parent reply other threads:[~2024-02-01 15:48 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-01 9:43 [PATCH v8 0/9] Add octal DTR support for Macronix flash Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 9:43 ` [PATCH v8 1/9] mtd: spi-nor: add Octal " Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 9:43 ` [PATCH v8 2/9] spi: spi-mem: Allow specifying the byte order in Octal DTR mode Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 12:04 ` Mark Brown
2024-02-01 12:04 ` Mark Brown
2024-02-01 15:18 ` Michael Walle
2024-02-01 15:18 ` Michael Walle
2024-02-01 9:43 ` [PATCH v8 3/9] mtd: spi-nor: core: " Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 15:28 ` Michael Walle
2024-02-01 15:28 ` Michael Walle
2024-02-01 9:43 ` [PATCH v8 4/9] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 9:43 ` [PATCH v8 5/9] spi: mxic: Add support for swapping byte Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 12:05 ` Mark Brown
2024-02-01 12:05 ` Mark Brown
2024-02-01 15:39 ` Michael Walle
2024-02-01 15:39 ` Michael Walle
2024-02-01 9:43 ` [PATCH v8 6/9] mtd: spi-nor: add support for Macronix Octal flash MX25 series with RWW feature Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 15:48 ` Michael Walle [this message]
2024-02-01 15:48 ` Michael Walle
2024-02-01 9:43 ` [PATCH v8 7/9] mtd: spi-nor: add support for Macronix Octal flash MX66 " Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 9:43 ` [PATCH v8 8/9] mtd: spi-nor: add support for Macronix Octal flash MX25 series Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 9:43 ` [PATCH v8 9/9] mtd: spi-nor: add support for Macronix Octal flash MX66 series Jaime Liao
2024-02-01 9:43 ` Jaime Liao
2024-02-01 15:52 ` Michael Walle
2024-02-01 15:52 ` Michael Walle
2024-02-22 9:32 ` [PATCH v8 0/9] Add octal DTR support for Macronix flash Tudor Ambarus
2024-02-22 9:32 ` Tudor Ambarus
2024-02-22 9:55 ` liao jaime
2024-02-22 9:55 ` liao jaime
2024-02-26 2:02 ` Alvin Zhou
2024-02-26 2:02 ` Alvin Zhou
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