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From: Yi Liu <yi.l.liu@intel.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>, <qemu-devel@nongnu.org>
Cc: <alex@shazbot.org>, <clg@redhat.com>, <eric.auger@redhat.com>,
	<mst@redhat.com>, <jasowang@redhat.com>, <jgg@nvidia.com>,
	<nicolinc@nvidia.com>, <skolothumtho@nvidia.com>,
	<joao.m.martins@oracle.com>, <clement.mathieu--drif@bull.com>,
	<kevin.tian@intel.com>, <xudong.hao@intel.com>
Subject: Re: [PATCH v5 11/15] intel_iommu_accel: Bypass PASID entry addition for just deleted entry
Date: Thu, 14 May 2026 19:28:11 +0800	[thread overview]
Message-ID: <f970879e-ab9e-4565-8270-41f00ff28362@intel.com> (raw)
In-Reply-To: <20260509040819.1044702-12-zhenzhong.duan@intel.com>

On 5/9/26 12:08, Zhenzhong Duan wrote:
> For VTD_INV_DESC_PASIDC_G_PASID_SI typed pc_inv_dsc invalidation, if an
> pasid entry is just removed, it can never be a new entry to add. So
> calling vtd_replay_pasid_bind_for_dev() is unnecessary.
> 
> Introduce a new field accel_pce_deleted in VTDPASIDCacheInfo to mark
> this case and to do the bypassing.
> 
> Suggested-by: Yi Liu <yi.l.liu@intel.com>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> Tested-by: Xudong Hao <xudong.hao@intel.com>
> ---
>   hw/i386/intel_iommu_internal.h |  1 +
>   hw/i386/intel_iommu_accel.c    | 16 +++++++++++++---
>   2 files changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index 623dc24760..2c716c5297 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -630,6 +630,7 @@ typedef struct VTDPASIDCacheInfo {
>       uint8_t type;
>       uint16_t did;
>       uint32_t pasid;
> +    bool accel_pce_deleted;
>   } VTDPASIDCacheInfo;
>   
>   typedef struct VTDPIOTLBInvInfo {
> diff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c
> index 82bfbdf484..07a1e41a95 100644
> --- a/hw/i386/intel_iommu_accel.c
> +++ b/hw/i386/intel_iommu_accel.c
> @@ -302,10 +302,15 @@ static void vtd_accel_fill_pc(VTDHostIOMMUDevice *vtd_hiod, uint32_t pasid,
>       QLIST_INSERT_HEAD(&vtd_hiod->pasid_cache_list, vtd_pce, next);
>   }
>   
> -static void vtd_accel_delete_pc(VTDAccelPASIDCacheEntry *vtd_pce)
> +static void vtd_accel_delete_pc(VTDAccelPASIDCacheEntry *vtd_pce,
> +                                VTDPASIDCacheInfo *pc_info)
>   {
>       QLIST_REMOVE(vtd_pce, next);
>       g_free(vtd_pce);
> +
> +    if (pc_info->type == VTD_INV_DESC_PASIDC_G_PASID_SI) {
> +        pc_info->accel_pce_deleted = true;
> +    }
>   }
>   
>   static void
> @@ -339,7 +344,7 @@ vtd_accel_pasid_cache_invalidate_one(VTDAccelPASIDCacheEntry *vtd_pce,
>            * to be either all-zero or non-present. Either case means existing
>            * pasid cache should be invalidated.
>            */
> -        vtd_accel_delete_pc(vtd_pce);
> +        vtd_accel_delete_pc(vtd_pce, pc_info);
>       }
>   }
>   
> @@ -491,7 +496,12 @@ void vtd_accel_pasid_cache_sync(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info)
>            * removed.
>            */
>           vtd_accel_pasid_cache_invalidate(vtd_hiod, pc_info);
> -        vtd_accel_replay_pasid_bind_for_dev(vtd_hiod, start, end, pc_info);
> +
> +        if (pc_info->accel_pce_deleted) {
> +            pc_info->accel_pce_deleted = false;
> +        } else {
> +            vtd_accel_replay_pasid_bind_for_dev(vtd_hiod, start, end, pc_info);
> +        }
>       }
>   }
>   

LGTM.

Reviewed-by: Yi Liu <yi.l.liu@intel.com>



  reply	other threads:[~2026-05-14 11:20 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-09  4:07 [PATCH v5 00/15] intel_iommu: Enable PASID support for passthrough device Zhenzhong Duan
2026-05-09  4:07 ` [PATCH v5 01/15] vfio/iommufd: Extend attach/detach_hwpt callback implementations with pasid Zhenzhong Duan
2026-05-09  4:07 ` [PATCH v5 02/15] iommufd: Extend attach/detach_hwpt callbacks to support pasid Zhenzhong Duan
2026-05-09  4:07 ` [PATCH v5 03/15] vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID flag Zhenzhong Duan
2026-05-09  4:07 ` [PATCH v5 04/15] intel_iommu: Create the nested " Zhenzhong Duan
2026-05-09  4:07 ` [PATCH v5 05/15] intel_iommu: Rename pasid property to "pasid-bits" and define it as type uint8 Zhenzhong Duan
2026-05-14 11:30   ` Yi Liu
2026-05-09  4:07 ` [PATCH v5 06/15] intel_iommu: Export some functions Zhenzhong Duan
2026-05-09  4:08 ` [PATCH v5 07/15] intel_iommu: Use IOMMU_NO_PASID and delete PASID_0 Zhenzhong Duan
2026-05-14 11:24   ` Yi Liu
2026-05-09  4:08 ` [PATCH v5 08/15] intel_iommu: Refactor PASID processing to use IOMMU_NO_PASID internally Zhenzhong Duan
2026-05-14 11:25   ` Yi Liu
2026-05-09  4:08 ` [PATCH v5 09/15] intel_iommu_accel: Handle PASID entry addition for pc_inv_dsc request Zhenzhong Duan
2026-05-14 11:25   ` Yi Liu
2026-05-09  4:08 ` [PATCH v5 10/15] intel_iommu_accel: Handle PASID entry removal " Zhenzhong Duan
2026-05-14 11:25   ` Yi Liu
2026-05-09  4:08 ` [PATCH v5 11/15] intel_iommu_accel: Bypass PASID entry addition for just deleted entry Zhenzhong Duan
2026-05-14 11:28   ` Yi Liu [this message]
2026-05-09  4:08 ` [PATCH v5 12/15] intel_iommu_accel: Handle PASID entry removal for system reset Zhenzhong Duan
2026-05-09  4:08 ` [PATCH v5 13/15] intel_iommu_accel: Switch to VTDAccelPASIDCacheEntry for PASID bind/unbind and PIOTLB invalidation Zhenzhong Duan
2026-05-09  4:08 ` [PATCH v5 14/15] intel_iommu_accel: Add pasid bits size check Zhenzhong Duan
2026-05-14 11:25   ` Yi Liu
2026-05-09  4:08 ` [PATCH v5 15/15] intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED and VIOMMU_FLAG_WANT_PASID_ATTACH Zhenzhong Duan
2026-05-14 11:25   ` Yi Liu

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