From: David Edmondson <david.edmondson@oracle.com>
To: zhaolichang <zhaolichang@huawei.com>, qemu-trivial@nongnu.org
Cc: zhaolichang <zhaolichang@huawei.com>, qemu-devel@nongnu.org
Subject: Re: [PATCH RFC 07/14] s390x/: fix some comment spelling errors
Date: Wed, 30 Sep 2020 11:53:30 +0100 [thread overview]
Message-ID: <m2r1qjpmc5.fsf@oracle.com> (raw)
In-Reply-To: <20200930095321.2006-8-zhaolichang@huawei.com>
On Wednesday, 2020-09-30 at 17:53:14 +08, zhaolichang wrote:
> I found that there are many spelling errors in the comments of qemu/target/s390x.
> I used spellcheck to check the spelling errors and found some errors in the folder.
>
> Signed-off-by: zhaolichang <zhaolichang@huawei.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
> ---
> target/s390x/cpu_models.h | 4 ++--
> target/s390x/excp_helper.c | 2 +-
> target/s390x/fpu_helper.c | 2 +-
> target/s390x/insn-data.def | 2 +-
> target/s390x/misc_helper.c | 2 +-
> target/s390x/translate.c | 4 ++--
> target/s390x/translate_vx.c.inc | 2 +-
> 7 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/target/s390x/cpu_models.h b/target/s390x/cpu_models.h
> index 74d1f87..15c0f0d 100644
> --- a/target/s390x/cpu_models.h
> +++ b/target/s390x/cpu_models.h
> @@ -24,13 +24,13 @@ struct S390CPUDef {
> uint8_t gen; /* hw generation identification */
> uint16_t type; /* cpu type identification */
> uint8_t ec_ga; /* EC GA version (on which also the BC is based) */
> - uint8_t mha_pow; /* Maximum Host Adress Power, mha = 2^pow-1 */
> + uint8_t mha_pow; /* Maximum Host Address Power, mha = 2^pow-1 */
> uint32_t hmfai; /* hypervisor-managed facilities */
> /* base/min features, must never be changed between QEMU versions */
> S390FeatBitmap base_feat;
> /* used to init base_feat from generated data */
> S390FeatInit base_init;
> - /* deafault features, QEMU version specific */
> + /* default features, QEMU version specific */
> S390FeatBitmap default_feat;
> /* used to init default_feat from generated data */
> S390FeatInit default_init;
> diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
> index 3b58d10..9644a67 100644
> --- a/target/s390x/excp_helper.c
> +++ b/target/s390x/excp_helper.c
> @@ -538,7 +538,7 @@ try_deliver:
> /* don't trigger a cpu_loop_exit(), use an interrupt instead */
> cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HALT);
> } else if (cs->halted) {
> - /* unhalt if we had a WAIT PSW somehwere in our injection chain */
> + /* unhalt if we had a WAIT PSW somewhere in our injection chain */
> s390_cpu_unhalt(cpu);
> }
> }
> diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c
> index f155bc0..3e609b7 100644
> --- a/target/s390x/fpu_helper.c
> +++ b/target/s390x/fpu_helper.c
> @@ -89,7 +89,7 @@ static void handle_exceptions(CPUS390XState *env, bool XxC, uintptr_t retaddr)
> /*
> * invalid/divbyzero cannot coexist with other conditions.
> * overflow/underflow however can coexist with inexact, we have to
> - * handle it separatly.
> + * handle it separately.
> */
> if (s390_exc & ~S390_IEEE_MASK_INEXACT) {
> if (s390_exc & ~S390_IEEE_MASK_INEXACT & env->fpc >> 24) {
> diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
> index d79ae9e..1631948 100644
> --- a/target/s390x/insn-data.def
> +++ b/target/s390x/insn-data.def
> @@ -523,7 +523,7 @@
> /* LOAD LOGICAL HALFWORD RELATIVE LONG */
> C(0xc402, LLHRL, RIL_b, GIE, 0, ri2, new, r1_32, ld16u, 0)
> C(0xc406, LLGHRL, RIL_b, GIE, 0, ri2, r1, 0, ld16u, 0)
> -/* LOAD LOGICAL IMMEDATE */
> +/* LOAD LOGICAL IMMEDIATE */
> D(0xc00e, LLIHF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 32)
> D(0xc00f, LLILF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 0)
> D(0xa50c, LLIHH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 48)
> diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c
> index 58dbc02..929e509 100644
> --- a/target/s390x/misc_helper.c
> +++ b/target/s390x/misc_helper.c
> @@ -312,7 +312,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1)
> /* same as machine type number in STORE CPU ID, but in EBCDIC */
> snprintf(type, ARRAY_SIZE(type), "%X", cpu->model->def->type);
> ebcdic_put(sysib.sysib_111.type, type, 4);
> - /* model number (not stored in STORE CPU ID for z/Architecure) */
> + /* model number (not stored in STORE CPU ID for z/Architecture) */
> ebcdic_put(sysib.sysib_111.model, "QEMU ", 16);
> ebcdic_put(sysib.sysib_111.sequence, "QEMU ", 16);
> ebcdic_put(sysib.sysib_111.plant, "QEMU", 4);
> diff --git a/target/s390x/translate.c b/target/s390x/translate.c
> index a777343..58ad6c8 100644
> --- a/target/s390x/translate.c
> +++ b/target/s390x/translate.c
> @@ -433,7 +433,7 @@ static void gen_program_exception(DisasContext *s, int code)
> {
> TCGv_i32 tmp;
>
> - /* Remember what pgm exeption this was. */
> + /* Remember what pgm exception this was. */
> tmp = tcg_const_i32(code);
> tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUS390XState, int_pgm_code));
> tcg_temp_free_i32(tmp);
> @@ -489,7 +489,7 @@ static TCGv_i64 get_address(DisasContext *s, int x2, int b2, int d2)
>
> /*
> * Note that d2 is limited to 20 bits, signed. If we crop negative
> - * displacements early we create larger immedate addends.
> + * displacements early we create larger immediate addends.
> */
> if (b2 && x2) {
> tcg_gen_add_i64(tmp, regs[b2], regs[x2]);
> diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc
> index eb767f5..983da56 100644
> --- a/target/s390x/translate_vx.c.inc
> +++ b/target/s390x/translate_vx.c.inc
> @@ -789,7 +789,7 @@ static DisasJumpType op_vpk(DisasContext *s, DisasOps *o)
> }
> break;
> case 0x94:
> - /* If sources and destination dont't overlap -> fast path */
> + /* If sources and destination don't overlap -> fast path */
> if (v1 != v2 && v1 != v3) {
> const uint8_t src_es = get_field(s, m4);
> const uint8_t dst_es = src_es - 1;
> --
> 2.26.2.windows.1
dme.
--
Do I have to tell the story, of a thousand rainy days since we first met?
next prev parent reply other threads:[~2020-09-30 14:52 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 9:53 [PATCH RFC 00/14] fix some comment spelling errors zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 9:53 ` [PATCH RFC 01/14] cris/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:49 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 02/14] ppc/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:50 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 03/14] riscv/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:51 ` David Edmondson
2020-09-30 15:43 ` Alistair Francis
2020-09-30 9:53 ` [PATCH RFC 04/14] rx/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:25 ` Philippe Mathieu-Daudé
2020-09-30 10:51 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 05/14] tricore/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:52 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 06/14] mips/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:23 ` Philippe Mathieu-Daudé
2020-09-30 10:27 ` Philippe Mathieu-Daudé
2020-09-30 10:52 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 07/14] s390x/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:53 ` David Edmondson [this message]
2020-09-30 9:53 ` [PATCH RFC 08/14] m68k/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:26 ` Laurent Vivier
2020-09-30 16:03 ` Philippe Mathieu-Daudé
2020-09-30 16:19 ` Laurent Vivier
2020-09-30 10:54 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 09/14] sh4/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:24 ` Philippe Mathieu-Daudé
2020-09-30 10:54 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 10/14] i386/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:55 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 11/14] avr/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:24 ` Philippe Mathieu-Daudé
2020-09-30 10:55 ` David Edmondson
2020-09-30 9:53 ` [PATCH RFC 12/14] arm/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:56 ` David Edmondson
2020-09-30 16:04 ` Philippe Mathieu-Daudé
2020-09-30 9:53 ` [PATCH RFC 13/14] alpha/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:56 ` David Edmondson
2020-09-30 16:01 ` Philippe Mathieu-Daudé
2020-09-30 9:53 ` [PATCH RFC 14/14] target/: " zhaolichang
2020-09-30 9:53 ` zhaolichang
2020-09-30 10:25 ` Philippe Mathieu-Daudé
2020-09-30 10:56 ` David Edmondson
2020-09-30 10:28 ` [PATCH RFC 00/14] " Philippe Mathieu-Daudé
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