* Re: linux-2.6.1 x86_64 : STACK_TOP and text/data
From: dada1 @ 2004-01-27 18:57 UTC (permalink / raw)
To: Andi Kleen; +Cc: linux-kernel
In-Reply-To: <p73k73dfdvs.fsf@nielsen.suse.de>
Andi Kleen wrote:
> STACK_TOP is only for 32bit a.out executables running on x86-64
>
>ELF 32bit and 64bit programs use different defaults.
>
>-Andi
>
>
>
>
Hi Andi
I'm afraid not Andi
I changed include/asm-x86_64/a.out.h
#define STACK_TOP 0x10c0000000 /* instead of 0xc0000000 */
then, after reboot :
file /sbin/init
/sbin/init: ELF 64-bit LSB executable, AMD x86-64, version 1 (SYSV), for
GNU/Linux 2.4.0, dynamically linked (uses shared libs), stripped
cat /proc/1/maps
00400000-00408000 r-xp 00000000 03:01 556032
/sbin/init
00508000-00509000 rw-p 00008000 03:01 556032
/sbin/init
00509000-0052a000 rwxp 00000000 00:00 0
10bfffe000-10c0000000 rwxp fffffffffffff000 00:00 0
2a95556000-2a95569000 r-xp 00000000 03:01 637734
/lib64/ld-2.3.2.so
2a95569000-2a9556a000 rw-p 00000000 00:00 0
2a95669000-2a9566a000 rw-p 00013000 03:01 637734
/lib64/ld-2.3.2.so
2a9566a000-2a957a2000 r-xp 00000000 03:01 637741
/lib64/libc-2.3.2.so
2a957a2000-2a9586a000 ---p 00138000 03:01 637741
/lib64/libc-2.3.2.so
2a9586a000-2a958a7000 rw-p 00100000 03:01 637741
/lib64/libc-2.3.2.so
2a958a7000-2a958ac000 rw-p 00000000 00:00 0
See you
^ permalink raw reply
* Re: Encrypted Filesystem
From: Edward Shishkin @ 2004-01-27 18:56 UTC (permalink / raw)
To: Hans Reiser, mahalcro; +Cc: Nikita Danilov, linux-kernel
In-Reply-To: <40156449.8010805@namesys.com>
Hans Reiser wrote:
>
> I would encourage you to look at reiser4's encryption plugin. It is
> currently able to perform most of the actions required to compile a
> kernel without crashing.;-) Edward can provide more details. Note that
> we encrypt and compress not with every write, but with every flush to
> disk, and this makes it reasonable to compress and encrypt everything
> routinely.
>
> Probably it will be working soon, and definitely it could use another
> person working on it. Note that the same framework also provides file
> compression, and we are hoping that on machines with a good ratio of CPU
> power to disk bandwidth we can actually increase performance as a result
> of using it.
Yes. Also IBM's laptop hard disk space is too expensive, so I have presented
to myself T41 with only 40GB (5400rpm) HDD, keeping a great hope that it will
look like 60GB (7200!) after enabling transparent compression in reiser4 ;)
Seriously:
Transparent compression and(or) encryption (optionally) in reiser4 are
implemented via cryptcompress object plugin. Whats hot:
- Support of variable cluster size ((1, 2, 4, 8,..) * PAGE_SIZE)
via copy on clustering. The last means that page cluster will be
assembled into united flow before compression, and output stream of
decompression algorithm will be split into pages. Cluster size is an
attribute of cryptcompress files which means a size of maximal chunk
of data that can be passed to compression algorithm. This is required
attribute for each cryptcompress object, each cluster is compressed
and (or) encrypted independently. This allows to apply per cluster
various stream modes for encryption, which are also represented by
reiser4 stream plugins.
- High actual compression ratio which is close to ideal one that can
be provided by the compression algorithm for used cluster size. This is a
property of ctail items (aka fragments) that are used to store data of
cryptcompress objects.
>
> Current reiser4 benchmarks without it are at
> www.namesys.com/benchmarks.html, and reiser4 is described at www.namesys.com
>
> Hans
>
> >
> > -------------------------
> >
> > From:> > Michael A Halcrow <mahalcro@us.ibm.com>
> > Date:
> > Mon, 26 Jan 2004 11:46:29 -0600
> > To:
> > linux-kernel@vger.kernel.org
> >
> >
>
> > I have some time this year to work on an encrypted filesystem for
> > Linux. I have surveyed various LUG's, tested and reviewed code for
> > currently existing implementations, and have started modifying some
> > of them. I would like to settle on a single approach on which to
> > focus my efforts, and I am interested in getting feedback from the
> > LKML community as to which approach is the most feasible.
> >
> > This is the feature wish-list that I have compiled, based on personal
> > experience and feedback I have received from other individuals and
> > groups:
> >
> > - Seamless application to the root filesystem
> > - Layered over the entire root filesystem
> > - Unencrypted pass-through mode with minimal overhead
Would you comment this?
> > - Files are marked as ``encrypted'' or ``unencrypted'' and treated
> > accordingly by the encryption layer
Cryptcompress objects have special file attribute which is an ID of
reiser4 crypto plugin. If this attribute is zero, then file won't be
ciphered. Actually crypto plugin represents a crypto algorithm
supported by reiser4 and includes encrypt(), decrypt() and other
methods specific for this algorithm like setting a pointer of reiser4
specific inode data to cpu key, aligning flow before encryption,
etc.. The same for compression plugins.
> > - Key->file association
> > - As opposed to key->blkdev or key->directory granularity
Also cryptcompress file has the following extended attributes (I think
it will be useful to resolve some listed issues):
- digest plugin id (which represents digest algorithm supported by
reiser4: md5, sha1, etc..)
- key id (fingerprint of special randomly generated string, this string
is a part of a secret key, and this 'public' fingerprint is created
by appropriate digest plugin. 'Public' means that all EA should be
stored in disk stat-data. This key id allows to check authorization
every time when file is opened. Authorization is granted only by a
secret key (not by root password)
> > - No encryption metafiles in directories, instead placing that
> > information into Extended Attributes
> > - May break some backup utilities that are not EA-aware; may require
> > another mode where encryption metadata is stored in a header block
> > on the encrypted file
> > - Directories can be flagged as ``encrypted-only'', where any new
> > files created in that directory are, by default, encrypted, with
> > the key and permissions defined in the directory's metadata
> > - Processes may have encryption contexts, whereby any new files they
> > create are encrypted by default according to the process'
> > authentication
> > - Make as much metadata about the file as confidential as possible
> > (filesize, executable bit, etc.)
> > - Pluggable encryption (I wouldn't mind using a block cipher in CTR
> > mode)
Reiser4 allows to support any compression algorithm of Ziv-Lempel
family, and any (symmetric or asymmetric) crypto algorithm (of course,
asymmetric ones are very slowly and may inflate data, but enabling of
short files encrypted by public/private keys can be useful for various
management purposes.
> > - Authentication via PAM
> > - pam_usb
> > - Bluetooth
> > - Kerberos
> > - PAM checks for group membership before allowing access to certain
> > encrypted files
> > - Rootplug-based LSM to provide key management (necessary to use
> > LSM?)
> > - Secret splitting and/or (m,n)-threshold support on the keys
> > - Signatures on files flagged for auditing in order to detect
> > attempts to circumvent the encryption layer (via direct
> > modifications to the files themselves in the underlying filesystem)
> > - Ad-hoc groups for access to decrypted versions of files
> > - i.e., launch web browser, drop group membership by default (like
> > capability inheritance masks) so that the browser does not have
> > access to decrypted files by default; PAM module checks for group
> > membership before allowing access (explicit user authorization on
> > application access requests)
> > - Userland utilities to support encrypted file management
> > - Extensions to nautilus and konqueror to be able to use these
> > utilities from a common interface (think: right-click, encrypted)
> > - Distro installation integration
> > - Transparent shredding, where the underlying filesystem supports it
> > - Versioning and snapshots (CVS-ish behavior)
> > - Design to work w/ SE Linux
> >
> > These are features that have been requested, but are not necessarily
> > hard requirements for the encrypted filesystem. They are just
> > suggestions that I have received, and I am not convinced that they are
> >
> > There are several potential approaches to an encrypted filesystem with
> > these features, all with varying degrees of modification to the kernel
> > itself, each with its own set of advantages and disadvantages.
> >
> > Options that I am aware of include:
> >
> > - NFS-based (CFS, TCFS)
> > - CFS is mature
> > - Performance issues
> > - Violates UNIX semantics w/ hole behavior
> > - Single-threaded
> >
> > - Userland filesystem-based (EncFS+FUSE, CryptoFS+LUFS)
> > - Newer solutions, not as well accepted or tested as CFS
> > - KDE team is using SSHFS+FUSE
> >
> > - Loopback (cryptoloop) encrypted block device
> > - Mature; in the kernel
> > - Block device granularity; breaks most incremental backup
> > applications
> >
> > - LSM-based
> > - Is this even possible? Are the hooks that we need there?
> >
> > - Modifications to VFS (stackable filesystem, like NCryptfs)
> > - Very low overhead claimed by Erez Zadok
> > - Full implementation not released
> > - Key->directory granularity
> > - Evicts cleartext pages from the cache on process death
> > - Uses dcache to store attaches
> > - Other niceties, but it's not released...
> >
> > My goal is to develop an encrypted filesystem ``for the desktop'',
> > where a user can right-click on a file in konqueror or nautilus and
> > check the ``encrypted'' box, and all subsequent accesses by any
> > processes to that file will require authentication in order for the
> > file to be decrypted. I have already made some modifications to CFS
> > to support this functionality, but I am not sure at this moment
> > whether or not CFS is the best route to go for this.
> >
> > I have had requests to write a kernel module that, when loaded,
> > transparently starts acting as the encryption layer on top of whatever
> > root filesystem is mounted. For example, an ext3 partition may have
> > encrypted files strewn about, which are accessible only after loading
> > the module (and authenticating, etc.).
> >
> > Any advise or direction that the kernel community could provide would
> > be very much appreciated.
> >
> > Thanks,
> > Mike
Thanks for the list,
Edward.
^ permalink raw reply
* Re: [patch] udevd - cleanup and better timeout handling
From: Greg KH @ 2004-01-27 18:55 UTC (permalink / raw)
To: linux-hotplug
In-Reply-To: <20040125200314.GA8376@vrfy.org>
On Mon, Jan 26, 2004 at 11:56:20PM +0100, Kay Sievers wrote:
>
> All problems magically go away with threads, cause we share the same
> address space and let the kernel schedule our tasks.
Ok, that makes more sense. Thanks for explaining it.
greg k-h
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^ permalink raw reply
* Re: Is there a way to keep the 2.6 kjournald from writing to idle disks? (to allow spin-downs)
From: Bart Samwel @ 2004-01-27 18:54 UTC (permalink / raw)
To: Bill Davidsen; +Cc: linux-kernel, lkv
In-Reply-To: <Pine.LNX.3.96.1040127133932.11664B-100000@gatekeeper.tmr.com>
Bill Davidsen wrote:
> Well, it's the o.p. system, not mine, but I don't see how noatime will
> help him, the atime shouldn't change unless he's doing disk access, and
> if he's doing disk access the disk will spin up anyway.
> The place noatime helps is when actually doing reads to open files, and
> getting an inode update free with every read. His problem is that
> something really is accessing the drive, and he won't get the desired
> spindown until that's addressed.
If something really is accessing the drive, noatime might still help as
long as the accesses are from the cache. BTW, it wasn't clear to me from
his posts that he knows that something is _really_ accessing the drive,
I thought he only had kjournald activity -- and that might be explained
by atime updates. But I might have missed something of course!
> I hope the original poster is following this ;-)
I added him to the CC list again. That should fix it. :)
-- Bart
^ permalink raw reply
* Re: [linux-lvm] LVM and Linux quotas
From: R Dicaire @ 2004-01-27 18:53 UTC (permalink / raw)
To: linux-lvm
In-Reply-To: <20040127231733.GA25501@oddprocess.org>
On Tue, 2004-01-27 at 18:17, Matthew Daubenspeck wrote:
I'm using xfs quotas on a logical volume with no problems.
> --
> aRDy Music
> http://www.ardynet.com
^ permalink raw reply
* Re: RFC: Trailing blanks in source files
From: Joseph D. Wagner @ 2004-01-27 18:51 UTC (permalink / raw)
To: Andi Kleen, Rui Saraiva; +Cc: linux-kernel
In-Reply-To: <p73bropfdgl.fsf@nielsen.suse.de>
> It seems that many files [1] in the Linux source have lines with
> trailing blank (space and tab) characters and some even have formfeed
> characters. Obviously these blank characters aren't necessary.
Actually, they are necessary.
http://www.gnu.org/prep/standards_23.html
http://www.gnu.org/prep/standards_24.html
^ permalink raw reply
* Undeliverable mail
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^ permalink raw reply
* Re: PATCH to access old-style FAT fs
From: H. Peter Anvin @ 2004-01-27 18:51 UTC (permalink / raw)
To: OGAWA Hirofumi; +Cc: Frodo Looijaard, linux-kernel
In-Reply-To: <87n0898sah.fsf@devron.myhome.or.jp>
OGAWA Hirofumi wrote:
>
> The new cluster for directory entries must be initialized by 0x00.
> And, when the directory entry is deleted, the name[0] is updated by
> 0xe5 not 0x00.
>
> So, if the name[0] is 0x00, it after, all bytes in cluster is 0x00.
>
> The fat driver can stop at name[0] == 0x00, but this is just optimization.
> The behavior shouldn't change by this.
I looked at the spec, and yes, that is how the spec reads:
If DIR_Name[0] == 0x00, then the directory entry is free (same as for
0xE5), and there are no allocated directory entries after this one (all
of the DIR_Name[0] bytes in all of the entries after this one are also
set to 0). The special 0 value, rather than the 0xE5 value, indicates to
FAT file system driver code that the rest of the entries in this
directory do not need to be examined because they are all free.
I guess the original poster has found filesystems which have a 0
followed by garbage. In cases like that, the cardinal rule for FAT is
WWDD (What Would DOS Do)... since I'm pretty sure DOS stops examining at
that point, we should do the same.
It's the same thing as with using 0xF8 for ending clusters; it's correct
according to spec, but WWDD says 0xFF is the right thing.
-hpa
^ permalink raw reply
* Re: [PATCH] Incorrect value for SIGRTMAX, MIPS nonsense removed, timer_gettime fix
From: Andrew Morton @ 2004-01-27 18:46 UTC (permalink / raw)
To: George Anzinger; +Cc: eric.piel, minyard, linux-kernel
In-Reply-To: <40162D2D.3030406@mvista.com>
George Anzinger <george@mvista.com> wrote:
>
> The attached patch does the following:
>
> Removes C++ comment in favor of C style.
>
> Removes the special treatment for MIPS SIGEV values. We only require (and error
> if this fails) that the SIGEV_THREAD_ID value not share bits with the other
> SIGEV values. Note that mips has yet to define this value so when they do...
>
> Corrects the check for the signal range to be from 1 to SIGRTMAX inclusive.
>
> Adds a check to verify that kmem_cache_alloc() actually returned a timer, error
> if not.
>
> Fixes a bug in timer_gettime() where the incorrect value was returned if a
> signal was pending on the timer OR the timer was a SIGEV_NONE timer.
> - if ((event->sigev_notify & ~SIGEV_NONE & MIPS_SIGEV) &&
> - event->sigev_signo &&
> - ((unsigned) (event->sigev_signo > SIGRTMAX)))
> + if (((event->sigev_notify & ~SIGEV_THREAD_ID) != SIGEV_NONE) &&
> + ((unsigned int) (event->sigev_signo - 1) >= SIGRTMAX))
> return NULL;
I was wondering if someone would try this one :( Really, this is just over
the top. Take pity upon your readers, and do:
if (((event->sigev_notify & ~SIGEV_THREAD_ID) != SIGEV_NONE) &&
(event->sigev_signo <= 0 || event->sigev_signo > SIGRTMAX))
> @@ -804,7 +826,7 @@
> * equal to jiffies, so the timer notify function is called directly.
> * We do not even queue SIGEV_NONE timers!
> */
> - if (!(timr->it_sigev_notify & SIGEV_NONE)) {
> + if (!((timr->it_sigev_notify & ~SIGEV_THREAD_ID) == SIGEV_NONE)) {
> if (timr->it_timer.expires == jiffies)
> timer_notify_task(timr);
> else
Are you sure this is correct? If so, using != would be clearer.
^ permalink raw reply
* Re: [linux-lvm] LVM Snapshots for remote archiving.
From: Greg Freemyer @ 2004-01-27 18:46 UTC (permalink / raw)
To: linux-lvm
In-Reply-To: <4016EE45.1050300@gene.concordia.ca>
On Tue, 2004-01-27 at 18:03, Chris Beck wrote:
> Hi! I've been looking through the archives and I can't see anything
> addressing my issue. Probably because I didn't look hard enough.
>
> I want to use 24-hour snap shots as an archival tool.
> I have 2 identical file servers, one primary and one as an off-site
> mirror. I'd like the primary system to generate a transaction log that
> rolls over every 24-hours and gets transmitted to the remote site.
> After 7 days on the remote site, the log gets triggered so the remote is
> always 7 days out of sync but with the last 6 days logs ready to go. I
> could have it auto update on arrival, but I was thinking that allowing a
> week for someone to realize that they deleted something vital would be a
> good thing(TM) - standard archiving stuff I guess.
>
> Do you think that lvm snapshot volumes are a simple and convenient way
> of doing this? Does this make sense at all?
>
> Thanks,
> Chris
The above transaction log is new to me. I have seen that done with
databases, but not with generic fileservers.
If I was trying to accomplish what I think are your goals, I would use
rdiff-backup.
I don't know the syntax offhand, but the process would be:
Create snapshot
mount snapshot as /snap
rdiff-backup /snap //backup_server/snap
rdiff-backup --delete_older_than 7-days //backup_server
rdiff-backup uses technology similar to rsync to ensure only the deltas
are sent between the servers. (ie. first check datestamps etc. to see
if file changed. If so, use md5sums to isolate what parts of the file
changed and send them between the servers.)
It maintains a current copy of the source files, and a series of diffs
to go backwards to older versions of the files. In the above it would
keep a max of 7 diffs per file. If you wanted to restore from 7 days
prior, rdiff-backup would internally have to apply all 7 diffs, one
after another.
rdiff-backup has lots of other features/capabilities.
Also, it uses ssh to encrypt all data between the servers, so it is also
fairly secure.
The only problems I have with rdiff-backup are:
1) ACL and EA support is only in the Unstable release, but they seem to
be working fine
2) rdiff-backup is written in python and when an unhandled error occurs,
it dumps out a stack trace. To see what the problem is you have to go
thru the stack trace and the code. Not to bad if you have some
programming skills. If not, the mailing list is fairly responsive.
There is a wiki at
http://rdiff-backup.solutionsfirst.com.au/index.php?RdiffBackupWiki
Greg
--
Greg Freemyer
^ permalink raw reply
* Re: Is there a way to keep the 2.6 kjournald from writing to idle disks? (to allow spin-downs)
From: Bill Davidsen @ 2004-01-27 18:44 UTC (permalink / raw)
To: Bart Samwel; +Cc: linux-kernel
In-Reply-To: <401680CE.2080007@samwel.tk>
On Tue, 27 Jan 2004, Bart Samwel wrote:
> bill davidsen wrote:
> > In article <20040125205219.GE26600@luna.mooo.com>,
> > Micha Feigin <michf@post.tau.ac.il> wrote:
> >
> > | There are two things to do. First you should mount the disk with the
> > | noatime option.
> >
> > Hopefully on an idle system there isn't any access, so there isn't any
> > atime impact. It would be nice if the atime write was very lazy, as in
> > only when the file is closed or something. Like an atimeonclose option.
>
> > | The other thing is ext3 which is updating its journal every 5
> > | seconds. I was told that laptop-mode was imported into 2.6 by now (I
> > | think that it is in the main stream). Check the kernel docs there
> > | should be some mount option to state the dirty time for the ext3
> > | journal. The method changed since 2.4 so I don't remember the 2.6
> > | option since I don't use it yet, sorry.
> >
> > Someone will have to explain that one, in a normal mount I would not
> > expect an idle system to be doing anything on the filesystems.
>
> Anything that reads anything from a filesystem updates the atime, I
> guess, even though the read data comes from the cache. This means that
> pages are dirtied, and they need to be written back. The atime is part
> of the filesystem metadata, so that might explain metadata journaling
> activity. AFAICS your system is not truly idle w.r.t the disk in
> question.
Well, it's the o.p. system, not mine, but I don't see how noatime will
help him, the atime shouldn't change unless he's doing disk access, and
if he's doing disk access the disk will spin up anyway.
The place noatime helps is when actually doing reads to open files, and
getting an inode update free with every read. His problem is that
something really is accessing the drive, and he won't get the desired
spindown until that's addressed.
> Mount it with noatime and see if you can spin it down when you
> know it should really be idle. (You can use hdparm -y on it to spin it
> down by hand, so you don't have to wait for the hardware timer.) If it
> still spins up without atime, you know it isn't really idle, so you need
> to find out what app is accessing the disk. A look at the output of
> "lsof" can be enlightening. If that doesn't help, you can try to use
> laptop mode's block_dump functionality (without enabling laptop mode
> itself!) to see which process is reading/writing which block.
>
> Laptop mode is not in 2.6 mainstream yet, it can be found in the -mm
> series. After you're done using block_dump you can get rid of laptop
> mode again: you don't need the actual mode, the spun-down times it gets
> you are way too short for your needs. Furthermore it's indiscriminate
> w.r.t disks, so it would have an undesired effect on your other disk as
> well.
I hope the original poster is following this ;-)
--
bill davidsen <davidsen@tmr.com>
CTO, TMR Associates, Inc
Doing interesting things with little computers since 1979.
^ permalink raw reply
* RE: List noise.
From: Arjen Verweij @ 2004-01-27 18:45 UTC (permalink / raw)
To: Brown, Len
Cc: David Woodhouse, Dave Jones,
acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f
In-Reply-To: <BF1FE1855350A0479097B3A0D2A80EE0CC8A62-N2PTB0HCzHJF3Yvz3xaN/VDQ4js95KgL@public.gmane.org>
Some people procmail emails for the following strings, which is alledgedly
present in most W32 executables:
* IbgBTM0hVGhpcyBwcm9ncmFtIGNhbm5vdCBiZSBydW4gaW4g|IbgBTM0hkJBUaGlzIHByb2dyYW0gbXVzdCBiZSBydW4gdW5kZXIgV2lu
Note: the pipe is the procmail OR, but I'm sure you know this.
Maybe this helps vs virusses.
Arjen
On Tue, 27 Jan 2004, Brown, Len wrote:
> Sure, I'm open to moving the list off sourceforge if there is clearly a
> better choice. Two other problems we've seen on sf are
> 1. latency is sometimes huge
> 2. archives sometimes unavailable, and not indexed by google.
>
> In the mean-time, here are the mailman spam filters I've got on SF, a
> couple I've added in the last 30-minutes. It doesn't look like it can
> search for a _missing_ field -- only positive matches. I'm sure open to
> suggestions for further improvement.
>
> Thanks,
> -Len
>
> # Lines that *start* with a '#' are comments.
> to: friend-6zcLuMBsFRvQT0dZR+AlfA@public.gmane.org
> message-id: relay.comanche.denmark.eu
> message-id *externalmx.vasoftware.com*
> from: list-pJMVowSF+OPQT0dZR+AlfA@public.gmane.org
> from: .*@uplinkpro.com
> X-Spam-Flag: YES
> Content-Type: text/html
> Auto-Submitted: auto-generated
> Precedence: bulk
> Subject: *Returned mail*
> charset="Windows-1252"
>
>
> > -----Original Message-----
> > From: acpi-devel-admin-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
> > [mailto:acpi-devel-admin-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org] On Behalf Of
> > David Woodhouse
> > Sent: Tuesday, January 27, 2004 10:00 AM
> > To: Dave Jones
> > Cc: acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
> > Subject: Re: [ACPI] List noise.
> >
> >
> > On Tue, 2004-01-27 at 14:41 +0000, Dave Jones wrote:
> > > On Tue, Jan 27, 2004 at 02:18:05PM +0000, David Woodhouse wrote:
> > > > All this noise on the list would be so easily avoided if
> > the list wasn't
> > > > accepting messages without a Message-ID, and wasn't
> > accepting bounces.
> > > >
> > > > It's not hard -- it'd take _moments_ to protect the list
> > against this.
> > >
> > > if you had control over the MTA, yes.
> > > Sourceforget lists don't offer this power sadly.
> >
> > Mailman lets you filter on certain headers though, and trap
> > messages for
> > moderation. Can't you do something like looking for a Message-ID
> > matching ^$ ?
> >
> > Likewise Return-Path matching <>?
> >
> > --
> > dwmw2
> >
> >
> >
> > -------------------------------------------------------
> > The SF.Net email is sponsored by EclipseCon 2004
> > Premiere Conference on Open Tools Development and Integration
> > See the breadth of Eclipse activity. February 3-5 in Anaheim, CA.
> > http://www.eclipsecon.org/osdn
> > _______________________________________________
> > Acpi-devel mailing list
> > Acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
> > https://lists.sourceforge.net/lists/listinfo/acpi-devel
> >
>
>
> -------------------------------------------------------
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> _______________________________________________
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>
>
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^ permalink raw reply
* Re: Encrypted Filesystem
From: Andi Kleen @ 2004-01-27 18:44 UTC (permalink / raw)
To: Jari Ruusu; +Cc: mahalcro, linux-kernel
In-Reply-To: <4016AB1F.9EF8F42@users.sourceforge.net>
On Tue, 27 Jan 2004 20:17:03 +0200
Jari Ruusu <jariruusu@users.sourceforge.net> wrote:
> > The biggest shortcomming in crypto loop is that you cannot change the
> > password easily. Doing so would require reencryption of the whole
> > volume and it is hard to do so in a crash safe way (or you risk loss
> > of the volume when the machine crashes during reencryption)
>
> Not true with loop-AES where changing password is either:
[...] My version of the loop tools also do all this correctly too. But the loop
most people seem to be using is as insecure as always. Congratulations
that you fixed it too.
Still considering the other points I think a stacked file system would
be far better (integrated meta data, separate keys for different files etc.)
Even though I invested quite some work into fixing loop I still think it's a bad
hack, not a real design.
> > The standard crypto loop uses
> > fixed IVs too which do not help against this.
>
> Not true. Mainline uses simple sector IV. SuSE twofish uses fixed IV which
> is even more vulnerable than mainline.
It's as as vunerable, but more stable. The mainline IVs are basically useless
for security purposes but broke on disk format compatibility all the time when
someone misguided decided again to "improve" the IV format in loop.c (happened far too
often in the past). In my own loop tools I used them with an hashed IV, added some
hacks for different IV versions as far as they were fixable and grumbingly converted
the disk format in one case.
[... encrypted swap using a random key for each session...]
Good point. I didn't think of that. Still it's a lot of overhead if you
only use crypto occassionally. With the tainted bit it would be possible to only encrypt
pages of processes that have been tainted or better not page them out at all.
-Andi
^ permalink raw reply
* Re: [linux-lvm] Re: LVM2 + Linux 2.6.1 questions
From: Navindra Umanee @ 2004-01-27 18:45 UTC (permalink / raw)
To: linux-lvm
In-Reply-To: <yw1xu12hzu07.fsf@ford.guide>
Måns Rullgård <mru@kth.se> wrote:
> Same version here. It struck me that my /etc/mtab is a symlink to
> /proc/mounts. Maybe that makes a difference.
That works better, thanks! I hope it works across boots. Now it
doesn't have the ugly devfs names instead of the short names either.
There is some anomaly with how the root filesystem is listed though
(it's there twice). Oh well can't be too picky.
Cheers,
Navin.
^ permalink raw reply
* Marvell MV64340 documentation
From: Sergey Podstavin @ 2004-01-27 18:44 UTC (permalink / raw)
To: Matthew Dharm; +Cc: Pavel Kiryukhin, linux-mips@linux-mips.org
Hello Matthew!
Could you write me what do bits mean in the interrupt cause registers
for MV64340 Ethernet? I need to handle them in the interrupt handler for
the Gigabit Ethernet in the driver.
Best wishes,
Sergey Podstavin,
software engineer.
^ permalink raw reply
* Re: [parisc-linux] Using PAT_IO calls for PCI config space reads and writes.
From: Matthew Wilcox @ 2004-01-27 18:43 UTC (permalink / raw)
To: Naresh Kumar; +Cc: parisc-linux
In-Reply-To: <401623CA.59AE3CCD@india.hp.com>
On Tue, Jan 27, 2004 at 02:09:38PM +0530, Naresh Kumar wrote:
> --------------------START------------------------------------------------------------------------------
>
> --- lba_pci.c.1.54 Fri Jan 23 15:47:41 2004
> +++ lba_pci.c.modified Fri Jan 23 15:53:15 2004
> @@ -504,6 +504,13 @@ lba_rd_cfg(struct lba_device *d, u32 tok
> return(data);
> }
>
> +#ifdef __LP64__
> +#define PAT_CFG_READ(a,b,c) pdc_pat_io_pci_cfg_read(a,b,c)
> +#define PAT_CFG_WRITE(a,b,c) pdc_pat_io_pci_cfg_write(a,b,c)
> +#else
> +#define PAT_CFG_READ(a,b,c)
> +#define PAT_CFG_WRITE(a,b,c)
> +#endif
Hmm. Why the abstraction? The normal way to do this is to define dummy
functions when they can't be called. See include/asm-parisc/pdc.h:
#else /* !__LP64__ */
/* No PAT support for 32-bit kernels...sorry */
#define pdc_pat_get_irt_size(num_entries, cell_numn) PDC_BAD_PROC
#define pdc_pat_get_irt(r_addr, cell_num) PDC_BAD_PROC
I actually think the right way to handle this is probably like this:
#define pat_cfg_addr(bus, devfn, addr) ((bus << 16) | (devfn << 8) | addr)
static int pat_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int size, u32 *data)
{
int tok = pat_cfg_addr(bus->number, devfn, pos);
int ret = pdc_pat_io_pci_cfg_read(tok, size, &data);
return (ret == SUCCESS);
}
... same for write here ...
static struct pci_ops pat_cfg_ops = {
.read = pat_cfg_read,
.write = pat_cfg_write,
};
And then choose whether to use pat_cfg_ops or lba_cfg_ops at probe time.
> +/**
> + * pdc_pat_io_pci_cfg_read - Read PCI configuration space.
> + * @pci_addr: PCI configuration space address for which the read
> request is being made.
> + * @pci_size: Size of read in bytes. Valid values are 1, 2, and 4.
> + * @mem_addr: Pointer to return memory buffer.
> + *
> + */
> +int pdc_pat_io_pci_cfg_read(unsigned long pci_addr, int pci_size, void
> *mem_addr)
> +{
> + int retval;
> + spin_lock_irq(&pdc_lock);
> + retval = mem_pdc_call(PDC_PAT_IO, PDC_PAT_IO_PCI_CONFIG_READ,
> __pa(pdc_result),
> + pci_addr, pci_size);
> + memcpy((char *)mem_addr, (char *) ((char *)pdc_result +
> (sizeof(unsigned long) - pci_size))
> , pci_size);
> + spin_unlock_irq(&pdc_lock);
> +
> + return retval;
> +}
I don't see why you need a memcpy, the data should be sufficiently aligned.
Casting to the right data type should be enough.
> A couple of questions:
> 1. In the definition of 'pdc_pat_io_pci_cfg_read( )' and
> 'pdc_pat_io_pci_cfg_write( )' above, can I use 'cpu_to_le64( )' kind of
> function instead of ordering the bytes manually in the 'memcpy( )'?
> 2. Can these changes be propagated to 2.6 also?
You should be developing against 2.6 in the first place.
--
"Next the statesmen will invent cheap lies, putting the blame upon
the nation that is attacked, and every man will be glad of those
conscience-soothing falsities, and will diligently study them, and refuse
to examine any refutations of them; and thus he will by and by convince
himself that the war is just, and will thank God for the better sleep
he enjoys after this process of grotesque self-deception." -- Mark Twain
^ permalink raw reply
* BitKeeper repo for KGDB
From: Tom Rini @ 2004-01-27 18:40 UTC (permalink / raw)
To: akpm, george, amitkale, Andi Kleen, jim.houston; +Cc: Kernel Mailing List
Hello everybody. Since I've been talking with George off-list about
trying to merge the various versions of KGDB around, and I just read the
thread between Andy and Jim about conflicting on KGDB work, I've put up
a BitKeeper repository[1] to try and coordinate things.
What's in there right now is Amit's kgdb 2.1.0, without the ethernet
patch. There's also all of the changes for PPC and for generic stuffs
that I've been doing of late.
What I'll be doing shortly (this afternoon even) is to change from a
struct of function pointers, for the arch specific functions, into a set
of provided, weak, variants and then allow arches to override as needed.
What I'd like is for someone to move the ethernet bits from the -mm tree
into here, and for people to merge the fixes / enhancements that're in
their per-arch stubs in the -mm tree into the split design that Amit's
version has.
Comments? Screams? Patches? :)
[1]: If anyone here won't / can't use BitKeeper, I'll happily move over
to a repo someone else sets up in something else.
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* Re: RFC: Trailing blanks in source files
From: Andi Kleen @ 2004-01-27 18:34 UTC (permalink / raw)
To: Rui Saraiva; +Cc: linux-kernel
In-Reply-To: <Pine.LNX.4.58.0401271544120.27260@joel.ist.utl.pt.suse.lists.linux.kernel>
Rui Saraiva <rmps@joel.ist.utl.pt> writes:
> It seems that many files [1] in the Linux source have lines with
> trailing blank (space and tab) characters and some even have formfeed
> characters. Obviously these blank characters aren't necessary.
>
> I wonder if it is a waste of time to send patches that clean the
> source? Those patches will only remove those trailing blank characters and
> will be splitted by maintainer.
A lot of people will hate you for that because you'll break their external
patches without any good reason.
Don't do it.
I'm sure there are lots of other areas where good clean up can be done
without causing problems.
-Andi
^ permalink raw reply
* Re: SMP AMD64 (Tyan S2882) problems.
From: Andi Kleen @ 2004-01-27 18:31 UTC (permalink / raw)
To: Jan Kasprzak; +Cc: linux-kernel
In-Reply-To: <20040127190911.B13769@fi.muni.cz.suse.lists.linux.kernel>
Jan Kasprzak <kas@informatics.muni.cz> writes:
You don't say if you run a 32bit or a 64bit kernel. I will assume 64bit.
> Is it normal? How can I set up some IRQ balancing (or at least hard-wire
> 3ware for CPU1 and eth0 for CPU0)?
Run irqbalanced
> Problem 2: the 3ware controller does not work correctly on the first
> PCI bus (slot 1 and 2) - in slot 1 it hangs under bigger load (e.g.
> an array rebuild), in slot 2 it hangs during boot in 3ware BIOS.
> It is probably not Linux-specific, but has anyone seen the same problem?
I haven't seen it.
You can try if it goes away when you disable ACPI PCI routing
(pci=noacpi)
> Problem 3:
> What the "PCI-DMA: Disabling IOMMU." message in dmesg output means?
Ok you run a 64bit kernel. You don't have enough memory to require
the IOMMU. That's fine.
> Problem 4:
> Does Linux support the hardware sensors on this board? The i2c driver
> AMD8111 seems to be working, but what sensors driver should I use?
Most likely the Winbond W83627HF
iirc it's not possible in 2.6.1 to enable it. You have to drop the
ISA dependency for "I2C_ISA" in drivers/i2c/busses/Kconfig
> Problem 5:
> Is there a 3ware configuration program (tw_cli), which works on AMD64?
You can try if the 32bit program works. If not ask 3ware.
-Andi
^ permalink raw reply
* Re: [parisc-linux] 2.6.2-rc2 merging
From: James Bottomley @ 2004-01-27 18:35 UTC (permalink / raw)
To: Matthew Wilcox; +Cc: parisc-linux
In-Reply-To: <20040127175647.GC11844@parcelfarce.linux.theplanet.co.uk>
On Tue, 2004-01-27 at 11:56, Matthew Wilcox wrote:
> After a conversation with jejb, we've decided to pull 2.6.2-rc2 into our
> tree to work on fixing some of the problems with it more effectively.
> This does mean that the tree will PROBABBLY NOT WORK, MAY EAT YOUR
> CAT, etc. Unless you know what you're doing stick with the head of
> tree today. Thanks.
Actually, the major issue that I can't fix is Vojtec's partial merge of
the parisc input subsystem, so if your name is Helge, this means you
need to update.
I also have been running a 2.6.2-rc2 based kernel on my PA boxes since
it was released with no ill effects (I do have to confess not having
seen the cat at all after doing the upgrade, but I'm assuming this is
because I didn't have one before...)
James
^ permalink raw reply
* Re: Discontiguous memory issue
From: Aman @ 2004-01-27 18:31 UTC (permalink / raw)
To: Martin J. Bligh, MM Linux
In-Reply-To: <302450000.1075045767@[10.10.2.4]>
[-- Attachment #1: Type: text/plain, Size: 3380 bytes --]
Hi
I booted the kernel with below said modification However the kernel is
crashing. I debugged and found that it is crashing in assembly function
__trap_init(arch/arm/kernel). I think it fails when it tries to load the
exception vectors at the location 0xffff0000.
ENTRY(__trap_init)
stmfd sp!, {r4 - r6, lr}
adr r1, .LCvectors @ set up the vectors
ldmia r1, {r1, r2, r3, r4, r5, r6, ip, lr}
stmia r0, {r1, r2, r3, r4, r5, r6, ip, lr} <-- Crashes in
this line.
add r2, r0, #0x200
adr r0, __stubs_start @ copy stubs to
0x200
adr r1, __stubs_end
1: ldr r3, [r0], #4
str r3, [r2], #4
cmp r0, r1
blt 1b
LOADREGS(fd, sp!, {r4 - r6, pc})
Any help will be grateful.
Thanking you in advance
Regards
Aman
----- Original Message -----
From: "Martin J. Bligh" <mbligh@aracnet.com>
To: "Aman" <amanullah_khan@hotmail.com>; "MM Linux" <linux-mm@kvack.org>
Sent: Sunday, January 25, 2004 9:19 PM
Subject: Re: Discontiguous memory issue
> > I am working on a customized board which has S3C2410 as its processor.
> > I have applied the following Linux patches patch-2.4.18-rmk6 and
> > patch-2.4.18-RMK6-SWL5.
> > There are two types of custom hardware with me. One has 64MB contiguous
> > SDRAM and the other has 32 MB with following discontiguous physical
> > memory map.
> >
> > 1. 0x30000000 to 0x307fffff size is 8MB
> > 2. 0x31000000 to 0x317fffff size is 8MB
> > 3. 0x32000000 to 0x327fffff size is 8MB
> > 4. 0x33000000 to 0x337fffff size is 8MB
> >
> > RAMDISK location 0x31000000 (Maximum size is 7 MB) and ZIMAGE
> > location 0x31700000
> >
> > In the 64 MB hardware, Linux runs without any issues. Because the patch
is
> > for 64MB contiguous memory. I am able to boot the 32 MB hardware
> > with the same kernel used for 64MB. But in 32MB hardware, it crashes
> > when I run some of our applications. I assume that this is because the
> > kernel is not configured for the discontiguous memory map.
> >
> > I did the following changes to support discontiguous memory.
> >
> > 1. I changed the MEM_SIZE macro to 32 * 1024 * 1024
> > (include/as/arch/s3c2410.h)
> > 2. Changed the macros in the include/asm/arch/memory.h
> > 3. modified the fixup_s3c2410 () function in
> > arch/arm/mach-s3c2410/arch.c to support 4 memory banks.
> > 4. Enabled CONFIG_DISCONTIGMEM option
> >
> > After doing the above changes, Linux crashes during the bootup.
> > Is my understanding correct ?
> > I have attached the modified files.
> > Any help regarding the discontiguous memory configuration will be
grateful.
> >
> > Thanking you in advance.
>
> Where exactly during bootup are you crashing? If it's before console_init,
> you're going to have some kind of early printk function to do a crude dump
> to the screen or serial port or something. If it's after, then dump all
> the pgdats, and see if it looks good.
>
> Fundamentally, you need to create the pgdats, and fill them out properly,
> describing to the main VM where your memory regions start and end. Most
> of them are in pfn units (page frame number = physaddr / PAGE_SIZE).
> I didn't bother sorting through your files to see if you're doing that ;-)
>
> M.
>
>
[-- Attachment #2: s3c2410.h --]
[-- Type: application/octet-stream, Size: 49520 bytes --]
/*
* linux/include/asm-arm/arch-s3c2410/s3c2410.h
*
* Copyright (C) 2002 SAMSUNG ELECTORNICS
* SW.LEE (hitchcar@sec.samsung.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/* Contents of This File
* 1.Clock Parameter
*
* 2.Register Mapping
* 3.Physical to Virtual Mapping
* Searching Keyword: Phy2Vir
* 4.Serial Baud Rate
* Searching Keyword: SER_BAUD
* 5.OS Timer Parameter
* Searching Keyword: OS_Timer
* 6.Sound clock Searching Keyword: CODEC_CLOCK
*
*/
#ifndef __S3C2410_H
#define __S3C2410_H
/* keywoard : ClockParameter */
/*************** Clock Parameter **********/
#define FCLK 203000000
#define HCLK (FCLK/2)
#define PCLK (HCLK/2)
#define UCLK 48000000
#define BUSWIDTH (32)
/********************************************/
/* keywoard : Phy2Vir */
#define S3C2410_MEM_SIZE (32*1024*1024)
#define MEM_SIZE S3C2410_MEM_SIZE
/* Used in arm/kernel/setup.c */
/* used in asm/kernel/setup.c and asm/arch/arch.c */
#define PA_SDRAM_BASE 0x30000000 /* used in asm/arch/arch.c */
//BEGIN CHANGED TOMTOM
#define RAMDISK_DN_ADDR 0x31000000 /* used in asm/arch/arch.c */
//END CHANGED TOMTOM
#define ZIP_RAMDISK_SIZE (10*1024*1024) /* used in asm/arch/arch.c */
/* if CONFIG_BLK_DEV_RAM_SIZE not defined */
#define BLK_DEV_RAM_SIZE (8*1024*1024)
/*** S3C2410 Register Address Part ***************************
*If you change this mapping between Physical and Virtual
*YOU MUST CHNAGE MACRO in the include/asm/arch-s3c2410/memory.h
* ex) __Distance_PA_VA
*and also SDRAM Mapping must be changed becasue __Distance_PA_VA is
* applied to IO Register and SDRAM
*/
/* Be careful !!!!
* PAGE_OFFSET + VMALLOC_END = 0xD0000000
*/
#define VA_IO_BASE0 (0xD0000000)
#define VA_IO_BASE1 (0xE0000000)
#define VA_IO_BASE2 (0xD8000000) /* CS8900A */
#define PA_MEM_CTR_BASE (0x48000000)/* used int asm/arch/mm.c */
#define VA_MEM_CTR_BASE (VA_IO_BASE0+0x08000000)
#define PA_USB_BASE (0x49000000)
#define VA_USB_BASE (VA_IO_BASE0+0x09000000)
#define PA_INT_BASE (0x4A000000)
#define VA_INT_BASE (VA_IO_BASE0+0x0A000000)
#define PA_DMA_BASE (0x4B000000)
#define VA_DMA_BASE (VA_IO_BASE0+0x0B000000)
#define PA_CKPO_BASE (0x4C000000)
#define VA_CKPO_BASE (VA_IO_BASE0+0x0C000000)
#define PA_LCD_BASE (0x4D000000)
#define VA_LCD_BASE (VA_IO_BASE0+0x0D000000)
#define PA_NAND_BASE (0x4E000000)
#define VA_NAND_BASE (VA_IO_BASE0+0x0E000000)
#define PA_UART_BASE (0x50000000)
#define VA_UART_BASE (VA_IO_BASE1+0x00000000)
#define PA_TIMER_BASE (0x51000000)
#define VA_TIMER_BASE (VA_IO_BASE1+0x01000000)
#define PA_UD_BASE (0x52000000) /* WATCH DOG AND USB DEVICE */
#define VA_UD_BASE (VA_IO_BASE1+0x02000000) /* WATCH DOG AND USB DEVICE */
#define PA_WD_BASE (0x53000000)
#define VA_WD_BASE (VA_IO_BASE1+0x03000000)
#define PA_IIC_BASE (0x54000000)
#define VA_IIC_BASE (VA_IO_BASE1+0x04000000)
#define PA_IIS_BASE (0x55000000)
#define VA_IIS_BASE (VA_IO_BASE1+0x05000000)
#define PA_IO_PORT_BASE (0x56000000)
#define VA_IO_PORT_BASE (VA_IO_BASE1+0x06000000)
#define PA_RTC_BASE (0x57000000)
#define VA_RTC_BASE (VA_IO_BASE1+0x07000000)
#define PA_ADC_BASE (0x58000000)
#define VA_ADC_BASE (VA_IO_BASE1+0x08000000)
#define PA_SPI_BASE (0x59000000)
#define VA_SPI_BASE (VA_IO_BASE1+0x09000000)
#define PA_SD_BASE (0x5A000000)
#define VA_SD_BASE (VA_IO_BASE1+0x0A000000)
#define PA_CS8900A_BASE (0x19000000) /* nGCS3 +0x10000000 */
#define VA_CS8900A_BASE (VA_IO_BASE2+0x18000000) /* 0xF0000000 */
// Memory control
#define rBWSCON (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x00)) //Bus width & wait status
#define rBANKCON0 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x04)) //Boot ROM control
#define rBANKCON1 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x08)) //BANK1 control
#define rBANKCON2 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x0c)) //BANK2 cControl
#define rBANKCON3 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x10)) //BANK3 control
#define rBANKCON4 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x14)) //BANK4 control
#define rBANKCON5 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x18)) //BANK5 control
#define rBANKCON6 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x1c)) //BANK6 control
#define rBANKCON7 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x20)) //BANK7 control
#define rREFRESH (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x24)) //DRAM/SDRAM refresh
#define rBANKSIZE (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x28)) //Flexible Bank Size
#define rMRSRB6 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x2c)) //Mode register set for SDRAM
#define rMRSRB7 (*(volatile unsigned *)(VA_MEM_CTR_BASE+0x30)) //Mode register set for SDRAM
// USB Host
// INTERRUPT
#define rSRCPND (*(volatile unsigned *)(VA_INT_BASE+0x00)) //Interrupt request status
#define rINTMOD (*(volatile unsigned *)(VA_INT_BASE+0x04)) //Interrupt mode control
#define rINTMSK (*(volatile unsigned *)(VA_INT_BASE+0x08)) //Interrupt mask control
#define rPRIORITY (*(volatile unsigned *)(VA_INT_BASE+0x0a)) //IRQ priority control
#define rINTPND (*(volatile unsigned *)(VA_INT_BASE+0x10)) //Interrupt request status
#define rINTOFFSET (*(volatile unsigned *)(VA_INT_BASE+0x14)) //Interruot request source offset
#define rSUBSRCPND (*(volatile unsigned *)(VA_INT_BASE+0x18)) //Sub source pending
#define rINTSUBMSK (*(volatile unsigned *)(VA_INT_BASE+0x1c)) //Interrupt sub mask
// DMA
#define rDISRC0 (*(volatile unsigned *)(VA_DMA_BASE+0x00)) //DMA 0 Initial source
#define rDISRCC0 (*(volatile unsigned *)(VA_DMA_BASE+0x04)) //DMA 0 Initial source control
#define rDIDST0 (*(volatile unsigned *)(VA_DMA_BASE+0x08)) //DMA 0 Initial Destination
#define rDIDSTC0 (*(volatile unsigned *)(VA_DMA_BASE+0x0c)) //DMA 0 Initial Destination control
#define rDCON0 (*(volatile unsigned *)(VA_DMA_BASE+0x10)) //DMA 0 Control
#define rDSTAT0 (*(volatile unsigned *)(VA_DMA_BASE+0x14))//DMA 0 Status
#define rDCSRC0 (*(volatile unsigned *)(VA_DMA_BASE+0x18))//DMA 0 Current source
#define rDCDST0 (*(volatile unsigned *)(VA_DMA_BASE+0x1c))//DMA 0 Current destination
#define rDMASKTRIG0 (*(volatile unsigned *)(VA_DMA_BASE+0x20))//DMA 0 Mask trigger
#define rDISRC1 (*(volatile unsigned *)(VA_DMA_BASE+0x40))//DMA 1 Initial source
#define rDISRCC1 (*(volatile unsigned *)(VA_DMA_BASE+0x44))//DMA 1 Initial source control
#define rDIDST1 (*(volatile unsigned *)(VA_DMA_BASE+0x48))//DMA 1 Initial Destination
#define rDIDSTC1 (*(volatile unsigned *)(VA_DMA_BASE+0x4c))//DMA 1 Initial Destination control
#define rDCON1 (*(volatile unsigned *)(VA_DMA_BASE+0x50))//DMA 1 Control
#define rDSTAT1 (*(volatile unsigned *)(VA_DMA_BASE+0x54))//DMA 1 Status
#define rDCSRC1 (*(volatile unsigned *)(VA_DMA_BASE+0x58))//DMA 1 Current source
#define rDCDST1 (*(volatile unsigned *)(VA_DMA_BASE+0x5c))//DMA 1 Current destination
#define rDMASKTRIG1 (*(volatile unsigned *)(VA_DMA_BASE+0x60))//DMA 1 Mask trigger
#define rDISRC2 (*(volatile unsigned *)(VA_DMA_BASE+0x80))//DMA 2 Initial source
#define rDISRCC2 (*(volatile unsigned *)(VA_DMA_BASE+0x84))//DMA 2 Initial source control
#define rDIDST2 (*(volatile unsigned *)(VA_DMA_BASE+0x88))//DMA 2 Initial Destination
#define rDIDSTC2 (*(volatile unsigned *)(VA_DMA_BASE+0x8c))//DMA 2 Initial Destination control
#define rDCON2 (*(volatile unsigned *)(VA_DMA_BASE+0x90))//DMA 2 Control
#define rDSTAT2 (*(volatile unsigned *)(VA_DMA_BASE+0x94))//DMA 2 Status
#define rDCSRC2 (*(volatile unsigned *)(VA_DMA_BASE+0x98))//DMA 2 Current source
#define rDCDST2 (*(volatile unsigned *)(VA_DMA_BASE+0x9c))//DMA 2 Current destination
#define rDMASKTRIG2 (*(volatile unsigned *)(VA_DMA_BASE+0xa0))//DMA 2 Mask trigger
#define rDISRC3 (*(volatile unsigned *)(VA_DMA_BASE+0xc0))//DMA 3 Initial source
#define rDISRCC3 (*(volatile unsigned *)(VA_DMA_BASE+0xc4))//DMA 3 Initial source control
#define rDIDST3 (*(volatile unsigned *)(VA_DMA_BASE+0xc8))//DMA 3 Initial Destination
#define rDIDSTC3 (*(volatile unsigned *)(VA_DMA_BASE+0xcc))//DMA 3 Initial Destination control
#define rDCON3 (*(volatile unsigned *)(VA_DMA_BASE+0xd0))//DMA 3 Control
#define rDSTAT3 (*(volatile unsigned *)(VA_DMA_BASE+0xd4))//DMA 3 Status
#define rDCSRC3 (*(volatile unsigned *)(VA_DMA_BASE+0xd8))//DMA 3 Current source
#define rDCDST3 (*(volatile unsigned *)(VA_DMA_BASE+0xdc))//DMA 3 Current destination
#define rDMASKTRIG3 (*(volatile unsigned *)(VA_DMA_BASE+0xe0))//DMA 3 Mask trigger
/* DMA Device Address Reg. channel [0..3] */
#define DMASp 0x40 /* DMA control reg. Space [byte] */
#define ARRAY_DISRC(Nb) ((volatile unsigned *)(VA_DMA_BASE+(Nb)*DMASp))
/* USED s3c2410_init_dma functions in arch/arm/mach-s3c2410/dma-s3c2410.c */
/*
STAT 00 = it indicates DMA controller ready
01 = DMA controller BUSY
*/
#define DSTAT_STAT_READY 0x000000
#define DSTAT_STAT_BUSY 0x100000
#define DMASKTRIG_STOP 0x4 /* 0100 */
#define DMASKTRIG_START 0x0 /* */
#define DMASKTRIG_ON 0x2
#define DMASKTRIG_OFF 0x0
#define DMASKTRIG_NO_SW_TRIG 0x0
/* DMA CONTROL REGISTER FlAG */
#define DCON_HS_MODE ( 0x1 << 30)
#define DCON_SYNC_AHB ( 0x1 << 29)
#define DCON_INT_ENABLE ( 0x1 << 28)
#define DCON_TSZ_BURST ( 0x1 << 27)
#define DCON_WHSR_MODE ( 0x1 << 26)
#define DCON_HWSRCSEL_I2SDO ( 0x00 << 24)
#define DCON_HW_SEL ( 0x1 << 23)
#define DCON_NO_AUTO_RELOAD ( 0x1 << 22)
#define DCON_DSZ_HWORD ( 0x1 << 20)
// CLOCK & POWER MANAGEMENT
#define rLOCKTIME (*(volatile unsigned *)(VA_CKPO_BASE+0x00))//PLL lock time counter
#define rMPLLCON (*(volatile unsigned *)(VA_CKPO_BASE+0x04)) //MPLL Control
#define rUPLLCON (*(volatile unsigned *)(VA_CKPO_BASE+0x08)) //UPLL Control
#define rCLKCON (*(volatile unsigned *)(VA_CKPO_BASE+0x0c)) //Clock generator control
#define rCLKSLOW (*(volatile unsigned *)(VA_CKPO_BASE+0x10)) //Slow clock control
#define rCLKDIVN (*(volatile unsigned *)(VA_CKPO_BASE+0x14)) //Clock divider control
// LCD CONTROLLER
#define rLCDCON1 (*(volatile unsigned *)(VA_LCD_BASE+0x00)) //LCD control 1
#define rLCDCON2 (*(volatile unsigned *)(VA_LCD_BASE+0x04)) //LCD control 2
#define rLCDCON3 (*(volatile unsigned *)(VA_LCD_BASE+0x08)) //LCD control 3
#define rLCDCON4 (*(volatile unsigned *)(VA_LCD_BASE+0x0c)) //LCD control 4
#define rLCDCON5 (*(volatile unsigned *)(VA_LCD_BASE+0x10)) //LCD control 5
#define rLCDSADDR1 (*(volatile unsigned *)(VA_LCD_BASE+0x14)) //STN/TFT Frame buffer start address 1
#define rLCDSADDR2 (*(volatile unsigned *)(VA_LCD_BASE+0x18)) //STN/TFT Frame buffer start address 2
#define rLCDSADDR3 (*(volatile unsigned *)(VA_LCD_BASE+0x1c)) //STN/TFT Virtual screen address set
#define rREDLUT (*(volatile unsigned *)(VA_LCD_BASE+0x20)) //STN Red lookup table
#define rGREENLUT (*(volatile unsigned *)(VA_LCD_BASE+0x24)) //STN Green lookup table
#define rBLUELUT (*(volatile unsigned *)(VA_LCD_BASE+0x28)) //STN Blue lookup table
#define rDITHMODE (*(volatile unsigned *)(VA_LCD_BASE+0x4c)) //STN Dithering mode
#define rTPAL (*(volatile unsigned *)(VA_LCD_BASE+0x50)) //TFT Temporary palette
#define rLCDINTPND (*(volatile unsigned *)(VA_LCD_BASE+0x54)) //LCD Interrupt pending
#define rLCDSRCPND (*(volatile unsigned *)(VA_LCD_BASE+0x58)) //LCD Interrupt source
#define rLCDINTMSK (*(volatile unsigned *)(VA_LCD_BASE+0x5c)) //LCD Interrupt mask
#define rLPCSEL (*(volatile unsigned *)(VA_LCD_BASE+0x60)) //LPC3600 Control
#define PALETTE 0x4d000400 //Palette start address
/*
* LCD Parameter
* Used in drivers/video/s3c2410fb.c
*/
#define TFT240_320 1
/* Used in s3c2410fb.c */
#define LCD_TYPE TFT240_320
#define CURRENT_LCD_X 240 /* used in Touch Screen */
#define CURRENT_LCD_Y 320 /* used in Touch Screen */
#define MVAL (13)
#define MVAL_USED (0)
#define M5D(n) ((n) & 0x1fffff)
#if (LCD_TYPE == TFT240_320 )
#define VBPD ((5-1)&0xff)
#define VFPD ((5-1)&0xff)
#define VSPW ((2-1)&0x3f)
#define HBPD ((128-1)&0x7f)
#define HFPD ((256-1)&0xff)
#define HSPW ((24-1)&0xff)
#define CLKVAL_STN_MONO (22)
//69.14hz @60Mhz,WLH=16clk,WDLY=16clk,LINEBLANK=1*8,VD=4
#define CLKVAL_STN_GRAY (12)
//124hz @60Mhz,WLH=16clk,WDLY=16clk,LINEBLANK=1*8,VD=4
#define CLKVAL_CSTN (8)
//135hz @60Mhz,WLH=16clk,WDLY=16clk,LINEBLANK=1*8,VD=8
#define CLKVAL_TFT (3)
#endif
#define U8 unsigned char
// NAND flash
#define rNFCONF (*(volatile unsigned *)(VA_NAND_BASE+0x00)) //NAND Flash configuration
#define rNFCMD (*(volatile U8 *)(VA_NAND_BASE+0x04)) //NADD Flash command
#define rNFADDR (*(volatile U8 *)(VA_NAND_BASE+0x08)) //NAND Flash address
#define rNFDATA (*(volatile U8 *)(VA_NAND_BASE+0x0c)) //NAND Flash data
#define rNFSTAT (*(volatile unsigned *)(VA_NAND_BASE+0x10)) //NAND Flash operation status
#define rNFECC (*(volatile unsigned *)(VA_NAND_BASE+0x14)) //NAND Flash ECC
#define rNFECC0 (*(volatile U8 *)(VA_NAND_BASE+0x14))
#define rNFECC1 (*(volatile U8 *)(VA_NAND_BASE+0x15))
#define rNFECC2 (*(volatile U8 *)(VA_NAND_BASE+0x16))
/*** used drivers/mtd/nand **********************/
#define NF_CMD(cmd) {rNFCMD=cmd;}
#define NF_ADDR(addr) {rNFADDR=addr;}
#define NF_nFCE_L() {rNFCONF&=~(1<<11);}
#define NF_nFCE_H() {rNFCONF|=(1<<11);}
#define NF_RSTECC() {rNFCONF|=(1<<12);}
#define NF_RDDATA() (rNFDATA)
#define NF_WRDATA(data) {rNFDATA=data;}
#define NF_WAITRB() {while(!(rNFSTAT&(1<<0)));}
#define NAND_CTL_S3C_WAIT 0x100 /* Dummy Value >= 0x100 */
/* used mtd/nand/NAND.c s3c2410_nand.c*/
// UART
#define rULCON0 (*(volatile unsigned *)(VA_UART_BASE+0x00)) //UART 0 Line control
#define rUCON0 (*(volatile unsigned *)(VA_UART_BASE+0x04)) //UART 0 Control
#define rUFCON0 (*(volatile unsigned *)(VA_UART_BASE+0x08)) //UART 0 FIFO control
#define rUMCON0 (*(volatile unsigned *)(VA_UART_BASE+0x0c)) //UART 0 Modem control
#define rUTRSTAT0 (*(volatile unsigned *)(VA_UART_BASE+0x10)) //UART 0 Tx/Rx status
#define rUERSTAT0 (*(volatile unsigned *)(VA_UART_BASE+0x14)) //UART 0 Rx error status
#define rUFSTAT0 (*(volatile unsigned *)(VA_UART_BASE+0x18)) //UART 0 FIFO status
#define rUMSTAT0 (*(volatile unsigned *)(VA_UART_BASE+0x1c)) //UART 0 Modem status
#define rUBRDIV0 (*(volatile unsigned *)(VA_UART_BASE+0x28)) //UART 0 Baud rate divisor
#define rULCON1 (*(volatile unsigned *)(VA_UART_BASE+0x4000)) //UART 1 Line control
#define rUCON1 (*(volatile unsigned *)(VA_UART_BASE+0x4004)) //UART 1 Control
#define rUFCON1 (*(volatile unsigned *)(VA_UART_BASE+0x4008)) //UART 1 FIFO control
#define rUMCON1 (*(volatile unsigned *)(VA_UART_BASE+0x400c)) //UART 1 Modem control
#define rUTRSTAT1 (*(volatile unsigned *)(VA_UART_BASE+0x4010)) //UART 1 Tx/Rx status
#define rUERSTAT1 (*(volatile unsigned *)(VA_UART_BASE+0x4014)) //UART 1 Rx error status
#define rUFSTAT1 (*(volatile unsigned *)(VA_UART_BASE+0x4018)) //UART 1 FIFO status
#define rUMSTAT1 (*(volatile unsigned *)(VA_UART_BASE+0x401c)) //UART 1 Modem status
#define rUBRDIV1 (*(volatile unsigned *)(VA_UART_BASE+0x4028)) //UART 1 Baud rate divisor
#define rULCON2 (*(volatile unsigned *)(VA_UART_BASE+0x8000)) //UART 2 Line control
#define rUCON2 (*(volatile unsigned *)(VA_UART_BASE+0x8004)) //UART 2 Control
#define rUFCON2 (*(volatile unsigned *)(VA_UART_BASE+0x8008)) //UART 2 FIFO control
#define rUMCON2 (*(volatile unsigned *)(VA_UART_BASE+0x800c)) //UART 2 Modem control
#define rUTRSTAT2 (*(volatile unsigned *)(VA_UART_BASE+0x8010)) //UART 2 Tx/Rx status
#define rUERSTAT2 (*(volatile unsigned *)(VA_UART_BASE+0x8014)) //UART 2 Rx error status
#define rUFSTAT2 (*(volatile unsigned *)(VA_UART_BASE+0x8018)) //UART 2 FIFO status
#define rUMSTAT2 (*(volatile unsigned *)(VA_UART_BASE+0x801c)) //UART 2 Modem status
#define rUBRDIV2 (*(volatile unsigned *)(VA_UART_BASE+0x8028)) //UART 2 Baud rate divisor
#ifdef __BIG_ENDIAN
#define rUTXH0 (*(volatile unsigned char *)(VA_UART_BASE+0x23)) //UART 0 Transmission Hold
#define rURXH0 (*(volatile unsigned char *)(VA_UART_BASE+0x27)) //UART 0 Receive buffer
#define rUTXH1 (*(volatile unsigned char *)(VA_UART_BASE+0x4023)) //UART 1 Transmission Hold
#define rURXH1 (*(volatile unsigned char *)(VA_UART_BASE+0x4027)) //UART 1 Receive buffer
#define rUTXH2 (*(volatile unsigned char *)(VA_UART_BASE+0x8023)) //UART 2 Transmission Hold
#define rURXH2 (*(volatile unsigned char *)(VA_UART_BASE+0x8027)) //UART 2 Receive buffer
#define WrUTXH0(ch) (*(volatile unsigned char *)(VA_UART_BASE+0x23))=(unsigned char)(ch)
#define RdURXH0() (*(volatile unsigned char *)(VA_UART_BASE+0x27))
#define WrUTXH1(ch) (*(volatile unsigned char *)(VA_UART_BASE+0x4023))=(unsigned char)(ch)
#define RdURXH1() (*(volatile unsigned char *)(VA_UART_BASE+0x4027))
#define WrUTXH2(ch) (*(volatile unsigned char *)(VA_UART_BASE+0x8023))=(unsigned char)(ch)
#define RdURXH2() (*(volatile unsigned char *)(VA_UART_BASE+0x8027))
#define UTXH0 (VA_UART_BASE+0x20+3) //Byte_access address by DMA
#define URXH0 (VA_UART_BASE+0x24+3)
#define UTXH1 (VA_UART_BASE+0x4020+3)
#define URXH1 (VA_UART_BASE+0x4024+3)
#define UTXH2 (VA_UART_BASE+0x8020+3)
#define URXH2 (VA_UART_BASE+0x8024+3)
#else //Little Endian
#define rUTXH0 (*(volatile unsigned char *)(VA_UART_BASE+0x20)) //UART 0 Transmission Hold
#define rURXH0 (*(volatile unsigned char *)(VA_UART_BASE+0x24)) //UART 0 Receive buffer
#define rUTXH1 (*(volatile unsigned char *)(VA_UART_BASE+0x4020)) //UART 1 Transmission Hold
#define rURXH1 (*(volatile unsigned char *)(VA_UART_BASE+0x4024)) //UART 1 Receive buffer
#define rUTXH2 (*(volatile unsigned char *)(VA_UART_BASE+0x8020)) //UART 2 Transmission Hold
#define rURXH2 (*(volatile unsigned char *)(VA_UART_BASE+0x8024)) //UART 2 Receive buffer
#define WrUTXH0(ch) (*(volatile unsigned char *)(VA_UART_BASE+0x20))=(unsigned char)(ch)
#define RdURXH0() (*(volatile unsigned char *)(VA_UART_BASE+0x24))
#define WrUTXH1(ch) (*(volatile unsigned char *)(VA_UART_BASE+0x4020))=(unsigned char)(ch)
#define RdURXH1() (*(volatile unsigned char *)(VA_UART_BASE+0x4024))
#define WrUTXH2(ch) (*(volatile unsigned char *)(VA_UART_BASE+0x8020))=(unsigned char)(ch)
#define RdURXH2() (*(volatile unsigned char *)(VA_UART_BASE+0x8024))
#define UTXH0 (VA_UART_BASE+0x20) //Byte_access address by DMA
#define URXH0 (VA_UART_BASE+0x24)
#define UTXH1 (VA_UART_BASE+0x4020)
#define URXH1 (VA_UART_BASE+0x4024)
#define UTXH2 (VA_UART_BASE+0x8020)
#define URXH2 (VA_UART_BASE+0x8024)
#endif
// PWM TIMER
#define rTCFG0 (*(volatile unsigned *)(VA_TIMER_BASE+0x00)) //Timer 0 configuration
#define rTCFG1 (*(volatile unsigned *)(VA_TIMER_BASE+0x04)) //Timer 1 configuration
#define rTCON (*(volatile unsigned *)(VA_TIMER_BASE+0x08)) //Timer control
#define rTCNTB0 (*(volatile unsigned *)(VA_TIMER_BASE+0x0c)) //Timer count buffer 0
#define rTCMPB0 (*(volatile unsigned *)(VA_TIMER_BASE+0x10)) //Timer compare buffer 0
#define rTCNTO0 (*(volatile unsigned *)(VA_TIMER_BASE+0x14)) //Timer count observation 0
#define rTCNTB1 (*(volatile unsigned *)(VA_TIMER_BASE+0x18)) //Timer count buffer 1
#define rTCMPB1 (*(volatile unsigned *)(VA_TIMER_BASE+0x1c)) //Timer compare buffer 1
#define rTCNTO1 (*(volatile unsigned *)(VA_TIMER_BASE+0x20)) //Timer count observation 1
#define rTCNTB2 (*(volatile unsigned *)(VA_TIMER_BASE+0x24)) //Timer count buffer 2
#define rTCMPB2 (*(volatile unsigned *)(VA_TIMER_BASE+0x28)) //Timer compare buffer 2
#define rTCNTO2 (*(volatile unsigned *)(VA_TIMER_BASE+0x2c)) //Timer count observation 2
#define rTCNTB3 (*(volatile unsigned *)(VA_TIMER_BASE+0x30)) //Timer count buffer 3
#define rTCMPB3 (*(volatile unsigned *)(VA_TIMER_BASE+0x34)) //Timer compare buffer 3
#define rTCNTO3 (*(volatile unsigned *)(VA_TIMER_BASE+0x38)) //Timer count observation 3
#define rTCNTB4 (*(volatile unsigned *)(VA_TIMER_BASE+0x3c)) //Timer count buffer 4
#define rTCNTO4 (*(volatile unsigned *)(VA_TIMER_BASE+0x40)) //Timer count observation 4
/* Searching Keyword: OS_Timer */
#define SYS_TIMER234_PRESCALER 202
#define SYS_TIMER01_PRESCALER 24 /* for Touch Screen */
#define SYS_TIMER4_MUX 1 /* 1/4 */
#define SYS_TIMER4_DIVIDER 4
#define SYS_TIMER1_MUX 0 /* 1/2 */
#define SYS_TIMER1_DIVIDER 2
#define TOUCH_RESCHED_PERIOD 10 /* 10 ms */
#define RESCHED_PERIOD 10 /* 10 ms */
#define HZ 100
// USB DEVICE
#ifdef __BIG_ENDIAN
<ERROR IF BIG_ENDIAN>
#define rFUNC_ADDR_REG (*(volatile unsigned char *)(VA_UD_BASE+0x143)) //Function address
#define rPWR_REG (*(volatile unsigned char *)(VA_UD_BASE+0x147)) //Power management
#define rEP_INT_REG (*(volatile unsigned char *)(VA_UD_BASE+0x14b)) //EP Interrupt pending and clear
#define rUSB_INT_REG (*(volatile unsigned char *)(VA_UD_BASE+0x15b)) //USB Interrupt pending and clear
#define rEP_INT_EN_REG (*(volatile unsigned char *)(VA_UD_BASE+0x15f)) //Interrupt enable
#define rUSB_INT_EN_REG (*(volatile unsigned char *)(VA_UD_BASE+0x16f))
#define rFRAME_NUM1_REG (*(volatile unsigned char *)(VA_UD_BASE+0x173)) //Frame number lower byte
#define rFRAME_NUM2_REG (*(volatile unsigned char *)(VA_UD_BASE+0x177)) //Frame number higher byte
#define rINDEX_REG (*(volatile unsigned char *)(VA_UD_BASE+0x17b)) //Register index
#define rMAXP_REG (*(volatile unsigned char *)(VA_UD_BASE+0x183)) //Endpoint max packet
#define rEP0_CSR (*(volatile unsigned char *)(VA_UD_BASE+0x187)) //Endpoint 0 status
#define rIN_CSR1_REG (*(volatile unsigned char *)(VA_UD_BASE+0x187)) //In endpoint control status
#define rIN_CSR2_REG (*(volatile unsigned char *)(VA_UD_BASE+0x18b))
#define rOUT_CSR1_REG (*(volatile unsigned char *)(VA_UD_BASE+0x193) //Out endpoint control status
#define rOUT_CSR2_REG (*(volatile unsigned char *)(VA_UD_BASE+0x197))
#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)(VA_UD_BASE+0x19b)) //Endpoint out write count
#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)(VA_UD_BASE+0x19f))
#define rEP0_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1c3)) //Endpoint 0 FIFO
#define rEP1_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1c7)) //Endpoint 1 FIFO
#define rEP2_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1cb)) //Endpoint 2 FIFO
#define rEP3_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1cf)) //Endpoint 3 FIFO
#define rEP4_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1d3)) //Endpoint 4 FIFO
#define rEP1_DMA_CON (*(volatile unsigned char *)(VA_UD_BASE+0x203)) //EP1 DMA interface control
#define rEP1_DMA_UNIT (*(volatile unsigned char *)(VA_UD_BASE+0x207)) //EP1 DMA Tx unit counter
#define rEP1_DMA_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x20b)) //EP1 DMA Tx FIFO counter
#define rEP1_DMA_TTC_L (*(volatile unsigned char *)(VA_UD_BASE+0x20f)) //EP1 DMA total Tx counter
#define rEP1_DMA_TTC_M (*(volatile unsigned char *)(VA_UD_BASE+0x213))
#define rEP1_DMA_TTC_H (*(volatile unsigned char *)(VA_UD_BASE+0x217))
#define rEP2_DMA_CON (*(volatile unsigned char *)(VA_UD_BASE+0x21b)) //EP2 DMA interface control
#define rEP2_DMA_UNIT (*(volatile unsigned char *)(VA_UD_BASE+0x21f)) //EP2 DMA Tx unit counter
#define rEP2_DMA_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x223)) //EP2 DMA Tx FIFO counter
#define rEP2_DMA_TTC_L (*(volatile unsigned char *)(VA_UD_BASE+0x227)) //EP2 DMA total Tx counter
#define rEP2_DMA_TTC_M (*(volatile unsigned char *)(VA_UD_BASE+0x22b)
#define rEP2_DMA_TTC_H (*(volatile unsigned char *)(VA_UD_BASE+0x22f)
#define rEP3_DMA_CON (*(volatile unsigned char *)(VA_UD_BASE+0x243)) //EP3 DMA interface control
#define rEP3_DMA_UNIT (*(volatile unsigned char *)(VA_UD_BASE+0x247)) //EP3 DMA Tx unit counter
#define rEP3_DMA_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x24b)) //EP3 DMA Tx FIFO counter
#define rEP3_DMA_TTC_L (*(volatile unsigned char *)(VA_UD_BASE+0x24f)) //EP3 DMA total Tx counter
#define rEP3_DMA_TTC_M (*(volatile unsigned char *)(VA_UD_BASE+0x253))
#define rEP3_DMA_TTC_H (*(volatile unsigned char *)(VA_UD_BASE+0x257))
#define rEP4_DMA_CON (*(volatile unsigned char *)(VA_UD_BASE+0x25b)) //EP4 DMA interface control
#define rEP4_DMA_UNIT (*(volatile unsigned char *)(VA_UD_BASE+0x25f)) //EP4 DMA Tx unit counter
#define rEP4_DMA_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x263)) //EP4 DMA Tx FIFO counter
#define rEP4_DMA_TTC_L (*(volatile unsigned char *)(VA_UD_BASE+0x267)) //EP4 DMA total Tx counter
#define rEP4_DMA_TTC_M (*(volatile unsigned char *)(VA_UD_BASE+0x26b))
#define rEP4_DMA_TTC_H (*(volatile unsigned char *)(VA_UD_BASE+0x26f))
#else // Little Endian
#define rFUNC_ADDR_REG (*(volatile unsigned char *)(VA_UD_BASE+0x140)) //Function address
#define rPWR_REG (*(volatile unsigned char *)(VA_UD_BASE+0x144)) //Power management
#define rEP_INT_REG (*(volatile unsigned char *)(VA_UD_BASE+0x148)) //EP Interrupt pending and clear
#define rUSB_INT_REG (*(volatile unsigned char *)(VA_UD_BASE+0x158)) //USB Interrupt pending and clear
#define rEP_INT_EN_REG (*(volatile unsigned char *)(VA_UD_BASE+0x15c)) //Interrupt enable
#define rUSB_INT_EN_REG (*(volatile unsigned char *)(VA_UD_BASE+0x16c))
#define rFRAME_NUM1_REG (*(volatile unsigned char *)(VA_UD_BASE+0x170)) //Frame number lower byte
#define rFRAME_NUM2_REG (*(volatile unsigned char *)(VA_UD_BASE+0x174)) //Frame number higher byte
#define rINDEX_REG (*(volatile unsigned char *)(VA_UD_BASE+0x178)) //Register index
#define rMAXP_REG (*(volatile unsigned char *)(VA_UD_BASE+0x180)) //Endpoint max packet
#define rEP0_CSR (*(volatile unsigned char *)(VA_UD_BASE+0x184)) //Endpoint 0 status
#define rIN_CSR1_REG (*(volatile unsigned char *)(VA_UD_BASE+0x184)) //In endpoint control status
#define rIN_CSR2_REG (*(volatile unsigned char *)(VA_UD_BASE+0x188))
#define rOUT_CSR1_REG (*(volatile unsigned char *)(VA_UD_BASE+0x190)) //Out endpoint control status
#define rOUT_CSR2_REG (*(volatile unsigned char *)(VA_UD_BASE+0x194))
#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)(VA_UD_BASE+0x198)) //Endpoint out write count
#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)(VA_UD_BASE+0x19c))
#define rEP0_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1c0)) //Endpoint 0 FIFO
#define rEP1_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1c4)) //Endpoint 1 FIFO
#define rEP2_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1c8)) //Endpoint 2 FIFO
#define rEP3_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1cc)) //Endpoint 3 FIFO
#define rEP4_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x1d0)) //Endpoint 4 FIFO
#define rEP1_DMA_CON (*(volatile unsigned char *)(VA_UD_BASE+0x200)) //EP1 DMA interface control
#define rEP1_DMA_UNIT (*(volatile unsigned char *)(VA_UD_BASE+0x204)) //EP1 DMA Tx unit counter
#define rEP1_DMA_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x208)) //EP1 DMA Tx FIFO counter
#define rEP1_DMA_TTC_L (*(volatile unsigned char *)(VA_UD_BASE+0x20c)) //EP1 DMA total Tx counter
#define rEP1_DMA_TTC_M (*(volatile unsigned char *)(VA_UD_BASE+0x210))
#define rEP1_DMA_TTC_H (*(volatile unsigned char *)(VA_UD_BASE+0x214))
#define rEP2_DMA_CON (*(volatile unsigned char *)(VA_UD_BASE+0x218)) //EP2 DMA interface control
#define rEP2_DMA_UNIT (*(volatile unsigned char *)(VA_UD_BASE+0x21c)) //EP2 DMA Tx unit counter
#define rEP2_DMA_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x220)) //EP2 DMA Tx FIFO counter
#define rEP2_DMA_TTC_L (*(volatile unsigned char *)(VA_UD_BASE+0x224)) //EP2 DMA total Tx counter
#define rEP2_DMA_TTC_M (*(volatile unsigned char *)(VA_UD_BASE+0x228))
#define rEP2_DMA_TTC_H (*(volatile unsigned char *)(VA_UD_BASE+0x22c))
#define rEP3_DMA_CON (*(volatile unsigned char *)(VA_UD_BASE+0x240)) //EP3 DMA interface control
#define rEP3_DMA_UNIT (*(volatile unsigned char *)(VA_UD_BASE+0x244)) //EP3 DMA Tx unit counter
#define rEP3_DMA_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x248)) //EP3 DMA Tx FIFO counter
#define rEP3_DMA_TTC_L (*(volatile unsigned char *)(VA_UD_BASE+0x24c)) //EP3 DMA total Tx counter
#define rEP3_DMA_TTC_M (*(volatile unsigned char *)(VA_UD_BASE+0x250))
#define rEP3_DMA_TTC_H (*(volatile unsigned char *)(VA_UD_BASE+0x254))
#define rEP4_DMA_CON (*(volatile unsigned char *)(VA_UD_BASE+0x258)) //EP4 DMA interface control
#define rEP4_DMA_UNIT (*(volatile unsigned char *)(VA_UD_BASE+0x25c)) //EP4 DMA Tx unit counter
#define rEP4_DMA_FIFO (*(volatile unsigned char *)(VA_UD_BASE+0x260)) //EP4 DMA Tx FIFO counter
#define rEP4_DMA_TTC_L (*(volatile unsigned char *)(VA_UD_BASE+0x264)) //EP4 DMA total Tx counter
#define rEP4_DMA_TTC_M (*(volatile unsigned char *)(VA_UD_BASE+0x268))
#define rEP4_DMA_TTC_H (*(volatile unsigned char *)(VA_UD_BASE+0x26c))
#endif // __BIG_ENDIAN
// WATCH DOG TIMER
#define rWTCON (*(volatile unsigned *)(VA_WD_BASE+0x00)) //Watch-dog timer mode
#define rWTDAT (*(volatile unsigned *)(VA_WD_BASE+0x04)) //Watch-dog timer data
#define rWTCNT (*(volatile unsigned *)(VA_WD_BASE+0x08)) //Eatch-dog timer count
// IIC
#define rIICCON (*(volatile unsigned *)(VA_IIC_BASE+0x00)) //IIC control
#define rIICSTAT (*(volatile unsigned *)(VA_IIC_BASE+0x04)) //IIC status
#define rIICADD (*(volatile unsigned *)(VA_IIC_BASE+0x08)) //IIC address
#define rIICDS (*(volatile unsigned *)(VA_IIC_BASE+0x0c)) //IIC data shift
// IIS
#define rIISCON (*(volatile unsigned *)(VA_IIS_BASE+0x00)) //IIS Control
#define rIISMOD (*(volatile unsigned *)(VA_IIS_BASE+0x04)) //IIS Mode
#define rIISPSR (*(volatile unsigned *)(VA_IIS_BASE+0x08)) //IIS Prescaler
#define rIISFCON (*(volatile unsigned *)(VA_IIS_BASE+0x0c)) //IIS FIFO control
#ifdef __BIG_ENDIAN
#define IISFIFO ((volatile unsigned short *)(PA_IIS_BASE+0x12)) //IIS FIFO entry
#else //Little Endian
#define IISFIFO ((volatile unsigned short *)(PA_IIS_BASE+0x10)) //IIS FIFO entry
/* used in drivers/sound/s3c2410-uda1341.c asm/arm/arch/dma.h */
#endif
/*-----------------------------------------------------*/
// Used in arch/arm/mach-s3c2410/dma-s3c2410.c
/* IISCON Flag */
#define LEFT_CHANNEL ( 0 << 8)
#define RIGHT_CHANNEL ( 1 << 8)
#define TX_FIFO_READY ( 1 << 7)
#define RX_FIFO_READY ( 1 << 6)
#define TX_DMA_REQUEST_ENABLE ( 1 << 5)
#define RX_DMA_REQUEST_ENABLE ( 1 << 4)
#define TX_CNANNEL_IDLE ( 1 << 3)
#define RX_CNANNEL_IDLE ( 1 << 2)
#define PRESCALER_ENABLE ( 1 << 1)
#define IIS_INTERFACE_ENABLE ( 1 << 0)
#define IIS_INTERFACE_DISABLE ( 0 << 0)
/* IISMOD FLAG */
#define MASTER_MODE ( 0 << 8)
#define SLAVE_MODE ( 1 << 8)
#define TRANSMIT_MODE ( 2 << 6)
#define LOW_LEFT_CH ( 0 << 5)
#define IIS_FORMAT ( 0 << 4)
#define SERIAL_8BIT_PER_CH ( 0 << 3)
#define SERIAL_16BIT_PER_CH ( 1 << 3)
#define MASTER_CODECLK_256FS ( 0 << 2)
#define MASTER_CODECLK_384FS ( 1 << 2)
#define SERIAL_BIT_CLOCK_16FS ( 0 << 0)
#define SERIAL_BIT_CLOCK_32FS ( 1 << 0)
#define SERIAL_BIT_CLOCK_48FS ( 2 << 0)
/* IISFCON FLAG */
#define TX_DMA_ACCESS_MODE ( 1 << 11)
#define RX_DMA_ACCESS_MODE ( 1 << 10)
#define TX_FIFO_ENABLE ( 1 << 9 )
#define RX_FIFO_ENABLE ( 1 << 8 )
/* Searching Keyword: CODEC_CLOCK */
/* Used in drivers/sound/s3c2410-uda1341.c */
#if (FCLK == 112800000)
#define AUDIO_CODEC_CLOCK 256
#else
#define AUDIO_CODEC_CLOCK 384
#endif
// I/O PORT
#define rGPACON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x00)) //Port A control
#define rGPADAT (*(volatile unsigned *)(VA_IO_PORT_BASE+0x04)) //Port A data
#define rGPBCON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x10)) //Port B control
#define rGPBDAT (*(volatile unsigned *)(VA_IO_PORT_BASE+0x14)) //Port B data
#define rGPBUP (*(volatile unsigned *)(VA_IO_PORT_BASE+0x18)) //Pull-up control B
#define rGPCCON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x20)) //Port C control
#define rGPCDAT (*(volatile unsigned *)(VA_IO_PORT_BASE+0x24)) //Port C data
#define rGPCUP (*(volatile unsigned *)(VA_IO_PORT_BASE+0x28)) //Pull-up control C
#define rGPDCON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x30)) //Port D control
#define rGPDDAT (*(volatile unsigned *)(VA_IO_PORT_BASE+0x34)) //Port D data
#define rGPDUP (*(volatile unsigned *)(VA_IO_PORT_BASE+0x38)) //Pull-up control D
#define rGPECON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x40)) //Port E control
#define rGPEDAT (*(volatile unsigned *)(VA_IO_PORT_BASE+0x44)) //Port E data
#define rGPEUP (*(volatile unsigned *)(VA_IO_PORT_BASE+0x48)) //Pull-up control E
#define rGPFCON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x50)) //Port F control
#define rGPFDAT (*(volatile unsigned *)(VA_IO_PORT_BASE+0x54)) //Port F data
#define rGPFUP (*(volatile unsigned *)(VA_IO_PORT_BASE+0x58)) //Pull-up control F
#define rGPGCON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x60)) //Port G control
#define rGPGDAT (*(volatile unsigned *)(VA_IO_PORT_BASE+0x64)) //Port G data
#define rGPGUP (*(volatile unsigned *)(VA_IO_PORT_BASE+0x68)) //Pull-up control G
#define rGPHCON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x70)) //Port H control
#define rGPHDAT (*(volatile unsigned *)(VA_IO_PORT_BASE+0x74)) //Port H data
#define rGPHUP (*(volatile unsigned *)(VA_IO_PORT_BASE+0x78)) //Pull-up control H
#define rMISCCR (*(volatile unsigned *)(VA_IO_PORT_BASE+0x80)) //Miscellaneous control
#define rDCLKCON (*(volatile unsigned *)(VA_IO_PORT_BASE+0x84)) //DCLK0/1 control
#define rEXTINT0 (*(volatile unsigned *)(VA_IO_PORT_BASE+0x88)) //External interrupt control register 0
#define rEXTINT1 (*(volatile unsigned *)(VA_IO_PORT_BASE+0x8c)) //External interrupt control register 1
#define rEXTINT2 (*(volatile unsigned *)(VA_IO_PORT_BASE+0x90)) //External interrupt control register 2
#define rEINTFLT0 (*(volatile unsigned *)(VA_IO_PORT_BASE+0x94)) //Reserved
#define rEINTFLT1 (*(volatile unsigned *)(VA_IO_PORT_BASE+0x98)) //Reserved
#define rEINTFLT2 (*(volatile unsigned *)(VA_IO_PORT_BASE+0x9c)) //External interrupt filter control register 2
#define rEINTFLT3 (*(volatile unsigned *)(VA_IO_PORT_BASE+0xa0)) //External interrupt filter control register 3
#define rEINTMSK (*(volatile unsigned *)(VA_IO_PORT_BASE+0xa4)) //External interrupt mask
#define rEINTPND (*(volatile unsigned *)(VA_IO_PORT_BASE+0xa8)) //External interrupt pending
#define rGSTATUS0 (*(volatile unsigned *)(VA_IO_PORT_BASE+0xac)) //External pin status
#define rGSTATUS1 (*(volatile unsigned *)(VA_IO_PORT_BASE+0xb0)) //Chip ID(0x32410000)
#define rGSTATUS2 (*(volatile unsigned *)(VA_IO_PORT_BASE+0xb4)) //Reset type
#define rGSTATUS3 (*(volatile unsigned *)(VA_IO_PORT_BASE+0xb8)) //Saved data0(32-bit) before entering POWER_OFF mode
#define rGSTATUS4 (*(volatile unsigned *)(VA_IO_PORT_BASE+0xbc)) //Saved data0(32-bit) before entering POWER_OFF mode
// RTC
#ifdef __BIG_ENDIAN
#define rRTCCON (*(volatile unsigned char *)(VA_RTC_BASE+0x43)) //RTC control
#define rTICNT (*(volatile unsigned char *)(VA_RTC_BASE+0x47)) //Tick time count
#define rRTCALM (*(volatile unsigned char *)(VA_RTC_BASE+0x53)) //RTC alarm control
#define rALMSEC (*(volatile unsigned char *)(VA_RTC_BASE+0x57)) //Alarm second
#define rALMMIN (*(volatile unsigned char *)(VA_RTC_BASE+0x5b)) //Alarm minute
#define rALMHOUR (*(volatile unsigned char *)(VA_RTC_BASE+0x5f)) //Alarm Hour
#define rALMDAY (*(volatile unsigned char *)(VA_RTC_BASE+0x63)) //Alarm day
#define rALMMON (*(volatile unsigned char *)(VA_RTC_BASE+0x67)) //Alarm month
#define rALMYEAR (*(volatile unsigned char *)(VA_RTC_BASE+0x6b)) //Alarm year
#define rRTCRST (*(volatile unsigned char *)(VA_RTC_BASE+0x6f)) //RTC round reset
#define rBCDSEC (*(volatile unsigned char *)(VA_RTC_BASE+0x73)) //BCD second
#define rBCDMIN (*(volatile unsigned char *)(VA_RTC_BASE+0x77)) //BCD minute
#define rBCDHOUR (*(volatile unsigned char *)(VA_RTC_BASE+0x7b)) //BCD hour
#define rBCDDAY (*(volatile unsigned char *)(VA_RTC_BASE+0x7f)) //BCD day
#define rBCDDATE (*(volatile unsigned char *)(VA_RTC_BASE+0x83)) //BCD date
#define rBCDMON (*(volatile unsigned char *)(VA_RTC_BASE+0x87)) //BCD month
#define rBCDYEAR (*(volatile unsigned char *)(VA_RTC_BASE+0x8b)) //BCD year
#else //Little Endian
#define rRTCCON (*(volatile unsigned char *)(VA_RTC_BASE+0x40)) //RTC control
#define rTICNT (*(volatile unsigned char *)(VA_RTC_BASE+0x44)) //Tick time count
#define rRTCALM (*(volatile unsigned char *)(VA_RTC_BASE+0x50)) //RTC alarm control
#define rALMSEC (*(volatile unsigned char *)(VA_RTC_BASE+0x54)) //Alarm second
#define rALMMIN (*(volatile unsigned char *)(VA_RTC_BASE+0x58)) //Alarm minute
#define rALMHOUR (*(volatile unsigned char *)(VA_RTC_BASE+0x5c)) //Alarm Hour
#define rALMDAY (*(volatile unsigned char *)(VA_RTC_BASE+0x60)) //Alarm day
#define rALMMON (*(volatile unsigned char *)(VA_RTC_BASE+0x64)) //Alarm month
#define rALMYEAR (*(volatile unsigned char *)(VA_RTC_BASE+0x68)) //Alarm year
#define rRTCRST (*(volatile unsigned char *)(VA_RTC_BASE+0x6c)) //RTC round reset
#define rBCDSEC (*(volatile unsigned char *)(VA_RTC_BASE+0x70)) //BCD second
#define rBCDMIN (*(volatile unsigned char *)(VA_RTC_BASE+0x74)) //BCD minute
#define rBCDHOUR (*(volatile unsigned char *)(VA_RTC_BASE+0x78)) //BCD hour
#define rBCDDAY (*(volatile unsigned char *)(VA_RTC_BASE+0x7c)) //BCD day
#define rBCDDATE (*(volatile unsigned char *)(VA_RTC_BASE+0x80)) //BCD date
#define rBCDMON (*(volatile unsigned char *)(VA_RTC_BASE+0x84)) //BCD month
#define rBCDYEAR (*(volatile unsigned char *)(VA_RTC_BASE+0x88)) //BCD year
#endif //RTC
// ADC
#define rADCCON (*(volatile unsigned *)(VA_ADC_BASE+0x00)) //ADC control
#define rADCTSC (*(volatile unsigned *)(VA_ADC_BASE+0x04)) //ADC touch screen control
#define rADCDLY (*(volatile unsigned *)(VA_ADC_BASE+0x08)) //ADC start or Interval Delay
#define rADCDAT0 (*(volatile unsigned *)(VA_ADC_BASE+0x0c)) //ADC conversion data 0
#define rADCDAT1 (*(volatile unsigned *)(VA_ADC_BASE+0x10)) //ADC conversion data 1
#define ADCPRS 49 /* used s3c2410_ts.c */
//BEGIN CHANGED TOMTOM(used to be 20000)
#define ADC_DELAY_TIME 65535 /* used s3c2410_ts.c */
//END CHANGED TOMTOM(used to be 20000)
// SPI
#define rSPCON0 (*(volatile unsigned *)(VA_SPI_BASE+0x00)) //SPI0 control
#define rSPSTA0 (*(volatile unsigned *)(VA_SPI_BASE+0x04)) //SPI0 status
#define rSPPIN0 (*(volatile unsigned *)(VA_SPI_BASE+0x08)) //SPI0 pin control
#define rSPPRE0 (*(volatile unsigned *)(VA_SPI_BASE+0x0c)) //SPI0 baud rate prescaler
#define rSPTDAT0 (*(volatile unsigned *)(VA_SPI_BASE+0x10)) //SPI0 Tx data
#define rSPRDAT0 (*(volatile unsigned *)(VA_SPI_BASE+0x14)) //SPI0 Rx data
#define rSPCON1 (*(volatile unsigned *)(VA_SPI_BASE+0x20)) //SPI1 control
#define rSPSTA1 (*(volatile unsigned *)(VA_SPI_BASE+0x24)) //SPI1 status
#define rSPPIN1 (*(volatile unsigned *)(VA_SPI_BASE+0x28)) //SPI1 pin control
#define rSPPRE1 (*(volatile unsigned *)(VA_SPI_BASE+0x2c)) //SPI1 baud rate prescaler
#define rSPTDAT1 (*(volatile unsigned *)(VA_SPI_BASE+0x30)) //SPI1 Tx data
#define rSPRDAT1 (*(volatile unsigned *)(VA_SPI_BASE+0x34)) //SPI1 Rx data
// SD Interface
//#define rSDICON (*(volatile unsigned *)0x5a000000)) //SDI control
#define rSDICON (*(volatile unsigned *)(VA_SD_BASE+0x00)) //SDI control
//#define rSDIPRE (*(volatile unsigned *)0x5a000004)) //SDI baud rate prescaler
#define rSDIPRE (*(volatile unsigned *)(VA_SD_BASE+0x04)) //SDI baud rate prescaler
//#define rSDICARG (*(volatile unsigned *)0x5a000008)) //SDI command argument
#define rSDICARG (*(volatile unsigned *)(VA_SD_BASE+0x08)) //SDI command argument
//#define rSDICCON (*(volatile unsigned *)0x5a00000c)) //SDI command control
#define rSDICCON (*(volatile unsigned *)(VA_SD_BASE+0x0c)) //SDI command control
//#define rSDICSTA (*(volatile unsigned *)0x5a000010)) //SDI command status
#define rSDICSTA (*(volatile unsigned *)(VA_SD_BASE+0x10)) //SDI command status
//#define rSDIRSP0 (*(volatile unsigned *)0x5a000014)) //SDI response 0
#define rSDIRSP0 (*(volatile unsigned *)(VA_SD_BASE+0x14)) //SDI response 0
//#define rSDIRSP1 (*(volatile unsigned *)0x5a000018)) //SDI response 1
#define rSDIRSP1 (*(volatile unsigned *)(VA_SD_BASE+0x18)) //SDI response 1
//#define rSDIRSP2 (*(volatile unsigned *)0x5a00001c)) //SDI response 2
#define rSDIRSP2 (*(volatile unsigned *)(VA_SD_BASE+0x1c)) //SDI response 2
//#define rSDIRSP3 (*(volatile unsigned *)0x5a000020)) //SDI response 3
#define rSDIRSP3 (*(volatile unsigned *)(VA_SD_BASE+0x20)) //SDI response 3
//#define rSDIDTIMER (*(volatile unsigned *)0x5a000024)) //SDI data/busy timer
#define rSDIDTIMER (*(volatile unsigned *)(VA_SD_BASE+0x24)) //SDI data/busy timer
//#define rSDIBSIZE (*(volatile unsigned *)0x5a000028)) //SDI block size
#define rSDIBSIZE (*(volatile unsigned *)(VA_SD_BASE+0x28)) //SDI block size
//#define rSDIDCON (*(volatile unsigned *)0x5a00002c)) //SDI data control
#define rSDIDCON (*(volatile unsigned *)(VA_SD_BASE+0x2c)) //SDI data control
//#define rSDIDCNT (*(volatile unsigned *)0x5a000030)) //SDI data remain counter
#define rSDIDCNT (*(volatile unsigned *)(VA_SD_BASE+0x30)) //SDI data remain counter
//#define rSDIDSTA (*(volatile unsigned *)0x5a000034)) //SDI data status
#define rSDIDSTA (*(volatile unsigned *)(VA_SD_BASE+0x34)) //SDI data status
//#define rSDIFSTA (*(volatile unsigned *)0x5a000038)) //SDI FIFO status
#define rSDIFSTA (*(volatile unsigned *)(VA_SD_BASE+0x38)) //SDI FIFO status
//#define rSDIIMSK (*(volatile unsigned *)0x5a000040)) //SDI interrupt mask
#define rSDIIMSK (*(volatile unsigned *)(VA_SD_BASE+0x40)) //SDI interrupt mask
#ifdef __BIG_ENDIAN
#define rSDIDAT (*(volatile unsigned *)(VA_SD_BASE+0x3f)) //SDI data
#define SDIDAT (PA_SD_BASE+0x3f)
#else // Little Endian
#define rSDIDAT (*(volatile unsigned *)(VA_SD_BASE+0x3c)) //SDI data
#define SDIDAT (PA_SD_BASE+0x3c )
#endif //SD Interface
#if 0
// SD Interface
#define rSDICON ((*(volatile unsigned *)0x5a000000)) //SDI control
#define rSDIPRE ((*(volatile unsigned *)0x5a000004)) //SDI baud rate prescaler
#define rSDICARG ((*(volatile unsigned *)0x5a000008)) //SDI command argument
#define rSDICCON ((*(volatile unsigned *)0x5a00000c)) //SDI command control
#define rSDICSTA ((*(volatile unsigned *)0x5a000010)) //SDI command status
#define rSDIRSP0 ((*(volatile unsigned *)0x5a000014)) //SDI response 0
#define rSDIRSP1 ((*(volatile unsigned *)0x5a000018)) //SDI response 1
#define rSDIRSP2 ((*(volatile unsigned *)0x5a00001c)) //SDI response 2
#define rSDIRSP3 ((*(volatile unsigned *)0x5a000020)) //SDI response 3
#define rSDIDTIMER ((*(volatile unsigned *)0x5a000024)) //SDI data/busy timer
#define rSDIBSIZE ((*(volatile unsigned *)0x5a000028)) //SDI block size
#define rSDIDCON ((*(volatile unsigned *)0x5a00002c)) //SDI data control
#define rSDIDCNT ((*(volatile unsigned *)0x5a000030)) //SDI data remain counter
#define rSDIDSTA ((*(volatile unsigned *)0x5a000034)) //SDI data status
#define rSDIFSTA ((*(volatile unsigned *)0x5a000038)) //SDI FIFO status
#define rSDIIMSK ((*(volatile unsigned *)0x5a000040)) //SDI interrupt mask
#ifdef __BIG_ENDIAN
#define rSDIDAT (*(volatile unsigned *)(VA_SD_BASE+0x3f)) //SDI data
#define SDIDAT (VA_SD_BASE+0x3f)
#else // Little Endian
#define rSDIDAT (*(volatile unsigned *)(VA_SD_BASE+0x3c) //SDI data
#define SDIDAT (VA_SD_BASE+0x3c )
#endif //SD Interface
#endif
// PENDING BIT
#define BIT_EINT0 (0x1)
#define BIT_EINT1 (0x1<<1)
#define BIT_EINT2 (0x1<<2)
#define BIT_EINT3 (0x1<<3)
#define BIT_EINT4_7 (0x1<<4)
#define BIT_EINT8_23 (0x1<<5)
#define BIT_NOTUSED6 (0x1<<6)
#define BIT_BAT_FLT (0x1<<7)
#define BIT_TICK (0x1<<8)
#define BIT_WDT (0x1<<9)
#define BIT_TIMER0 (0x1<<10)
#define BIT_TIMER1 (0x1<<11)
#define BIT_TIMER2 (0x1<<12)
#define BIT_TIMER3 (0x1<<13)
#define BIT_TIMER4 (0x1<<14)
#define BIT_UART2 (0x1<<15)
#define BIT_LCD (0x1<<16)
#define BIT_DMA0 (0x1<<17)
#define BIT_DMA1 (0x1<<18)
#define BIT_DMA2 (0x1<<19)
#define BIT_DMA3 (0x1<<20)
#define BIT_SDI (0x1<<21)
#define BIT_SPI0 (0x1<<22)
#define BIT_UART1 (0x1<<23)
#define BIT_NOTUSED24 (0x1<<24)
#define BIT_USBD (0x1<<25)
#define BIT_USBH (0x1<<26)
#define BIT_IIC (0x1<<27)
#define BIT_UART0 (0x1<<28)
#define BIT_SPI1 (0x1<<29)
#define BIT_RTC (0x1<<30)
#define BIT_ADC (0x1<<31)
#define BIT_ALLMSK (0xffffffff)
#define BIT_SUB_ALLMSK (0x7ff)
#define BIT_SUB_ADC (0x1<<10)
#define BIT_SUB_TC (0x1<<9)
#define BIT_SUB_ERR2 (0x1<<8)
#define BIT_SUB_TXD2 (0x1<<7)
#define BIT_SUB_RXD2 (0x1<<6)
#define BIT_SUB_ERR1 (0x1<<5)
#define BIT_SUB_TXD1 (0x1<<4)
#define BIT_SUB_RXD1 (0x1<<3)
#define BIT_SUB_ERR0 (0x1<<2)
#define BIT_SUB_TXD0 (0x1<<1)
#define BIT_SUB_RXD0 (0x1<<0)
#if 1
#define ClearPending(bit) {rSRCPND = bit;rINTPND = bit;rINTPND;}
#endif
/* keyword : SER_BAUD */
#define SER_BAUD_9600 9600
#define SER_BAUD_14400 11400
#define SER_BAUD_19200 19200
#define SER_BAUD_38400 38400
#define SER_BAUD_57600 57600
#define SER_BAUD_115200 115200
#define CURRENT_BAUD_RATE SER_BAUD_115200
/* Used in serial_s3c2410.c ,uncompress.h */
/**** Choose one among three ****/
#define CURRENT_SERIALUART0 0
//#define CURRENT_SERIALUART1 1
//#define CURRENT_SERIALUART2 2
/********************************/
/*** if you want to change UART , Change the below value ****/
#define CUR_UART_STATUS_OFFSET 0x10 /* UART 0 */
/* Used in debug-armv.S */
#define CUR_UART_UTXH_OFFSET 0x20 /* UART 0 */
/* Used in debug-armv.S */
/*************************************************************/
#endif /* __S3C2410_H */
[-- Attachment #3: memory.h --]
[-- Type: application/octet-stream, Size: 3544 bytes --]
/*
* linux/include/asm-arm/arch-s3c2410/memory.h
*
* Copyright (C) 2002 SAMSUNG ELECTRONICS
* SW.LEE <hitchcar@sec.samsung.com>
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#include <linux/config.h>
/*
* Task size: 3GB
*/
#define TASK_SIZE (0xc0000000UL)
#define TASK_SIZE_26 (0x04000000UL)
/*
* This decides where the kernel will search for a free chunk of vm
* space during mmap's.
*/
#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
/*
* Page offset: 3GB
*/
#define PAGE_OFFSET (0xC0000000UL)
/*
* Physical SDRAM offset is 0x30000000 on the S3C2410
*/
#define PHYS_OFFSET (0x30000000UL)
/*
* We take advantage of the fact that physical and virtual address can be the
* same. The NUMA code is handling the large holes that might exist between
* all memory banks.
*/
#define __virt_to_phys__is_a_macro
#define __phys_to_virt__is_a_macro
#if 0
/* Modified by SW.LEE */
#define __virt_to_phys(x) ( ((x)- PAGE_OFFSET)+PHYS_OFFSET )
#define __phys_to_virt(x) ( ((x)- PHYS_OFFSET)+PAGE_OFFSET )
#else /* Modified to support discontiguous memory */
#define __virt_to_phys(x) ((x) <= 0xc07fffff) ? ((x) - 0x90000000) : ((x) <= 0xc0ffffff) ? ((x) - 0x8f800000) : ((x) <= 0xc17fffff) ? ((x) - 0x8f000000) : ((x) - 0x8e800000)
#define __phys_to_virt(x) ((x) <= 0x307fffff) ? ((x) + 0x90000000) : ((x) <= 0x317fffff) ? ((x) + 0x8f800000) : ((x) <= 0x327fffff) ? ((x) + 0x8f000000) : ((x) + 0x8e800000)
#endif
/*
* Virtual view <-> DMA view memory address translations
* virt_to_bus: Used to translate the virtual address to an
* address suitable to be passed to set_dma_addr
* bus_to_virt: Used to convert an address for DMA operations
* to an address that the kernel can use.
*
*
*/
#define __Distance_PA_VA 0x90000000
#define __virt_to_bus__is_a_macro
#define __bus_to_virt__is_a_macro
#define __virt_to_bus(x) __virt_to_phys (x)
#define __bus_to_virt(x) __phys_to_virt (x)
#if 1 /* for non contiguous memory support */
#define NR_NODES 4
/*
* Given a kernel address, find the home node of the underlying memory.
*/
#define KVADDR_TO_NID(addr) (((unsigned long)(addr) - 0xc0000000) >> 23)
/*
* Given a physical address, convert it to a node id.
*/
#define PHYS_TO_NID(addr) KVADDR_TO_NID(__phys_to_virt(addr))
/*
* Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
* and returns the mem_map of that node.
*/
#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr)))
/*
* Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
* and returns the index corresponding to the appropriate page in the
* node's mem_map.
*/
#define LOCAL_MAP_NR(kvaddr) (((unsigned long)(kvaddr) & 0x007fffff) >> PAGE_SHIFT)
/*
* Given a kaddr, virt_to_page returns a pointer to the corresponding
* mem_map entry.
*/
#define virt_to_page(kaddr) (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr))
/*
* VALID_PAGE returns a non-zero value if given page pointer is valid.
* This assumes all node's mem_maps are stored within the node they refer to.
*/
#define VALID_PAGE(page) (KVADDR_TO_NID(page) < NR_NODES) && ((unsigned)((page) - NODE_MEM_MAP(KVADDR_TO_NID(page))) < NODE_DATA(KVADDR_TO_NID(page))->node_size)
#else
#define PHYS_TO_NID(addr) (0) /* node 0 */
#define NR_NODES 1
/* used in fucntion bootmem_init arch/arm/mm/init.c */
#endif
#endif /* __ASM_ARCH_MEMORY_H */
[-- Attachment #4: arch.c --]
[-- Type: application/octet-stream, Size: 3069 bytes --]
/*
* linux/arch/arm/mach-s3c2410/arch.c
*
* Copyright (C) 2002 SAMSUNG ELECTRONICS
* SW.LEE (hitchcar@sec.samsung.com)
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
extern void __init HWs3c2410_map_io(void);
extern void __init s3c2410_init_irq(void);
static void __init
fixup_s3c2410(struct machine_desc *desc, struct param_struct *params,
char **cmdline, struct meminfo *mi)
{
/*********
* nGCS6 0 (SDRAM Bank 1) has one memory bank at start address 0x30000000
* Memory Size 64Mbye and
* becasue nCCS7 (SDRAM Bank 2) has a flexible start address ,
* we don't need bank[].node if we would use 128Mbyte Memory
*
*/
#if 0 /* Added for testing */
mi->bank[0].start = PA_SDRAM_BASE;
mi->bank[0].size = S3C2410_MEM_SIZE;
mi->bank[0].node = 0;
mi->nr_banks = 1;
#else /* Added to support discontiguous memory map */
printk ("\nEntering fixup_s3c2410 ()");
mi->bank[0].start = 0x30000000;
mi->bank[0].size = (8 * 1024 * 1024);
mi->bank[0].node = 0;
mi->bank[1].start = 0x31000000;
mi->bank[1].size = (8 * 1024 * 1024);
mi->bank[1].node = 1;
mi->bank[2].start = 0x32000000;
mi->bank[2].size = (8 * 1024 * 1024);
mi->bank[2].node = 2;
mi->bank[3].start = 0x33000000;
mi->bank[3].size = (8 * 1024 * 1024);
mi->bank[3].node = 3;
mi->nr_banks = 4;
#endif
ROOT_DEV = MKDEV(RAMDISK_MAJOR,1);
#ifdef CONFIG_BLK_DEV_RAM_SIZE
setup_ramdisk( 1, 0, 0, CONFIG_BLK_DEV_RAM_SIZE);
#else
setup_ramdisk( 1, 0, 0, BLK_DEV_RAM_SIZE);
#endif
setup_initrd( __phys_to_virt(RAMDISK_DN_ADDR), ZIP_RAMDISK_SIZE);
}
static void __init s3c2410_map_io(void)
{
HWs3c2410_map_io();
MIST_PRINT ("\nLeaving s3c2410_map_io ()");
}
MACHINE_START(S3C2410, "SAMSUNG ELECTRONICS Co., Ltd")
MAINTAINER("SW.LEE (hitchcar@sec.samsung.com)")
BOOT_MEM(PA_SDRAM_BASE,PA_UART_BASE,VA_UART_BASE)
BOOT_PARAMS(PA_SDRAM_BASE+0x100)
FIXUP(fixup_s3c2410)
MAPIO(s3c2410_map_io)
INITIRQ(s3c2410_init_irq)
MACHINE_END
^ permalink raw reply
* Re: Linux on a Motorola MPC5200 ?
From: Dale Farnsworth @ 2004-01-27 18:28 UTC (permalink / raw)
To: Sylvain Munaut, linuxppc-embedded
In-Reply-To: <40169FC6.1040805@246tNt.com>
On Tue, Jan 27, 2004 at 05:28:38PM +0000, Sylvain Munaut wrote:
> Hello
>
> I'd like to run linux on a future custom board based on a motorola
> MPC5200 and I have a few questions :
>
> - What is the current support for it ? Stable ... I'd need the DMA (
> well, their 'special DMA fancy stuff' ;) ), ATA, DDR, I2S, AC97 mainly.
> - I'd really like to run a 2.6 kernel on it. If it's not yet ported to
> the 2.6 what is the current ppc support for 2.6 ? Would I "only" need to
> port MPC specifics ?
> - Where can I find the current stuff ? I've taken what is in
> ppc.bkbits.net/linux-2.4-mpc5xxx, is there other things I should consider ?
>
> Thanks for any informations
>
> Munaut Sylvain
I think you've found pretty much what's available. I haven't
seen a 2.6 port for the 5200 yet.
-Dale Farnsworth
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply
* Re: Netfilter and Squid
From: Cody Harris @ 2004-01-27 18:28 UTC (permalink / raw)
To: netfilter
In-Reply-To: <1075226090.1898.78.camel@jasiiitosh.nexusmgmt.com>
> I usually set Squid up as a transparent proxy, i.e., I use the REDIRECT
> iptables target to redirect any Internet bound traffic on port 80 to
> port 3128 on the same server (and thus to Squid) whereas all other
> traffic just obeys the normal iptables rules - John
REDIRECT table or chain? Webmin shows me: filter, mangle, and nat.
root@darna:/usr/local/squid/sbin# iptables -L
Chain INPUT (policy DROP)
target prot opt source destination
ACCEPT all -- anywhere anywhere
ACCEPT all -- anywhere anywhere
ACCEPT udp -- anywhere anywhere udp
ACCEPT icmp -- anywhere anywhere
ACCEPT tcp -- anywhere anywhere tcp spt:http
ACCEPT tcp -- anywhere anywhere tcp spt:https
ACCEPT tcp -- anywhere anywhere tcp spt:pop3
ACCEPT tcp -- anywhere anywhere tcp spt:smtp
ACCEPT tcp -- anywhere anywhere tcp dpts:32000:40000
> --
> John A. Sullivan III
> Chief Technology Officer
> Nexus Management
> +1 207-985-7880
> john.sullivan@nexusmgmt.com
> ---
> If you are interested in helping to develop a GPL enterprise class
> VPN/Firewall/Security device management console, please visit
> http://iscs.sourceforge.net
>
>
--
+------------------+-----------------------------+
| Cody Harris | --------------------------- |
| ---------------- | --------------------------- |
+------------------+-------+---------------------+---+
| *Sigh*. No key. |
+----------------------------------------------------+
^ permalink raw reply
* Re: linux-2.6.1 x86_64 : STACK_TOP and text/data
From: Andi Kleen @ 2004-01-27 18:24 UTC (permalink / raw)
To: dada1; +Cc: linux-kernel
In-Reply-To: <40162E9A.1080005@cosmosbay.com.suse.lists.linux.kernel>
dada1 <dada1@cosmosbay.com> writes:
> Anybody knows why STACK_TOP is defined to 0xc0000000 in x86_64 ?
STACK_TOP is only for 32bit a.out executables running on x86-64
ELF 32bit and 64bit programs use different defaults.
-Andi
^ permalink raw reply
* Re: [LARTC] R2Q
From: Stef Coene @ 2004-01-27 18:23 UTC (permalink / raw)
To: lartc
In-Reply-To: <marc-lartc-102179583208377@msgid-missing>
On Tuesday 27 January 2004 00:04, Mihai Vlad wrote:
> Hello again,
>
> I need to change the R2Q for my script, as setting the quantum manually for
> each class is painful. Can you tell me exactly where to set R2Q = x?
If you add the htb qdisc.
Stef
--
stef.coene@docum.org
"Using Linux as bandwidth manager"
http://www.docum.org/
#lartc @ irc.openprojects.net
_______________________________________________
LARTC mailing list / LARTC@mailman.ds9a.nl
http://mailman.ds9a.nl/mailman/listinfo/lartc HOWTO: http://lartc.org/
^ permalink raw reply
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