* Re: [PATCH 2/3] drm: uapi: Use SPDX in DRM drivers uAPI headers
From: Laurent Pinchart @ 2020-07-17 2:27 UTC (permalink / raw)
To: Christian König
Cc: Sean Paul, Thomas Hellstrom, Laurent Pinchart, Greg Kroah-Hartman,
dri-devel, Thierry Reding, VMware Graphics, Ben Skeggs,
Alex Deucher, Thomas Gleixner, Gerd Hoffmann
In-Reply-To: <20200622092933.GY20149@phenom.ffwll.local>
Hi Christian,
On Mon, Jun 22, 2020 at 11:29:33AM +0200, Daniel Vetter wrote:
> On Mon, Jun 22, 2020 at 09:58:44AM +0200, Christian König wrote:
> > Am 21.06.20 um 04:07 schrieb Laurent Pinchart:
> > > Most of the DRM drivers uAPI headers are licensed under the MIT license,
> > > and carry copies of the license with slight variations. Replace them
> > > with SPDX headers.
> >
> > My personal opinion is that this is a really good idea, but my professional
> > is that we need the acknowledgment from our legal department for this.
>
> I think official ack from amd on first patch, especially the .rst snippet,
> would be really good indeed.
Any update on this one ?
> > Please separate that change into one for each driver/company/maintainer.
> > Amdgpu, radeon, r128 can be one for example.
I'll do so.
> You can leave all the other legacy drivers in one patch (mga, savage, sis,
> via), since there's likely no one around anymore and will just boil down
> to drm maintainer ack from Dave&me.
>
> > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > ---
> > > include/uapi/drm/amdgpu_drm.h | 19 +------------------
> > > include/uapi/drm/i915_drm.h | 22 +---------------------
> > > include/uapi/drm/mga_drm.h | 20 +-------------------
> > > include/uapi/drm/msm_drm.h | 20 +-------------------
> > > include/uapi/drm/nouveau_drm.h | 20 +-------------------
> > > include/uapi/drm/qxl_drm.h | 20 +-------------------
> > > include/uapi/drm/r128_drm.h | 20 +-------------------
> > > include/uapi/drm/radeon_drm.h | 20 +-------------------
> > > include/uapi/drm/savage_drm.h | 20 +-------------------
> > > include/uapi/drm/sis_drm.h | 21 +--------------------
> > > include/uapi/drm/tegra_drm.h | 19 +------------------
> > > include/uapi/drm/v3d_drm.h | 20 +-------------------
> > > include/uapi/drm/vc4_drm.h | 20 +-------------------
> > > include/uapi/drm/vgem_drm.h | 22 +---------------------
> > > include/uapi/drm/via_drm.h | 20 +-------------------
> > > include/uapi/drm/virtgpu_drm.h | 20 +-------------------
> > > include/uapi/drm/vmwgfx_drm.h | 21 +--------------------
> > > 17 files changed, 17 insertions(+), 327 deletions(-)
> > >
> > > diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> > > index 4e873dcbe68f..c6adda72bec7 100644
> > > --- a/include/uapi/drm/amdgpu_drm.h
> > > +++ b/include/uapi/drm/amdgpu_drm.h
> > > @@ -1,3 +1,4 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
> > > *
> > > * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
> > > @@ -5,24 +6,6 @@
> > > * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
> > > * Copyright 2014 Advanced Micro Devices, Inc.
> > > *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice shall be included in
> > > - * all copies or substantial portions of the Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > > - * OTHER DEALINGS IN THE SOFTWARE.
> > > - *
> > > * Authors:
> > > * Kevin E. Martin <martin@valinux.com>
> > > * Gareth Hughes <gareth@valinux.com>
> > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > > index 14b67cd6b54b..c29e3acb3026 100644
> > > --- a/include/uapi/drm/i915_drm.h
> > > +++ b/include/uapi/drm/i915_drm.h
> > > @@ -1,27 +1,7 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
> > > * All Rights Reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the
> > > - * "Software"), to deal in the Software without restriction, including
> > > - * without limitation the rights to use, copy, modify, merge, publish,
> > > - * distribute, sub license, and/or sell copies of the Software, and to
> > > - * permit persons to whom the Software is furnished to do so, subject to
> > > - * the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the
> > > - * next paragraph) shall be included in all copies or substantial portions
> > > - * of the Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> > > - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> > > - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> > > - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
> > > - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> > > - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> > > - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> > > - *
> > > */
> > > #ifndef _UAPI_I915_DRM_H_
> > > diff --git a/include/uapi/drm/mga_drm.h b/include/uapi/drm/mga_drm.h
> > > index 8c4337548ab5..4415efefe0cf 100644
> > > --- a/include/uapi/drm/mga_drm.h
> > > +++ b/include/uapi/drm/mga_drm.h
> > > @@ -1,3 +1,4 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
> > > * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com
> > > *
> > > @@ -5,25 +6,6 @@
> > > * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
> > > * All rights reserved.
> > > *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > > - * OTHER DEALINGS IN THE SOFTWARE.
> > > - *
> > > * Authors:
> > > * Jeff Hartmann <jhartmann@valinux.com>
> > > * Keith Whitwell <keith@tungstengraphics.com>
> > > diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
> > > index 0b85ed6a3710..189d1a7f7a7b 100644
> > > --- a/include/uapi/drm/msm_drm.h
> > > +++ b/include/uapi/drm/msm_drm.h
> > > @@ -1,25 +1,7 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright (C) 2013 Red Hat
> > > * Author: Rob Clark <robdclark@gmail.com>
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > > - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> > > - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
> > > - * SOFTWARE.
> > > */
> > > #ifndef __MSM_DRM_H__
> > > diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h
> > > index 853a327433d3..555283b49080 100644
> > > --- a/include/uapi/drm/nouveau_drm.h
> > > +++ b/include/uapi/drm/nouveau_drm.h
> > > @@ -1,25 +1,7 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright 2005 Stephane Marchesin.
> > > * All Rights Reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > > - * OTHER DEALINGS IN THE SOFTWARE.
> > > */
> > > #ifndef __NOUVEAU_DRM_H__
> > > diff --git a/include/uapi/drm/qxl_drm.h b/include/uapi/drm/qxl_drm.h
> > > index 880999d2d863..9fbf97ad7272 100644
> > > --- a/include/uapi/drm/qxl_drm.h
> > > +++ b/include/uapi/drm/qxl_drm.h
> > > @@ -1,25 +1,7 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright 2013 Red Hat
> > > * All Rights Reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > > - * OTHER DEALINGS IN THE SOFTWARE.
> > > */
> > > #ifndef QXL_DRM_H
> > > #define QXL_DRM_H
> > > diff --git a/include/uapi/drm/r128_drm.h b/include/uapi/drm/r128_drm.h
> > > index 690e9c62f510..c426e6a1c843 100644
> > > --- a/include/uapi/drm/r128_drm.h
> > > +++ b/include/uapi/drm/r128_drm.h
> > > @@ -1,3 +1,4 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
> > > * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
> > > */
> > > @@ -6,25 +7,6 @@
> > > * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
> > > * All rights reserved.
> > > *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> > > - * DEALINGS IN THE SOFTWARE.
> > > - *
> > > * Authors:
> > > * Gareth Hughes <gareth@valinux.com>
> > > * Kevin E. Martin <martin@valinux.com>
> > > diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
> > > index 490a59cc4532..b5c4ef813a9e 100644
> > > --- a/include/uapi/drm/radeon_drm.h
> > > +++ b/include/uapi/drm/radeon_drm.h
> > > @@ -1,3 +1,4 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*-
> > > *
> > > * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
> > > @@ -5,25 +6,6 @@
> > > * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
> > > * All rights reserved.
> > > *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> > > - * DEALINGS IN THE SOFTWARE.
> > > - *
> > > * Authors:
> > > * Kevin E. Martin <martin@valinux.com>
> > > * Gareth Hughes <gareth@valinux.com>
> > > diff --git a/include/uapi/drm/savage_drm.h b/include/uapi/drm/savage_drm.h
> > > index 0f6eddef74aa..bd5e74348db4 100644
> > > --- a/include/uapi/drm/savage_drm.h
> > > +++ b/include/uapi/drm/savage_drm.h
> > > @@ -1,26 +1,8 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /* savage_drm.h -- Public header for the savage driver
> > > *
> > > * Copyright 2004 Felix Kuehling
> > > * All Rights Reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sub license,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the
> > > - * next paragraph) shall be included in all copies or substantial portions
> > > - * of the Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> > > - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> > > - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> > > - * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
> > > - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
> > > - * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
> > > - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> > > */
> > > #ifndef __SAVAGE_DRM_H__
> > > diff --git a/include/uapi/drm/sis_drm.h b/include/uapi/drm/sis_drm.h
> > > index 3e3f7e989e0b..9f7eb13b1975 100644
> > > --- a/include/uapi/drm/sis_drm.h
> > > +++ b/include/uapi/drm/sis_drm.h
> > > @@ -1,27 +1,8 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /* sis_drv.h -- Private header for sis driver -*- linux-c -*- */
> > > /*
> > > * Copyright 2005 Eric Anholt
> > > * All Rights Reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > > - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> > > - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
> > > - * SOFTWARE.
> > > - *
> > > */
> > > #ifndef __SIS_DRM_H__
> > > diff --git a/include/uapi/drm/tegra_drm.h b/include/uapi/drm/tegra_drm.h
> > > index c4df3c3668b3..98c2f17aa7de 100644
> > > --- a/include/uapi/drm/tegra_drm.h
> > > +++ b/include/uapi/drm/tegra_drm.h
> > > @@ -1,23 +1,6 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice shall be included in
> > > - * all copies or substantial portions of the Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > > - * OTHER DEALINGS IN THE SOFTWARE.
> > > */
> > > #ifndef _UAPI_TEGRA_DRM_H_
> > > diff --git a/include/uapi/drm/v3d_drm.h b/include/uapi/drm/v3d_drm.h
> > > index 1ce746e228d9..7895fb9bc018 100644
> > > --- a/include/uapi/drm/v3d_drm.h
> > > +++ b/include/uapi/drm/v3d_drm.h
> > > @@ -1,24 +1,6 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright © 2014-2018 Broadcom
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > > - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > > - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > > - * IN THE SOFTWARE.
> > > */
> > > #ifndef _V3D_DRM_H_
> > > diff --git a/include/uapi/drm/vc4_drm.h b/include/uapi/drm/vc4_drm.h
> > > index 2cac6277a1d7..14b9a2186eae 100644
> > > --- a/include/uapi/drm/vc4_drm.h
> > > +++ b/include/uapi/drm/vc4_drm.h
> > > @@ -1,24 +1,6 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright © 2014-2015 Broadcom
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > > - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > > - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > > - * IN THE SOFTWARE.
> > > */
> > > #ifndef _UAPI_VC4_DRM_H_
> > > diff --git a/include/uapi/drm/vgem_drm.h b/include/uapi/drm/vgem_drm.h
> > > index bf66f5db6da8..965e1ad00dcb 100644
> > > --- a/include/uapi/drm/vgem_drm.h
> > > +++ b/include/uapi/drm/vgem_drm.h
> > > @@ -1,27 +1,7 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright 2016 Intel Corporation
> > > * All Rights Reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the
> > > - * "Software"), to deal in the Software without restriction, including
> > > - * without limitation the rights to use, copy, modify, merge, publish,
> > > - * distribute, sub license, and/or sell copies of the Software, and to
> > > - * permit persons to whom the Software is furnished to do so, subject to
> > > - * the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the
> > > - * next paragraph) shall be included in all copies or substantial portions
> > > - * of the Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> > > - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> > > - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> > > - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
> > > - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> > > - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> > > - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> > > - *
> > > */
> > > #ifndef _UAPI_VGEM_DRM_H_
> > > diff --git a/include/uapi/drm/via_drm.h b/include/uapi/drm/via_drm.h
> > > index a1e125d42208..d77a21e7eb70 100644
> > > --- a/include/uapi/drm/via_drm.h
> > > +++ b/include/uapi/drm/via_drm.h
> > > @@ -1,25 +1,7 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
> > > * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sub license,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the
> > > - * next paragraph) shall be included in all copies or substantial portions
> > > - * of the Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
> > > - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> > > - * DEALINGS IN THE SOFTWARE.
> > > */
> > > #ifndef _VIA_DRM_H_
> > > #define _VIA_DRM_H_
> > > diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h
> > > index f06a789f34cd..cea0352bc319 100644
> > > --- a/include/uapi/drm/virtgpu_drm.h
> > > +++ b/include/uapi/drm/virtgpu_drm.h
> > > @@ -1,25 +1,7 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /*
> > > * Copyright 2013 Red Hat
> > > * All Rights Reserved.
> > > - *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the "Software"),
> > > - * to deal in the Software without restriction, including without limitation
> > > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > - * and/or sell copies of the Software, and to permit persons to whom the
> > > - * Software is furnished to do so, subject to the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the next
> > > - * paragraph) shall be included in all copies or substantial portions of the
> > > - * Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > > - * THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > > - * OTHER DEALINGS IN THE SOFTWARE.
> > > */
> > > #ifndef VIRTGPU_DRM_H
> > > #define VIRTGPU_DRM_H
> > > diff --git a/include/uapi/drm/vmwgfx_drm.h b/include/uapi/drm/vmwgfx_drm.h
> > > index 02e917507479..728e432f09a1 100644
> > > --- a/include/uapi/drm/vmwgfx_drm.h
> > > +++ b/include/uapi/drm/vmwgfx_drm.h
> > > @@ -1,28 +1,9 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > /**************************************************************************
> > > *
> > > * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
> > > * All Rights Reserved.
> > > *
> > > - * Permission is hereby granted, free of charge, to any person obtaining a
> > > - * copy of this software and associated documentation files (the
> > > - * "Software"), to deal in the Software without restriction, including
> > > - * without limitation the rights to use, copy, modify, merge, publish,
> > > - * distribute, sub license, and/or sell copies of the Software, and to
> > > - * permit persons to whom the Software is furnished to do so, subject to
> > > - * the following conditions:
> > > - *
> > > - * The above copyright notice and this permission notice (including the
> > > - * next paragraph) shall be included in all copies or substantial portions
> > > - * of the Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
> > > - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
> > > - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> > > - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
> > > - * USE OR OTHER DEALINGS IN THE SOFTWARE.
> > > - *
> > > **************************************************************************/
> > > #ifndef __VMWGFX_DRM_H__
--
Regards,
Laurent Pinchart
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply
* [f2fs-dev] [Bug 208565] There may be dead lock for cp_rwsem during checkpoint
From: bugzilla-daemon @ 2020-07-17 2:26 UTC (permalink / raw)
To: linux-f2fs-devel
In-Reply-To: <bug-208565-202145@https.bugzilla.kernel.org/>
https://bugzilla.kernel.org/show_bug.cgi?id=208565
--- Comment #4 from Chao Yu (chao@kernel.org) ---
Passed, we should ask Eric to retest in his enviornment, to make sure there is
actually no regression.
--
You are receiving this mail because:
You are watching the assignee of the bug.
_______________________________________________
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https://lists.sourceforge.net/lists/listinfo/linux-f2fs-devel
^ permalink raw reply
* [PATCH v3 2/4] PCI: mediatek: Use regmap to get shared pcie-cfg base
From: chuanjia.liu @ 2020-07-17 2:22 UTC (permalink / raw)
To: Rob Herring, Lorenzo Pieralisi, linux-pci
Cc: Ryder Lee, srv_heupstream, chuanjia.liu, linux-kernel,
jianjun.wang, Matthias Brugger, linux-mediatek, yong.wu,
Bjorn Helgaas, linux-arm-kernel
In-Reply-To: <20200717022223.1437-1-chuanjia.liu@mediatek.com>
From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
Use regmap to get shared pcie-cfg base and change
the method to get pcie irq.
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
---
drivers/pci/controller/pcie-mediatek.c | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index ebfa7d5a4e2d..659ff9a685b0 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -14,6 +14,7 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
#include <linux/msi.h>
#include <linux/module.h>
#include <linux/of_address.h>
@@ -23,6 +24,7 @@
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
#include <linux/reset.h>
#include "../pci.h"
@@ -205,6 +207,7 @@ struct mtk_pcie_port {
* struct mtk_pcie - PCIe host information
* @dev: pointer to PCIe device
* @base: IO mapped register base
+ * @cfg: IO mapped register map for PCIe config
* @free_ck: free-run reference clock
* @mem: non-prefetchable memory resource
* @ports: pointer to PCIe port information
@@ -214,6 +217,7 @@ struct mtk_pcie_port {
struct mtk_pcie {
struct device *dev;
void __iomem *base;
+ struct regmap *cfg;
struct clk *free_ck;
struct list_head ports;
@@ -650,7 +654,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
return err;
}
- port->irq = platform_get_irq(pdev, port->slot);
+ port->irq = platform_get_irq_byname(pdev, "pcie_irq");
if (port->irq < 0)
return port->irq;
@@ -676,12 +680,11 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
if (!mem)
return -EINVAL;
- /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */
- if (pcie->base) {
- val = readl(pcie->base + PCIE_SYS_CFG_V2);
- val |= PCIE_CSR_LTSSM_EN(port->slot) |
- PCIE_CSR_ASPM_L1_EN(port->slot);
- writel(val, pcie->base + PCIE_SYS_CFG_V2);
+ /* MT7622/MT7629 platforms need to enable LTSSM and ASPM. */
+ if (pcie->cfg) {
+ val = PCIE_CSR_LTSSM_EN(port->slot) |
+ PCIE_CSR_ASPM_L1_EN(port->slot);
+ regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val);
}
/* Assert all reset signals */
@@ -987,6 +990,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
struct device *dev = pcie->dev;
struct platform_device *pdev = to_platform_device(dev);
struct resource *regs;
+ struct device_node *cfg_node;
int err;
/* get shared registers, which are optional */
@@ -999,6 +1003,13 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
}
}
+ cfg_node = of_parse_phandle(dev->of_node, "mediatek,pcie-cfg", 0);
+ if (cfg_node) {
+ pcie->cfg = syscon_node_to_regmap(cfg_node);
+ if (IS_ERR(pcie->cfg))
+ return PTR_ERR(pcie->cfg);
+ }
+
pcie->free_ck = devm_clk_get(dev, "free_ck");
if (IS_ERR(pcie->free_ck)) {
if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER)
--
2.18.0
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^ permalink raw reply related
* [PATCH v3 3/4] arm64: dts: mediatek: Split PCIe node for MT2712/MT7622
From: chuanjia.liu @ 2020-07-17 2:22 UTC (permalink / raw)
To: Rob Herring, Lorenzo Pieralisi, linux-pci
Cc: Ryder Lee, srv_heupstream, chuanjia.liu, linux-kernel,
jianjun.wang, Matthias Brugger, linux-mediatek, yong.wu,
Bjorn Helgaas, linux-arm-kernel
In-Reply-To: <20200717022223.1437-1-chuanjia.liu@mediatek.com>
From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
There are two independent PCIe controllers in MT2712/MT7622 platform,
and each of them should contain an independent MSI domain.
In current architecture, MSI domain will be inherited from the root
bridge, and all of the devices will share the same MSI domain.
Hence that, the PCIe devices will not work properly if the irq number
which required is more than 32.
Split the PCIe node for MT2712/MT7622 platform to fix MSI issue and
comply with the hardware design.
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 75 +++++++++++--------
.../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 16 ++--
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 6 +-
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 68 +++++++++++------
4 files changed, 96 insertions(+), 69 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index db17d0a4ed57..337e56bdbd08 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -915,60 +915,73 @@
};
};
- pcie: pcie@11700000 {
+ pcie1: pcie@112ff000 {
compatible = "mediatek,mt2712-pcie";
device_type = "pci";
- reg = <0 0x11700000 0 0x1000>,
- <0 0x112ff000 0 0x1000>;
- reg-names = "port0", "port1";
+ reg = <0 0x112ff000 0 0x1000>;
+ reg-names = "port1";
#address-cells = <3>;
#size-cells = <2>;
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
- <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
- <&pericfg CLK_PERI_PCIE0>,
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie_irq";
+ clocks = <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
<&pericfg CLK_PERI_PCIE1>;
- clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1";
- phys = <&u3port0 PHY_TYPE_PCIE>, <&u3port1 PHY_TYPE_PCIE>;
- phy-names = "pcie-phy0", "pcie-phy1";
+ clock-names = "sys_ck1", "ahb_ck1";
+ phys = <&u3port1 PHY_TYPE_PCIE>;
+ phy-names = "pcie-phy1";
bus-range = <0x00 0xff>;
- ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
+ ranges = <0x82000000 0 0x11400000 0x0 0x11400000 0 0x300000>;
+ status = "disabled";
- pcie0: pcie@0,0 {
- device_type = "pci";
- status = "disabled";
- reg = <0x0000 0 0 0 0>;
+ slot1: pcie@1,0 {
+ reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie_intc0 0>,
- <0 0 0 2 &pcie_intc0 1>,
- <0 0 0 3 &pcie_intc0 2>,
- <0 0 0 4 &pcie_intc0 3>;
- pcie_intc0: interrupt-controller {
+ interrupt-map = <0 0 0 1 &pcie_intc1 0>,
+ <0 0 0 2 &pcie_intc1 1>,
+ <0 0 0 3 &pcie_intc1 2>,
+ <0 0 0 4 &pcie_intc1 3>;
+ pcie_intc1: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
+ };
- pcie1: pcie@1,0 {
- device_type = "pci";
- status = "disabled";
- reg = <0x0800 0 0 0 0>;
+ pcie0: pcie@11700000 {
+ compatible = "mediatek,mt2712-pcie";
+ device_type = "pci";
+ reg = <0 0x11700000 0 0x1000>;
+ reg-names = "port0";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie_irq";
+ clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
+ <&pericfg CLK_PERI_PCIE0>;
+ clock-names = "sys_ck0", "ahb_ck0";
+ phys = <&u3port0 PHY_TYPE_PCIE>;
+ phy-names = "pcie-phy0";
+ bus-range = <0x00 0xff>;
+ ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
+ status = "disabled";
+
+ slot0: pcie@0,0 {
+ reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie_intc1 0>,
- <0 0 0 2 &pcie_intc1 1>,
- <0 0 0 3 &pcie_intc1 2>,
- <0 0 0 4 &pcie_intc1 3>;
- pcie_intc1: interrupt-controller {
+ interrupt-map = <0 0 0 1 &pcie_intc0 0>,
+ <0 0 0 2 &pcie_intc0 1>,
+ <0 0 0 3 &pcie_intc0 2>,
+ <0 0 0 4 &pcie_intc0 3>;
+ pcie_intc0: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
index d174ad214857..83baab46f060 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -207,18 +207,16 @@
};
};
-&pcie {
+&pcie0 {
pinctrl-names = "default";
- pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
+ pinctrl-0 = <&pcie0_pins>;
status = "okay";
+};
- pcie@0,0 {
- status = "okay";
- };
-
- pcie@1,0 {
- status = "okay";
- };
+&pcie1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_pins>;
+ status = "okay";
};
&pio {
diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index 0b4de627f96e..8e98b78ba232 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -183,14 +183,10 @@
};
};
-&pcie {
+&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
-
- pcie@0,0 {
- status = "okay";
- };
};
&pio {
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 1a39e0ef776b..638b9260b215 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -777,45 +777,41 @@
#reset-cells = <1>;
};
- pcie: pcie@1a140000 {
+ pciecfg: pciecfg@1a140000 {
+ compatible = "mediatek,mt7622-pciecfg", "syscon";
+ reg = <0 0x1a140000 0 0x1000>;
+ };
+
+ pcie0: pcie@1a143000 {
compatible = "mediatek,mt7622-pcie";
device_type = "pci";
- reg = <0 0x1a140000 0 0x1000>,
- <0 0x1a143000 0 0x1000>,
- <0 0x1a145000 0 0x1000>;
- reg-names = "subsys", "port0", "port1";
+ reg = <0 0x1a143000 0 0x1000>;
+ reg-names = "port0";
+ mediatek,pcie-cfg = <&pciecfg>;
#address-cells = <3>;
#size-cells = <2>;
- interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "pcie_irq";
clocks = <&pciesys CLK_PCIE_P0_MAC_EN>,
- <&pciesys CLK_PCIE_P1_MAC_EN>,
- <&pciesys CLK_PCIE_P0_AHB_EN>,
<&pciesys CLK_PCIE_P0_AHB_EN>,
<&pciesys CLK_PCIE_P0_AUX_EN>,
- <&pciesys CLK_PCIE_P1_AUX_EN>,
<&pciesys CLK_PCIE_P0_AXI_EN>,
- <&pciesys CLK_PCIE_P1_AXI_EN>,
<&pciesys CLK_PCIE_P0_OBFF_EN>,
- <&pciesys CLK_PCIE_P1_OBFF_EN>,
- <&pciesys CLK_PCIE_P0_PIPE_EN>,
- <&pciesys CLK_PCIE_P1_PIPE_EN>;
- clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1",
- "aux_ck0", "aux_ck1", "axi_ck0", "axi_ck1",
- "obff_ck0", "obff_ck1", "pipe_ck0", "pipe_ck1";
+ <&pciesys CLK_PCIE_P0_PIPE_EN>;
+ clock-names = "sys_ck0", "ahb_ck0", "aux_ck0",
+ "axi_ck0", "obff_ck0", "pipe_ck0";
+
power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
bus-range = <0x00 0xff>;
- ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
+ ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
status = "disabled";
- pcie0: pcie@0,0 {
+ slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
- status = "disabled";
-
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
@@ -827,15 +823,39 @@
#interrupt-cells = <1>;
};
};
+ };
- pcie1: pcie@1,0 {
+ pcie1: pcie@1a145000 {
+ compatible = "mediatek,mt7622-pcie";
+ device_type = "pci";
+ reg = <0 0x1a145000 0 0x1000>;
+ reg-names = "port1";
+ mediatek,pcie-cfg = <&pciecfg>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "pcie_irq";
+ clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
+ /* designer has connect RC1 with p0_ahb clock */
+ <&pciesys CLK_PCIE_P0_AHB_EN>,
+ <&pciesys CLK_PCIE_P1_AUX_EN>,
+ <&pciesys CLK_PCIE_P1_AXI_EN>,
+ <&pciesys CLK_PCIE_P1_OBFF_EN>,
+ <&pciesys CLK_PCIE_P1_PIPE_EN>;
+ clock-names = "sys_ck1", "ahb_ck1", "aux_ck1",
+ "axi_ck1", "obff_ck1", "pipe_ck1";
+
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
+ bus-range = <0x00 0xff>;
+ ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
+ status = "disabled";
+
+ slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
- status = "disabled";
-
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,
--
2.18.0
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/perf: Whitelist OA report trigger registers
From: Patchwork @ 2020-07-17 2:25 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-gfx
In-Reply-To: <20200717015716.37671-1-umesh.nerlige.ramappa@intel.com>
== Series Details ==
Series: series starting with [1/3] drm/i915/perf: Whitelist OA report trigger registers
URL : https://patchwork.freedesktop.org/series/79571/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked separately.
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/perf: Whitelist OA report trigger registers
From: Patchwork @ 2020-07-17 2:24 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: intel-gfx
In-Reply-To: <20200717015716.37671-1-umesh.nerlige.ramappa@intel.com>
== Series Details ==
Series: series starting with [1/3] drm/i915/perf: Whitelist OA report trigger registers
URL : https://patchwork.freedesktop.org/series/79571/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
451a46ae0075 drm/i915/perf: Whitelist OA report trigger registers
9c529f1bfafe drm/i915/perf: Whitelist OA counter and buffer registers
54031bcae51f drm/i915/perf: Map OA buffer to user space for gen12 performance query
-:224: CHECK:SPACING: No space is necessary after a cast
#224: FILE: drivers/gpu/drm/i915/i915_perf.c:3298:
+ void __user *output = (void __user *) arg;
-:250: CHECK:SPACING: No space is necessary after a cast
#250: FILE: drivers/gpu/drm/i915/i915_perf.c:3324:
+ void __user *output = (void __user *) arg;
total: 0 errors, 0 warnings, 2 checks, 315 lines checked
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^ permalink raw reply
* [PATCH v3 2/4] PCI: mediatek: Use regmap to get shared pcie-cfg base
From: chuanjia.liu @ 2020-07-17 2:22 UTC (permalink / raw)
To: Rob Herring, Lorenzo Pieralisi, linux-pci
Cc: Ryder Lee, srv_heupstream, chuanjia.liu, linux-kernel,
jianjun.wang, Matthias Brugger, linux-mediatek, yong.wu,
Bjorn Helgaas, linux-arm-kernel
In-Reply-To: <20200717022223.1437-1-chuanjia.liu@mediatek.com>
From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
Use regmap to get shared pcie-cfg base and change
the method to get pcie irq.
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
---
drivers/pci/controller/pcie-mediatek.c | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index ebfa7d5a4e2d..659ff9a685b0 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -14,6 +14,7 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
#include <linux/msi.h>
#include <linux/module.h>
#include <linux/of_address.h>
@@ -23,6 +24,7 @@
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
#include <linux/reset.h>
#include "../pci.h"
@@ -205,6 +207,7 @@ struct mtk_pcie_port {
* struct mtk_pcie - PCIe host information
* @dev: pointer to PCIe device
* @base: IO mapped register base
+ * @cfg: IO mapped register map for PCIe config
* @free_ck: free-run reference clock
* @mem: non-prefetchable memory resource
* @ports: pointer to PCIe port information
@@ -214,6 +217,7 @@ struct mtk_pcie_port {
struct mtk_pcie {
struct device *dev;
void __iomem *base;
+ struct regmap *cfg;
struct clk *free_ck;
struct list_head ports;
@@ -650,7 +654,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
return err;
}
- port->irq = platform_get_irq(pdev, port->slot);
+ port->irq = platform_get_irq_byname(pdev, "pcie_irq");
if (port->irq < 0)
return port->irq;
@@ -676,12 +680,11 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
if (!mem)
return -EINVAL;
- /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */
- if (pcie->base) {
- val = readl(pcie->base + PCIE_SYS_CFG_V2);
- val |= PCIE_CSR_LTSSM_EN(port->slot) |
- PCIE_CSR_ASPM_L1_EN(port->slot);
- writel(val, pcie->base + PCIE_SYS_CFG_V2);
+ /* MT7622/MT7629 platforms need to enable LTSSM and ASPM. */
+ if (pcie->cfg) {
+ val = PCIE_CSR_LTSSM_EN(port->slot) |
+ PCIE_CSR_ASPM_L1_EN(port->slot);
+ regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val);
}
/* Assert all reset signals */
@@ -987,6 +990,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
struct device *dev = pcie->dev;
struct platform_device *pdev = to_platform_device(dev);
struct resource *regs;
+ struct device_node *cfg_node;
int err;
/* get shared registers, which are optional */
@@ -999,6 +1003,13 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
}
}
+ cfg_node = of_parse_phandle(dev->of_node, "mediatek,pcie-cfg", 0);
+ if (cfg_node) {
+ pcie->cfg = syscon_node_to_regmap(cfg_node);
+ if (IS_ERR(pcie->cfg))
+ return PTR_ERR(pcie->cfg);
+ }
+
pcie->free_ck = devm_clk_get(dev, "free_ck");
if (IS_ERR(pcie->free_ck)) {
if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER)
--
2.18.0
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^ permalink raw reply related
* [PATCH v3 3/4] arm64: dts: mediatek: Split PCIe node for MT2712/MT7622
From: chuanjia.liu @ 2020-07-17 2:22 UTC (permalink / raw)
To: Rob Herring, Lorenzo Pieralisi, linux-pci
Cc: Ryder Lee, srv_heupstream, chuanjia.liu, linux-kernel,
jianjun.wang, Matthias Brugger, linux-mediatek, yong.wu,
Bjorn Helgaas, linux-arm-kernel
In-Reply-To: <20200717022223.1437-1-chuanjia.liu@mediatek.com>
From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
There are two independent PCIe controllers in MT2712/MT7622 platform,
and each of them should contain an independent MSI domain.
In current architecture, MSI domain will be inherited from the root
bridge, and all of the devices will share the same MSI domain.
Hence that, the PCIe devices will not work properly if the irq number
which required is more than 32.
Split the PCIe node for MT2712/MT7622 platform to fix MSI issue and
comply with the hardware design.
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 75 +++++++++++--------
.../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 16 ++--
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 6 +-
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 68 +++++++++++------
4 files changed, 96 insertions(+), 69 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index db17d0a4ed57..337e56bdbd08 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -915,60 +915,73 @@
};
};
- pcie: pcie@11700000 {
+ pcie1: pcie@112ff000 {
compatible = "mediatek,mt2712-pcie";
device_type = "pci";
- reg = <0 0x11700000 0 0x1000>,
- <0 0x112ff000 0 0x1000>;
- reg-names = "port0", "port1";
+ reg = <0 0x112ff000 0 0x1000>;
+ reg-names = "port1";
#address-cells = <3>;
#size-cells = <2>;
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
- <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
- <&pericfg CLK_PERI_PCIE0>,
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie_irq";
+ clocks = <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
<&pericfg CLK_PERI_PCIE1>;
- clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1";
- phys = <&u3port0 PHY_TYPE_PCIE>, <&u3port1 PHY_TYPE_PCIE>;
- phy-names = "pcie-phy0", "pcie-phy1";
+ clock-names = "sys_ck1", "ahb_ck1";
+ phys = <&u3port1 PHY_TYPE_PCIE>;
+ phy-names = "pcie-phy1";
bus-range = <0x00 0xff>;
- ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
+ ranges = <0x82000000 0 0x11400000 0x0 0x11400000 0 0x300000>;
+ status = "disabled";
- pcie0: pcie@0,0 {
- device_type = "pci";
- status = "disabled";
- reg = <0x0000 0 0 0 0>;
+ slot1: pcie@1,0 {
+ reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie_intc0 0>,
- <0 0 0 2 &pcie_intc0 1>,
- <0 0 0 3 &pcie_intc0 2>,
- <0 0 0 4 &pcie_intc0 3>;
- pcie_intc0: interrupt-controller {
+ interrupt-map = <0 0 0 1 &pcie_intc1 0>,
+ <0 0 0 2 &pcie_intc1 1>,
+ <0 0 0 3 &pcie_intc1 2>,
+ <0 0 0 4 &pcie_intc1 3>;
+ pcie_intc1: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
+ };
- pcie1: pcie@1,0 {
- device_type = "pci";
- status = "disabled";
- reg = <0x0800 0 0 0 0>;
+ pcie0: pcie@11700000 {
+ compatible = "mediatek,mt2712-pcie";
+ device_type = "pci";
+ reg = <0 0x11700000 0 0x1000>;
+ reg-names = "port0";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie_irq";
+ clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
+ <&pericfg CLK_PERI_PCIE0>;
+ clock-names = "sys_ck0", "ahb_ck0";
+ phys = <&u3port0 PHY_TYPE_PCIE>;
+ phy-names = "pcie-phy0";
+ bus-range = <0x00 0xff>;
+ ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
+ status = "disabled";
+
+ slot0: pcie@0,0 {
+ reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie_intc1 0>,
- <0 0 0 2 &pcie_intc1 1>,
- <0 0 0 3 &pcie_intc1 2>,
- <0 0 0 4 &pcie_intc1 3>;
- pcie_intc1: interrupt-controller {
+ interrupt-map = <0 0 0 1 &pcie_intc0 0>,
+ <0 0 0 2 &pcie_intc0 1>,
+ <0 0 0 3 &pcie_intc0 2>,
+ <0 0 0 4 &pcie_intc0 3>;
+ pcie_intc0: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
index d174ad214857..83baab46f060 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -207,18 +207,16 @@
};
};
-&pcie {
+&pcie0 {
pinctrl-names = "default";
- pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
+ pinctrl-0 = <&pcie0_pins>;
status = "okay";
+};
- pcie@0,0 {
- status = "okay";
- };
-
- pcie@1,0 {
- status = "okay";
- };
+&pcie1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_pins>;
+ status = "okay";
};
&pio {
diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index 0b4de627f96e..8e98b78ba232 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -183,14 +183,10 @@
};
};
-&pcie {
+&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
-
- pcie@0,0 {
- status = "okay";
- };
};
&pio {
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 1a39e0ef776b..638b9260b215 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -777,45 +777,41 @@
#reset-cells = <1>;
};
- pcie: pcie@1a140000 {
+ pciecfg: pciecfg@1a140000 {
+ compatible = "mediatek,mt7622-pciecfg", "syscon";
+ reg = <0 0x1a140000 0 0x1000>;
+ };
+
+ pcie0: pcie@1a143000 {
compatible = "mediatek,mt7622-pcie";
device_type = "pci";
- reg = <0 0x1a140000 0 0x1000>,
- <0 0x1a143000 0 0x1000>,
- <0 0x1a145000 0 0x1000>;
- reg-names = "subsys", "port0", "port1";
+ reg = <0 0x1a143000 0 0x1000>;
+ reg-names = "port0";
+ mediatek,pcie-cfg = <&pciecfg>;
#address-cells = <3>;
#size-cells = <2>;
- interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "pcie_irq";
clocks = <&pciesys CLK_PCIE_P0_MAC_EN>,
- <&pciesys CLK_PCIE_P1_MAC_EN>,
- <&pciesys CLK_PCIE_P0_AHB_EN>,
<&pciesys CLK_PCIE_P0_AHB_EN>,
<&pciesys CLK_PCIE_P0_AUX_EN>,
- <&pciesys CLK_PCIE_P1_AUX_EN>,
<&pciesys CLK_PCIE_P0_AXI_EN>,
- <&pciesys CLK_PCIE_P1_AXI_EN>,
<&pciesys CLK_PCIE_P0_OBFF_EN>,
- <&pciesys CLK_PCIE_P1_OBFF_EN>,
- <&pciesys CLK_PCIE_P0_PIPE_EN>,
- <&pciesys CLK_PCIE_P1_PIPE_EN>;
- clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1",
- "aux_ck0", "aux_ck1", "axi_ck0", "axi_ck1",
- "obff_ck0", "obff_ck1", "pipe_ck0", "pipe_ck1";
+ <&pciesys CLK_PCIE_P0_PIPE_EN>;
+ clock-names = "sys_ck0", "ahb_ck0", "aux_ck0",
+ "axi_ck0", "obff_ck0", "pipe_ck0";
+
power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
bus-range = <0x00 0xff>;
- ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
+ ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
status = "disabled";
- pcie0: pcie@0,0 {
+ slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
- status = "disabled";
-
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
<0 0 0 2 &pcie_intc0 1>,
@@ -827,15 +823,39 @@
#interrupt-cells = <1>;
};
};
+ };
- pcie1: pcie@1,0 {
+ pcie1: pcie@1a145000 {
+ compatible = "mediatek,mt7622-pcie";
+ device_type = "pci";
+ reg = <0 0x1a145000 0 0x1000>;
+ reg-names = "port1";
+ mediatek,pcie-cfg = <&pciecfg>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "pcie_irq";
+ clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
+ /* designer has connect RC1 with p0_ahb clock */
+ <&pciesys CLK_PCIE_P0_AHB_EN>,
+ <&pciesys CLK_PCIE_P1_AUX_EN>,
+ <&pciesys CLK_PCIE_P1_AXI_EN>,
+ <&pciesys CLK_PCIE_P1_OBFF_EN>,
+ <&pciesys CLK_PCIE_P1_PIPE_EN>;
+ clock-names = "sys_ck1", "ahb_ck1", "aux_ck1",
+ "axi_ck1", "obff_ck1", "pipe_ck1";
+
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
+ bus-range = <0x00 0xff>;
+ ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
+ status = "disabled";
+
+ slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges;
- status = "disabled";
-
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
<0 0 0 2 &pcie_intc1 1>,
--
2.18.0
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^ permalink raw reply related
* Re: [PATCH v4 5/7] drivers: thermal: tsens: add interrupt support for 9860 driver
From: kernel test robot @ 2020-07-17 2:24 UTC (permalink / raw)
To: kbuild-all
In-Reply-To: <20200716022817.30439-6-ansuelsmth@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 3746 bytes --]
Hi Ansuel,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on clk/clk-next linus/master v5.8-rc5 next-20200716]
[cannot apply to thermal/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Ansuel-Smith/Add-support-for-ipq8064-tsens/20200716-103106
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm64-randconfig-r004-20200716 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project ed6b578040a85977026c93bf4188f996148f3218)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/thermal/qcom/tsens-8960.c:216:14: warning: signed shift result (0x9B0000000) requires 37 bits to represent, but 'int' only has 32 bits [-Wshift-overflow]
(CONFIG << CONFIG_SHIFT_8660);
~~~~~~ ^ ~~~~~~~~~~~~~~~~~
1 warning generated.
vim +/int +216 drivers/thermal/qcom/tsens-8960.c
191
192 static void hw_init(struct tsens_priv *priv)
193 {
194 int ret;
195 unsigned int reg_cntl = 0, reg_cfg = 0, reg_thr = 0;
196 unsigned int reg_status_cntl = 0;
197
198 regmap_read(priv->tm_map, CNTL_ADDR, ®_cntl);
199 regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl | TSENS_SW_RST);
200
201 reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18) |
202 (((1 << priv->num_sensors) - 1) << SENSOR0_SHIFT);
203 regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
204 regmap_read(priv->tm_map, STATUS_CNTL_ADDR_8064, ®_status_cntl);
205 reg_status_cntl |= LOWER_STATUS_CLR | UPPER_STATUS_CLR |
206 MIN_STATUS_MASK | MAX_STATUS_MASK;
207 regmap_write(priv->tm_map, STATUS_CNTL_ADDR_8064, reg_status_cntl);
208 reg_cntl |= TSENS_EN;
209 regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
210
211 regmap_read(priv->tm_map, CONFIG_ADDR, ®_cfg);
212 if (priv->num_sensors > 1)
213 reg_cfg = (reg_cfg & ~CONFIG_MASK) | CONFIG;
214 else
215 reg_cfg = (reg_cfg & ~CONFIG_MASK) |
> 216 (CONFIG << CONFIG_SHIFT_8660);
217 regmap_write(priv->tm_map, CONFIG_ADDR, reg_cfg);
218
219 reg_thr |= (LOWER_LIMIT_TH_8064 << THRESHOLD_LOWER_LIMIT_SHIFT) |
220 (UPPER_LIMIT_TH_8064 << THRESHOLD_UPPER_LIMIT_SHIFT) |
221 (MIN_LIMIT_TH << THRESHOLD_MIN_LIMIT_SHIFT) |
222 (MAX_LIMIT_TH << THRESHOLD_MAX_LIMIT_SHIFT);
223
224 regmap_write(priv->tm_map, THRESHOLD_ADDR, reg_thr);
225
226 ret = devm_request_irq(priv->dev, priv->tsens_irq, tsens_isr,
227 IRQF_TRIGGER_RISING, "tsens_interrupt", priv);
228 if (ret < 0) {
229 dev_err(priv->dev, "request_irq FAIL: %d", ret);
230 return;
231 }
232
233 INIT_WORK(&priv->tsens_work, tsens_scheduler_fn);
234 }
235
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 38708 bytes --]
^ permalink raw reply
* [PATCH v3 0/4] Split PCIe node to comply with hardware design
From: chuanjia.liu @ 2020-07-17 2:22 UTC (permalink / raw)
To: Rob Herring, Lorenzo Pieralisi, linux-pci
Cc: Ryder Lee, Bjorn Helgaas, Matthias Brugger, linux-mediatek,
linux-kernel, linux-arm-kernel, yong.wu, srv_heupstream,
jianjun.wang
There are two independent PCIe controllers in MT2712/MT7622 platform,
and each of them should contain an independent MSI domain.
In current architecture, MSI domain will be inherited from the root
bridge, and all of the devices will share the same MSI domain.
Hence that, the PCIe devices will not work properly if the irq number
which required is more than 32.
Split the PCIe node for MT2712/MT7622 platform to fix MSI issue and
comply with the hardware design.
change note:
v3:rebase for 5.8-rc1. Only collect ack of Ryder, No code change.
v2:change the allocation of mt2712 PCIe MMIO space due to the
allocation size is not right in v1.
chuanjia.liu (4):
dt-bindings: PCI: Mediatek: Update PCIe binding
PCI: mediatek: Use regmap to get shared pcie-cfg base
arm64: dts: mediatek: Split PCIe node for MT2712/MT7622
ARM: dts: mediatek: Update mt7629 PCIe node
.../bindings/pci/mediatek-pcie-cfg.yaml | 38 +++++
.../devicetree/bindings/pci/mediatek-pcie.txt | 144 +++++++++++-------
arch/arm/boot/dts/mt7629-rfb.dts | 3 +-
arch/arm/boot/dts/mt7629.dtsi | 23 +--
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 75 +++++----
.../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 16 +-
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 6 +-
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 68 ++++++---
drivers/pci/controller/pcie-mediatek.c | 25 ++-
9 files changed, 258 insertions(+), 140 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml
--
2.25.1
^ permalink raw reply
* Re: [PATCH -next] bcache: Convert to DEFINE_SHOW_ATTRIBUTE
From: Coly Li @ 2020-07-17 2:22 UTC (permalink / raw)
To: Qinglang Miao
Cc: Greg Kroah-Hartman, Kent Overstreet, linux-tegra, linux-kernel,
liuyongqiang13
In-Reply-To: <a0f9b92b-d8f2-7c03-8c48-9e71e506361b@suse.de>
On 2020/7/16 17:54, Coly Li wrote:
> On 2020/7/16 17:03, Qinglang Miao wrote:
>> From: Yongqiang Liu <liuyongqiang13@huawei.com>
>>
>
> Hi Qianlang and Yongqiang,
>
>> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>>
>> Signed-off-by: Yongqiang Liu <liuyongqiang13@huawei.com>
>> ---
>> drivers/md/bcache/closure.c | 16 +++-------------
>> 1 file changed, 3 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/md/bcache/closure.c b/drivers/md/bcache/closure.c
>> index 99222aa5d..37b9c5d49 100644
>> --- a/drivers/md/bcache/closure.c
>> +++ b/drivers/md/bcache/closure.c
>> @@ -159,7 +159,7 @@ void closure_debug_destroy(struct closure *cl)
>>
>> static struct dentry *closure_debug;
>>
>> -static int debug_seq_show(struct seq_file *f, void *data)
>> +static int debug_show(struct seq_file *f, void *data)
>> {
>> struct closure *cl;
>>
>> @@ -188,17 +188,7 @@ static int debug_seq_show(struct seq_file *f, void *data)
>> return 0;
>> }
>>
>> -static int debug_seq_open(struct inode *inode, struct file *file)
>> -{
>> - return single_open(file, debug_seq_show, NULL);
>> -}
>> -
>
> Here NULL is sent to single_open(), in DEFINE_SHOW_ATTRIBUTE()
> inode->i_private is sent into single_open(). I don't see the commit log
> mentions or estimates such change.
>
Still this change modifies original code logic, I need to know the exact
effect before taking this patch.
>
>> -static const struct file_operations debug_ops = {
>> - .owner = THIS_MODULE,
>> - .open = debug_seq_open,
>> - .read_iter = seq_read_iter,
>
> I doubt this patch applies to Linux v5.8-rc, this is how debug_ops is
> defined in Linux v5.8-rc5,
>
I realize your patch is against linux-next, which is ahead of both
linux-block and mainline tree. So this patch does not apply to
linux-block tree, which is my upstream for bcache going to upstream.
I suggest to generate the patch against latest mainline kernel, or
linux-block branch for next merge window (for 5.9 it is branch
remotes/origin/for-5.9/drivers).
> 196 static const struct file_operations debug_ops = {
> 197 .owner = THIS_MODULE,
> 198 .open = debug_seq_open,
> 199 .read = seq_read,
> 200 .release = single_release
> 201 };
>
>> - .release = single_release
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(debug);
>>
>> void __init closure_debug_init(void)
>> {
>> @@ -209,7 +199,7 @@ void __init closure_debug_init(void)
>> * about this.
>> */
>> closure_debug = debugfs_create_file(
>> - "closures", 0400, bcache_debug, NULL, &debug_ops);
>> + "closures", 0400, bcache_debug, NULL, &debug_fops);
>> }
>> #endif
>
> Do you test your change with upstream kernel ? Or at least you should
> try to apply and compile the patch with latest upstream kernel.
I withdraw the above wrong word, the -next tag in patch subject was
overlooked by me. Next time I will try to avoid such mistake.
Coly Li
^ permalink raw reply
* Re: [PATCH -next] bcache: Convert to DEFINE_SHOW_ATTRIBUTE
From: Coly Li @ 2020-07-17 2:22 UTC (permalink / raw)
To: Qinglang Miao
Cc: Greg Kroah-Hartman, Kent Overstreet,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
liuyongqiang13-hv44wF8Li93QT0dZR+AlfA
In-Reply-To: <a0f9b92b-d8f2-7c03-8c48-9e71e506361b-l3A5Bk7waGM@public.gmane.org>
On 2020/7/16 17:54, Coly Li wrote:
> On 2020/7/16 17:03, Qinglang Miao wrote:
>> From: Yongqiang Liu <liuyongqiang13-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>>
>
> Hi Qianlang and Yongqiang,
>
>> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>>
>> Signed-off-by: Yongqiang Liu <liuyongqiang13-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> ---
>> drivers/md/bcache/closure.c | 16 +++-------------
>> 1 file changed, 3 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/md/bcache/closure.c b/drivers/md/bcache/closure.c
>> index 99222aa5d..37b9c5d49 100644
>> --- a/drivers/md/bcache/closure.c
>> +++ b/drivers/md/bcache/closure.c
>> @@ -159,7 +159,7 @@ void closure_debug_destroy(struct closure *cl)
>>
>> static struct dentry *closure_debug;
>>
>> -static int debug_seq_show(struct seq_file *f, void *data)
>> +static int debug_show(struct seq_file *f, void *data)
>> {
>> struct closure *cl;
>>
>> @@ -188,17 +188,7 @@ static int debug_seq_show(struct seq_file *f, void *data)
>> return 0;
>> }
>>
>> -static int debug_seq_open(struct inode *inode, struct file *file)
>> -{
>> - return single_open(file, debug_seq_show, NULL);
>> -}
>> -
>
> Here NULL is sent to single_open(), in DEFINE_SHOW_ATTRIBUTE()
> inode->i_private is sent into single_open(). I don't see the commit log
> mentions or estimates such change.
>
Still this change modifies original code logic, I need to know the exact
effect before taking this patch.
>
>> -static const struct file_operations debug_ops = {
>> - .owner = THIS_MODULE,
>> - .open = debug_seq_open,
>> - .read_iter = seq_read_iter,
>
> I doubt this patch applies to Linux v5.8-rc, this is how debug_ops is
> defined in Linux v5.8-rc5,
>
I realize your patch is against linux-next, which is ahead of both
linux-block and mainline tree. So this patch does not apply to
linux-block tree, which is my upstream for bcache going to upstream.
I suggest to generate the patch against latest mainline kernel, or
linux-block branch for next merge window (for 5.9 it is branch
remotes/origin/for-5.9/drivers).
> 196 static const struct file_operations debug_ops = {
> 197 .owner = THIS_MODULE,
> 198 .open = debug_seq_open,
> 199 .read = seq_read,
> 200 .release = single_release
> 201 };
>
>> - .release = single_release
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(debug);
>>
>> void __init closure_debug_init(void)
>> {
>> @@ -209,7 +199,7 @@ void __init closure_debug_init(void)
>> * about this.
>> */
>> closure_debug = debugfs_create_file(
>> - "closures", 0400, bcache_debug, NULL, &debug_ops);
>> + "closures", 0400, bcache_debug, NULL, &debug_fops);
>> }
>> #endif
>
> Do you test your change with upstream kernel ? Or at least you should
> try to apply and compile the patch with latest upstream kernel.
I withdraw the above wrong word, the -next tag in patch subject was
overlooked by me. Next time I will try to avoid such mistake.
Coly Li
^ permalink raw reply
* [igt-dev] ✓ Fi.CI.BAT: success for i915/perf: Sanity check reports in mapped OA buffer (rev2)
From: Patchwork @ 2020-07-17 2:20 UTC (permalink / raw)
To: Umesh Nerlige Ramappa; +Cc: igt-dev
In-Reply-To: <20200717015419.37439-1-umesh.nerlige.ramappa@intel.com>
[-- Attachment #1.1: Type: text/plain, Size: 5502 bytes --]
== Series Details ==
Series: i915/perf: Sanity check reports in mapped OA buffer (rev2)
URL : https://patchwork.freedesktop.org/series/79459/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8759 -> IGTPW_4773
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/index.html
Known issues
------------
Here are the changes found in IGTPW_4773 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-byt-j1900: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
* igt@prime_self_import@basic-with_two_bos:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [FAIL][5] ([i915#1888]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live@gt_lrc:
- fi-tgl-u2: [DMESG-FAIL][7] ([i915#1233]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-tgl-u2/igt@i915_selftest@live@gt_lrc.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-tgl-u2/igt@i915_selftest@live@gt_lrc.html
* igt@kms_busy@basic@flip:
- fi-tgl-y: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-tgl-y/igt@kms_busy@basic@flip.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-tgl-y/igt@kms_busy@basic@flip.html
* igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-icl-u2: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1.html
* igt@prime_vgem@basic-write:
- fi-tgl-y: [DMESG-WARN][13] ([i915#402]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-tgl-y/igt@prime_vgem@basic-write.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-tgl-y/igt@prime_vgem@basic-write.html
#### Warnings ####
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#1982] / [i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][16] ([i915#62] / [i915#92])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) -> [DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-kbl-x1275/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-kbl-x1275/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][20] ([i915#62] / [i915#92]) +2 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8759/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1233]: https://gitlab.freedesktop.org/drm/intel/issues/1233
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (45 -> 40)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5738 -> IGTPW_4773
CI-20190529: 20190529
CI_DRM_8759: 9136d875406863759c4c7939f4b32edf7d76b007 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4773: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/index.html
IGT_5738: bc8b56fe177af34fbde7b96f1f66614a0014c6ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@perf@mapped-oa-buffer
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4773/index.html
[-- Attachment #1.2: Type: text/html, Size: 7397 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply
* Re: [PATCH v4 1/4] device property: Add a function to test is a fwnode is a graph endpoint
From: Laurent Pinchart @ 2020-07-17 2:19 UTC (permalink / raw)
To: Sakari Ailus
Cc: Rafael J. Wysocki, Laurent Pinchart, linux-media, Linux-Renesas,
Jacopo Mondi, Niklas Söderlund, Kieran Bingham,
Lad Prabhakar, Rafael J. Wysocki, devicetree@vger.kernel.org,
ACPI Devel Maling List
In-Reply-To: <20200715205717.GF836@valkosipuli.retiisi.org.uk>
Hi Sakari,
On Wed, Jul 15, 2020 at 11:57:17PM +0300, Sakari Ailus wrote:
> On Wed, Jul 01, 2020 at 02:19:21PM +0200, Rafael J. Wysocki wrote:
> > On Wed, Jul 1, 2020 at 9:34 AM Sakari Ailus <sakari.ailus@iki.fi> wrote:
> > > On Wed, Jul 01, 2020 at 09:21:37AM +0300, Laurent Pinchart wrote:
> > > > Drivers may need to test if a fwnode is a graph endpoint. To avoid
> > > > hand-written solutions that wouldn't work for all fwnode types, add a
> > > > new fwnode_graph_is_endpoint() function for this purpose. We don't need
> > > > to wire it up to different backends for OF and ACPI for now, as the
> > > > implementation can simply be based on checkout the presence of a
> > > > remote-endpoint property.
> > > >
> > > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > > ---
> > > > include/linux/property.h | 5 +++++
> > > > 1 file changed, 5 insertions(+)
> > > >
> > > > diff --git a/include/linux/property.h b/include/linux/property.h
> > > > index 10d03572f52e..9f805c442819 100644
> > > > --- a/include/linux/property.h
> > > > +++ b/include/linux/property.h
> > > > @@ -389,6 +389,11 @@ struct fwnode_handle *
> > > > fwnode_graph_get_remote_node(const struct fwnode_handle *fwnode, u32 port,
> > > > u32 endpoint);
> > > >
> > > > +static inline bool fwnode_graph_is_endpoint(struct fwnode_handle *fwnode)
> > > > +{
> > > > + return fwnode_property_present(fwnode, "remote-endpoint");
> > > > +}
> > > > +
> > > > /*
> > > > * Fwnode lookup flags
> > > > *
> > >
> > > Thanks for the patch. I've bounced it to devicetree and linux-acpi lists
> > > (now cc'd) --- hope that works.
> > >
> > > Rafael: do you think this simple patch could go though the media tree,
> > > assuming that folks are generally fine with the patch as such?
> >
> > Yes, it could.
>
> Thanks! I've applied this to my tree.
Do you mean the whole series ? :-) Do you intend to send a pull request
for v5.9 ?
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: nfs4_show_superblock considered harmful :-)
From: J. Bruce Fields @ 2020-07-17 2:18 UTC (permalink / raw)
To: NeilBrown; +Cc: Jeff Layton, linux-nfs
In-Reply-To: <87r1tbvsey.fsf@notabene.neil.brown.name>
On Fri, Jul 17, 2020 at 11:31:17AM +1000, NeilBrown wrote:
> On Thu, Jul 16 2020, J. Bruce Fields wrote:
>
> > On Fri, Jul 17, 2020 at 09:43:40AM +1000, NeilBrown wrote:
> >> On Thu, Jul 16 2020, J. Bruce Fields wrote:
> >> > --- a/fs/nfsd/nfs4state.c
> >> > +++ b/fs/nfsd/nfs4state.c
> >> > @@ -507,6 +507,16 @@ find_any_file(struct nfs4_file *f)
> >> > return ret;
> >> > }
> >> >
> >> > +static struct nfsd_file *find_deleg_file(struct nfs4_file *f)
> >> > +{
> >> > + struct nfsd_file *ret;
> >> > +
> >> > + spin_lock(&f->fi_lock);
> >> > + ret = nfsd_file_get(f->fi_deleg_file);
> >>
> >> A test on f->fi_deleg_file being non-NULL would make this look safer.
> >> It would also make the subsequent test on the return value appear sane.
> >
> > Yes, thanks!-b.
> >
> > diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c
> > index c2a2e56c896d..6e8811e7c134 100644
> > --- a/fs/nfsd/nfs4state.c
> > +++ b/fs/nfsd/nfs4state.c
> > @@ -509,10 +509,11 @@ find_any_file(struct nfs4_file *f)
> >
> > static struct nfsd_file *find_deleg_file(struct nfs4_file *f)
> > {
> > - struct nfsd_file *ret;
> > + struct nfsd_file *ret = NULL;
> >
> > spin_lock(&f->fi_lock);
> > - ret = nfsd_file_get(f->fi_deleg_file);
> > + if (f->fi_deleg_file)
> > + ret = nfsd_file_get(f->fi_deleg_file);
> > spin_unlock(&f->fi_lock);
> > return ret;
> > }
>
> Reviewed-by: NeilBrown <neilb@suse.de>
>
> for the whole patch.
Thanks!--b.
^ permalink raw reply
* Re: [PATCH -next] scsi: hisi_sas: Convert to DEFINE_SHOW_ATTRIBUTE
From: miaoqinglang @ 2020-07-17 2:17 UTC (permalink / raw)
To: luojiaxing, Greg Kroah-Hartman, John Garry; +Cc: linux-scsi, linux-kernel
In-Reply-To: <c3bc1f66-2eae-1f9b-58bf-7eacb25739e1@huawei.com>
在 2020/7/16 20:39, luojiaxing 写道:
> Hi, Qinglang
>
> On 2020/7/16 16:47, Qinglang Miao wrote:
>> From: Yongqiang Liu <liuyongqiang13@huawei.com>
>>
>> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>>
>> Signed-off-by: Yongqiang Liu <liuyongqiang13@huawei.com>
>> ---
>> drivers/scsi/hisi_sas/hisi_sas_main.c | 137 ++------------------------
>> 1 file changed, 10 insertions(+), 127 deletions(-)
>>
>> diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c
>> b/drivers/scsi/hisi_sas/hisi_sas_main.c
>> index 852d2620e..f50b0c78f 100644
>> --- a/drivers/scsi/hisi_sas/hisi_sas_main.c
>> +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c
>> @@ -2870,19 +2870,7 @@ static int hisi_sas_debugfs_global_show(struct
>> seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_global_open(struct inode *inode, struct
>> file *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_global_show,
>> - inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_global_fops = {
>> - .open = hisi_sas_debugfs_global_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>
>
> I saw that your code is different from code in kernel 5.8-rc4, and it
> should be as follow:
>
> static const struct file_operations hisi_sas_debugfs_global_fops = {
> .open = hisi_sas_debugfs_global_open,
> .read = seq_read,
> .llseek = seq_lseek,
> .release = single_release,
> .owner = THIS_MODULE,
> };
>
Sorry I didn't mention it in commit log, but this patch is based on
linux-next where commit <4d4901c6d7> has switched over direct seq_read
method calls to seq_read_iter. I can send a new patch based on v5.8-rc
if you don't mind.
>
> Plus, if we use this macro directly when we write this code, it really
> makes the code simpler. But if we accept the cleanup now,
>
> we might need to consider evading compilation failures when we merge
> these code back to some older kernel (e.g kernel 4.14 for centOS 7.6).
>
> I think this marco is introduced into kernel 4.16-rc2.
>
Yes, you're right, the macro and commit <4d4901c6d7> need to be applied
before this clean up patch. But I don't think this patch as well as
commit<4d4901c6d7> need to be merged back to older kernel.
>
> So I don't see much additional benefit to us from this simplification.
> But this marco is quite helpful and I think I will use it somewhere else.
>
> Thanks
>
> Jiaxing
>
Glad to know your opnions.
Thanks.
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_global);
>> static int hisi_sas_debugfs_axi_show(struct seq_file *s, void *p)
>> {
>> @@ -2897,19 +2885,7 @@ static int hisi_sas_debugfs_axi_show(struct
>> seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_axi_open(struct inode *inode, struct file
>> *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_axi_show,
>> - inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_axi_fops = {
>> - .open = hisi_sas_debugfs_axi_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_axi);
>> static int hisi_sas_debugfs_ras_show(struct seq_file *s, void *p)
>> {
>> @@ -2924,19 +2900,7 @@ static int hisi_sas_debugfs_ras_show(struct
>> seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_ras_open(struct inode *inode, struct file
>> *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_ras_show,
>> - inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_ras_fops = {
>> - .open = hisi_sas_debugfs_ras_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_ras);
>> static int hisi_sas_debugfs_port_show(struct seq_file *s, void *p)
>> {
>> @@ -2951,18 +2915,7 @@ static int hisi_sas_debugfs_port_show(struct
>> seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_port_open(struct inode *inode, struct
>> file *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_port_show,
>> inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_port_fops = {
>> - .open = hisi_sas_debugfs_port_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_port);
>> static void hisi_sas_show_row_64(struct seq_file *s, int index,
>> int sz, __le64 *ptr)
>> @@ -3019,18 +2972,7 @@ static int hisi_sas_debugfs_cq_show(struct
>> seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_cq_open(struct inode *inode, struct file
>> *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_cq_show,
>> inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_cq_fops = {
>> - .open = hisi_sas_debugfs_cq_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_cq);
>> static void hisi_sas_dq_show_slot(struct seq_file *s, int slot, void
>> *dq_ptr)
>> {
>> @@ -3052,18 +2994,7 @@ static int hisi_sas_debugfs_dq_show(struct
>> seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_dq_open(struct inode *inode, struct file
>> *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_dq_show,
>> inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_dq_fops = {
>> - .open = hisi_sas_debugfs_dq_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_dq);
>> static int hisi_sas_debugfs_iost_show(struct seq_file *s, void *p)
>> {
>> @@ -3080,18 +3011,7 @@ static int hisi_sas_debugfs_iost_show(struct
>> seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_iost_open(struct inode *inode, struct
>> file *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_iost_show,
>> inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_iost_fops = {
>> - .open = hisi_sas_debugfs_iost_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_iost);
>> static int hisi_sas_debugfs_iost_cache_show(struct seq_file *s, void
>> *p)
>> {
>> @@ -3117,20 +3037,7 @@ static int
>> hisi_sas_debugfs_iost_cache_show(struct seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_iost_cache_open(struct inode *inode,
>> - struct file *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_iost_cache_show,
>> - inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_iost_cache_fops = {
>> - .open = hisi_sas_debugfs_iost_cache_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_iost_cache);
>> static int hisi_sas_debugfs_itct_show(struct seq_file *s, void *p)
>> {
>> @@ -3147,18 +3054,7 @@ static int hisi_sas_debugfs_itct_show(struct
>> seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_itct_open(struct inode *inode, struct
>> file *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_itct_show,
>> inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_itct_fops = {
>> - .open = hisi_sas_debugfs_itct_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_itct);
>> static int hisi_sas_debugfs_itct_cache_show(struct seq_file *s, void
>> *p)
>> {
>> @@ -3184,20 +3080,7 @@ static int
>> hisi_sas_debugfs_itct_cache_show(struct seq_file *s, void *p)
>> return 0;
>> }
>> -static int hisi_sas_debugfs_itct_cache_open(struct inode *inode,
>> - struct file *filp)
>> -{
>> - return single_open(filp, hisi_sas_debugfs_itct_cache_show,
>> - inode->i_private);
>> -}
>> -
>> -static const struct file_operations hisi_sas_debugfs_itct_cache_fops = {
>> - .open = hisi_sas_debugfs_itct_cache_open,
>> - .read_iter = seq_read_iter,
>> - .llseek = seq_lseek,
>> - .release = single_release,
>> - .owner = THIS_MODULE,
>> -};
>> +DEFINE_SHOW_ATTRIBUTE(hisi_sas_debugfs_itct_cache);
>> static void hisi_sas_debugfs_create_files(struct hisi_hba *hisi_hba)
>> {
>
> .
^ permalink raw reply
* Re: [PATCH -next] rsxx: Convert to DEFINE_SHOW_ATTRIBUTE
From: Jens Axboe @ 2020-07-17 2:16 UTC (permalink / raw)
To: miaoqinglang, Greg Kroah-Hartman, Joshua Morris, Philip Kelleher
Cc: linux-block, linux-kernel
In-Reply-To: <c19c9e32-4b31-bcf1-df45-a29220e7e6cc@huawei.com>
On 7/16/20 7:37 PM, miaoqinglang wrote:
>
> 在 2020/7/16 23:45, Jens Axboe 写道:
>> On 7/16/20 3:04 AM, Qinglang Miao wrote:
>>> From: Liu Shixin <liushixin2@huawei.com>
>>>
>>> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>> None of these apply against the 5.9 block tree, looks like some
>> read -> read_iter conversion has happened in another branch that
>> I'm not privy to.
>
> Hi Jens,
>
> Sorry I didn't mention it in commit log, but this patch is based
> on linux-next where commit <4d4901c6d7> has switched over direct
> seq_read method calls to seq_read_iter, this is why there's conflict in
> your apply.
>
> Do you think I should send a new patch based on 5.8rc?
That'll just create a needless conflict. But I don't even know what tree
is carrying the patch that changes it to use seq_read_iter, so hard to
make other suggestions.
Alternatively, I can hang on to them until the other change hits
mainline, and then queue them up after that.
--
Jens Axboe
^ permalink raw reply
* Re: [PATCH bpf-next 4/5] bpf, x64: rework pro/epilogue and tailcall handling in JIT
From: Alexei Starovoitov @ 2020-07-17 2:16 UTC (permalink / raw)
To: Daniel Borkmann
Cc: Maciej Fijalkowski, ast, bpf, netdev, bjorn.topel,
magnus.karlsson
In-Reply-To: <932141f5-7abb-1c01-111d-a64baf187a40@iogearbox.net>
On Fri, Jul 17, 2020 at 01:06:07AM +0200, Daniel Borkmann wrote:
> > + ret = bpf_arch_text_poke(poke->tailcall_bypass,
> > + BPF_MOD_JUMP,
> > + NULL, bypass_addr);
> > + BUG_ON(ret < 0 && ret != -EINVAL);
> > + /* let other CPUs finish the execution of program
> > + * so that it will not possible to expose them
> > + * to invalid nop, stack unwind, nop state
> > + */
> > + synchronize_rcu();
>
> Very heavyweight that we need to potentially call this /multiple/ times for just a
> /single/ map update under poke mutex even ... but agree it's needed here to avoid
> racing. :(
Yeah. I wasn't clear with my suggestion earlier.
I meant to say that synchronize_rcu() can be done between two loops.
list_for_each_entry(elem, &aux->poke_progs, list)
for (i = 0; i < elem->aux->size_poke_tab; i++)
bpf_arch_text_poke(poke->tailcall_bypass, ...
synchronize_rcu();
list_for_each_entry(elem, &aux->poke_progs, list)
for (i = 0; i < elem->aux->size_poke_tab; i++)
bpf_arch_text_poke(poke->poke->tailcall_target, ...
Not sure how much better it will be though.
text_poke is heavy.
I think it's heavier than synchronize_rcu().
Long term we can do batch of text_poke-s.
I'm actually fine with above approach of synchronize_rcu() without splitting the loop.
This kind of optimizations can be done later as a follow up.
I'd really like to land this stuff in this bpf-next cycle.
It's a big improvement to tail_calls and bpf2bpf calls.
^ permalink raw reply
* Re: [PATCH v4 1/2] kernel: Implement selective syscall userspace redirection
From: Gabriel Krisman Bertazi @ 2020-07-17 2:15 UTC (permalink / raw)
To: Andy Lutomirski
Cc: Thomas Gleixner, LKML, kernel, Matthew Wilcox, Paul Gofman,
Kees Cook, open list:KERNEL SELFTEST FRAMEWORK, Shuah Khan
In-Reply-To: <CALCETrWdCN5KsRUkrb8VoYGRBhy71P-MAHGWhuJ5y4Z3vByyvg@mail.gmail.com>
Andy Lutomirski <luto@kernel.org> writes:
> On Thu, Jul 16, 2020 at 12:31 PM Gabriel Krisman Bertazi
> <krisman@collabora.com> wrote:
>>
>
> This is quite nice. I have a few comments, though:
>
> You mentioned rt_sigreturn(). Should this automatically exempt the
> kernel-provided signal restorer on architectures (e.g. x86_32) that
> provide one?
That seems reasonable. Not sure how easy it is to do it, though.
> The amount of syscall entry wiring that arches need to do is IMO
> already a bit out of hand. Should we instead rename TIF_SECCOMP to
> TIF_SYSCALL_INTERCEPTION and have one generic callback that handles
> seccomp and this new thing?
Considering the previous suggestion from Kees to hide it inside the
tracehook and Thomas rework of this path, I'm not sure what is the best
solution here, but some rework of these flags is due. Thomas suggested
expanding these flags to 64 bits and having some arch specific and
arch-agnostic flags. With the storage expansion and arch-agnostic flags,
would this still be desirable?
>> +int do_syscall_user_dispatch(struct pt_regs *regs)
>> +{
>> + struct syscall_user_dispatch *sd = ¤t->syscall_dispatch;
>> + unsigned long ip = instruction_pointer(regs);
>> + char state;
>> +
>> + if (likely(ip >= sd->dispatcher_start && ip <= sd->dispatcher_end))
>> + return 0;
>> +
>> + if (likely(sd->selector)) {
>> + if (unlikely(__get_user(state, sd->selector)))
>> + do_exit(SIGSEGV);
>> +
>> + if (likely(state == 0))
>> + return 0;
>> +
>> + if (state != 1)
>> + do_exit(SIGSEGV);
>
> This seems a bit extreme and hard to debug if it ever happens.
Makes sense, but I don't see a better way to return the error here.
Maybe a SIGSYS with a different si_errno? Alternatively, we could
revert to the previous behavior of allowing syscalls on state != 0, that
existed in v1. What do you think?
--
Gabriel Krisman Bertazi
^ permalink raw reply
* [f2fs-dev] [PATCH v3 1/7] fscrypt: Add functions for direct I/O support
From: Satya Tangirala via Linux-f2fs-devel @ 2020-07-17 1:45 UTC (permalink / raw)
To: linux-fscrypt, linux-fsdevel, linux-f2fs-devel, linux-ext4
Cc: linux-xfs, Satya Tangirala, Eric Biggers
In-Reply-To: <20200717014540.71515-1-satyat@google.com>
From: Eric Biggers <ebiggers@google.com>
Introduce fscrypt_dio_supported() to check whether a direct I/O request
is unsupported due to encryption constraints, and
fscrypt_limit_io_pages() to check how many pages may be added to a bio
being prepared for direct I/O.
The IV_INO_LBLK_32 fscrypt policy introduced the possibility that DUNs
in logically continuous file blocks might wrap from 0xffffffff to 0.
Since this was particularly difficult to handle when block_size !=
PAGE_SIZE, fscrypt only supports blk-crypto en/decryption with
the IV_INO_LBLK_32 policy when block_size == PAGE_SIZE, and ensures that
the DUN never wraps around within any submitted bio.
fscrypt_limit_io_pages() can be used to determine the number of logically
contiguous blocks/pages that may be added to the bio without causing the
DUN to wrap around within the bio. This is an alternative to calling
fscrypt_mergeable_bio() on each page in a range of logically contiguous
pages.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Co-developed-by: Satya Tangirala <satyat@google.com>
Signed-off-by: Satya Tangirala <satyat@google.com>
---
fs/crypto/crypto.c | 8 ++++
fs/crypto/inline_crypt.c | 80 ++++++++++++++++++++++++++++++++++++++++
include/linux/fscrypt.h | 19 ++++++++++
3 files changed, 107 insertions(+)
diff --git a/fs/crypto/crypto.c b/fs/crypto/crypto.c
index a52cf32733ab..fb34364360b3 100644
--- a/fs/crypto/crypto.c
+++ b/fs/crypto/crypto.c
@@ -69,6 +69,14 @@ void fscrypt_free_bounce_page(struct page *bounce_page)
}
EXPORT_SYMBOL(fscrypt_free_bounce_page);
+/*
+ * Generate the IV for the given logical block number within the given file.
+ * For filenames encryption, lblk_num == 0.
+ *
+ * Keep this in sync with fscrypt_limit_io_pages(). fscrypt_limit_io_pages()
+ * needs to know about any IV generation methods where the low bits of IV don't
+ * simply contain the lblk_num (e.g., IV_INO_LBLK_32).
+ */
void fscrypt_generate_iv(union fscrypt_iv *iv, u64 lblk_num,
const struct fscrypt_info *ci)
{
diff --git a/fs/crypto/inline_crypt.c b/fs/crypto/inline_crypt.c
index d7aecadf33c1..f5af6a63e04c 100644
--- a/fs/crypto/inline_crypt.c
+++ b/fs/crypto/inline_crypt.c
@@ -16,6 +16,7 @@
#include <linux/blkdev.h>
#include <linux/buffer_head.h>
#include <linux/sched/mm.h>
+#include <linux/uio.h>
#include "fscrypt_private.h"
@@ -362,3 +363,82 @@ bool fscrypt_mergeable_bio_bh(struct bio *bio,
return fscrypt_mergeable_bio(bio, inode, next_lblk);
}
EXPORT_SYMBOL_GPL(fscrypt_mergeable_bio_bh);
+
+/**
+ * fscrypt_dio_supported() - check whether a direct I/O request is unsupported
+ * due to encryption constraints
+ * @iocb: the file and position the I/O is targeting
+ * @iter: the I/O data segment(s)
+ *
+ * Return: true if direct I/O is supported
+ */
+bool fscrypt_dio_supported(struct kiocb *iocb, struct iov_iter *iter)
+{
+ const struct inode *inode = file_inode(iocb->ki_filp);
+ const unsigned int blocksize = i_blocksize(inode);
+
+ /* If the file is unencrypted, no veto from us. */
+ if (!fscrypt_needs_contents_encryption(inode))
+ return true;
+
+ /* We only support direct I/O with inline crypto, not fs-layer crypto */
+ if (!fscrypt_inode_uses_inline_crypto(inode))
+ return false;
+
+ /*
+ * Since the granularity of encryption is filesystem blocks, the I/O
+ * must be block aligned -- not just disk sector aligned.
+ */
+ if (!IS_ALIGNED(iocb->ki_pos | iov_iter_alignment(iter), blocksize))
+ return false;
+
+ return true;
+}
+EXPORT_SYMBOL_GPL(fscrypt_dio_supported);
+
+/**
+ * fscrypt_limit_io_pages() - limit I/O pages to avoid discontiguous DUNs
+ * @inode: the file on which I/O is being done
+ * @pos: the file position (in bytes) at which the I/O is being done
+ * @nr_pages: the number of pages we want to submit starting at @pos
+ *
+ * Determine the limit to the number of pages that can be submitted in the bio
+ * targeting @pos without causing a data unit number (DUN) discontinuity.
+ *
+ * For IV generation methods that can't cause DUN wraparounds
+ * within logically continuous data blocks, the maximum number of pages is
+ * simply @nr_pages. For those IV generation methods that *might* cause DUN
+ * wraparounds, the returned number of pages is the largest possible number of
+ * pages (less than @nr_pages) that can be added to the bio without causing a
+ * DUN wraparound within the bio.
+ *
+ * Return: the actual number of pages that can be submitted
+ */
+int fscrypt_limit_io_pages(const struct inode *inode, loff_t pos, int nr_pages)
+{
+ const struct fscrypt_info *ci = inode->i_crypt_info;
+ u32 dun;
+
+ if (!fscrypt_inode_uses_inline_crypto(inode))
+ return nr_pages;
+
+ if (nr_pages <= 1)
+ return nr_pages;
+
+ if (!(fscrypt_policy_flags(&ci->ci_policy) &
+ FSCRYPT_POLICY_FLAG_IV_INO_LBLK_32))
+ return nr_pages;
+
+ /*
+ * fscrypt_select_encryption_impl() ensures that block_size == PAGE_SIZE
+ * when using FSCRYPT_POLICY_FLAG_IV_INO_LBLK_32.
+ */
+ if (WARN_ON_ONCE(i_blocksize(inode) != PAGE_SIZE))
+ return 1;
+
+ /* With IV_INO_LBLK_32, the DUN can wrap around from U32_MAX to 0. */
+
+ dun = ci->ci_hashed_ino + (pos >> inode->i_blkbits);
+
+ return min_t(u64, nr_pages, (u64)U32_MAX + 1 - dun);
+}
diff --git a/include/linux/fscrypt.h b/include/linux/fscrypt.h
index bb257411365f..c205c214b35e 100644
--- a/include/linux/fscrypt.h
+++ b/include/linux/fscrypt.h
@@ -559,6 +559,11 @@ bool fscrypt_mergeable_bio(struct bio *bio, const struct inode *inode,
bool fscrypt_mergeable_bio_bh(struct bio *bio,
const struct buffer_head *next_bh);
+bool fscrypt_dio_supported(struct kiocb *iocb, struct iov_iter *iter);
+
+int fscrypt_limit_io_pages(const struct inode *inode, loff_t pos,
+ int nr_pages);
+
#else /* CONFIG_FS_ENCRYPTION_INLINE_CRYPT */
static inline bool __fscrypt_inode_uses_inline_crypto(const struct inode *inode)
@@ -587,6 +592,20 @@ static inline bool fscrypt_mergeable_bio_bh(struct bio *bio,
{
return true;
}
+
+static inline bool fscrypt_dio_supported(struct kiocb *iocb,
+ struct iov_iter *iter)
+{
+ const struct inode *inode = file_inode(iocb->ki_filp);
+
+ return !fscrypt_needs_contents_encryption(inode);
+}
+
+static inline int fscrypt_limit_io_pages(const struct inode *inode, loff_t pos,
+ int nr_pages)
+{
+ return nr_pages;
+}
#endif /* !CONFIG_FS_ENCRYPTION_INLINE_CRYPT */
/**
--
2.28.0.rc0.105.gf9edc3c819-goog
_______________________________________________
Linux-f2fs-devel mailing list
Linux-f2fs-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/linux-f2fs-devel
^ permalink raw reply related
* [GIT PULL FOR v5.9] Convert Renesas DT bindings to YAML
From: Laurent Pinchart @ 2020-07-17 2:13 UTC (permalink / raw)
To: linux-media
Hi Mauro,
The following changes since commit 6f01dfb760c027d5dd6199d91ee9599f2676b5c6:
media: cros-ec-cec: do not bail on device_init_wakeup failure (2020-07-04 12:45:45 +0200)
are available in the Git repository at:
git://linuxtv.org/pinchartl/media.git tags/v4l2-yaml-20200717
for you to fetch changes up to c87091a878aba5b62fae9f208d0aab47f698e8e6:
dt-bindings: media: renesas,vsp1: Add power-domains and resets (2020-07-17 05:09:55 +0300)
----------------------------------------------------------------
Convert Renesas DT bindings to YAML
----------------------------------------------------------------
Laurent Pinchart (8):
dt-bindings: media: renesas,fcp: Convert binding to YAML
dt-bindings: media: renesas,fcp: Make power-domains mandatory
dt-bindings: media: renesas,fcp: Add resets and iommus properties
dt-bindings: media: renesas,fdp1: Convert binding to YAML
dt-bindings: media: renesas,fdp1: Make power-domains mandatory
dt-bindings: media: renesas,fdp1: Add resets property
dt-bindings: media: renesas,vsp1: Convert binding to YAML
dt-bindings: media: renesas,vsp1: Add power-domains and resets
.../devicetree/bindings/media/renesas,fcp.txt | 34 -------
.../devicetree/bindings/media/renesas,fcp.yaml | 66 +++++++++++++
.../devicetree/bindings/media/renesas,fdp1.txt | 37 -------
.../devicetree/bindings/media/renesas,fdp1.yaml | 69 +++++++++++++
.../devicetree/bindings/media/renesas,vsp1.txt | 30 ------
.../devicetree/bindings/media/renesas,vsp1.yaml | 97 +++++++++++++++++++
MAINTAINERS | 6 +-
7 files changed, 235 insertions(+), 104 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/media/renesas,fcp.txt
create mode 100644 Documentation/devicetree/bindings/media/renesas,fcp.yaml
delete mode 100644 Documentation/devicetree/bindings/media/renesas,fdp1.txt
create mode 100644 Documentation/devicetree/bindings/media/renesas,fdp1.yaml
delete mode 100644 Documentation/devicetree/bindings/media/renesas,vsp1.txt
create mode 100644 Documentation/devicetree/bindings/media/renesas,vsp1.yaml
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: [PATCH] remoteproc: qcom: pil-info: Fix shift overflow
From: Nathan Chancellor @ 2020-07-17 2:13 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Ohad Ben-Cohen, linux-arm-msm, linux-remoteproc, linux-kernel,
Lee Jones
In-Reply-To: <20200716054817.157608-1-bjorn.andersson@linaro.org>
On Wed, Jul 15, 2020 at 10:48:17PM -0700, Bjorn Andersson wrote:
> On platforms with 32-bit phys_addr_t the shift to get the upper word of
> the base address of the memory region is invalid. Cast the base to 64
> bit to resolv this.
>
> Fixes: 549b67da660d ("remoteproc: qcom: Introduce helper to store pil info in IMEM")
> Reported-by: Lee Jones <lee.jones@linaro.org>
> Reported-by: Nathan Chancellor <natechancellor@gmail.com>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Nathan Chancellor <natechancellor@gmail.com> # build
> ---
> drivers/remoteproc/qcom_pil_info.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/remoteproc/qcom_pil_info.c b/drivers/remoteproc/qcom_pil_info.c
> index 0536e3904669..5521c4437ffa 100644
> --- a/drivers/remoteproc/qcom_pil_info.c
> +++ b/drivers/remoteproc/qcom_pil_info.c
> @@ -108,7 +108,7 @@ int qcom_pil_info_store(const char *image, phys_addr_t base, size_t size)
> found_existing:
> /* Use two writel() as base is only aligned to 4 bytes on odd entries */
> writel(base, entry + PIL_RELOC_NAME_LEN);
> - writel(base >> 32, entry + PIL_RELOC_NAME_LEN + 4);
> + writel((u64)base >> 32, entry + PIL_RELOC_NAME_LEN + 4);
> writel(size, entry + PIL_RELOC_NAME_LEN + sizeof(__le64));
> mutex_unlock(&pil_reloc_lock);
>
> --
> 2.26.2
>
^ permalink raw reply
* Re: [Intel-wired-lan] [PATCH] igc: Do not use link uninitialized in igc_check_for_copper_link
From: Nathan Chancellor @ 2020-07-17 2:12 UTC (permalink / raw)
To: Neftin, Sasha
Cc: Jeff Kirsher, netdev, linux-kernel, clang-built-linux,
intel-wired-lan, Jakub Kicinski, David S. Miller,
Lifshits, Vitaly, Nguyen, Anthony L
In-Reply-To: <cdfec63a-e51f-e1a6-aa60-6ca949338306@intel.com>
On Thu, Jul 16, 2020 at 07:29:03PM +0300, Neftin, Sasha wrote:
> On 7/16/2020 07:49, Nathan Chancellor wrote:
> > Clang warns:
> >
> Hello Nathan,
> Thanks for tracking our code.Please, look at https://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200709073416.14126-1-sasha.neftin@intel.com/
> - I hope this patch already address this Clang warns - please, let me know.
I have not explicitly tested it but it seems obvious that it will. Let's
go with that.
Cheers,
Nathan
> > drivers/net/ethernet/intel/igc/igc_mac.c:374:6: warning: variable 'link'
> > is used uninitialized whenever 'if' condition is true
> > [-Wsometimes-uninitialized]
> > if (!mac->get_link_status) {
> > ^~~~~~~~~~~~~~~~~~~~~
> > drivers/net/ethernet/intel/igc/igc_mac.c:424:33: note: uninitialized use
> > occurs here
> > ret_val = igc_set_ltr_i225(hw, link);
> > ^~~~
> > drivers/net/ethernet/intel/igc/igc_mac.c:374:2: note: remove the 'if' if
> > its condition is always false
> > if (!mac->get_link_status) {
> > ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > drivers/net/ethernet/intel/igc/igc_mac.c:367:11: note: initialize the
> > variable 'link' to silence this warning
> > bool link;
> > ^
> > = 0
> > 1 warning generated.
> >
> > It is not wrong, link is only uninitialized after this through
> > igc_phy_has_link. Presumably, if we skip the majority of this function
> > when get_link_status is false, we should skip calling igc_set_ltr_i225
> > as well. Just directly return 0 in this case, rather than bothering with
> > adding another label or initializing link in the if statement.
> >
> > Fixes: 707abf069548 ("igc: Add initial LTR support")
> > Link: https://github.com/ClangBuiltLinux/linux/issues/1095
> > Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
> > ---
> > drivers/net/ethernet/intel/igc/igc_mac.c | 6 ++----
> > 1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c
> > index b47e7b0a6398..26e3c56a4a8b 100644
> > --- a/drivers/net/ethernet/intel/igc/igc_mac.c
> > +++ b/drivers/net/ethernet/intel/igc/igc_mac.c
> > @@ -371,10 +371,8 @@ s32 igc_check_for_copper_link(struct igc_hw *hw)
> > * get_link_status flag is set upon receiving a Link Status
> > * Change or Rx Sequence Error interrupt.
> > */
> > - if (!mac->get_link_status) {
> > - ret_val = 0;
> > - goto out;
> > - }
> > + if (!mac->get_link_status)
> > + return 0;
> > /* First we want to see if the MII Status Register reports
> > * link. If so, then we want to get the current speed/duplex
> >
> > base-commit: ca0e494af5edb59002665bf12871e94b4163a257
> >
> Thanks,
> Sasha
^ permalink raw reply
* [Intel-wired-lan] [PATCH] igc: Do not use link uninitialized in igc_check_for_copper_link
From: Nathan Chancellor @ 2020-07-17 2:12 UTC (permalink / raw)
To: intel-wired-lan
In-Reply-To: <cdfec63a-e51f-e1a6-aa60-6ca949338306@intel.com>
On Thu, Jul 16, 2020 at 07:29:03PM +0300, Neftin, Sasha wrote:
> On 7/16/2020 07:49, Nathan Chancellor wrote:
> > Clang warns:
> >
> Hello Nathan,
> Thanks for tracking our code.Please, look at https://patchwork.ozlabs.org/project/intel-wired-lan/patch/20200709073416.14126-1-sasha.neftin at intel.com/
> - I hope this patch already address this Clang warns - please, let me know.
I have not explicitly tested it but it seems obvious that it will. Let's
go with that.
Cheers,
Nathan
> > drivers/net/ethernet/intel/igc/igc_mac.c:374:6: warning: variable 'link'
> > is used uninitialized whenever 'if' condition is true
> > [-Wsometimes-uninitialized]
> > if (!mac->get_link_status) {
> > ^~~~~~~~~~~~~~~~~~~~~
> > drivers/net/ethernet/intel/igc/igc_mac.c:424:33: note: uninitialized use
> > occurs here
> > ret_val = igc_set_ltr_i225(hw, link);
> > ^~~~
> > drivers/net/ethernet/intel/igc/igc_mac.c:374:2: note: remove the 'if' if
> > its condition is always false
> > if (!mac->get_link_status) {
> > ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > drivers/net/ethernet/intel/igc/igc_mac.c:367:11: note: initialize the
> > variable 'link' to silence this warning
> > bool link;
> > ^
> > = 0
> > 1 warning generated.
> >
> > It is not wrong, link is only uninitialized after this through
> > igc_phy_has_link. Presumably, if we skip the majority of this function
> > when get_link_status is false, we should skip calling igc_set_ltr_i225
> > as well. Just directly return 0 in this case, rather than bothering with
> > adding another label or initializing link in the if statement.
> >
> > Fixes: 707abf069548 ("igc: Add initial LTR support")
> > Link: https://github.com/ClangBuiltLinux/linux/issues/1095
> > Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
> > ---
> > drivers/net/ethernet/intel/igc/igc_mac.c | 6 ++----
> > 1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c
> > index b47e7b0a6398..26e3c56a4a8b 100644
> > --- a/drivers/net/ethernet/intel/igc/igc_mac.c
> > +++ b/drivers/net/ethernet/intel/igc/igc_mac.c
> > @@ -371,10 +371,8 @@ s32 igc_check_for_copper_link(struct igc_hw *hw)
> > * get_link_status flag is set upon receiving a Link Status
> > * Change or Rx Sequence Error interrupt.
> > */
> > - if (!mac->get_link_status) {
> > - ret_val = 0;
> > - goto out;
> > - }
> > + if (!mac->get_link_status)
> > + return 0;
> > /* First we want to see if the MII Status Register reports
> > * link. If so, then we want to get the current speed/duplex
> >
> > base-commit: ca0e494af5edb59002665bf12871e94b4163a257
> >
> Thanks,
> Sasha
^ permalink raw reply
* Re: [PATCH v3 0/3] Off-load TLB invalidations to host for !GTSE
From: Nicholas Piggin @ 2020-07-17 2:08 UTC (permalink / raw)
To: Bharata B Rao, Qian Cai
Cc: sfr, aneesh.kumar, linux-kernel, linux-next, linuxppc-dev
In-Reply-To: <20200716172713.GA4565@lca.pw>
Excerpts from Qian Cai's message of July 17, 2020 3:27 am:
> On Fri, Jul 03, 2020 at 11:06:05AM +0530, Bharata B Rao wrote:
>> Hypervisor may choose not to enable Guest Translation Shootdown Enable
>> (GTSE) option for the guest. When GTSE isn't ON, the guest OS isn't
>> permitted to use instructions like tblie and tlbsync directly, but is
>> expected to make hypervisor calls to get the TLB flushed.
>>
>> This series enables the TLB flush routines in the radix code to
>> off-load TLB flushing to hypervisor via the newly proposed hcall
>> H_RPT_INVALIDATE.
>>
>> To easily check the availability of GTSE, it is made an MMU feature.
>> The OV5 handling and H_REGISTER_PROC_TBL hcall are changed to
>> handle GTSE as an optionally available feature and to not assume GTSE
>> when radix support is available.
>>
>> The actual hcall implementation for KVM isn't included in this
>> patchset and will be posted separately.
>>
>> Changes in v3
>> =============
>> - Fixed a bug in the hcall wrapper code where we were missing setting
>> H_RPTI_TYPE_NESTED while retrying the failed flush request with
>> a full flush for the nested case.
>> - s/psize_to_h_rpti/psize_to_rpti_pgsize
>>
>> v2: https://lore.kernel.org/linuxppc-dev/20200626131000.5207-1-bharata@linux.ibm.com/T/#t
>>
>> Bharata B Rao (2):
>> powerpc/mm: Enable radix GTSE only if supported.
>> powerpc/pseries: H_REGISTER_PROC_TBL should ask for GTSE only if
>> enabled
>>
>> Nicholas Piggin (1):
>> powerpc/mm/book3s64/radix: Off-load TLB invalidations to host when
>> !GTSE
>
> Reverting the whole series fixed random memory corruptions during boot on
> POWER9 PowerNV systems below.
If I s/mmu_has_feature(MMU_FTR_GTSE)/(1)/g in radix_tlb.c, then the .o
disasm is the same as reverting my patch.
Feature bits not being set right? PowerNV should be pretty simple, seems
to do the same as FTR_TYPE_RADIX.
So... test being done before static keys are set up? Shouldn't be. Must
be something obvious I just can't see it.
Thanks,
Nick
^ permalink raw reply
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