From: sashiko-bot@kernel.org
To: "Pradeep P V K" <pradeep.pragallapati@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, olteanv@gmail.com,
vkoul@kernel.org, linux-phy@lists.infradead.org,
conor+dt@kernel.org, neil.armstrong@linaro.org,
linux-scsi@vger.kernel.org
Subject: Re: [PATCH v3 3/5] arm64: dts: qcom: glymur: Add UFS nodes
Date: Wed, 07 Oct 2026 06:40:58 +0000 [thread overview]
Message-ID: <sashiko-outbox-162678@kernel.org> (raw)
In-Reply-To: <20261007-glymur_ufs_qcb_enablement-v3-3-84cf4f861415@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dts: missing required power-domains property in ufs_mem_phy
--
commit cc6e215ec76c80b1408b03a4a6419de1ac3953d3
Author: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
arm64: dts: qcom: glymur: Add UFS nodes
Add UFS PHY and UFS host controller nodes for Glymur SoC.
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index 65a398c0a9920..49ef89b41aada 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
[ ... ]
> @@ -4102,6 +4102,125 @@ rng: rng@10c3000 {
> reg = <0x0 0x010c3000 0x0 0x1000>;
> };
>
> + ufs_mem_phy: phy@1d80000 {
> + compatible = "qcom,glymur-qmp-ufs-phy";
> + reg = <0x0 0x01d80000 0x0 0x2000>;
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
> + /* UFS and PCIE4 share the same clkref */
> + <&tcsr TCSR_PCIE_4_CLKREF_EN>;
> +
> + clock-names = "ref",
> + "ref_aux",
> + "qref";
> +
> + resets = <&ufs_mem_hc 0>;
> + reset-names = "ufsphy";
> +
> + #clock-cells = <1>;
> + #phy-cells = <0>;
> +
> + status = "disabled";
> + };
[Severity: Medium]
Is the ufs_mem_phy node missing a power-domains property?
This node appears to violate the qcom,sc8280xp-qmp-ufs-phy.yaml DT schema by
omitting this required property.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261007-glymur_ufs_qcb_enablement-v3-0-84cf4f861415@oss.qualcomm.com?part=3
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Pradeep P V K" <pradeep.pragallapati@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, olteanv@gmail.com,
vkoul@kernel.org, linux-phy@lists.infradead.org,
conor+dt@kernel.org, neil.armstrong@linaro.org,
linux-scsi@vger.kernel.org
Subject: Re: [PATCH v3 3/5] arm64: dts: qcom: glymur: Add UFS nodes
Date: Wed, 07 Oct 2026 06:40:58 +0000 [thread overview]
Message-ID: <sashiko-outbox-162678@kernel.org> (raw)
In-Reply-To: <20261007-glymur_ufs_qcb_enablement-v3-3-84cf4f861415@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dts: missing required power-domains property in ufs_mem_phy
--
commit cc6e215ec76c80b1408b03a4a6419de1ac3953d3
Author: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
arm64: dts: qcom: glymur: Add UFS nodes
Add UFS PHY and UFS host controller nodes for Glymur SoC.
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index 65a398c0a9920..49ef89b41aada 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
[ ... ]
> @@ -4102,6 +4102,125 @@ rng: rng@10c3000 {
> reg = <0x0 0x010c3000 0x0 0x1000>;
> };
>
> + ufs_mem_phy: phy@1d80000 {
> + compatible = "qcom,glymur-qmp-ufs-phy";
> + reg = <0x0 0x01d80000 0x0 0x2000>;
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
> + /* UFS and PCIE4 share the same clkref */
> + <&tcsr TCSR_PCIE_4_CLKREF_EN>;
> +
> + clock-names = "ref",
> + "ref_aux",
> + "qref";
> +
> + resets = <&ufs_mem_hc 0>;
> + reset-names = "ufsphy";
> +
> + #clock-cells = <1>;
> + #phy-cells = <0>;
> +
> + status = "disabled";
> + };
[Severity: Medium]
Is the ufs_mem_phy node missing a power-domains property?
This node appears to violate the qcom,sc8280xp-qmp-ufs-phy.yaml DT schema by
omitting this required property.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261007-glymur_ufs_qcb_enablement-v3-0-84cf4f861415@oss.qualcomm.com?part=3
next prev parent reply other threads:[~2026-10-07 6:41 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 6:29 [PATCH v3 0/5] Add UFS support for Glymur Qualcomm SoC Pradeep P V K
2026-10-07 6:29 ` Pradeep P V K
2026-10-07 6:29 ` [PATCH v3 1/5] dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: Document Glymur QMP UFS PHY Pradeep P V K
2026-10-07 6:29 ` Pradeep P V K
2026-10-07 6:29 ` [PATCH v3 2/5] scsi: ufs: qcom: dt-bindings: Document Glymur UFS controller Pradeep P V K
2026-10-07 6:29 ` Pradeep P V K
2026-10-07 15:24 ` Manivannan Sadhasivam
2026-10-07 15:24 ` Manivannan Sadhasivam
2026-10-09 10:28 ` Pradeep Pragallapati
2026-10-09 10:28 ` Pradeep Pragallapati
2026-10-07 6:29 ` [PATCH v3 3/5] arm64: dts: qcom: glymur: Add UFS nodes Pradeep P V K
2026-10-07 6:29 ` Pradeep P V K
2026-10-07 6:40 ` sashiko-bot [this message]
2026-10-07 6:40 ` sashiko-bot
2026-10-07 7:43 ` Dmitry Baryshkov
2026-10-07 7:43 ` Dmitry Baryshkov
2026-10-07 11:00 ` Pradeep Pragallapati
2026-10-07 11:00 ` Pradeep Pragallapati
2026-10-07 11:35 ` Pankaj Patil
2026-10-07 11:35 ` Pankaj Patil
2026-10-07 11:40 ` Pradeep Pragallapati
2026-10-07 11:40 ` Pradeep Pragallapati
2026-10-07 6:29 ` [PATCH v3 4/5] arm64: dts: qcom: glymur-qcb: Enable UFS Pradeep P V K
2026-10-07 6:29 ` Pradeep P V K
2026-10-07 6:29 ` [PATCH v3 5/5] phy: qcom-qmp-ufs: Add Glymur support Pradeep P V K
2026-10-07 6:29 ` Pradeep P V K
2026-10-07 7:48 ` Dmitry Baryshkov
2026-10-07 7:48 ` Dmitry Baryshkov
2026-10-07 11:33 ` Pradeep Pragallapati
2026-10-07 11:33 ` Pradeep Pragallapati
2026-10-07 13:43 ` Dmitry Baryshkov
2026-10-07 13:43 ` Dmitry Baryshkov
2026-10-07 14:45 ` Pradeep Pragallapati
2026-10-07 14:45 ` Pradeep Pragallapati
2026-10-07 15:47 ` Dmitry Baryshkov
2026-10-07 15:47 ` Dmitry Baryshkov
2026-10-09 10:20 ` Pradeep Pragallapati
2026-10-09 10:20 ` Pradeep Pragallapati
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