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From: sashiko-bot@kernel.org
To: "Xilin Wu" <sophon@radxa.com>
Cc: neil.armstrong@linaro.org, linux-amlogic@lists.infradead.org,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v2 20/20] drm/msm/dp: Add static HDR metadata support for DP and eDP
Date: Fri, 09 Oct 2026 03:40:15 +0000	[thread overview]
Message-ID: <sashiko-outbox-164781@kernel.org> (raw)
In-Reply-To: <20261009-msm-dp-hdr10-v2-20-1835d4966da3@radxa.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] drm/msm/dp: unclocked access crash in msm_dp_display_disable() after failed PHY test
- [Medium] cleanup: mixed goto and scoped_guard in msm_dp_display_atomic_enable
--

commit 3c44a9bdc2d3792773d111df209f6cd19e02a7d6
Author: Xilin Wu <sophon@radxa.com>
Subject: drm/msm/dp: Add static HDR metadata support for DP and eDP

Expose HDR_OUTPUT_METADATA and validate and pack it during atomic check.
Program Generic2 from the checked bridge state on every stream enable.
Reuse the DRM metadata conversion and infoframe packing helpers.

> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index c51d033598a5b..7104822b03e05 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
[ ... ]
> @@ -880,10 +903,13 @@ static int msm_dp_display_disable(struct msm_dp_display_private *dp,
>  
>  	lockdep_assert_held(&dp->plugged_lock);
>  
> +	dp->video_test_blocked = false;
> +
>  	if (!msm_dp_display->power_on)
>  		return 0;
>  
>  	msm_dp_panel_disable_vsc_sdp(msm_dp_panel);
> +	msm_dp_panel_disable_hdr_sdp(msm_dp_panel);

[Severity: High]
Can this unconditionally access hardware registers when the DP link clocks
are disabled?

If a DP sink requests a PHY test pattern,
msm_dp_ctrl_process_phy_test_request() intentionally disables the link
clocks via msm_dp_ctrl_off_link().

If msm_dp_ctrl_on_link() subsequently fails, it returns early leaving the
link clocks disabled, but the display power_on flag remains true.

When msm_dp_display_disable() is then called (e.g. on monitor unplug), it
proceeds because power_on is true, and calls msm_dp_panel_disable_hdr_sdp()
and msm_dp_panel_disable_vsc_sdp(). These functions write to hardware link
registers (like MMSS_DP_SDP_CFG).

Accessing these registers while the link clocks are off can cause a
synchronous external abort (kernel panic) which is reachable via a faulty
or malicious DP sink.

[ ... ]
> @@ -1774,6 +1800,7 @@ void msm_dp_display_atomic_enable(struct msm_dp *msm_dp_display,
>  		msm_dp_hpd_unplug_handle(dp);
>  	msm_dp_display_unprepare(dp);
>  	scoped_guard(mutex, &dp->plugged_lock) {
> +		dp->video_test_blocked = false;
>  		dp->link_failed = true;
>  		/* Keep reporting BAD, but notify only once until recovery. */
>  		schedule_work(&dp->link_status_work);

[Severity: Medium]
Does this mix goto-based error handling and scope-based cleanup in the same
function?

The msm_dp_display_atomic_enable() function uses traditional goto-based error
handling (goto err; goto err_prepare;) but also includes a scoped_guard()
block at the end.

According to kernel cleanup guidelines (include/linux/cleanup.h), mixing
goto and scope-based cleanup within the same function is explicitly
prohibited because it creates confusing ownership semantics and increases
the risk of double-free or locking bugs during maintenance.

Could this be converted to use scope-based cleanup entirely, or use
traditional locking for this block to match the rest of the function?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009-msm-dp-hdr10-v2-0-1835d4966da3@radxa.com?part=20

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Xilin Wu" <sophon@radxa.com>
Cc: neil.armstrong@linaro.org, linux-amlogic@lists.infradead.org,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v2 20/20] drm/msm/dp: Add static HDR metadata support for DP and eDP
Date: Fri, 09 Oct 2026 03:40:15 +0000	[thread overview]
Message-ID: <sashiko-outbox-164781@kernel.org> (raw)
In-Reply-To: <20261009-msm-dp-hdr10-v2-20-1835d4966da3@radxa.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] drm/msm/dp: unclocked access crash in msm_dp_display_disable() after failed PHY test
- [Medium] cleanup: mixed goto and scoped_guard in msm_dp_display_atomic_enable
--

commit 3c44a9bdc2d3792773d111df209f6cd19e02a7d6
Author: Xilin Wu <sophon@radxa.com>
Subject: drm/msm/dp: Add static HDR metadata support for DP and eDP

Expose HDR_OUTPUT_METADATA and validate and pack it during atomic check.
Program Generic2 from the checked bridge state on every stream enable.
Reuse the DRM metadata conversion and infoframe packing helpers.

> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index c51d033598a5b..7104822b03e05 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
[ ... ]
> @@ -880,10 +903,13 @@ static int msm_dp_display_disable(struct msm_dp_display_private *dp,
>  
>  	lockdep_assert_held(&dp->plugged_lock);
>  
> +	dp->video_test_blocked = false;
> +
>  	if (!msm_dp_display->power_on)
>  		return 0;
>  
>  	msm_dp_panel_disable_vsc_sdp(msm_dp_panel);
> +	msm_dp_panel_disable_hdr_sdp(msm_dp_panel);

[Severity: High]
Can this unconditionally access hardware registers when the DP link clocks
are disabled?

If a DP sink requests a PHY test pattern,
msm_dp_ctrl_process_phy_test_request() intentionally disables the link
clocks via msm_dp_ctrl_off_link().

If msm_dp_ctrl_on_link() subsequently fails, it returns early leaving the
link clocks disabled, but the display power_on flag remains true.

When msm_dp_display_disable() is then called (e.g. on monitor unplug), it
proceeds because power_on is true, and calls msm_dp_panel_disable_hdr_sdp()
and msm_dp_panel_disable_vsc_sdp(). These functions write to hardware link
registers (like MMSS_DP_SDP_CFG).

Accessing these registers while the link clocks are off can cause a
synchronous external abort (kernel panic) which is reachable via a faulty
or malicious DP sink.

[ ... ]
> @@ -1774,6 +1800,7 @@ void msm_dp_display_atomic_enable(struct msm_dp *msm_dp_display,
>  		msm_dp_hpd_unplug_handle(dp);
>  	msm_dp_display_unprepare(dp);
>  	scoped_guard(mutex, &dp->plugged_lock) {
> +		dp->video_test_blocked = false;
>  		dp->link_failed = true;
>  		/* Keep reporting BAD, but notify only once until recovery. */
>  		schedule_work(&dp->link_status_work);

[Severity: Medium]
Does this mix goto-based error handling and scope-based cleanup in the same
function?

The msm_dp_display_atomic_enable() function uses traditional goto-based error
handling (goto err; goto err_prepare;) but also includes a scoped_guard()
block at the end.

According to kernel cleanup guidelines (include/linux/cleanup.h), mixing
goto and scope-based cleanup within the same function is explicitly
prohibited because it creates confusing ownership semantics and increases
the risk of double-free or locking bugs during maintenance.

Could this be converted to use scope-based cleanup entirely, or use
traditional locking for this block to match the rest of the function?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009-msm-dp-hdr10-v2-0-1835d4966da3@radxa.com?part=20

  reply	other threads:[~2026-10-09  3:40 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09  3:15 [PATCH v2 00/20] drm/msm/dp: Add static HDR support for DP and eDP Xilin Wu
2026-10-09  3:15 ` Xilin Wu
2026-10-09  3:15 ` [PATCH v2 01/20] drm/atomic: Handle max bpc properties before connector state allocation Xilin Wu
2026-10-09  3:15   ` Xilin Wu
2026-10-10  2:48   ` Chaoyi Chen
2026-10-10  2:48     ` Chaoyi Chen
2026-10-12 12:33   ` Dmitry Baryshkov
2026-10-12 12:33     ` Dmitry Baryshkov
2026-10-09  3:15 ` [PATCH v2 02/20] drm/connector: Drop early state allocation for max bpc registration Xilin Wu
2026-10-09  3:15   ` Xilin Wu
2026-10-10 22:44   ` Martin Blumenstingl
2026-10-10 22:44     ` Martin Blumenstingl
2026-10-09  3:15 ` [PATCH v2 03/20] drm/bridge-connector: Attach max bpc for non-HDMI bridges Xilin Wu
2026-10-09  3:15   ` Xilin Wu
2026-10-10  2:39   ` Chaoyi Chen
2026-10-10  2:39     ` Chaoyi Chen
2026-10-12 12:40   ` Dmitry Baryshkov
2026-10-12 12:40     ` Dmitry Baryshkov
2026-10-09  3:15 ` [PATCH v2 04/20] drm/msm/dp: Accept a const SDP header when packing Xilin Wu
2026-10-09  3:15   ` Xilin Wu
2026-10-09  3:15 ` [PATCH v2 05/20] drm/msm/dp: Support multiple generic SDP slots Xilin Wu
2026-10-09  3:15   ` Xilin Wu
2026-10-09  3:15 ` [PATCH v2 06/20] drm/msm/dp: Keep runtime PM calls outside the connection lock Xilin Wu
2026-10-09  3:15   ` Xilin Wu
2026-10-09  3:37   ` sashiko-bot
2026-10-09  3:37     ` sashiko-bot
2026-10-09  3:15 ` [PATCH v2 07/20] drm/msm/dp: Serialize stream operations with HPD processing Xilin Wu
2026-10-09  3:15   ` Xilin Wu
2026-10-09  3:30   ` sashiko-bot
2026-10-09  3:30     ` sashiko-bot
2026-10-12 12:48   ` Dmitry Baryshkov
2026-10-12 12:48     ` Dmitry Baryshkov
2026-10-09  3:16 ` [PATCH v2 08/20] drm/msm/dp: Track PHY power ownership Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:16 ` [PATCH v2 09/20] drm/msm/dp: Unwind resources when enabling a stream fails Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:35   ` sashiko-bot
2026-10-09  3:35     ` sashiko-bot
2026-10-09  3:16 ` [PATCH v2 10/20] drm/msm/dp: Report stream enable failures through link status Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:28   ` sashiko-bot
2026-10-09  3:28     ` sashiko-bot
2026-10-09  3:16 ` [PATCH v2 11/20] drm/msm/dp: Cache eDP link capabilities after successful discovery Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:34   ` sashiko-bot
2026-10-09  3:34     ` sashiko-bot
2026-10-09  3:16 ` [PATCH v2 12/20] drm/msm/dp: Rebuild the eDP stream on modesets leaving self refresh Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:16 ` [PATCH v2 13/20] drm/msm/dp: Track output bit depth in bridge atomic state Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:16 ` [PATCH v2 14/20] drm/msm/dp: Clear stale MSA colorimetry bits Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-12  8:00   ` Konrad Dybcio
2026-10-12  8:00     ` Konrad Dybcio
2026-10-09  3:16 ` [PATCH v2 15/20] drm/msm/dp: Flush VSC updates when leaving YUV420 Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-12 14:09   ` Dmitry Baryshkov
2026-10-12 14:09     ` Dmitry Baryshkov
2026-10-09  3:16 ` [PATCH v2 16/20] drm/msm/dp: Disable PSR for YUV420 streams Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:34   ` sashiko-bot
2026-10-09  3:34     ` sashiko-bot
2026-10-12 14:36   ` Dmitry Baryshkov
2026-10-12 14:36     ` Dmitry Baryshkov
2026-10-09  3:16 ` [PATCH v2 17/20] drm/msm/dp: Track VSC packets in bridge atomic state Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:34   ` sashiko-bot
2026-10-09  3:34     ` sashiko-bot
2026-10-09  3:16 ` [PATCH v2 18/20] drm/msm/dp: Signal BT.2020 RGB on DP and eDP Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-12 14:48   ` Dmitry Baryshkov
2026-10-12 14:48     ` Dmitry Baryshkov
2026-10-09  3:16 ` [PATCH v2 19/20] drm/msm/dp: Serialize video test state changes Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:44   ` sashiko-bot
2026-10-09  3:44     ` sashiko-bot
2026-10-12 21:52   ` Dmitry Baryshkov
2026-10-12 21:52     ` Dmitry Baryshkov
2026-10-09  3:16 ` [PATCH v2 20/20] drm/msm/dp: Add static HDR metadata support for DP and eDP Xilin Wu
2026-10-09  3:16   ` Xilin Wu
2026-10-09  3:40   ` sashiko-bot [this message]
2026-10-09  3:40     ` sashiko-bot

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