From: sashiko-bot@kernel.org
To: "Xilin Wu" <sophon@radxa.com>
Cc: dri-devel@lists.freedesktop.org, neil.armstrong@linaro.org,
linux-amlogic@lists.infradead.org
Subject: Re: [PATCH v2 19/20] drm/msm/dp: Serialize video test state changes
Date: Fri, 09 Oct 2026 03:44:27 +0000 [thread overview]
Message-ID: <sashiko-outbox-164787@kernel.org> (raw)
In-Reply-To: <20261009-msm-dp-hdr10-v2-19-1835d4966da3@radxa.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/msm/dp: missing plugged_lock in msm_dp_panel_get_mode_bpp() leaves TOCTOU race
--
commit 016f17497dc5f474b86e152324fba4d9409781b6
Author: Xilin Wu <sophon@radxa.com>
drm/msm/dp: Serialize video test state changes
This commit serializes video test state access by routing it through the
display and using plugged_lock for HPD and debugfs updates. This prevents
race conditions during mode programming.
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index 34e1c48cdd794..c51d033598a5b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
[ ... ]
> @@ -689,8 +699,10 @@ static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display,
>
> dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
>
> - if (msm_dp_display_check_video_test(msm_dp_display))
> - bpp = msm_dp_display_get_test_bpp(msm_dp_display);
> + guard(mutex)(&dp->plugged_lock);
> +
> + if (dp->panel->video_test)
> + bpp = msm_dp_link_bit_depth_to_bpp(dp->link->test_video.test_bit_depth);
[Severity: Medium]
The commit message notes that reading the test flag and requested depth
separately allows values to change mid-read, and this function was safely
updated to hold plugged_lock.
However, does this patch miss the similar reads in msm_dp_panel_get_mode_bpp()
in drivers/gpu/drm/msm/dp/dp_panel.c?
That function is called during DRM mode validation and still reads these
fields sequentially without holding plugged_lock:
drivers/gpu/drm/msm/dp/dp_panel.c:msm_dp_panel_get_mode_bpp() {
...
if (msm_dp_panel->video_test)
bpp = msm_dp_link_bit_depth_to_bpp(
panel->link->test_video.test_bit_depth);
...
}
If HPD or debugfs updates these values concurrently, could this function
observe a torn state where the test flag is true but the bit depth has not
yet been updated, causing it to incorrectly accept or reject a mode based
on inconsistent parameters?
> else
> bpp = state->bpp;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261009-msm-dp-hdr10-v2-0-1835d4966da3@radxa.com?part=19
WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Xilin Wu" <sophon@radxa.com>
Cc: dri-devel@lists.freedesktop.org, neil.armstrong@linaro.org,
linux-amlogic@lists.infradead.org
Subject: Re: [PATCH v2 19/20] drm/msm/dp: Serialize video test state changes
Date: Fri, 09 Oct 2026 03:44:27 +0000 [thread overview]
Message-ID: <sashiko-outbox-164787@kernel.org> (raw)
In-Reply-To: <20261009-msm-dp-hdr10-v2-19-1835d4966da3@radxa.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/msm/dp: missing plugged_lock in msm_dp_panel_get_mode_bpp() leaves TOCTOU race
--
commit 016f17497dc5f474b86e152324fba4d9409781b6
Author: Xilin Wu <sophon@radxa.com>
drm/msm/dp: Serialize video test state changes
This commit serializes video test state access by routing it through the
display and using plugged_lock for HPD and debugfs updates. This prevents
race conditions during mode programming.
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index 34e1c48cdd794..c51d033598a5b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
[ ... ]
> @@ -689,8 +699,10 @@ static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display,
>
> dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
>
> - if (msm_dp_display_check_video_test(msm_dp_display))
> - bpp = msm_dp_display_get_test_bpp(msm_dp_display);
> + guard(mutex)(&dp->plugged_lock);
> +
> + if (dp->panel->video_test)
> + bpp = msm_dp_link_bit_depth_to_bpp(dp->link->test_video.test_bit_depth);
[Severity: Medium]
The commit message notes that reading the test flag and requested depth
separately allows values to change mid-read, and this function was safely
updated to hold plugged_lock.
However, does this patch miss the similar reads in msm_dp_panel_get_mode_bpp()
in drivers/gpu/drm/msm/dp/dp_panel.c?
That function is called during DRM mode validation and still reads these
fields sequentially without holding plugged_lock:
drivers/gpu/drm/msm/dp/dp_panel.c:msm_dp_panel_get_mode_bpp() {
...
if (msm_dp_panel->video_test)
bpp = msm_dp_link_bit_depth_to_bpp(
panel->link->test_video.test_bit_depth);
...
}
If HPD or debugfs updates these values concurrently, could this function
observe a torn state where the test flag is true but the bit depth has not
yet been updated, causing it to incorrectly accept or reject a mode based
on inconsistent parameters?
> else
> bpp = state->bpp;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261009-msm-dp-hdr10-v2-0-1835d4966da3@radxa.com?part=19
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next prev parent reply other threads:[~2026-10-09 3:44 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-09 3:15 [PATCH v2 00/20] drm/msm/dp: Add static HDR support for DP and eDP Xilin Wu
2026-10-09 3:15 ` Xilin Wu
2026-10-09 3:15 ` [PATCH v2 01/20] drm/atomic: Handle max bpc properties before connector state allocation Xilin Wu
2026-10-09 3:15 ` Xilin Wu
2026-10-10 2:48 ` Chaoyi Chen
2026-10-10 2:48 ` Chaoyi Chen
2026-10-12 12:33 ` Dmitry Baryshkov
2026-10-12 12:33 ` Dmitry Baryshkov
2026-10-09 3:15 ` [PATCH v2 02/20] drm/connector: Drop early state allocation for max bpc registration Xilin Wu
2026-10-09 3:15 ` Xilin Wu
2026-10-10 22:44 ` Martin Blumenstingl
2026-10-10 22:44 ` Martin Blumenstingl
2026-10-09 3:15 ` [PATCH v2 03/20] drm/bridge-connector: Attach max bpc for non-HDMI bridges Xilin Wu
2026-10-09 3:15 ` Xilin Wu
2026-10-10 2:39 ` Chaoyi Chen
2026-10-10 2:39 ` Chaoyi Chen
2026-10-12 12:40 ` Dmitry Baryshkov
2026-10-12 12:40 ` Dmitry Baryshkov
2026-10-09 3:15 ` [PATCH v2 04/20] drm/msm/dp: Accept a const SDP header when packing Xilin Wu
2026-10-09 3:15 ` Xilin Wu
2026-10-09 3:15 ` [PATCH v2 05/20] drm/msm/dp: Support multiple generic SDP slots Xilin Wu
2026-10-09 3:15 ` Xilin Wu
2026-10-09 3:15 ` [PATCH v2 06/20] drm/msm/dp: Keep runtime PM calls outside the connection lock Xilin Wu
2026-10-09 3:15 ` Xilin Wu
2026-10-09 3:37 ` sashiko-bot
2026-10-09 3:37 ` sashiko-bot
2026-10-09 3:15 ` [PATCH v2 07/20] drm/msm/dp: Serialize stream operations with HPD processing Xilin Wu
2026-10-09 3:15 ` Xilin Wu
2026-10-09 3:30 ` sashiko-bot
2026-10-09 3:30 ` sashiko-bot
2026-10-12 12:48 ` Dmitry Baryshkov
2026-10-12 12:48 ` Dmitry Baryshkov
2026-10-09 3:16 ` [PATCH v2 08/20] drm/msm/dp: Track PHY power ownership Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:16 ` [PATCH v2 09/20] drm/msm/dp: Unwind resources when enabling a stream fails Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:35 ` sashiko-bot
2026-10-09 3:35 ` sashiko-bot
2026-10-09 3:16 ` [PATCH v2 10/20] drm/msm/dp: Report stream enable failures through link status Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:28 ` sashiko-bot
2026-10-09 3:28 ` sashiko-bot
2026-10-09 3:16 ` [PATCH v2 11/20] drm/msm/dp: Cache eDP link capabilities after successful discovery Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:34 ` sashiko-bot
2026-10-09 3:34 ` sashiko-bot
2026-10-09 3:16 ` [PATCH v2 12/20] drm/msm/dp: Rebuild the eDP stream on modesets leaving self refresh Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:16 ` [PATCH v2 13/20] drm/msm/dp: Track output bit depth in bridge atomic state Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:16 ` [PATCH v2 14/20] drm/msm/dp: Clear stale MSA colorimetry bits Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-12 8:00 ` Konrad Dybcio
2026-10-12 8:00 ` Konrad Dybcio
2026-10-09 3:16 ` [PATCH v2 15/20] drm/msm/dp: Flush VSC updates when leaving YUV420 Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-12 14:09 ` Dmitry Baryshkov
2026-10-12 14:09 ` Dmitry Baryshkov
2026-10-09 3:16 ` [PATCH v2 16/20] drm/msm/dp: Disable PSR for YUV420 streams Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:34 ` sashiko-bot
2026-10-09 3:34 ` sashiko-bot
2026-10-12 14:36 ` Dmitry Baryshkov
2026-10-12 14:36 ` Dmitry Baryshkov
2026-10-09 3:16 ` [PATCH v2 17/20] drm/msm/dp: Track VSC packets in bridge atomic state Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:34 ` sashiko-bot
2026-10-09 3:34 ` sashiko-bot
2026-10-09 3:16 ` [PATCH v2 18/20] drm/msm/dp: Signal BT.2020 RGB on DP and eDP Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-12 14:48 ` Dmitry Baryshkov
2026-10-12 14:48 ` Dmitry Baryshkov
2026-10-09 3:16 ` [PATCH v2 19/20] drm/msm/dp: Serialize video test state changes Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:44 ` sashiko-bot [this message]
2026-10-09 3:44 ` sashiko-bot
2026-10-12 21:52 ` Dmitry Baryshkov
2026-10-12 21:52 ` Dmitry Baryshkov
2026-10-09 3:16 ` [PATCH v2 20/20] drm/msm/dp: Add static HDR metadata support for DP and eDP Xilin Wu
2026-10-09 3:16 ` Xilin Wu
2026-10-09 3:40 ` sashiko-bot
2026-10-09 3:40 ` sashiko-bot
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