* [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup
@ 2026-10-13 20:46 Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 1/5] drm/i915/display: clean SKL_DSSM register macros Michał Grzelak
` (7 more replies)
0 siblings, 8 replies; 11+ messages in thread
From: Michał Grzelak @ 2026-10-13 20:46 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: Michał Grzelak, Chaitanya Kumar Borah, Jani Nikula,
Michał Grzelak
Next version of [1]. Compared with previous version, merged all parts
together.
BR,
Michał
[1] https://lore.kernel.org/intel-gfx/20260918232510.3583453-1-michal.grzelak@linux.intel.com/
---
Changelog:
v3->v4
- merge all parts
v2->v3
- s/fix/clean/ (Jani)
v1->v2
- s/REG_GENMASK/REG_FIELD_PREP/ (Jani)
- use either runtime info flag or display version check (Jani)
- don't initialize runtime info flag to 0 (Jani)
Michał Grzelak (5):
drm/i915/display: clean SKL_DSSM register macros
drm/i915/3dlut: disable 3D LUT for pre-GLK
drm/i915/3dlut: log 3D LUT's status
drm/i915/3dlut: disable 3D LUT if unsupported
drm/i915/display: log eDP TC support and DBuf overlap detection state
drivers/gpu/drm/i915/display/intel_color.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_device.c | 13 +++++++++++++
drivers/gpu/drm/i915/display/intel_display_device.h | 4 +++-
drivers/gpu/drm/i915/display/intel_display_regs.h | 9 +++++----
4 files changed, 24 insertions(+), 5 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v4 1/5] drm/i915/display: clean SKL_DSSM register macros
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
@ 2026-10-13 20:47 ` Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 2/5] drm/i915/3dlut: disable 3D LUT for pre-GLK Michał Grzelak
` (6 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Michał Grzelak @ 2026-10-13 20:47 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Michał Grzelak, Jani Nikula
Indent SKL_DSSM register macros. Define mask and register values with
REG_GENMASK() and REG_FIELD_PREP() instead of bit shifts. No functional
change.
v2->v3
- s/fix/clean/ (Jani)
v1->v2
- s/REG_GENMASK/REG_FIELD_PREP/ (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Michał Grzelak <michal.grzelak@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display_regs.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 8251ec15190b..0b3991bc3aef 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1779,10 +1779,10 @@
#define XE2LPD_DE_CAP_SCALER_SINGLE 1
#define SKL_DSSM _MMIO(0x51004)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK (7 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz (0 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz (1 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz (2 << 29)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK REG_GENMASK(31, 29)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 0)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 1)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 2)
/*GEN11 chicken */
#define _PIPEA_CHICKEN 0x70038
--
2.45.2
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 2/5] drm/i915/3dlut: disable 3D LUT for pre-GLK
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 1/5] drm/i915/display: clean SKL_DSSM register macros Michał Grzelak
@ 2026-10-13 20:47 ` Michał Grzelak
2026-10-13 20:59 ` sashiko-bot
2026-10-13 20:47 ` [PATCH v4 3/5] drm/i915/3dlut: log 3D LUT's status Michał Grzelak
` (5 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: Michał Grzelak @ 2026-10-13 20:47 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Michał Grzelak, Chaitanya Kumar Borah
GLK+ hardware supports 3D LUT. Disable the feature for pre-GLK
platforms.
Add .has_3dlut field into display runtime info. Use the field to store
whether 3D LUT is enabled. Initialize the field to 1 on GLK+.
Add macro for checking 3D LUT's support. Use it while checking whether
CRTC has 3D LUT enabled.
v1->v2
- use either runtime info flag or display version check (Jani)
- don't initialize runtime info flag to 0 (Jani)
Bspec: 15585
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Michał Grzelak <michal.grzelak@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_device.c | 5 +++++
drivers/gpu/drm/i915/display/intel_display_device.h | 2 ++
3 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index f1df0f9ba762..95de75e1de98 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4304,6 +4304,9 @@ intel_color_load_plane_luts(struct intel_dsb *dsb,
bool
intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe)
{
+ if (!HAS_3DLUT(display))
+ return false;
+
if (DISPLAY_VER(display) >= 12)
return pipe == PIPE_A || pipe == PIPE_B;
else
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index f17fc2c68472..4c09f35644ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -864,6 +864,7 @@ static const struct platform_desc glk_desc = {
GLK_COLORS,
.__runtime_defaults.ip.ver = 10,
+ .__runtime_defaults.has_3dlut = 1,
},
STEP_INFO(glk_steppings),
};
@@ -899,6 +900,7 @@ static const struct platform_desc glk_desc = {
ICL_COLORS, \
\
.__runtime_defaults.ip.ver = 11, \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
@@ -990,6 +992,7 @@ static const struct platform_desc ehl_desc = {
ICL_COLORS, \
\
.__runtime_defaults.ip.ver = 12, \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
@@ -1156,6 +1159,7 @@ static const struct platform_desc adl_s_desc = {
TGL_CURSOR_OFFSETS, \
\
.__runtime_defaults.ip.ver = 13, \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A), \
@@ -1335,6 +1339,7 @@ static const struct platform_desc dg2_desc = {
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_D), \
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A) | BIT(INTEL_FBC_B), \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 7121e7cd9512..5300c6ab99e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -147,6 +147,7 @@ struct intel_display_platforms {
#define HAS_128B_Y_TILING(__display) (!(__display)->platform.i915g && !(__display)->platform.i915gm)
#define HAS_2PPC(__display) (DISPLAY_VER(__display) >= 10)
+#define HAS_3DLUT(__display) (DISPLAY_RUNTIME_INFO(__display)->has_3dlut)
#define HAS_4TILE(__display) ((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
#define HAS_ASYNC_FLIPS(__display) (DISPLAY_VER(__display) >= 5)
#define HAS_AS_SDP(__display) (DISPLAY_VER(__display) >= 13)
@@ -304,6 +305,7 @@ struct intel_display_runtime_info {
u8 fbc_mask;
+ bool has_3dlut;
bool has_hdcp;
bool has_dmc;
bool has_dsc;
--
2.45.2
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 3/5] drm/i915/3dlut: log 3D LUT's status
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 1/5] drm/i915/display: clean SKL_DSSM register macros Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 2/5] drm/i915/3dlut: disable 3D LUT for pre-GLK Michał Grzelak
@ 2026-10-13 20:47 ` Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 4/5] drm/i915/3dlut: disable 3D LUT if unsupported Michał Grzelak
` (4 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Michał Grzelak @ 2026-10-13 20:47 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Michał Grzelak, Chaitanya Kumar Borah
Print .has_3dlut runtime info flag in intel_display_device_info_print().
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Michał Grzelak <michal.grzelak@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 4c09f35644ba..a2bea5ac59cf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -2001,6 +2001,7 @@ void intel_display_device_info_print(const struct intel_display_device_info *inf
DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
#undef PRINT_FLAG
+ drm_printf(p, "has_3dlut: %s\n", str_yes_no(runtime->has_3dlut));
drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
drm_printf(p, "has_dsc: %s\n", str_yes_no(runtime->has_dsc));
--
2.45.2
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 4/5] drm/i915/3dlut: disable 3D LUT if unsupported
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
` (2 preceding siblings ...)
2026-10-13 20:47 ` [PATCH v4 3/5] drm/i915/3dlut: log 3D LUT's status Michał Grzelak
@ 2026-10-13 20:47 ` Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 5/5] drm/i915/display: log eDP TC support and DBuf overlap detection state Michał Grzelak
` (3 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Michał Grzelak @ 2026-10-13 20:47 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Michał Grzelak, Chaitanya Kumar Borah, stable
XE2LPD_DE_CAP_3DLUT_MASK is defined but never used.
Check DE_CAP with the mask whether 3D LUT is disabled for LNL+. Reset
has_3dlut if that is the case.
Bspec: 71161
Fixes: 65db7a1f9cf7 ("drm/i915/color: Add 3D LUT to color pipeline")
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Cc: <stable@vger.kernel.org> # v6.19+
Signed-off-by: Michał Grzelak <michal.grzelak@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_regs.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index a2bea5ac59cf..d4e52e627b34 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1940,6 +1940,10 @@ static void __intel_display_device_info_runtime_init(struct intel_display *displ
if (DISPLAY_VER(display) >= 20) {
u32 cap = intel_de_read(display, XE2LPD_DE_CAP);
+ if (REG_FIELD_GET(XE2LPD_DE_CAP_3DLUT_MASK, cap) ==
+ XE2LPD_DE_CAP_3DLUT_REMOVED)
+ display_runtime->has_3dlut = 0;
+
if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) ==
XE2LPD_DE_CAP_DSC_REMOVED)
display_runtime->has_dsc = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 0b3991bc3aef..d3546609e3ae 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1773,6 +1773,7 @@
#define XE2LPD_DE_CAP _MMIO(0x41100)
#define XE2LPD_DE_CAP_3DLUT_MASK REG_GENMASK(31, 30)
+#define XE2LPD_DE_CAP_3DLUT_REMOVED 1
#define XE2LPD_DE_CAP_DSC_MASK REG_GENMASK(29, 28)
#define XE2LPD_DE_CAP_DSC_REMOVED 1
#define XE2LPD_DE_CAP_SCALER_MASK REG_GENMASK(27, 26)
--
2.45.2
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 5/5] drm/i915/display: log eDP TC support and DBuf overlap detection state
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
` (3 preceding siblings ...)
2026-10-13 20:47 ` [PATCH v4 4/5] drm/i915/3dlut: disable 3D LUT if unsupported Michał Grzelak
@ 2026-10-13 20:47 ` Michał Grzelak
2026-10-13 20:53 ` sashiko-bot
2026-10-13 21:24 ` ✗ CI.checkpatch: warning for SKL_DSSM / DE_CAP cleanup Patchwork
` (2 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: Michał Grzelak @ 2026-10-13 20:47 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Michał Grzelak
edp_tc_support and dbuf_overlap_detection are only fields of display's
runtime info which state is not logged. Show it along other fields.
While at it, move dbuf_overlap_detection to have display runtime info's
fields in alphabetical order.
Signed-off-by: Michał Grzelak <michal.grzelak@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index d4e52e627b34..c806e2135620 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -2005,6 +2005,9 @@ void intel_display_device_info_print(const struct intel_display_device_info *inf
DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
#undef PRINT_FLAG
+ drm_printf(p, "edp_typec_support: %s\n", str_yes_no(runtime->edp_typec_support));
+ drm_printf(p, "has_dbuf_overlap_detection: %s\n", str_yes_no(runtime->has_dbuf_overlap_detection));
+
drm_printf(p, "has_3dlut: %s\n", str_yes_no(runtime->has_3dlut));
drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 5300c6ab99e7..230eec31f654 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -307,10 +307,10 @@ struct intel_display_runtime_info {
bool has_3dlut;
bool has_hdcp;
+ bool has_dbuf_overlap_detection;
bool has_dmc;
bool has_dsc;
bool edp_typec_support;
- bool has_dbuf_overlap_detection;
};
struct intel_display_device_info {
--
2.45.2
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v4 5/5] drm/i915/display: log eDP TC support and DBuf overlap detection state
2026-10-13 20:47 ` [PATCH v4 5/5] drm/i915/display: log eDP TC support and DBuf overlap detection state Michał Grzelak
@ 2026-10-13 20:53 ` sashiko-bot
0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-10-13 20:53 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] drm/i915: commit message claims alphabetical order but implementation does not
--
commit a46ad637c40a9e4f034c8da54ce1e88270a8428d
Author: Michał Grzelak <michal.grzelak@linux.intel.com>
drm/i915/display: log eDP TC support and DBuf overlap detection state
This commit adds logging for eDP Type-C support and DBuf overlap detection
state in the display runtime info. It also attempts to reorder the fields
in the structure to maintain alphabetical order.
> edp_tc_support and dbuf_overlap_detection are only fields of display's
> runtime info which state is not logged. Show it along other fields.
[Severity: Low]
This isn't a bug, but there's a typo in the commit message. The commit message
refers to edp_tc_support, but the actual field in the code is named
edp_typec_support.
> While at it, move dbuf_overlap_detection to have display runtime info's
> fields in alphabetical order.
[Severity: Low]
The commit message states the fields are moved to be in alphabetical order,
but the resulting order in both the struct definition and the print statements
is not alphabetical.
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -2005,6 +2005,9 @@ void intel_display_device_info_print(const struct intel_display_device_info *inf
> DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
> #undef PRINT_FLAG
>
> + drm_printf(p, "edp_typec_support: %s\n", str_yes_no(runtime->edp_typec_support));
> + drm_printf(p, "has_dbuf_overlap_detection: %s\n", str_yes_no(runtime->has_dbuf_overlap_detection));
> +
> drm_printf(p, "has_3dlut: %s\n", str_yes_no(runtime->has_3dlut));
[Severity: Low]
Should these print statements be sorted alphabetically to match the claim in
the commit message? Currently, edp_typec_support and
has_dbuf_overlap_detection are placed before has_3dlut and has_hdcp, which
breaks alphabetical ordering in intel_display_device_info_print().
[ ... ]
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -307,10 +307,10 @@ struct intel_display_runtime_info {
>
> bool has_3dlut;
> bool has_hdcp;
> + bool has_dbuf_overlap_detection;
> bool has_dmc;
> bool has_dsc;
> bool edp_typec_support;
> - bool has_dbuf_overlap_detection;
> };
[Severity: Low]
Does this achieve the alphabetical ordering mentioned in the commit message?
The sequence in intel_display_runtime_info is now:
has_3dlut
has_hdcp
has_dbuf_overlap_detection
has_dmc
has_dsc
edp_typec_support
The has_dbuf_overlap_detection field is placed after has_hdcp, and
edp_typec_support is placed at the end.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261013204705.1574475-1-michal.grzelak@linux.intel.com?part=5
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 2/5] drm/i915/3dlut: disable 3D LUT for pre-GLK
2026-10-13 20:47 ` [PATCH v4 2/5] drm/i915/3dlut: disable 3D LUT for pre-GLK Michał Grzelak
@ 2026-10-13 20:59 ` sashiko-bot
0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-10-13 20:59 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/i915: 3D LUT remains disabled for GLK/ICL due to unmodified version check
--
commit 31c6b1070ace7be34ebe695316e80a7d65a5d1a7
Author: Michał Grzelak <michal.grzelak@linux.intel.com>
Subject: drm/i915/3dlut: disable 3D LUT for pre-GLK
This commit adds a has_3dlut field to the display runtime info to indicate
whether 3D LUT is enabled. It initializes the field to 1 for GLK and newer
platforms, and adds a HAS_3DLUT macro to check for support.
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index f1df0f9ba7624..95de75e1de984 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -4304,6 +4304,9 @@ intel_color_load_plane_luts(struct intel_dsb *dsb,
> bool
> intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe)
> {
> + if (!HAS_3DLUT(display))
> + return false;
> +
> if (DISPLAY_VER(display) >= 12)
> return pipe == PIPE_A || pipe == PIPE_B;
> else
> return false;
> }
[Severity: Medium]
Will this still return false for GLK and ICL platforms even though they have
the HAS_3DLUT flag set?
The commit message indicates 3D LUT is supported on GLK+ hardware, and the
patch sets has_3dlut = 1 for GLK (DISPLAY_VER = 10) and ICL (DISPLAY_VER = 11).
However, in intel_color_crtc_has_3dlut(), after the new HAS_3DLUT() check
passes for these platforms, the function still evaluates:
if (DISPLAY_VER(display) >= 12)
...
else
return false;
Doesn't this existing version check unconditionally return false for GLK and
ICL, defeating the newly added flag and keeping 3D LUT disabled for these
platforms?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261013204705.1574475-1-michal.grzelak@linux.intel.com?part=2
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ CI.checkpatch: warning for SKL_DSSM / DE_CAP cleanup
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
` (4 preceding siblings ...)
2026-10-13 20:47 ` [PATCH v4 5/5] drm/i915/display: log eDP TC support and DBuf overlap detection state Michał Grzelak
@ 2026-10-13 21:24 ` Patchwork
2026-10-13 21:26 ` ✓ CI.KUnit: success " Patchwork
2026-10-13 22:29 ` ✓ i915.CI.BAT: " Patchwork
7 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-10-13 21:24 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: SKL_DSSM / DE_CAP cleanup
URL : https://patchwork.freedesktop.org/series/176081/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6bef5ce5c74dc76b4ee69ab2832c0d1fd63c91c7
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 7f51c29d2c506f21051a4d2ca3947c04f6e2d03d
Author: Michał Grzelak <michal.grzelak@linux.intel.com>
Date: Tue Oct 13 22:47:04 2026 +0200
drm/i915/display: log eDP TC support and DBuf overlap detection state
edp_tc_support and dbuf_overlap_detection are only fields of display's
runtime info which state is not logged. Show it along other fields.
While at it, move dbuf_overlap_detection to have display runtime info's
fields in alphabetical order.
Signed-off-by: Michał Grzelak <michal.grzelak@linux.intel.com>
+ /mt/dim checkpatch 83b6bc1390606facc1c0426727905f9fcd75836d drm-intel
74681c07e60a drm/i915/display: clean SKL_DSSM register macros
9b8e73b4f552 drm/i915/3dlut: disable 3D LUT for pre-GLK
030a03d453f0 drm/i915/3dlut: log 3D LUT's status
11fa53daa4f3 drm/i915/3dlut: disable 3D LUT if unsupported
7f51c29d2c50 drm/i915/display: log eDP TC support and DBuf overlap detection state
-:27: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#27: FILE: drivers/gpu/drm/i915/display/intel_display_device.c:2009:
+ drm_printf(p, "has_dbuf_overlap_detection: %s\n", str_yes_no(runtime->has_dbuf_overlap_detection));
total: 0 errors, 1 warnings, 0 checks, 20 lines checked
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ CI.KUnit: success for SKL_DSSM / DE_CAP cleanup
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
` (5 preceding siblings ...)
2026-10-13 21:24 ` ✗ CI.checkpatch: warning for SKL_DSSM / DE_CAP cleanup Patchwork
@ 2026-10-13 21:26 ` Patchwork
2026-10-13 22:29 ` ✓ i915.CI.BAT: " Patchwork
7 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-10-13 21:26 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: SKL_DSSM / DE_CAP cleanup
URL : https://patchwork.freedesktop.org/series/176081/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[21:24:56] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:25:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:25:21] Starting KUnit Kernel (1/1)...
[21:25:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:25:21] ================= gpu_buddy (14 subtests) ==================
[21:25:21] [PASSED] gpu_test_buddy_alloc_limit
[21:25:21] [PASSED] gpu_test_buddy_alloc_optimistic
[21:25:21] [PASSED] gpu_test_buddy_alloc_pessimistic
[21:25:21] [PASSED] gpu_test_buddy_alloc_pathological
[21:25:21] [PASSED] gpu_test_buddy_alloc_contiguous
[21:25:21] [PASSED] gpu_test_buddy_alloc_clear
[21:25:21] [PASSED] gpu_test_buddy_alloc_range
[21:25:21] [PASSED] gpu_test_buddy_alloc_range_bias
[21:25:22] [PASSED] gpu_test_buddy_fragmentation_performance
[21:25:23] [PASSED] gpu_test_buddy_dirty_tracker_performance
[21:25:23] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[21:25:23] [PASSED] gpu_test_buddy_offset_aligned_allocation
[21:25:23] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[21:25:23] [PASSED] gpu_test_buddy_addr_to_block
[21:25:23] ==================== [PASSED] gpu_buddy ====================
[21:25:23] ============================================================
[21:25:23] Testing complete. Ran 14 tests: passed: 14
[21:25:23] Elapsed time: 26.550s total, 4.458s configuring, 20.174s building, 1.864s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:25:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:25:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:25:58] Starting KUnit Kernel (1/1)...
[21:25:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:25:58] ================== guc_buf (11 subtests) ===================
[21:25:58] [PASSED] test_smallest
[21:25:58] [PASSED] test_largest
[21:25:59] [PASSED] test_granular
[21:25:59] [PASSED] test_unique
[21:25:59] [PASSED] test_overlap
[21:25:59] [PASSED] test_reusable
[21:25:59] [PASSED] test_too_big
[21:25:59] [PASSED] test_flush
[21:25:59] [PASSED] test_lookup
[21:25:59] [PASSED] test_data
[21:25:59] [PASSED] test_class
[21:25:59] ===================== [PASSED] guc_buf =====================
[21:25:59] =================== guc_dbm (7 subtests) ===================
[21:25:59] [PASSED] test_empty
[21:25:59] [PASSED] test_default
[21:25:59] ======================== test_size ========================
[21:25:59] [PASSED] 4
[21:25:59] [PASSED] 8
[21:25:59] [PASSED] 32
[21:25:59] [PASSED] 256
[21:25:59] ==================== [PASSED] test_size ====================
[21:25:59] ======================= test_reuse ========================
[21:25:59] [PASSED] 4
[21:25:59] [PASSED] 8
[21:25:59] [PASSED] 32
[21:25:59] [PASSED] 256
[21:25:59] =================== [PASSED] test_reuse ====================
[21:25:59] =================== test_range_overlap ====================
[21:25:59] [PASSED] 4
[21:25:59] [PASSED] 8
[21:25:59] [PASSED] 32
[21:25:59] [PASSED] 256
[21:25:59] =============== [PASSED] test_range_overlap ================
[21:25:59] =================== test_range_compact ====================
[21:25:59] [PASSED] 4
[21:25:59] [PASSED] 8
[21:25:59] [PASSED] 32
[21:25:59] [PASSED] 256
[21:25:59] =============== [PASSED] test_range_compact ================
[21:25:59] ==================== test_range_spare =====================
[21:25:59] [PASSED] 4
[21:25:59] [PASSED] 8
[21:25:59] [PASSED] 32
[21:25:59] [PASSED] 256
[21:25:59] ================ [PASSED] test_range_spare =================
[21:25:59] ===================== [PASSED] guc_dbm =====================
[21:25:59] =================== guc_idm (6 subtests) ===================
[21:25:59] [PASSED] bad_init
[21:25:59] [PASSED] no_init
[21:25:59] [PASSED] init_fini
[21:25:59] [PASSED] check_used
[21:25:59] [PASSED] check_quota
[21:25:59] [PASSED] check_all
[21:25:59] ===================== [PASSED] guc_idm =====================
[21:25:59] ============== guc_klv_helpers (13 subtests) ===============
[21:25:59] [PASSED] test_count
[21:25:59] [PASSED] test_encode_u32
[21:25:59] [PASSED] test_encode_u64
[21:25:59] [PASSED] test_encode_string
[21:25:59] [PASSED] test_encode_object_raw
[21:25:59] [PASSED] test_encode_object_klv
[21:25:59] [PASSED] test_encode_object_nested
[21:25:59] [PASSED] test_encode_object_basic
[21:25:59] ===================== test_decode_u16 =====================
[21:25:59] [PASSED] empty
[21:25:59] [PASSED] valid
[21:25:59] [PASSED] max
[21:25:59] [PASSED] big
[21:25:59] [PASSED] long
[21:25:59] ================= [PASSED] test_decode_u16 =================
[21:25:59] ===================== test_decode_u32 =====================
[21:25:59] [PASSED] empty
[21:25:59] [PASSED] valid
[21:25:59] [PASSED] max
[21:25:59] [PASSED] long
[21:25:59] ================= [PASSED] test_decode_u32 =================
[21:25:59] ===================== test_decode_u64 =====================
[21:25:59] [PASSED] empty
[21:25:59] [PASSED] short
[21:25:59] [PASSED] valid
[21:25:59] [PASSED] max
[21:25:59] [PASSED] long
[21:25:59] ================= [PASSED] test_decode_u64 =================
[21:25:59] ===================== test_decode_str =====================
[21:25:59] [PASSED] empty
[21:25:59] [PASSED] one
[21:25:59] [PASSED] one_trash
[21:25:59] [PASSED] two
[21:25:59] [PASSED] two_trash
[21:25:59] [PASSED] three
[21:25:59] [PASSED] dword
[21:25:59] [PASSED] four
[21:25:59] [PASSED] five
[21:25:59] [PASSED] six
[21:25:59] [PASSED] seven
[21:25:59] [PASSED] qword
[21:25:59] ================= [PASSED] test_decode_str =================
[21:25:59] [PASSED] test_print
[21:25:59] ================= [PASSED] guc_klv_helpers =================
[21:25:59] =================== xe_log (4 subtests) ====================
[21:25:59] [PASSED] demo_cper
[21:25:59] [PASSED] demo_dmesg
[21:25:59] ======================= test_dmesg ========================
[21:25:59] [PASSED] test_fatal
[21:25:59] [PASSED] test_fatal_tile
[21:25:59] [PASSED] test_fatal_gt
[21:25:59] [PASSED] test_fatal_comp
[21:25:59] [PASSED] test_fatal_comp_tile
[21:25:59] [PASSED] test_fatal_comp_gt
[21:25:59] [PASSED] test_fatal_all
[21:25:59] [PASSED] test_recoverable
[21:25:59] [PASSED] test_recoverable_tile
[21:25:59] [PASSED] test_recoverable_gt
[21:25:59] [PASSED] test_recoverable_comp
[21:25:59] [PASSED] test_recoverable_comp_tile
[21:25:59] [PASSED] test_recoverable_comp_gt
[21:25:59] [PASSED] test_recoverable_all
[21:25:59] [PASSED] test_info
[21:25:59] [PASSED] test_info_tile
[21:25:59] [PASSED] test_info_gt
[21:25:59] [PASSED] test_info_err
[21:25:59] [PASSED] test_info_comp
[21:25:59] [PASSED] test_info_comp_tile
[21:25:59] [PASSED] test_info_comp_gt
[21:25:59] [PASSED] test_info_all
[21:25:59] [PASSED] test_hw_fatal
[21:25:59] [PASSED] test_hw_recoverable
[21:25:59] [PASSED] test_hw_corrected
[21:25:59] [PASSED] test_hw_informational
[21:25:59] =================== [PASSED] test_dmesg ====================
[21:25:59] ====================== test_invalid =======================
[21:25:59] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[21:25:59] ================== [SKIPPED] test_invalid ==================
[21:25:59] ===================== [PASSED] xe_log ======================
[21:25:59] ================== no_relay (3 subtests) ===================
[21:25:59] [PASSED] xe_drops_guc2pf_if_not_ready
[21:25:59] [PASSED] xe_drops_guc2vf_if_not_ready
[21:25:59] [PASSED] xe_rejects_send_if_not_ready
[21:25:59] ==================== [PASSED] no_relay =====================
[21:25:59] ================== pf_relay (14 subtests) ==================
[21:25:59] [PASSED] pf_rejects_guc2pf_too_short
[21:25:59] [PASSED] pf_rejects_guc2pf_too_long
[21:25:59] [PASSED] pf_rejects_guc2pf_no_payload
[21:25:59] [PASSED] pf_fails_no_payload
[21:25:59] [PASSED] pf_fails_bad_origin
[21:25:59] [PASSED] pf_fails_bad_type
[21:25:59] [PASSED] pf_txn_reports_error
[21:25:59] [PASSED] pf_txn_sends_pf2guc
[21:25:59] [PASSED] pf_sends_pf2guc
[21:25:59] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:25:59] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:25:59] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:25:59] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:25:59] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:25:59] ==================== [PASSED] pf_relay =====================
[21:25:59] ================== vf_relay (3 subtests) ===================
[21:25:59] [PASSED] vf_rejects_guc2vf_too_short
[21:25:59] [PASSED] vf_rejects_guc2vf_too_long
[21:25:59] [PASSED] vf_rejects_guc2vf_no_payload
[21:25:59] ==================== [PASSED] vf_relay =====================
[21:25:59] ================ pf_gt_config (9 subtests) =================
[21:25:59] [PASSED] fair_contexts_1vf
[21:25:59] [PASSED] fair_doorbells_1vf
[21:25:59] [PASSED] fair_ggtt_1vf
[21:25:59] ====================== fair_vram_1vf ======================
[21:25:59] [PASSED] 3.50 GiB
[21:25:59] [PASSED] 11.5 GiB
[21:25:59] [PASSED] 15.5 GiB
[21:25:59] [PASSED] 31.5 GiB
[21:25:59] [PASSED] 63.5 GiB
[21:25:59] [PASSED] 1.91 GiB
[21:25:59] ================== [PASSED] fair_vram_1vf ==================
[21:25:59] ================ fair_vram_1vf_admin_only =================
[21:25:59] [PASSED] 3.50 GiB
[21:25:59] [PASSED] 11.5 GiB
[21:25:59] [PASSED] 15.5 GiB
[21:25:59] [PASSED] 31.5 GiB
[21:25:59] [PASSED] 63.5 GiB
[21:25:59] [PASSED] 1.91 GiB
[21:25:59] ============ [PASSED] fair_vram_1vf_admin_only =============
[21:25:59] ====================== fair_contexts ======================
[21:25:59] [PASSED] 1 VF
[21:25:59] [PASSED] 2 VFs
[21:25:59] [PASSED] 3 VFs
[21:25:59] [PASSED] 4 VFs
[21:25:59] [PASSED] 5 VFs
[21:25:59] [PASSED] 6 VFs
[21:25:59] [PASSED] 7 VFs
[21:25:59] [PASSED] 8 VFs
[21:25:59] [PASSED] 9 VFs
[21:25:59] [PASSED] 10 VFs
[21:25:59] [PASSED] 11 VFs
[21:25:59] [PASSED] 12 VFs
[21:25:59] [PASSED] 13 VFs
[21:25:59] [PASSED] 14 VFs
[21:25:59] [PASSED] 15 VFs
[21:25:59] [PASSED] 16 VFs
[21:25:59] [PASSED] 17 VFs
[21:25:59] [PASSED] 18 VFs
[21:25:59] [PASSED] 19 VFs
[21:25:59] [PASSED] 20 VFs
[21:25:59] [PASSED] 21 VFs
[21:25:59] [PASSED] 22 VFs
[21:25:59] [PASSED] 23 VFs
[21:25:59] [PASSED] 24 VFs
[21:25:59] [PASSED] 25 VFs
[21:25:59] [PASSED] 26 VFs
[21:25:59] [PASSED] 27 VFs
[21:25:59] [PASSED] 28 VFs
[21:25:59] [PASSED] 29 VFs
[21:25:59] [PASSED] 30 VFs
[21:25:59] [PASSED] 31 VFs
[21:25:59] [PASSED] 32 VFs
[21:25:59] [PASSED] 33 VFs
[21:25:59] [PASSED] 34 VFs
[21:25:59] [PASSED] 35 VFs
[21:25:59] [PASSED] 36 VFs
[21:25:59] [PASSED] 37 VFs
[21:25:59] [PASSED] 38 VFs
[21:25:59] [PASSED] 39 VFs
[21:25:59] [PASSED] 40 VFs
[21:25:59] [PASSED] 41 VFs
[21:25:59] [PASSED] 42 VFs
[21:25:59] [PASSED] 43 VFs
[21:25:59] [PASSED] 44 VFs
[21:25:59] [PASSED] 45 VFs
[21:25:59] [PASSED] 46 VFs
[21:25:59] [PASSED] 47 VFs
[21:25:59] [PASSED] 48 VFs
[21:25:59] [PASSED] 49 VFs
[21:25:59] [PASSED] 50 VFs
[21:25:59] [PASSED] 51 VFs
[21:25:59] [PASSED] 52 VFs
[21:25:59] [PASSED] 53 VFs
[21:25:59] [PASSED] 54 VFs
[21:25:59] [PASSED] 55 VFs
[21:25:59] [PASSED] 56 VFs
[21:25:59] [PASSED] 57 VFs
[21:25:59] [PASSED] 58 VFs
[21:25:59] [PASSED] 59 VFs
[21:25:59] [PASSED] 60 VFs
[21:25:59] [PASSED] 61 VFs
[21:25:59] [PASSED] 62 VFs
[21:25:59] [PASSED] 63 VFs
[21:25:59] ================== [PASSED] fair_contexts ==================
[21:25:59] ===================== fair_doorbells ======================
[21:25:59] [PASSED] 1 VF
[21:25:59] [PASSED] 2 VFs
[21:25:59] [PASSED] 3 VFs
[21:25:59] [PASSED] 4 VFs
[21:25:59] [PASSED] 5 VFs
[21:25:59] [PASSED] 6 VFs
[21:25:59] [PASSED] 7 VFs
[21:25:59] [PASSED] 8 VFs
[21:25:59] [PASSED] 9 VFs
[21:25:59] [PASSED] 10 VFs
[21:25:59] [PASSED] 11 VFs
[21:25:59] [PASSED] 12 VFs
[21:25:59] [PASSED] 13 VFs
[21:25:59] [PASSED] 14 VFs
[21:25:59] [PASSED] 15 VFs
[21:25:59] [PASSED] 16 VFs
[21:25:59] [PASSED] 17 VFs
[21:25:59] [PASSED] 18 VFs
[21:25:59] [PASSED] 19 VFs
[21:25:59] [PASSED] 20 VFs
[21:25:59] [PASSED] 21 VFs
[21:25:59] [PASSED] 22 VFs
[21:25:59] [PASSED] 23 VFs
[21:25:59] [PASSED] 24 VFs
[21:25:59] [PASSED] 25 VFs
[21:25:59] [PASSED] 26 VFs
[21:25:59] [PASSED] 27 VFs
[21:25:59] [PASSED] 28 VFs
[21:25:59] [PASSED] 29 VFs
[21:25:59] [PASSED] 30 VFs
[21:25:59] [PASSED] 31 VFs
[21:25:59] [PASSED] 32 VFs
[21:25:59] [PASSED] 33 VFs
[21:25:59] [PASSED] 34 VFs
[21:25:59] [PASSED] 35 VFs
[21:25:59] [PASSED] 36 VFs
[21:25:59] [PASSED] 37 VFs
[21:25:59] [PASSED] 38 VFs
[21:25:59] [PASSED] 39 VFs
[21:25:59] [PASSED] 40 VFs
[21:25:59] [PASSED] 41 VFs
[21:25:59] [PASSED] 42 VFs
[21:25:59] [PASSED] 43 VFs
[21:25:59] [PASSED] 44 VFs
[21:25:59] [PASSED] 45 VFs
[21:25:59] [PASSED] 46 VFs
[21:25:59] [PASSED] 47 VFs
[21:25:59] [PASSED] 48 VFs
[21:25:59] [PASSED] 49 VFs
[21:25:59] [PASSED] 50 VFs
[21:25:59] [PASSED] 51 VFs
[21:25:59] [PASSED] 52 VFs
[21:25:59] [PASSED] 53 VFs
[21:25:59] [PASSED] 54 VFs
[21:25:59] [PASSED] 55 VFs
[21:25:59] [PASSED] 56 VFs
[21:25:59] [PASSED] 57 VFs
[21:25:59] [PASSED] 58 VFs
[21:25:59] [PASSED] 59 VFs
[21:25:59] [PASSED] 60 VFs
[21:25:59] [PASSED] 61 VFs
[21:25:59] [PASSED] 62 VFs
[21:25:59] [PASSED] 63 VFs
[21:25:59] ================= [PASSED] fair_doorbells ==================
[21:25:59] ======================== fair_ggtt ========================
[21:25:59] [PASSED] 1 VF
[21:25:59] [PASSED] 2 VFs
[21:25:59] [PASSED] 3 VFs
[21:25:59] [PASSED] 4 VFs
[21:25:59] [PASSED] 5 VFs
[21:25:59] [PASSED] 6 VFs
[21:25:59] [PASSED] 7 VFs
[21:25:59] [PASSED] 8 VFs
[21:25:59] [PASSED] 9 VFs
[21:25:59] [PASSED] 10 VFs
[21:25:59] [PASSED] 11 VFs
[21:25:59] [PASSED] 12 VFs
[21:25:59] [PASSED] 13 VFs
[21:25:59] [PASSED] 14 VFs
[21:25:59] [PASSED] 15 VFs
[21:25:59] [PASSED] 16 VFs
[21:25:59] [PASSED] 17 VFs
[21:25:59] [PASSED] 18 VFs
[21:25:59] [PASSED] 19 VFs
[21:25:59] [PASSED] 20 VFs
[21:25:59] [PASSED] 21 VFs
[21:25:59] [PASSED] 22 VFs
[21:25:59] [PASSED] 23 VFs
[21:25:59] [PASSED] 24 VFs
[21:25:59] [PASSED] 25 VFs
[21:25:59] [PASSED] 26 VFs
[21:25:59] [PASSED] 27 VFs
[21:25:59] [PASSED] 28 VFs
[21:25:59] [PASSED] 29 VFs
[21:25:59] [PASSED] 30 VFs
[21:25:59] [PASSED] 31 VFs
[21:25:59] [PASSED] 32 VFs
[21:25:59] [PASSED] 33 VFs
[21:25:59] [PASSED] 34 VFs
[21:25:59] [PASSED] 35 VFs
[21:25:59] [PASSED] 36 VFs
[21:25:59] [PASSED] 37 VFs
[21:25:59] [PASSED] 38 VFs
[21:25:59] [PASSED] 39 VFs
[21:25:59] [PASSED] 40 VFs
[21:25:59] [PASSED] 41 VFs
[21:25:59] [PASSED] 42 VFs
[21:25:59] [PASSED] 43 VFs
[21:25:59] [PASSED] 44 VFs
[21:25:59] [PASSED] 45 VFs
[21:25:59] [PASSED] 46 VFs
[21:25:59] [PASSED] 47 VFs
[21:25:59] [PASSED] 48 VFs
[21:25:59] [PASSED] 49 VFs
[21:25:59] [PASSED] 50 VFs
[21:25:59] [PASSED] 51 VFs
[21:25:59] [PASSED] 52 VFs
[21:25:59] [PASSED] 53 VFs
[21:25:59] [PASSED] 54 VFs
[21:25:59] [PASSED] 55 VFs
[21:25:59] [PASSED] 56 VFs
[21:25:59] [PASSED] 57 VFs
[21:25:59] [PASSED] 58 VFs
[21:25:59] [PASSED] 59 VFs
[21:25:59] [PASSED] 60 VFs
[21:25:59] [PASSED] 61 VFs
[21:25:59] [PASSED] 62 VFs
[21:25:59] [PASSED] 63 VFs
[21:25:59] ==================== [PASSED] fair_ggtt ====================
[21:25:59] ======================== fair_vram ========================
[21:25:59] [PASSED] 1 VF
[21:25:59] [PASSED] 2 VFs
[21:25:59] [PASSED] 3 VFs
[21:25:59] [PASSED] 4 VFs
[21:25:59] [PASSED] 5 VFs
[21:25:59] [PASSED] 6 VFs
[21:25:59] [PASSED] 7 VFs
[21:25:59] [PASSED] 8 VFs
[21:25:59] [PASSED] 9 VFs
[21:25:59] [PASSED] 10 VFs
[21:25:59] [PASSED] 11 VFs
[21:25:59] [PASSED] 12 VFs
[21:25:59] [PASSED] 13 VFs
[21:25:59] [PASSED] 14 VFs
[21:25:59] [PASSED] 15 VFs
[21:25:59] [PASSED] 16 VFs
[21:25:59] [PASSED] 17 VFs
[21:25:59] [PASSED] 18 VFs
[21:25:59] [PASSED] 19 VFs
[21:25:59] [PASSED] 20 VFs
[21:25:59] [PASSED] 21 VFs
[21:25:59] [PASSED] 22 VFs
[21:25:59] [PASSED] 23 VFs
[21:25:59] [PASSED] 24 VFs
[21:25:59] [PASSED] 25 VFs
[21:25:59] [PASSED] 26 VFs
[21:25:59] [PASSED] 27 VFs
[21:25:59] [PASSED] 28 VFs
[21:25:59] [PASSED] 29 VFs
[21:25:59] [PASSED] 30 VFs
[21:25:59] [PASSED] 31 VFs
[21:25:59] [PASSED] 32 VFs
[21:25:59] [PASSED] 33 VFs
[21:25:59] [PASSED] 34 VFs
[21:25:59] [PASSED] 35 VFs
[21:25:59] [PASSED] 36 VFs
[21:25:59] [PASSED] 37 VFs
[21:25:59] [PASSED] 38 VFs
[21:25:59] [PASSED] 39 VFs
[21:25:59] [PASSED] 40 VFs
[21:25:59] [PASSED] 41 VFs
[21:25:59] [PASSED] 42 VFs
[21:25:59] [PASSED] 43 VFs
[21:25:59] [PASSED] 44 VFs
[21:25:59] [PASSED] 45 VFs
[21:25:59] [PASSED] 46 VFs
[21:25:59] [PASSED] 47 VFs
[21:25:59] [PASSED] 48 VFs
[21:25:59] [PASSED] 49 VFs
[21:25:59] [PASSED] 50 VFs
[21:25:59] [PASSED] 51 VFs
[21:25:59] [PASSED] 52 VFs
[21:25:59] [PASSED] 53 VFs
[21:25:59] [PASSED] 54 VFs
[21:25:59] [PASSED] 55 VFs
[21:25:59] [PASSED] 56 VFs
[21:25:59] [PASSED] 57 VFs
[21:25:59] [PASSED] 58 VFs
[21:25:59] [PASSED] 59 VFs
[21:25:59] [PASSED] 60 VFs
[21:25:59] [PASSED] 61 VFs
[21:25:59] [PASSED] 62 VFs
[21:25:59] [PASSED] 63 VFs
[21:25:59] ==================== [PASSED] fair_vram ====================
[21:25:59] ================== [PASSED] pf_gt_config ===================
[21:25:59] ===================== lmtt (1 subtest) =====================
[21:25:59] ======================== test_ops =========================
[21:25:59] [PASSED] 2-level
[21:25:59] [PASSED] multi-level
[21:25:59] ==================== [PASSED] test_ops =====================
[21:25:59] ====================== [PASSED] lmtt =======================
[21:25:59] ================= sriov_packet (1 subtest) =================
[21:25:59] [PASSED] test_descriptor_init
[21:25:59] ================== [PASSED] sriov_packet ===================
[21:25:59] ================= pf_service (11 subtests) =================
[21:25:59] [PASSED] pf_negotiate_any
[21:25:59] [PASSED] pf_negotiate_base_match
[21:25:59] [PASSED] pf_negotiate_base_newer
[21:25:59] [PASSED] pf_negotiate_base_next
[21:25:59] [SKIPPED] pf_negotiate_base_older (no older minor)
[21:25:59] [PASSED] pf_negotiate_base_prev
[21:25:59] [PASSED] pf_negotiate_latest_match
[21:25:59] [PASSED] pf_negotiate_latest_newer
[21:25:59] [PASSED] pf_negotiate_latest_next
[21:25:59] [SKIPPED] pf_negotiate_latest_older (no older minor)
[21:25:59] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[21:25:59] =================== [PASSED] pf_service ====================
[21:25:59] ================= xe_guc_g2g (2 subtests) ==================
[21:25:59] ============== xe_live_guc_g2g_kunit_default ==============
[21:25:59] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[21:25:59] ============== xe_live_guc_g2g_kunit_allmem ===============
[21:25:59] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[21:25:59] =================== [SKIPPED] xe_guc_g2g ===================
[21:25:59] =================== xe_mocs (2 subtests) ===================
[21:25:59] ================ xe_live_mocs_kernel_kunit ================
[21:25:59] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:25:59] ================ xe_live_mocs_reset_kunit =================
[21:25:59] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:25:59] ==================== [SKIPPED] xe_mocs =====================
[21:25:59] ================= xe_migrate (2 subtests) ==================
[21:25:59] ================= xe_migrate_sanity_kunit =================
[21:25:59] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:25:59] ================== xe_validate_ccs_kunit ==================
[21:25:59] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:25:59] =================== [SKIPPED] xe_migrate ===================
[21:25:59] ================== xe_dma_buf (1 subtest) ==================
[21:25:59] ==================== xe_dma_buf_kunit =====================
[21:25:59] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:25:59] =================== [SKIPPED] xe_dma_buf ===================
[21:25:59] ================= xe_bo_shrink (1 subtest) =================
[21:25:59] =================== xe_bo_shrink_kunit ====================
[21:25:59] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:25:59] ================== [SKIPPED] xe_bo_shrink ==================
[21:25:59] ==================== xe_bo (2 subtests) ====================
[21:25:59] ================== xe_ccs_migrate_kunit ===================
[21:25:59] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:25:59] ==================== xe_bo_evict_kunit ====================
[21:25:59] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:25:59] ===================== [SKIPPED] xe_bo ======================
[21:25:59] =================== xe_any (9 subtests) ====================
[21:25:59] [PASSED] test_to_xe
[21:25:59] [PASSED] test_to_dev
[21:25:59] [PASSED] test_to_pdev
[21:25:59] [PASSED] test_to_drm
[21:25:59] [PASSED] test_if_pdev
[21:25:59] [PASSED] test_if_xe
[21:25:59] [PASSED] test_if_tile
[21:25:59] [PASSED] test_if_gt
[21:25:59] [PASSED] test_to_id
[21:25:59] ===================== [PASSED] xe_any ======================
[21:25:59] ==================== args (13 subtests) ====================
[21:25:59] [PASSED] count_args_test
[21:25:59] [PASSED] call_args_example
[21:25:59] [PASSED] call_args_test
[21:25:59] [PASSED] drop_first_arg_example
[21:25:59] [PASSED] drop_first_arg_test
[21:25:59] [PASSED] first_arg_example
[21:25:59] [PASSED] first_arg_test
[21:25:59] [PASSED] last_arg_example
[21:25:59] [PASSED] last_arg_test
[21:25:59] [PASSED] pick_arg_example
[21:25:59] [PASSED] if_args_example
[21:25:59] [PASSED] if_args_test
[21:25:59] [PASSED] sep_comma_example
[21:25:59] ====================== [PASSED] args =======================
[21:25:59] =================== xe_pci (3 subtests) ====================
[21:25:59] ==================== check_graphics_ip ====================
[21:25:59] [PASSED] 12.00 Xe_LP
[21:25:59] [PASSED] 12.10 Xe_LP+
[21:25:59] [PASSED] 12.55 Xe_HPG
[21:25:59] [PASSED] 12.60 Xe_HPC
[21:25:59] [PASSED] 12.70 Xe_LPG
[21:25:59] [PASSED] 12.71 Xe_LPG
[21:25:59] [PASSED] 12.74 Xe_LPG+
[21:25:59] [PASSED] 20.01 Xe2_HPG
[21:25:59] [PASSED] 20.02 Xe2_HPG
[21:25:59] [PASSED] 20.04 Xe2_LPG
[21:25:59] [PASSED] 30.00 Xe3_LPG
[21:25:59] [PASSED] 30.01 Xe3_LPG
[21:25:59] [PASSED] 30.03 Xe3_LPG
[21:25:59] [PASSED] 30.04 Xe3_LPG
[21:25:59] [PASSED] 30.05 Xe3_LPG
[21:25:59] [PASSED] 35.10 Xe3p_LPG
[21:25:59] [PASSED] 35.11 Xe3p_XPC
[21:25:59] ================ [PASSED] check_graphics_ip ================
[21:25:59] ===================== check_media_ip ======================
[21:25:59] [PASSED] 12.00 Xe_M
[21:25:59] [PASSED] 12.55 Xe_HPM
[21:25:59] [PASSED] 13.00 Xe_LPM+
[21:25:59] [PASSED] 13.01 Xe2_HPM
[21:25:59] [PASSED] 20.00 Xe2_LPM
[21:25:59] [PASSED] 30.00 Xe3_LPM
[21:25:59] [PASSED] 30.02 Xe3_LPM
[21:25:59] [PASSED] 35.00 Xe3p_LPM
[21:25:59] [PASSED] 35.03 Xe3p_HPM
[21:25:59] ================= [PASSED] check_media_ip ==================
[21:25:59] =================== check_platform_desc ===================
[21:25:59] [PASSED] 0x9A60 (TIGERLAKE)
[21:25:59] [PASSED] 0x9A68 (TIGERLAKE)
[21:25:59] [PASSED] 0x9A70 (TIGERLAKE)
[21:25:59] [PASSED] 0x9A40 (TIGERLAKE)
[21:25:59] [PASSED] 0x9A49 (TIGERLAKE)
[21:25:59] [PASSED] 0x9A59 (TIGERLAKE)
[21:25:59] [PASSED] 0x9A78 (TIGERLAKE)
[21:25:59] [PASSED] 0x9AC0 (TIGERLAKE)
[21:25:59] [PASSED] 0x9AC9 (TIGERLAKE)
[21:25:59] [PASSED] 0x9AD9 (TIGERLAKE)
[21:25:59] [PASSED] 0x9AF8 (TIGERLAKE)
[21:25:59] [PASSED] 0x4C80 (ROCKETLAKE)
[21:25:59] [PASSED] 0x4C8A (ROCKETLAKE)
[21:25:59] [PASSED] 0x4C8B (ROCKETLAKE)
[21:25:59] [PASSED] 0x4C8C (ROCKETLAKE)
[21:25:59] [PASSED] 0x4C90 (ROCKETLAKE)
[21:25:59] [PASSED] 0x4C9A (ROCKETLAKE)
[21:25:59] [PASSED] 0x4680 (ALDERLAKE_S)
[21:25:59] [PASSED] 0x4682 (ALDERLAKE_S)
[21:25:59] [PASSED] 0x4688 (ALDERLAKE_S)
[21:25:59] [PASSED] 0x468A (ALDERLAKE_S)
[21:25:59] [PASSED] 0x468B (ALDERLAKE_S)
[21:25:59] [PASSED] 0x4690 (ALDERLAKE_S)
[21:25:59] [PASSED] 0x4692 (ALDERLAKE_S)
[21:25:59] [PASSED] 0x4693 (ALDERLAKE_S)
[21:25:59] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46AA (ALDERLAKE_P)
[21:25:59] [PASSED] 0x462A (ALDERLAKE_P)
[21:25:59] [PASSED] 0x4626 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x4628 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46B0 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:25:59] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:25:59] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:25:59] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:25:59] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:25:59] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:25:59] [PASSED] 0xA721 (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA720 (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:25:59] [PASSED] 0xA780 (ALDERLAKE_S)
[21:25:59] [PASSED] 0xA781 (ALDERLAKE_S)
[21:25:59] [PASSED] 0xA782 (ALDERLAKE_S)
[21:25:59] [PASSED] 0xA783 (ALDERLAKE_S)
[21:25:59] [PASSED] 0xA788 (ALDERLAKE_S)
[21:25:59] [PASSED] 0xA789 (ALDERLAKE_S)
[21:25:59] [PASSED] 0xA78A (ALDERLAKE_S)
[21:25:59] [PASSED] 0xA78B (ALDERLAKE_S)
[21:25:59] [PASSED] 0x4905 (DG1)
[21:25:59] [PASSED] 0x4906 (DG1)
[21:25:59] [PASSED] 0x4907 (DG1)
[21:25:59] [PASSED] 0x4908 (DG1)
[21:25:59] [PASSED] 0x4909 (DG1)
[21:25:59] [PASSED] 0x56C0 (DG2)
[21:25:59] [PASSED] 0x56C2 (DG2)
[21:25:59] [PASSED] 0x56C1 (DG2)
[21:25:59] [PASSED] 0x7D51 (METEORLAKE)
[21:25:59] [PASSED] 0x7DD1 (METEORLAKE)
[21:25:59] [PASSED] 0x7D41 (METEORLAKE)
[21:25:59] [PASSED] 0x7D67 (METEORLAKE)
[21:25:59] [PASSED] 0xB640 (METEORLAKE)
[21:25:59] [PASSED] 0x56A0 (DG2)
[21:25:59] [PASSED] 0x56A1 (DG2)
[21:25:59] [PASSED] 0x56A2 (DG2)
[21:25:59] [PASSED] 0x56BE (DG2)
[21:25:59] [PASSED] 0x56BF (DG2)
[21:25:59] [PASSED] 0x5690 (DG2)
[21:25:59] [PASSED] 0x5691 (DG2)
[21:25:59] [PASSED] 0x5692 (DG2)
[21:25:59] [PASSED] 0x56A5 (DG2)
[21:25:59] [PASSED] 0x56A6 (DG2)
[21:25:59] [PASSED] 0x56B0 (DG2)
[21:25:59] [PASSED] 0x56B1 (DG2)
[21:25:59] [PASSED] 0x56BA (DG2)
[21:25:59] [PASSED] 0x56BB (DG2)
[21:25:59] [PASSED] 0x56BC (DG2)
[21:25:59] [PASSED] 0x56BD (DG2)
[21:25:59] [PASSED] 0x5693 (DG2)
[21:25:59] [PASSED] 0x5694 (DG2)
[21:25:59] [PASSED] 0x5695 (DG2)
[21:25:59] [PASSED] 0x56A3 (DG2)
[21:25:59] [PASSED] 0x56A4 (DG2)
[21:25:59] [PASSED] 0x56B2 (DG2)
[21:25:59] [PASSED] 0x56B3 (DG2)
[21:25:59] [PASSED] 0x5696 (DG2)
[21:25:59] [PASSED] 0x5697 (DG2)
[21:25:59] [PASSED] 0xB69 (PVC)
[21:25:59] [PASSED] 0xB6E (PVC)
[21:25:59] [PASSED] 0xBD4 (PVC)
[21:25:59] [PASSED] 0xBD5 (PVC)
[21:25:59] [PASSED] 0xBD6 (PVC)
[21:25:59] [PASSED] 0xBD7 (PVC)
[21:25:59] [PASSED] 0xBD8 (PVC)
[21:25:59] [PASSED] 0xBD9 (PVC)
[21:25:59] [PASSED] 0xBDA (PVC)
[21:25:59] [PASSED] 0xBDB (PVC)
[21:25:59] [PASSED] 0xBE0 (PVC)
[21:25:59] [PASSED] 0xBE1 (PVC)
[21:25:59] [PASSED] 0xBE5 (PVC)
[21:25:59] [PASSED] 0x7D40 (METEORLAKE)
[21:25:59] [PASSED] 0x7D45 (METEORLAKE)
[21:25:59] [PASSED] 0x7D55 (METEORLAKE)
[21:25:59] [PASSED] 0x7D60 (METEORLAKE)
[21:25:59] [PASSED] 0x7DD5 (METEORLAKE)
[21:25:59] [PASSED] 0x6420 (LUNARLAKE)
[21:25:59] [PASSED] 0x64A0 (LUNARLAKE)
[21:25:59] [PASSED] 0x64B0 (LUNARLAKE)
[21:25:59] [PASSED] 0xE202 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE209 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE20B (BATTLEMAGE)
[21:25:59] [PASSED] 0xE20C (BATTLEMAGE)
[21:25:59] [PASSED] 0xE20D (BATTLEMAGE)
[21:25:59] [PASSED] 0xE210 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE211 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE212 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE216 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE220 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE221 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE222 (BATTLEMAGE)
[21:25:59] [PASSED] 0xE223 (BATTLEMAGE)
[21:25:59] [PASSED] 0xB080 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB081 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB082 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB083 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB084 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB085 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB086 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB087 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB08F (PANTHERLAKE)
[21:25:59] [PASSED] 0xB090 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB0A1 (PANTHERLAKE)
[21:25:59] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:25:59] [PASSED] 0xFD80 (PANTHERLAKE)
[21:25:59] [PASSED] 0xFD81 (PANTHERLAKE)
[21:25:59] [PASSED] 0xD740 (NOVALAKE_S)
[21:25:59] [PASSED] 0xD741 (NOVALAKE_S)
[21:25:59] [PASSED] 0xD742 (NOVALAKE_S)
[21:25:59] [PASSED] 0xD743 (NOVALAKE_S)
[21:25:59] [PASSED] 0xD745 (NOVALAKE_S)
[21:25:59] [PASSED] 0xD74A (NOVALAKE_S)
[21:25:59] [PASSED] 0xD74B (NOVALAKE_S)
[21:25:59] [PASSED] 0x674C (CRESCENTISLAND)
[21:25:59] [PASSED] 0x674D (CRESCENTISLAND)
[21:25:59] [PASSED] 0x674E (CRESCENTISLAND)
[21:25:59] [PASSED] 0x674F (CRESCENTISLAND)
[21:25:59] [PASSED] 0x6750 (CRESCENTISLAND)
[21:25:59] [PASSED] 0x6751 (CRESCENTISLAND)
[21:25:59] [PASSED] 0xD750 (NOVALAKE_P)
[21:25:59] [PASSED] 0xD751 (NOVALAKE_P)
[21:25:59] [PASSED] 0xD752 (NOVALAKE_P)
[21:25:59] [PASSED] 0xD753 (NOVALAKE_P)
[21:25:59] [PASSED] 0xD754 (NOVALAKE_P)
[21:25:59] [PASSED] 0xD755 (NOVALAKE_P)
[21:25:59] [PASSED] 0xD756 (NOVALAKE_P)
[21:25:59] [PASSED] 0xD757 (NOVALAKE_P)
[21:25:59] [PASSED] 0xD75F (NOVALAKE_P)
[21:25:59] =============== [PASSED] check_platform_desc ===============
[21:25:59] ===================== [PASSED] xe_pci ======================
[21:25:59] ============= xe_rtp_tables_test (5 subtests) ==============
[21:25:59] ================== xe_rtp_table_gt_test ===================
[21:25:59] [PASSED] gt_was/14011060649
[21:25:59] [PASSED] gt_was/14011059788
[21:25:59] [PASSED] gt_was/14015795083
[21:25:59] [PASSED] gt_was/16021867713
[21:25:59] [PASSED] gt_was/14019449301
[21:25:59] [PASSED] gt_was/16028005424
[21:25:59] [PASSED] gt_was/14026578760
[21:25:59] [PASSED] gt_was/1409420604
[21:25:59] [PASSED] gt_was/1408615072
[21:25:59] [PASSED] gt_was/22010523718
[21:25:59] [PASSED] gt_was/14011006942
[21:25:59] [PASSED] gt_was/14014830051
[21:25:59] [PASSED] gt_was/18018781329
[21:25:59] [PASSED] gt_was/1509235366
[21:25:59] [PASSED] gt_was/18018781329
[21:25:59] [PASSED] gt_was/16016694945
[21:25:59] [PASSED] gt_was/14018575942
[21:25:59] [PASSED] gt_was/22016670082
[21:25:59] [PASSED] gt_was/22016670082
[21:25:59] [PASSED] gt_was/14017421178
[21:25:59] [PASSED] gt_was/16025250150
[21:25:59] [PASSED] gt_was/14021871409
[21:25:59] [PASSED] gt_was/16021865536
[21:25:59] [PASSED] gt_was/14021486841
[21:25:59] [PASSED] gt_was/14025160223
[21:25:59] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[21:25:59] [PASSED] gt_was/14025635424
[21:25:59] [PASSED] gt_was/16028005424
[21:25:59] ============== [PASSED] xe_rtp_table_gt_test ===============
[21:25:59] ================== xe_rtp_table_gt_test ===================
[21:25:59] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[21:25:59] [PASSED] gt_tunings/Tuning: 32B Access Enable
[21:25:59] [PASSED] gt_tunings/Tuning: L3 cache
[21:25:59] [PASSED] gt_tunings/Tuning: L3 cache - media
[21:25:59] [PASSED] gt_tunings/Tuning: Compression Overfetch
[21:25:59] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[21:25:59] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[21:25:59] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[21:25:59] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[21:25:59] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[21:25:59] [PASSED] gt_tunings/Tuning: Stateless compression control
[21:25:59] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[21:25:59] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[21:25:59] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[21:25:59] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[21:25:59] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[21:25:59] ============== [PASSED] xe_rtp_table_gt_test ===============
[21:25:59] ================== xe_rtp_table_oob_test ==================
[21:25:59] [PASSED] oob_was/1607983814
[21:25:59] [PASSED] oob_was/16010904313
[21:25:59] [PASSED] oob_was/18022495364
[21:25:59] [PASSED] oob_was/22012773006
[21:25:59] [PASSED] oob_was/14014475959
[21:25:59] [PASSED] oob_was/22011391025
[21:25:59] [PASSED] oob_was/22012727170
[21:25:59] [PASSED] oob_was/22012727685
[21:25:59] [PASSED] oob_was/22016596838
[21:25:59] [PASSED] oob_was/18020744125
[21:25:59] [PASSED] oob_was/1409600907
[21:25:59] [PASSED] oob_was/22014953428
[21:25:59] [PASSED] oob_was/16017236439
[21:25:59] [PASSED] oob_was/14019821291
[21:25:59] [PASSED] oob_was/14015076503
[21:25:59] [PASSED] oob_was/22016122933
[21:25:59] [PASSED] oob_was/14018913170
[21:25:59] [PASSED] oob_was/14018094691
[21:25:59] [PASSED] oob_was/18024947630
[21:25:59] [PASSED] oob_was/16022287689
[21:25:59] [PASSED] oob_was/13011645652
[21:25:59] [PASSED] oob_was/14022293748
[21:25:59] [PASSED] oob_was/22019794406
[21:25:59] [PASSED] oob_was/22019338487
[21:25:59] [PASSED] oob_was/16023588340
[21:25:59] [PASSED] oob_was/14019789679
[21:25:59] [PASSED] oob_was/14022866841
[21:25:59] [PASSED] oob_was/16021333562
[21:25:59] [PASSED] oob_was/14016712196
[21:25:59] [PASSED] oob_was/14015568240
[21:25:59] [PASSED] oob_was/18013179988
[21:25:59] [PASSED] oob_was/1508761755
[21:25:59] [PASSED] oob_was/16023105232
[21:25:59] [PASSED] oob_was/16026508708
[21:25:59] [PASSED] oob_was/14020001231
[21:25:59] [PASSED] oob_was/16023683509
[21:25:59] [PASSED] oob_was/14025515070
[21:25:59] [PASSED] oob_was/15015404425_disable
[21:25:59] [PASSED] oob_was/16026007364
[21:25:59] [PASSED] oob_was/14020316580
[21:25:59] [PASSED] oob_was/14025883347
[21:25:59] [PASSED] oob_was/16029380221
[21:25:59] [PASSED] oob_was/22022079272
[21:25:59] [PASSED] oob_was/16029897822
[21:25:59] [PASSED] oob_was/14027054324
[21:25:59] [PASSED] oob_was/14025941587
[21:25:59] [PASSED] oob_was/16030224309
[21:25:59] ============== [PASSED] xe_rtp_table_oob_test ==============
[21:25:59] ================ xe_rtp_table_dev_oob_test ================
[21:25:59] [PASSED] device_oob_was/22010954014
[21:25:59] [PASSED] device_oob_was/15015404425
[21:25:59] [PASSED] device_oob_was/22019338487_display
[21:25:59] [PASSED] device_oob_was/14022085890
[21:25:59] [PASSED] device_oob_was/14026539277
[21:25:59] [PASSED] device_oob_was/14026633728
[21:25:59] [PASSED] device_oob_was/14026746987
[21:25:59] [PASSED] device_oob_was/14026779378
[21:25:59] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[21:25:59] ========== xe_rtp_table_missing_upper_bound_test ==========
[21:25:59] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[21:25:59] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[21:25:59] [PASSED] register_whitelist/1806527549
[21:25:59] [PASSED] register_whitelist/allow_read_ctx_timestamp
[21:25:59] [PASSED] register_whitelist/allow_read_queue_timestamp
[21:25:59] [PASSED] register_whitelist/16014440446
[21:25:59] [PASSED] register_whitelist/16017236439
[21:25:59] [PASSED] register_whitelist/16020183090
[21:25:59] [PASSED] register_whitelist/14024997852
[21:25:59] [PASSED] register_whitelist/14024997852
[21:25:59] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[21:25:59] =============== [PASSED] xe_rtp_tables_test ================
[21:25:59] =================== xe_rtp (3 subtests) ====================
[21:25:59] =================== xe_rtp_rules_tests ====================
[21:25:59] [PASSED] no
[21:25:59] [PASSED] yes
[21:25:59] [PASSED] no-and-no
[21:25:59] [PASSED] no-and-yes
[21:25:59] [PASSED] yes-and-no
[21:25:59] [PASSED] yes-and-yes
[21:25:59] [PASSED] no-or-no
[21:25:59] [PASSED] no-or-yes
[21:25:59] [PASSED] yes-or-no
[21:25:59] [PASSED] yes-or-yes
[21:25:59] [PASSED] no-yes-or-yes-no
[21:25:59] [PASSED] no-yes-or-yes-yes
[21:25:59] [PASSED] yes-yes-or-no-yes
[21:25:59] [PASSED] yes-yes-or-yes-yes
[21:25:59] [PASSED] no-no-or-yes-or-no
[21:25:59] [PASSED] or
[21:25:59] [PASSED] or-yes
[21:25:59] [PASSED] or-no
[21:25:59] [PASSED] yes-or
[21:25:59] [PASSED] no-or
[21:25:59] [PASSED] no-or-or-yes
[21:25:59] [PASSED] yes-or-or-no
[21:25:59] [PASSED] no-or-or-no
[21:25:59] [PASSED] missing-context-engine-class
[21:25:59] [PASSED] missing-context-engine-class-or-yes
[21:25:59] [PASSED] missing-context-engine-class-or-or-yes
[21:25:59] =============== [PASSED] xe_rtp_rules_tests ================
[21:25:59] =============== xe_rtp_process_to_sr_tests ================
[21:25:59] [PASSED] coalesce-same-reg
[21:25:59] [PASSED] coalesce-same-reg-literal-and-func
[21:25:59] [PASSED] no-match-no-add
[21:25:59] [PASSED] two-regs-two-entries
[21:25:59] [PASSED] clr-one-set-other
[21:25:59] [PASSED] set-field
[21:25:59] [PASSED] conflict-duplicate
[21:25:59] [PASSED] conflict-not-disjoint
[21:25:59] [PASSED] conflict-not-disjoint-literal-and-func
[21:25:59] [PASSED] conflict-reg-type
[21:25:59] [PASSED] bad-mcr-reg-forced-to-regular
[21:25:59] [PASSED] bad-regular-reg-forced-to-mcr
[21:25:59] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:25:59] ================== xe_rtp_process_tests ===================
[21:25:59] [PASSED] active1
[21:25:59] [PASSED] active2
[21:25:59] [PASSED] active-inactive
[21:25:59] [PASSED] inactive-active
[21:25:59] [PASSED] inactive-active-inactive
[21:25:59] [PASSED] inactive-inactive-inactive
[21:25:59] ============== [PASSED] xe_rtp_process_tests ===============
[21:25:59] ===================== [PASSED] xe_rtp ======================
[21:25:59] ==================== xe_wa (1 subtest) =====================
[21:25:59] ======================== xe_wa_gt =========================
[21:25:59] [PASSED] TIGERLAKE B0
[21:25:59] [PASSED] DG1 A0
[21:25:59] [PASSED] DG1 B0
[21:25:59] [PASSED] ALDERLAKE_S A0
[21:25:59] [PASSED] ALDERLAKE_S B0
[21:25:59] [PASSED] ALDERLAKE_S C0
[21:25:59] [PASSED] ALDERLAKE_S D0
[21:25:59] [PASSED] ALDERLAKE_P A0
[21:25:59] [PASSED] ALDERLAKE_P B0
[21:25:59] [PASSED] ALDERLAKE_P C0
[21:25:59] [PASSED] ALDERLAKE_S RPLS D0
[21:25:59] [PASSED] ALDERLAKE_P RPLU E0
[21:25:59] [PASSED] DG2 G10 C0
[21:25:59] [PASSED] DG2 G11 B1
[21:25:59] [PASSED] DG2 G12 A1
[21:25:59] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:25:59] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:25:59] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[21:25:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[21:25:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[21:25:59] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[21:25:59] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[21:25:59] ==================== [PASSED] xe_wa_gt =====================
[21:25:59] ====================== [PASSED] xe_wa ======================
[21:25:59] ============================================================
[21:25:59] Testing complete. Ran 821 tests: passed: 793, skipped: 28
[21:25:59] Elapsed time: 36.120s total, 1.767s configuring, 33.635s building, 0.710s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:25:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:26:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:26:26] Starting KUnit Kernel (1/1)...
[21:26:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:26:26] ============ drm_test_pick_cmdline (2 subtests) ============
[21:26:26] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[21:26:26] =============== drm_test_pick_cmdline_named ===============
[21:26:26] [PASSED] NTSC
[21:26:26] [PASSED] NTSC-J
[21:26:26] [PASSED] PAL
[21:26:26] [PASSED] PAL-M
[21:26:26] =========== [PASSED] drm_test_pick_cmdline_named ===========
[21:26:26] ============== [PASSED] drm_test_pick_cmdline ==============
[21:26:26] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:26:26] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:26:26] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:26:26] =========== drm_validate_clone_mode (2 subtests) ===========
[21:26:26] ============== drm_test_check_in_clone_mode ===============
[21:26:26] [PASSED] in_clone_mode
[21:26:26] [PASSED] not_in_clone_mode
[21:26:26] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:26:26] =============== drm_test_check_valid_clones ===============
[21:26:26] [PASSED] not_in_clone_mode
[21:26:26] [PASSED] valid_clone
[21:26:26] [PASSED] invalid_clone
[21:26:26] =========== [PASSED] drm_test_check_valid_clones ===========
[21:26:26] ============= [PASSED] drm_validate_clone_mode =============
[21:26:26] ============= drm_validate_modeset (1 subtest) =============
[21:26:26] [PASSED] drm_test_check_connector_changed_modeset
[21:26:26] ============== [PASSED] drm_validate_modeset ===============
[21:26:26] ====== drm_test_bridge_get_current_state (1 subtest) =======
[21:26:26] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:26:26] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:26:26] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[21:26:26] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:26:26] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:26:26] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[21:26:26] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:26:26] ============== drm_bridge_alloc (2 subtests) ===============
[21:26:26] [PASSED] drm_test_drm_bridge_alloc_basic
[21:26:26] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:26:26] ================ [PASSED] drm_bridge_alloc =================
[21:26:26] ============= drm_bridge_bus_fmt (5 subtests) ==============
[21:26:26] [PASSED] drm_test_bridge_rgb_yuv_rgb
[21:26:26] [PASSED] drm_test_bridge_must_convert_to_yuv444
[21:26:26] [PASSED] drm_test_bridge_hdmi_auto_rgb
[21:26:26] [PASSED] drm_test_bridge_auto_first
[21:26:26] [PASSED] drm_test_bridge_rgb_yuv_no_path
[21:26:26] =============== [PASSED] drm_bridge_bus_fmt ================
[21:26:26] ============= drm_cmdline_parser (40 subtests) =============
[21:26:26] [PASSED] drm_test_cmdline_force_d_only
[21:26:26] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:26:26] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:26:26] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:26:26] [PASSED] drm_test_cmdline_force_e_only
[21:26:26] [PASSED] drm_test_cmdline_res
[21:26:26] [PASSED] drm_test_cmdline_res_vesa
[21:26:26] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:26:26] [PASSED] drm_test_cmdline_res_rblank
[21:26:26] [PASSED] drm_test_cmdline_res_bpp
[21:26:26] [PASSED] drm_test_cmdline_res_refresh
[21:26:26] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:26:26] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:26:26] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:26:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:26:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:26:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:26:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:26:26] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:26:26] [PASSED] drm_test_cmdline_res_margins_force_on
[21:26:26] [PASSED] drm_test_cmdline_res_vesa_margins
[21:26:26] [PASSED] drm_test_cmdline_name
[21:26:26] [PASSED] drm_test_cmdline_name_bpp
[21:26:26] [PASSED] drm_test_cmdline_name_option
[21:26:26] [PASSED] drm_test_cmdline_name_bpp_option
[21:26:26] [PASSED] drm_test_cmdline_rotate_0
[21:26:26] [PASSED] drm_test_cmdline_rotate_90
[21:26:26] [PASSED] drm_test_cmdline_rotate_180
[21:26:26] [PASSED] drm_test_cmdline_rotate_270
[21:26:26] [PASSED] drm_test_cmdline_hmirror
[21:26:26] [PASSED] drm_test_cmdline_vmirror
[21:26:26] [PASSED] drm_test_cmdline_margin_options
[21:26:26] [PASSED] drm_test_cmdline_multiple_options
[21:26:26] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:26:26] [PASSED] drm_test_cmdline_extra_and_option
[21:26:26] [PASSED] drm_test_cmdline_freestanding_options
[21:26:26] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:26:26] [PASSED] drm_test_cmdline_panel_orientation
[21:26:26] ================ drm_test_cmdline_invalid =================
[21:26:26] [PASSED] margin_only
[21:26:26] [PASSED] interlace_only
[21:26:26] [PASSED] res_missing_x
[21:26:26] [PASSED] res_missing_y
[21:26:26] [PASSED] res_bad_y
[21:26:26] [PASSED] res_missing_y_bpp
[21:26:26] [PASSED] res_bad_bpp
[21:26:26] [PASSED] res_bad_refresh
[21:26:26] [PASSED] res_bpp_refresh_force_on_off
[21:26:26] [PASSED] res_invalid_mode
[21:26:26] [PASSED] res_bpp_wrong_place_mode
[21:26:26] [PASSED] name_bpp_refresh
[21:26:26] [PASSED] name_refresh
[21:26:26] [PASSED] name_refresh_wrong_mode
[21:26:26] [PASSED] name_refresh_invalid_mode
[21:26:26] [PASSED] rotate_multiple
[21:26:26] [PASSED] rotate_invalid_val
[21:26:26] [PASSED] rotate_truncated
[21:26:26] [PASSED] invalid_option
[21:26:26] [PASSED] invalid_tv_option
[21:26:26] [PASSED] truncated_tv_option
[21:26:26] ============ [PASSED] drm_test_cmdline_invalid =============
[21:26:26] =============== drm_test_cmdline_tv_options ===============
[21:26:26] [PASSED] NTSC
[21:26:26] [PASSED] NTSC_443
[21:26:26] [PASSED] NTSC_J
[21:26:26] [PASSED] PAL
[21:26:26] [PASSED] PAL_M
[21:26:26] [PASSED] PAL_N
[21:26:26] [PASSED] SECAM
[21:26:26] [PASSED] MONO_525
[21:26:26] [PASSED] MONO_625
[21:26:26] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:26:26] =============== [PASSED] drm_cmdline_parser ================
[21:26:26] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:26:26] [PASSED] drm_test_connector_hdmi_init_valid
[21:26:26] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:26:26] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:26:26] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:26:26] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:26:26] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:26:26] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:26:26] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:26:26] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:26:26] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:26:26] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:26:26] [PASSED] supported_formats=0x5 yuv420_allowed=1
[21:26:26] [PASSED] supported_formats=0x5 yuv420_allowed=0
[21:26:26] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:26:26] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:26:26] [PASSED] drm_test_connector_hdmi_init_null_product
[21:26:26] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:26:26] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:26:26] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:26:26] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:26:26] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:26:26] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:26:26] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:26:26] ========= drm_test_connector_hdmi_init_type_valid =========
[21:26:26] [PASSED] HDMI-A
[21:26:26] [PASSED] HDMI-B
[21:26:26] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:26:26] ======== drm_test_connector_hdmi_init_type_invalid ========
[21:26:26] [PASSED] Unknown
[21:26:26] [PASSED] VGA
[21:26:26] [PASSED] DVI-I
[21:26:26] [PASSED] DVI-D
[21:26:26] [PASSED] DVI-A
[21:26:26] [PASSED] Composite
[21:26:26] [PASSED] SVIDEO
[21:26:26] [PASSED] LVDS
[21:26:26] [PASSED] Component
[21:26:26] [PASSED] DIN
[21:26:26] [PASSED] DP
[21:26:26] [PASSED] TV
[21:26:26] [PASSED] eDP
[21:26:26] [PASSED] Virtual
[21:26:26] [PASSED] DSI
[21:26:26] [PASSED] DPI
[21:26:26] [PASSED] Writeback
[21:26:26] [PASSED] SPI
[21:26:26] [PASSED] USB
[21:26:26] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:26:26] ============ [PASSED] drmm_connector_hdmi_init =============
[21:26:26] ============= drmm_connector_init (3 subtests) =============
[21:26:26] [PASSED] drm_test_drmm_connector_init
[21:26:26] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:26:26] ========= drm_test_drmm_connector_init_type_valid =========
[21:26:26] [PASSED] Unknown
[21:26:26] [PASSED] VGA
[21:26:26] [PASSED] DVI-I
[21:26:26] [PASSED] DVI-D
[21:26:26] [PASSED] DVI-A
[21:26:26] [PASSED] Composite
[21:26:26] [PASSED] SVIDEO
[21:26:26] [PASSED] LVDS
[21:26:26] [PASSED] Component
[21:26:26] [PASSED] DIN
[21:26:26] [PASSED] DP
[21:26:26] [PASSED] HDMI-A
[21:26:26] [PASSED] HDMI-B
[21:26:26] [PASSED] TV
[21:26:26] [PASSED] eDP
[21:26:26] [PASSED] Virtual
[21:26:26] [PASSED] DSI
[21:26:26] [PASSED] DPI
[21:26:26] [PASSED] Writeback
[21:26:26] [PASSED] SPI
[21:26:26] [PASSED] USB
[21:26:26] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:26:26] =============== [PASSED] drmm_connector_init ===============
[21:26:26] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_init
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:26:26] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[21:26:26] [PASSED] Unknown
[21:26:26] [PASSED] VGA
[21:26:26] [PASSED] DVI-I
[21:26:26] [PASSED] DVI-D
[21:26:26] [PASSED] DVI-A
[21:26:26] [PASSED] Composite
[21:26:26] [PASSED] SVIDEO
[21:26:26] [PASSED] LVDS
[21:26:26] [PASSED] Component
[21:26:26] [PASSED] DIN
[21:26:26] [PASSED] DP
[21:26:26] [PASSED] HDMI-A
[21:26:26] [PASSED] HDMI-B
[21:26:26] [PASSED] TV
[21:26:26] [PASSED] eDP
[21:26:26] [PASSED] Virtual
[21:26:26] [PASSED] DSI
[21:26:26] [PASSED] DPI
[21:26:26] [PASSED] Writeback
[21:26:26] [PASSED] SPI
[21:26:26] [PASSED] USB
[21:26:26] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:26:26] ======== drm_test_drm_connector_dynamic_init_name =========
[21:26:26] [PASSED] Unknown
[21:26:26] [PASSED] VGA
[21:26:26] [PASSED] DVI-I
[21:26:26] [PASSED] DVI-D
[21:26:26] [PASSED] DVI-A
[21:26:26] [PASSED] Composite
[21:26:26] [PASSED] SVIDEO
[21:26:26] [PASSED] LVDS
[21:26:26] [PASSED] Component
[21:26:26] [PASSED] DIN
[21:26:26] [PASSED] DP
[21:26:26] [PASSED] HDMI-A
[21:26:26] [PASSED] HDMI-B
[21:26:26] [PASSED] TV
[21:26:26] [PASSED] eDP
[21:26:26] [PASSED] Virtual
[21:26:26] [PASSED] DSI
[21:26:26] [PASSED] DPI
[21:26:26] [PASSED] Writeback
[21:26:26] [PASSED] SPI
[21:26:26] [PASSED] USB
[21:26:26] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:26:26] =========== [PASSED] drm_connector_dynamic_init ============
[21:26:26] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:26:26] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:26:26] ======= drm_connector_dynamic_register (7 subtests) ========
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:26:26] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:26:26] ========= [PASSED] drm_connector_dynamic_register ==========
[21:26:26] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:26:26] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:26:26] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:26:26] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:26:26] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:26:26] ========== drm_test_get_tv_mode_from_name_valid ===========
[21:26:26] [PASSED] NTSC
[21:26:26] [PASSED] NTSC-443
[21:26:26] [PASSED] NTSC-J
[21:26:26] [PASSED] PAL
[21:26:26] [PASSED] PAL-M
[21:26:26] [PASSED] PAL-N
[21:26:26] [PASSED] SECAM
[21:26:26] [PASSED] Mono
[21:26:26] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:26:26] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:26:26] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:26:26] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:26:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:26:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:26:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:26:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:26:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:26:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:26:26] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[21:26:26] [PASSED] VIC 96
[21:26:26] [PASSED] VIC 97
[21:26:26] [PASSED] VIC 101
[21:26:26] [PASSED] VIC 102
[21:26:26] [PASSED] VIC 106
[21:26:26] [PASSED] VIC 107
[21:26:26] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:26:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:26:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:26:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:26:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:26:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:26:26] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:26:26] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:26:26] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[21:26:26] [PASSED] Automatic
[21:26:26] [PASSED] Full
[21:26:26] [PASSED] Limited 16:235
[21:26:26] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:26:26] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:26:26] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:26:26] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:26:26] === drm_test_drm_hdmi_connector_get_output_format_name ====
[21:26:26] [PASSED] RGB
[21:26:26] [PASSED] YUV 4:2:0
[21:26:26] [PASSED] YUV 4:2:2
[21:26:26] [PASSED] YUV 4:4:4
[21:26:26] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:26:26] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:26:26] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:26:26] ============= drm_damage_helper (21 subtests) ==============
[21:26:26] [PASSED] drm_test_damage_iter_no_damage
[21:26:26] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:26:26] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:26:26] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:26:26] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:26:26] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:26:26] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:26:26] [PASSED] drm_test_damage_iter_simple_damage
[21:26:26] [PASSED] drm_test_damage_iter_single_damage
[21:26:26] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:26:26] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:26:26] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:26:26] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:26:26] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:26:26] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:26:26] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:26:26] [PASSED] drm_test_damage_iter_damage
[21:26:26] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:26:26] [PASSED] drm_test_damage_iter_damage_one_outside
[21:26:26] [PASSED] drm_test_damage_iter_damage_src_moved
[21:26:26] [PASSED] drm_test_damage_iter_damage_not_visible
[21:26:26] ================ [PASSED] drm_damage_helper ================
[21:26:26] ============== drm_dp_mst_helper (3 subtests) ==============
[21:26:26] ============== drm_test_dp_mst_calc_pbn_mode ==============
[21:26:26] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:26:26] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:26:26] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:26:26] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:26:26] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:26:26] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:26:26] ============== drm_test_dp_mst_calc_pbn_div ===============
[21:26:26] [PASSED] Link rate 2000000 lane count 4
[21:26:26] [PASSED] Link rate 2000000 lane count 2
[21:26:26] [PASSED] Link rate 2000000 lane count 1
[21:26:26] [PASSED] Link rate 1350000 lane count 4
[21:26:26] [PASSED] Link rate 1350000 lane count 2
[21:26:26] [PASSED] Link rate 1350000 lane count 1
[21:26:26] [PASSED] Link rate 1000000 lane count 4
[21:26:26] [PASSED] Link rate 1000000 lane count 2
[21:26:26] [PASSED] Link rate 1000000 lane count 1
[21:26:26] [PASSED] Link rate 810000 lane count 4
[21:26:26] [PASSED] Link rate 810000 lane count 2
[21:26:26] [PASSED] Link rate 810000 lane count 1
[21:26:26] [PASSED] Link rate 540000 lane count 4
[21:26:26] [PASSED] Link rate 540000 lane count 2
[21:26:26] [PASSED] Link rate 540000 lane count 1
[21:26:26] [PASSED] Link rate 270000 lane count 4
[21:26:26] [PASSED] Link rate 270000 lane count 2
[21:26:26] [PASSED] Link rate 270000 lane count 1
[21:26:26] [PASSED] Link rate 162000 lane count 4
[21:26:26] [PASSED] Link rate 162000 lane count 2
[21:26:26] [PASSED] Link rate 162000 lane count 1
[21:26:26] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:26:26] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[21:26:26] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:26:26] [PASSED] DP_POWER_UP_PHY with port number
[21:26:26] [PASSED] DP_POWER_DOWN_PHY with port number
[21:26:26] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:26:26] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:26:26] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:26:26] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:26:26] [PASSED] DP_QUERY_PAYLOAD with port number
[21:26:26] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:26:26] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:26:26] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:26:26] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:26:26] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:26:26] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:26:26] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:26:26] [PASSED] DP_REMOTE_I2C_READ with port number
[21:26:26] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:26:26] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:26:26] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:26:26] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:26:26] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:26:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:26:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:26:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:26:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:26:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:26:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:26:26] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:26:26] ================ [PASSED] drm_dp_mst_helper ================
[21:26:26] ================== drm_exec (7 subtests) ===================
[21:26:26] [PASSED] sanitycheck
[21:26:26] [PASSED] test_lock
[21:26:26] [PASSED] test_lock_unlock
[21:26:26] [PASSED] test_duplicates
[21:26:26] [PASSED] test_prepare
[21:26:26] [PASSED] test_prepare_array
[21:26:26] [PASSED] test_multiple_loops
[21:26:26] ==================== [PASSED] drm_exec =====================
[21:26:26] =========== drm_format_helper_test (17 subtests) ===========
[21:26:26] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:26:26] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:26:26] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:26:26] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:26:26] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:26:26] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:26:26] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:26:26] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:26:26] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:26:26] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:26:26] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:26:26] ============== drm_test_fb_xrgb8888_to_mono ===============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:26:26] ==================== drm_test_fb_swab =====================
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ================ [PASSED] drm_test_fb_swab =================
[21:26:26] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:26:26] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[21:26:26] [PASSED] single_pixel_source_buffer
[21:26:26] [PASSED] single_pixel_clip_rectangle
[21:26:26] [PASSED] well_known_colors
[21:26:26] [PASSED] destination_pitch
[21:26:26] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:26:26] ================= drm_test_fb_clip_offset =================
[21:26:26] [PASSED] pass through
[21:26:26] [PASSED] horizontal offset
[21:26:26] [PASSED] vertical offset
[21:26:26] [PASSED] horizontal and vertical offset
[21:26:26] [PASSED] horizontal offset (custom pitch)
[21:26:26] [PASSED] vertical offset (custom pitch)
[21:26:26] [PASSED] horizontal and vertical offset (custom pitch)
[21:26:26] ============= [PASSED] drm_test_fb_clip_offset =============
[21:26:26] =================== drm_test_fb_memcpy ====================
[21:26:26] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:26:26] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:26:26] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:26:26] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:26:26] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:26:26] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:26:26] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:26:26] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:26:26] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:26:26] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:26:26] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:26:26] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:26:26] =============== [PASSED] drm_test_fb_memcpy ================
[21:26:26] ============= [PASSED] drm_format_helper_test ==============
[21:26:26] ================= drm_format (18 subtests) =================
[21:26:26] [PASSED] drm_test_format_block_width_invalid
[21:26:26] [PASSED] drm_test_format_block_width_one_plane
[21:26:26] [PASSED] drm_test_format_block_width_two_plane
[21:26:26] [PASSED] drm_test_format_block_width_three_plane
[21:26:26] [PASSED] drm_test_format_block_width_tiled
[21:26:26] [PASSED] drm_test_format_block_height_invalid
[21:26:26] [PASSED] drm_test_format_block_height_one_plane
[21:26:26] [PASSED] drm_test_format_block_height_two_plane
[21:26:26] [PASSED] drm_test_format_block_height_three_plane
[21:26:26] [PASSED] drm_test_format_block_height_tiled
[21:26:26] [PASSED] drm_test_format_min_pitch_invalid
[21:26:26] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:26:26] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:26:26] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:26:26] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:26:26] [PASSED] drm_test_format_min_pitch_two_plane
[21:26:26] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:26:26] [PASSED] drm_test_format_min_pitch_tiled
[21:26:26] =================== [PASSED] drm_format ====================
[21:26:26] ============== drm_framebuffer (10 subtests) ===============
[21:26:26] ========== drm_test_framebuffer_check_src_coords ==========
[21:26:26] [PASSED] Success: source fits into fb
[21:26:26] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:26:26] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:26:26] [PASSED] Fail: overflowing fb with source width
[21:26:26] [PASSED] Fail: overflowing fb with source height
[21:26:26] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:26:26] [PASSED] drm_test_framebuffer_cleanup
[21:26:26] =============== drm_test_framebuffer_create ===============
[21:26:26] [PASSED] ABGR8888 normal sizes
[21:26:26] [PASSED] ABGR8888 max sizes
[21:26:26] [PASSED] ABGR8888 pitch greater than min required
[21:26:26] [PASSED] ABGR8888 pitch less than min required
[21:26:26] [PASSED] ABGR8888 Invalid width
[21:26:26] [PASSED] ABGR8888 Invalid buffer handle
[21:26:26] [PASSED] No pixel format
[21:26:26] [PASSED] ABGR8888 Width 0
[21:26:26] [PASSED] ABGR8888 Height 0
[21:26:26] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:26:26] [PASSED] ABGR8888 Large buffer offset
[21:26:26] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:26:26] [PASSED] ABGR8888 Invalid flag
[21:26:26] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:26:26] [PASSED] ABGR8888 Valid buffer modifier
[21:26:26] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:26:26] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:26:26] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:26:26] [PASSED] NV12 Normal sizes
[21:26:26] [PASSED] NV12 Max sizes
[21:26:26] [PASSED] NV12 Invalid pitch
[21:26:26] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:26:26] [PASSED] NV12 different modifier per-plane
[21:26:26] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:26:26] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:26:26] [PASSED] NV12 Modifier for inexistent plane
[21:26:26] [PASSED] NV12 Handle for inexistent plane
[21:26:26] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:26:26] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:26:26] [PASSED] YVU420 Normal sizes
[21:26:26] [PASSED] YVU420 Max sizes
[21:26:26] [PASSED] YVU420 Invalid pitch
[21:26:26] [PASSED] YVU420 Different pitches
[21:26:26] [PASSED] YVU420 Different buffer offsets/pitches
[21:26:26] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:26:26] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:26:26] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:26:26] [PASSED] YVU420 Valid modifier
[21:26:26] [PASSED] YVU420 Different modifiers per plane
[21:26:26] [PASSED] YVU420 Modifier for inexistent plane
[21:26:26] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:26:26] [PASSED] X0L2 Normal sizes
[21:26:26] [PASSED] X0L2 Max sizes
[21:26:26] [PASSED] X0L2 Invalid pitch
[21:26:26] [PASSED] X0L2 Pitch greater than minimum required
[21:26:26] [PASSED] X0L2 Handle for inexistent plane
[21:26:26] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:26:26] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:26:26] [PASSED] X0L2 Valid modifier
[21:26:26] [PASSED] X0L2 Modifier for inexistent plane
[21:26:26] =========== [PASSED] drm_test_framebuffer_create ===========
[21:26:26] [PASSED] drm_test_framebuffer_free
[21:26:26] [PASSED] drm_test_framebuffer_init
[21:26:26] [PASSED] drm_test_framebuffer_init_bad_format
[21:26:26] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:26:26] [PASSED] drm_test_framebuffer_lookup
[21:26:26] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:26:26] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:26:26] ================= [PASSED] drm_framebuffer =================
[21:26:26] ================ drm_gem_shmem (8 subtests) ================
[21:26:26] [PASSED] drm_gem_shmem_test_obj_create
[21:26:26] [PASSED] drm_gem_shmem_test_obj_create_private
[21:26:26] [PASSED] drm_gem_shmem_test_pin_pages
[21:26:26] [PASSED] drm_gem_shmem_test_vmap
[21:26:26] [PASSED] drm_gem_shmem_test_get_sg_table
[21:26:26] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:26:26] [PASSED] drm_gem_shmem_test_madvise
[21:26:26] [PASSED] drm_gem_shmem_test_purge
[21:26:26] ================== [PASSED] drm_gem_shmem ==================
[21:26:26] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:26:26] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[21:26:26] [PASSED] Automatic
[21:26:26] [PASSED] Full
[21:26:26] [PASSED] Limited 16:235
[21:26:26] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:26:26] [PASSED] drm_test_check_disable_connector
[21:26:26] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:26:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:26:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:26:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:26:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:26:26] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:26:26] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:26:26] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:26:26] [PASSED] drm_test_check_output_bpc_dvi
[21:26:26] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:26:26] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:26:26] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:26:26] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:26:26] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:26:26] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:26:26] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:26:26] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:26:26] ============ drm_test_check_hdmi_color_format =============
[21:26:26] [PASSED] AUTO -> RGB
[21:26:26] [PASSED] YCBCR422 -> YUV422
[21:26:26] [PASSED] YCBCR420 -> YUV420
[21:26:26] [PASSED] YCBCR444 -> YUV444
[21:26:26] [PASSED] RGB -> RGB
[21:26:26] ======== [PASSED] drm_test_check_hdmi_color_format =========
[21:26:26] ======== drm_test_check_hdmi_color_format_420_only ========
[21:26:26] [PASSED] RGB should fail
[21:26:26] [PASSED] YUV444 should fail
[21:26:26] [PASSED] YUV422 should fail
[21:26:26] [PASSED] YUV420 should work
[21:26:26] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[21:26:26] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:26:26] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:26:26] [PASSED] drm_test_check_broadcast_rgb_value
[21:26:26] [PASSED] drm_test_check_bpc_8_value
[21:26:26] [PASSED] drm_test_check_bpc_10_value
[21:26:26] [PASSED] drm_test_check_bpc_12_value
[21:26:26] [PASSED] drm_test_check_format_value
[21:26:26] [PASSED] drm_test_check_tmds_char_value
[21:26:26] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:26:26] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[21:26:26] [PASSED] drm_test_check_mode_valid
[21:26:26] [PASSED] drm_test_check_mode_valid_reject
[21:26:26] [PASSED] drm_test_check_mode_valid_reject_rate
[21:26:26] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:26:26] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[21:26:26] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[21:26:26] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[21:26:26] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:26:26] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[21:26:26] [PASSED] drm_test_check_infoframes
[21:26:26] [PASSED] drm_test_check_reject_avi_infoframe
[21:26:26] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[21:26:26] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[21:26:26] [PASSED] drm_test_check_reject_audio_infoframe
[21:26:26] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[21:26:26] ================= drm_managed (2 subtests) =================
[21:26:26] [PASSED] drm_test_managed_release_action
[21:26:26] [PASSED] drm_test_managed_run_action
[21:26:26] =================== [PASSED] drm_managed ===================
[21:26:26] =================== drm_mm (6 subtests) ====================
[21:26:26] [PASSED] drm_test_mm_init
[21:26:26] [PASSED] drm_test_mm_debug
[21:26:26] [PASSED] drm_test_mm_align32
[21:26:26] [PASSED] drm_test_mm_align64
[21:26:26] [PASSED] drm_test_mm_lowest
[21:26:26] [PASSED] drm_test_mm_highest
[21:26:26] ===================== [PASSED] drm_mm ======================
[21:26:26] ============= drm_modes_analog_tv (5 subtests) =============
[21:26:26] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:26:26] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:26:26] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:26:26] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:26:26] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:26:26] =============== [PASSED] drm_modes_analog_tv ===============
[21:26:26] ============== drm_panic_helper (3 subtests) ===============
[21:26:26] ============= drm_test_panic_screen_user_map ==============
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:26:26] ========= [PASSED] drm_test_panic_screen_user_map ==========
[21:26:26] ============= drm_test_panic_screen_user_page =============
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:26:26] ========= [PASSED] drm_test_panic_screen_user_page =========
[21:26:26] ========== drm_test_panic_screen_user_set_pixel ===========
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:26:26] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[21:26:26] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[21:26:26] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[21:26:26] ================ [PASSED] drm_panic_helper =================
[21:26:26] ============== drm_plane_helper (2 subtests) ===============
[21:26:26] =============== drm_test_check_plane_state ================
[21:26:26] [PASSED] clipping_simple
[21:26:26] [PASSED] clipping_rotate_reflect
[21:26:26] [PASSED] positioning_simple
[21:26:26] [PASSED] upscaling
[21:26:26] [PASSED] downscaling
[21:26:26] [PASSED] rounding1
[21:26:26] [PASSED] rounding2
[21:26:26] [PASSED] rounding3
[21:26:26] [PASSED] rounding4
[21:26:26] =========== [PASSED] drm_test_check_plane_state ============
[21:26:26] =========== drm_test_check_invalid_plane_state ============
[21:26:26] [PASSED] positioning_invalid
[21:26:26] [PASSED] upscaling_invalid
[21:26:26] [PASSED] downscaling_invalid
[21:26:26] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:26:26] ================ [PASSED] drm_plane_helper =================
[21:26:26] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:26:26] ====== drm_test_connector_helper_tv_get_modes_check =======
[21:26:26] [PASSED] None
[21:26:26] [PASSED] PAL
[21:26:26] [PASSED] NTSC
[21:26:26] [PASSED] Both, NTSC Default
[21:26:26] [PASSED] Both, PAL Default
[21:26:26] [PASSED] Both, NTSC Default, with PAL on command-line
[21:26:26] [PASSED] Both, PAL Default, with NTSC on command-line
[21:26:26] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:26:26] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:26:26] ================== drm_rect (9 subtests) ===================
[21:26:26] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:26:26] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:26:26] [PASSED] drm_test_rect_clip_scaled_clipped
[21:26:26] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:26:26] ================= drm_test_rect_intersect =================
[21:26:26] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:26:26] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:26:26] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:26:26] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:26:26] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:26:26] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:26:26] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:26:26] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:26:26] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:26:26] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:26:26] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:26:26] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:26:26] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:26:26] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:26:26] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:26:26] ============= [PASSED] drm_test_rect_intersect =============
[21:26:26] ================ drm_test_rect_calc_hscale ================
[21:26:26] [PASSED] normal use
[21:26:26] [PASSED] out of max range
[21:26:26] [PASSED] out of min range
[21:26:26] [PASSED] zero dst
[21:26:26] [PASSED] negative src
[21:26:26] [PASSED] negative dst
[21:26:26] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:26:26] ================ drm_test_rect_calc_vscale ================
[21:26:26] [PASSED] normal use
[21:26:26] [PASSED] out of max range
[21:26:26] [PASSED] out of min range
[21:26:26] [PASSED] zero dst
[21:26:26] [PASSED] negative src
[21:26:26] [PASSED] negative dst
[21:26:26] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:26:26] ================== drm_test_rect_rotate ===================
[21:26:26] [PASSED] reflect-x
[21:26:26] [PASSED] reflect-y
[21:26:26] [PASSED] rotate-0
[21:26:26] [PASSED] rotate-90
[21:26:26] [PASSED] rotate-180
[21:26:26] [PASSED] rotate-270
[21:26:26] ============== [PASSED] drm_test_rect_rotate ===============
[21:26:26] ================ drm_test_rect_rotate_inv =================
[21:26:26] [PASSED] reflect-x
[21:26:26] [PASSED] reflect-y
[21:26:26] [PASSED] rotate-0
[21:26:26] [PASSED] rotate-90
[21:26:26] [PASSED] rotate-180
[21:26:26] [PASSED] rotate-270
[21:26:26] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:26:26] ==================== [PASSED] drm_rect =====================
[21:26:26] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:26:26] ============ drm_test_sysfb_build_fourcc_list =============
[21:26:26] [PASSED] no native formats
[21:26:26] [PASSED] XRGB8888 as native format
[21:26:26] [PASSED] remove duplicates
[21:26:26] [PASSED] convert alpha formats
[21:26:26] [PASSED] random formats
[21:26:26] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:26:26] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:26:26] ================== drm_fixp (2 subtests) ===================
[21:26:26] [PASSED] drm_test_int2fixp
[21:26:26] [PASSED] drm_test_sm2fixp
[21:26:26] ==================== [PASSED] drm_fixp =====================
[21:26:26] ============================================================
[21:26:26] Testing complete. Ran 667 tests: passed: 667
[21:26:26] Elapsed time: 26.869s total, 1.849s configuring, 24.601s building, 0.409s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:26:26] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:26:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:26:38] Starting KUnit Kernel (1/1)...
[21:26:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:26:38] ================= ttm_device (5 subtests) ==================
[21:26:38] [PASSED] ttm_device_init_basic
[21:26:38] [PASSED] ttm_device_init_multiple
[21:26:38] [PASSED] ttm_device_fini_basic
[21:26:38] [PASSED] ttm_device_init_no_vma_man
[21:26:38] ================== ttm_device_init_pools ==================
[21:26:38] [PASSED] No DMA allocations, no DMA32 required
[21:26:38] [PASSED] DMA allocations, DMA32 required
[21:26:38] [PASSED] No DMA allocations, DMA32 required
[21:26:38] [PASSED] DMA allocations, no DMA32 required
[21:26:38] ============== [PASSED] ttm_device_init_pools ==============
[21:26:38] =================== [PASSED] ttm_device ====================
[21:26:38] ================== ttm_pool (8 subtests) ===================
[21:26:38] ================== ttm_pool_alloc_basic ===================
[21:26:38] [PASSED] One page
[21:26:38] [PASSED] More than one page
[21:26:38] [PASSED] Above the allocation limit
[21:26:38] [PASSED] One page, with coherent DMA mappings enabled
[21:26:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:26:38] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:26:38] ============== ttm_pool_alloc_basic_dma_addr ==============
[21:26:38] [PASSED] One page
[21:26:38] [PASSED] More than one page
[21:26:38] [PASSED] Above the allocation limit
[21:26:38] [PASSED] One page, with coherent DMA mappings enabled
[21:26:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:26:38] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:26:38] [PASSED] ttm_pool_alloc_order_caching_match
[21:26:38] [PASSED] ttm_pool_alloc_caching_mismatch
[21:26:38] [PASSED] ttm_pool_alloc_order_mismatch
[21:26:38] [PASSED] ttm_pool_free_dma_alloc
[21:26:38] [PASSED] ttm_pool_free_no_dma_alloc
[21:26:38] [PASSED] ttm_pool_fini_basic
[21:26:38] ==================== [PASSED] ttm_pool =====================
[21:26:38] ================ ttm_resource (8 subtests) =================
[21:26:38] ================= ttm_resource_init_basic =================
[21:26:38] [PASSED] Init resource in TTM_PL_SYSTEM
[21:26:38] [PASSED] Init resource in TTM_PL_VRAM
[21:26:38] [PASSED] Init resource in a private placement
[21:26:38] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:26:38] ============= [PASSED] ttm_resource_init_basic =============
[21:26:38] [PASSED] ttm_resource_init_pinned
[21:26:38] [PASSED] ttm_resource_fini_basic
[21:26:38] [PASSED] ttm_resource_manager_init_basic
[21:26:38] [PASSED] ttm_resource_manager_usage_basic
[21:26:38] [PASSED] ttm_resource_manager_set_used_basic
[21:26:38] [PASSED] ttm_sys_man_alloc_basic
[21:26:38] [PASSED] ttm_sys_man_free_basic
[21:26:38] ================== [PASSED] ttm_resource ===================
[21:26:38] =================== ttm_tt (15 subtests) ===================
[21:26:38] ==================== ttm_tt_init_basic ====================
[21:26:38] [PASSED] Page-aligned size
[21:26:38] [PASSED] Extra pages requested
[21:26:38] ================ [PASSED] ttm_tt_init_basic ================
[21:26:38] [PASSED] ttm_tt_init_misaligned
[21:26:38] [PASSED] ttm_tt_fini_basic
[21:26:38] [PASSED] ttm_tt_fini_sg
[21:26:38] [PASSED] ttm_tt_fini_shmem
[21:26:38] [PASSED] ttm_tt_create_basic
[21:26:38] [PASSED] ttm_tt_create_invalid_bo_type
[21:26:38] [PASSED] ttm_tt_create_ttm_exists
[21:26:38] [PASSED] ttm_tt_create_failed
[21:26:38] [PASSED] ttm_tt_destroy_basic
[21:26:38] [PASSED] ttm_tt_populate_null_ttm
[21:26:38] [PASSED] ttm_tt_populate_populated_ttm
[21:26:38] [PASSED] ttm_tt_unpopulate_basic
[21:26:38] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:26:38] [PASSED] ttm_tt_swapin_basic
[21:26:38] ===================== [PASSED] ttm_tt ======================
[21:26:38] =================== ttm_bo (14 subtests) ===================
[21:26:38] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[21:26:38] [PASSED] Cannot be interrupted and sleeps
[21:26:38] [PASSED] Cannot be interrupted, locks straight away
[21:26:38] [PASSED] Can be interrupted, sleeps
[21:26:38] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:26:38] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:26:38] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:26:38] [PASSED] ttm_bo_reserve_double_resv
[21:26:38] [PASSED] ttm_bo_reserve_interrupted
[21:26:38] [PASSED] ttm_bo_reserve_deadlock
[21:26:38] [PASSED] ttm_bo_unreserve_basic
[21:26:38] [PASSED] ttm_bo_unreserve_pinned
[21:26:38] [PASSED] ttm_bo_unreserve_bulk
[21:26:38] [PASSED] ttm_bo_fini_basic
[21:26:38] [PASSED] ttm_bo_fini_shared_resv
[21:26:38] [PASSED] ttm_bo_pin_basic
[21:26:38] [PASSED] ttm_bo_pin_unpin_resource
[21:26:38] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:26:38] ===================== [PASSED] ttm_bo ======================
[21:26:38] ============== ttm_bo_validate (22 subtests) ===============
[21:26:38] ============== ttm_bo_init_reserved_sys_man ===============
[21:26:38] [PASSED] Buffer object for userspace
[21:26:38] [PASSED] Kernel buffer object
[21:26:38] [PASSED] Shared buffer object
[21:26:38] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:26:38] ============== ttm_bo_init_reserved_mock_man ==============
[21:26:38] [PASSED] Buffer object for userspace
[21:26:38] [PASSED] Kernel buffer object
[21:26:38] [PASSED] Shared buffer object
[21:26:38] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:26:38] [PASSED] ttm_bo_init_reserved_resv
[21:26:38] ================== ttm_bo_validate_basic ==================
[21:26:38] [PASSED] Buffer object for userspace
[21:26:38] [PASSED] Kernel buffer object
[21:26:38] [PASSED] Shared buffer object
[21:26:38] ============== [PASSED] ttm_bo_validate_basic ==============
[21:26:38] [PASSED] ttm_bo_validate_invalid_placement
[21:26:38] ============= ttm_bo_validate_same_placement ==============
[21:26:38] [PASSED] System manager
[21:26:38] [PASSED] VRAM manager
[21:26:38] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:26:38] [PASSED] ttm_bo_validate_failed_alloc
[21:26:38] [PASSED] ttm_bo_validate_pinned
[21:26:38] [PASSED] ttm_bo_validate_busy_placement
[21:26:38] ================ ttm_bo_validate_multihop =================
[21:26:38] [PASSED] Buffer object for userspace
[21:26:38] [PASSED] Kernel buffer object
[21:26:38] [PASSED] Shared buffer object
[21:26:38] ============ [PASSED] ttm_bo_validate_multihop =============
[21:26:38] ========== ttm_bo_validate_no_placement_signaled ==========
[21:26:38] [PASSED] Buffer object in system domain, no page vector
[21:26:38] [PASSED] Buffer object in system domain with an existing page vector
[21:26:38] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:26:38] ======== ttm_bo_validate_no_placement_not_signaled ========
[21:26:38] [PASSED] Buffer object for userspace
[21:26:38] [PASSED] Kernel buffer object
[21:26:38] [PASSED] Shared buffer object
[21:26:38] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:26:38] [PASSED] ttm_bo_validate_move_fence_signaled
[21:26:38] ========= ttm_bo_validate_move_fence_not_signaled =========
[21:26:38] [PASSED] Waits for GPU
[21:26:38] [PASSED] Tries to lock straight away
[21:26:38] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:26:38] [PASSED] ttm_bo_validate_swapout
[21:26:38] [PASSED] ttm_bo_validate_happy_evict
[21:26:38] [PASSED] ttm_bo_validate_all_pinned_evict
[21:26:38] [PASSED] ttm_bo_validate_allowed_only_evict
[21:26:38] [PASSED] ttm_bo_validate_deleted_evict
[21:26:38] [PASSED] ttm_bo_validate_busy_domain_evict
[21:26:38] [PASSED] ttm_bo_validate_evict_gutting
[21:26:38] [PASSED] ttm_bo_validate_recrusive_evict
[21:26:38] ================= [PASSED] ttm_bo_validate =================
[21:26:38] ============================================================
[21:26:38] Testing complete. Ran 102 tests: passed: 102
[21:26:38] Elapsed time: 12.158s total, 1.826s configuring, 10.117s building, 0.178s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[21:26:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:26:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:26:49] Starting KUnit Kernel (1/1)...
[21:26:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:26:49] =============== dma-buf-fence (12 subtests) ================
[21:26:49] [PASSED] test_sanitycheck
[21:26:49] [PASSED] test_signaling
[21:26:49] [PASSED] test_add_callback
[21:26:49] [PASSED] test_late_add_callback
[21:26:49] [PASSED] test_rm_callback
[21:26:49] [PASSED] test_late_rm_callback
[21:26:49] [PASSED] test_status
[21:26:49] [PASSED] test_error
[21:26:49] [PASSED] test_wait
[21:26:49] [PASSED] test_wait_timeout
[21:26:49] [PASSED] test_stub
[21:26:49] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[21:26:49] ================== [PASSED] dma-buf-fence ==================
[21:26:49] ============ dma-buf-fence-chain (11 subtests) =============
[21:26:49] [PASSED] test_sanitycheck
[21:26:49] [PASSED] test_find_seqno
[21:26:49] [PASSED] test_find_signaled
[21:26:49] [PASSED] test_find_out_of_order
[21:26:54] [PASSED] test_find_gap
[21:26:54] [PASSED] test_find_race
[21:26:54] [PASSED] test_signal_forward
[21:26:54] [PASSED] test_signal_backward
[21:26:54] [PASSED] test_wait_forward
[21:26:54] [PASSED] test_wait_backward
[21:26:54] [PASSED] test_wait_random
[21:26:54] =============== [PASSED] dma-buf-fence-chain ===============
[21:26:54] ============ dma-buf-fence-unwrap (10 subtests) ============
[21:26:54] [PASSED] test_sanitycheck
[21:26:54] [PASSED] test_unwrap_array
[21:26:54] [PASSED] test_unwrap_chain
[21:26:54] [PASSED] test_unwrap_chain_array
[21:26:54] [PASSED] test_unwrap_merge
[21:26:54] [PASSED] test_unwrap_merge_duplicate
[21:26:54] [PASSED] test_unwrap_merge_seqno
[21:26:54] [PASSED] test_unwrap_merge_order
[21:26:54] [PASSED] test_unwrap_merge_complex
[21:26:54] [PASSED] test_unwrap_merge_complex_seqno
[21:26:54] ============== [PASSED] dma-buf-fence-unwrap ===============
[21:26:54] ================ dma-buf-resv (5 subtests) =================
[21:26:54] [PASSED] test_sanitycheck
[21:26:54] ===================== test_signaling ======================
[21:26:54] [PASSED] kernel
[21:26:54] [PASSED] write
[21:26:54] [PASSED] read
[21:26:54] [PASSED] bookkeep
[21:26:54] ================= [PASSED] test_signaling ==================
[21:26:54] ====================== test_for_each ======================
[21:26:54] [PASSED] kernel
[21:26:54] [PASSED] write
[21:26:54] [PASSED] read
[21:26:54] [PASSED] bookkeep
[21:26:54] ================== [PASSED] test_for_each ==================
[21:26:54] ================= test_for_each_unlocked ==================
[21:26:54] [PASSED] kernel
[21:26:54] [PASSED] write
[21:26:54] [PASSED] read
[21:26:54] [PASSED] bookkeep
[21:26:54] ============= [PASSED] test_for_each_unlocked ==============
[21:26:54] ===================== test_get_fences =====================
[21:26:54] [PASSED] kernel
[21:26:54] [PASSED] write
[21:26:54] [PASSED] read
[21:26:54] [PASSED] bookkeep
[21:26:54] ================= [PASSED] test_get_fences =================
[21:26:54] ================== [PASSED] dma-buf-resv ===================
[21:26:54] ============================================================
[21:26:54] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[21:26:54] Elapsed time: 15.750s total, 1.823s configuring, 8.656s building, 5.260s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ i915.CI.BAT: success for SKL_DSSM / DE_CAP cleanup
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
` (6 preceding siblings ...)
2026-10-13 21:26 ` ✓ CI.KUnit: success " Patchwork
@ 2026-10-13 22:29 ` Patchwork
7 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-10-13 22:29 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 1062 bytes --]
== Series Details ==
Series: SKL_DSSM / DE_CAP cleanup
URL : https://patchwork.freedesktop.org/series/176080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_19333 -> Patchwork_176080v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_176080v1/index.html
Participating hosts (39 -> 38)
------------------------------
Missing (1): bat-dg2-13
Changes
-------
No changes found
Build changes
-------------
* Linux: CI_DRM_19333 -> Patchwork_176080v1
CI-20190529: 20190529
CI_DRM_19333: 83b6bc1390606facc1c0426727905f9fcd75836d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9143: 992e2bc5d5fcaef292ea89e3db5cb7a50b6edfc2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_176080v1: 83b6bc1390606facc1c0426727905f9fcd75836d @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_176080v1/index.html
[-- Attachment #2: Type: text/html, Size: 1627 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-10-13 22:29 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-13 20:46 [PATCH v4 0/5] SKL_DSSM / DE_CAP cleanup Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 1/5] drm/i915/display: clean SKL_DSSM register macros Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 2/5] drm/i915/3dlut: disable 3D LUT for pre-GLK Michał Grzelak
2026-10-13 20:59 ` sashiko-bot
2026-10-13 20:47 ` [PATCH v4 3/5] drm/i915/3dlut: log 3D LUT's status Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 4/5] drm/i915/3dlut: disable 3D LUT if unsupported Michał Grzelak
2026-10-13 20:47 ` [PATCH v4 5/5] drm/i915/display: log eDP TC support and DBuf overlap detection state Michał Grzelak
2026-10-13 20:53 ` sashiko-bot
2026-10-13 21:24 ` ✗ CI.checkpatch: warning for SKL_DSSM / DE_CAP cleanup Patchwork
2026-10-13 21:26 ` ✓ CI.KUnit: success " Patchwork
2026-10-13 22:29 ` ✓ i915.CI.BAT: " Patchwork
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